opcodes/ChangeLog

   1 2016-07-07  James Bowman  <james.bowman@ftdichip.com>
   2
   3         * ft32-opc.c (ft32_opc_info): Correct mask for "callc"
   4         and "jmpc".
   5
   6 2016-07-01  Jan Beulich  <jbeulich@suse.com>
   7
   8         * i386-opc.tbl (movzbl, movzbw, movzbq, movzwl, movzwq): Remove.
   9         (movzb): Adjust to cover all permitted suffixes.
  10         (movzw): New.
  11         * i386-tbl.h: Re-generate.
  12
  13 2016-07-01  Jan Beulich  <jbeulich@suse.com>
  14
  15         * i386-opc.tbl (jmp): Remove Disp32S from non-64-bit variant.
  16         (lgdt): Remove Tbyte from non-64-bit variant.
  17         (fxsave64, fxrstor64, xsave64, xrstor64, xsaveopt64, xrstors64,
  18         xsaves64, xsavec64): Remove Disp16.
  19         (cvtsi2ss, cvtsi2sd, invept, invvpid, invpcid, vcvtsi2sd):
  20         Remove Disp32S from non-64-bit variants. Remove Disp16 from
  21         64-bit variants.
  22         (vcvtsi2ss, vcvtsd2si, vcvtsd2usi, vcvtsi2sd, vcvtusi2sd,
  23         vcvtusi2ss, vcvtss2si, vcvtss2usi, vcvttsd2si, vcvttsd2usi,
  24         vcvttss2si, vcvttss2usi, vmovd, vmovq): Remove Disp16 from
  25         64-bit variants.
  26         * i386-tbl.h: Re-generate.
  27
  28 2016-07-01  Jan Beulich  <jbeulich@suse.com>
  29
  30         * i386-opc.tbl (xlat): Remove RepPrefixOk.
  31         * i386-tbl.h: Re-generate.
  32
  33 2016-06-30  Yao Qi  <yao.qi@linaro.org>
  34
  35         * arm-dis.c (print_insn): Fix typo in comment.
  36
  37 2016-06-28  Richard Sandiford  <richard.sandiford@arm.com>
  38
  39         * aarch64-opc.c (operand_general_constraint_met_p): Check the
  40         range of ldst_elemlist operands.
  41         (print_register_list): Use PRIi64 to print the index.
  42         (aarch64_print_operand): Likewise.
  43
  44 2016-06-25  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
  45
  46         * mcore-opc.h: Remove sentinal.
  47         * mcore-dis.c (print_insn_mcore): Adjust.
  48
  49 2016-06-23  Graham Markall  <graham.markall@embecosm.com>
  50
  51         * arc-opc.c: Correct description of availability of NPS400
  52         features.
  53
  54 2016-06-22  Peter Bergner <bergner@vnet.ibm.com>
  55
  56         * ppc-opc.c (RM, DRM, VXASH, VXASH_MASK, XMMF, XMMF_MASK): New defines.
  57         (powerpc_opcodes) <brd, brh, brw, mffsce, mffscdrn, mffscdrni,
  58         mffscrn, mffscrni, mffsl, nandxor, rldixor, setbool,
  59         xor3>: New mnemonics.
  60         <setb>: Change to a VX form instruction.
  61         (insert_sh6): Add support for rldixor.
  62         (extract_sh6): Likewise.
  63
  64 2016-06-22  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
  65
  66         * arc-ext.h: Wrap in extern C.
  67
  68 2016-06-21  Graham Markall  <graham.markall@embecosm.com>
  69
  70         * arc-dis.c (arc_insn_length): Add comment on instruction length.
  71         Use same method for determining instruction length on ARC700 and
  72         NPS-400.
  73         (arc_insn_length, print_insn_arc): Remove bfd_mach_arc_nps400.
  74         * arc-nps400-tbl.h: Make all nps400 instructions ARC700 instructions
  75         with the NPS400 subclass.
  76         * arc-opc.c: Likewise.
  77
  78 2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
  79
  80         * sparc-opc.c (rdasr): New macro.
  81         (wrasr): Likewise.
  82         (rdpr): Likewise.
  83         (wrpr): Likewise.
  84         (rdhpr): Likewise.
  85         (wrhpr): Likewise.
  86         (sparc_opcodes): Use the macros above to fix and expand the
  87         definition of read/write instructions from/to
  88         asr/privileged/hyperprivileged instructions.
  89         * sparc-dis.c (v9_hpriv_reg_names): Add %hmcdper, %hmcddfr and
  90         %hva_mask_nz.  Prefer softint_set and softint_clear over
  91         set_softint and clear_softint.
  92         (print_insn_sparc): Support %ver in Rd.
  93
  94 2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
  95
  96         * sparc-opc.c (sparc_opcodes): Adjust instructions opcode
  97         architecture according to the hardware capabilities they require.
  98
  99 2016-06-17  Jose E. Marchesi  <jose.marchesi@oracle.com>
 100
 101         * sparc-dis.c (MASK_V9): Add SPARC_OPCODE_ARCH_V9{C,D,E,V,M}.
 102         (compute_arch_mask): Handle bfd_mach_sparc_v8plus{c,d,e,v,m} and
 103         bfd_mach_sparc_v9{c,d,e,v,m}.
 104         * sparc-opc.c (MASK_V9C): Define.
 105         (MASK_V9D): Likewise.
 106         (MASK_V9E): Likewise.
 107         (MASK_V9V): Likewise.
 108         (MASK_V9M): Likewise.
 109         (v6): Add MASK_V9{C,D,E,V,M}.
 110         (v6notlet): Likewise.
 111         (v7): Likewise.
 112         (v8): Likewise.
 113         (v9): Likewise.
 114         (v9andleon): Likewise.
 115         (v9a): Likewise.
 116         (v9b): Likewise.
 117         (v9c): Define.
 118         (v9d): Likewise.
 119         (v9e): Likewise.
 120         (v9v): Likewise.
 121         (v9m): Likewise.
 122         (sparc_opcode_archs): Add entry for v9{c,d,e,v,m}.
 123
 124 2016-06-15  Nick Clifton  <nickc@redhat.com>
 125
 126         * nds32-dis.c (nds32_parse_audio_ext): Change printing of integer
 127         constants to match expected behaviour.
 128         (nds32_parse_opcode): Likewise.  Also for whitespace.
 129
 130 2016-06-15  Andrew Burgess  <andrew.burgess@embecosm.com>
 131
 132         * arc-opc.c (extract_rhv1): Extract value from insn.
 133
 134 2016-06-14  Graham Markall  <graham.markall@embecosm.com>
 135
 136         * arc-nps400-tbl.h: Add ldbit instruction.
 137         * arc-opc.c: Add flag classes required for ldbit.
 138
 139 2016-06-14  Graham Markall  <graham.markall@embecosm.com>
 140
 141         * arc-nps400-tbl.h: Add hash, hash.p[0-3], tr, utf8, e4by, and addf
 142         * arc-opc.c: Add flag classes, insert/extract functions, and operands to
 143         support the above instructions.
 144
 145 2016-06-14  Graham Markall  <graham.markall@embecosm.com>
 146
 147         * arc-nps400-tbl.h: Add calcbsd, calcbxd, calckey, calcxkey, mxb,
 148         imxb, addl, subl, andl, orl, xorl, andab, orab, lbdsize, bdlen, csms,
 149         csma, cbba, zncv, and hofs.
 150         * arc-opc.c: Add flag classes, insert/extract functions, and operands to
 151         support the above instructions.
 152
 153 2016-06-06  Graham Markall  <graham.markall@embecosm.com>
 154
 155         * arc-nps400-tbl.h: Add andab and orab instructions.
 156
 157 2016-06-06  Graham Markall  <graham.markall@embecosm.com>
 158
 159         * arc-nps400-tbl.h: Add addl-like instructions.
 160
 161 2016-06-06  Graham Markall  <graham.markall@embecosm.com>
 162
 163         * arc-nps400-tbl.h: Add mxb and imxb instructions.
 164
 165 2016-06-06  Graham Markall  <graham.markall@embecosm.com>
 166
 167         * arc-nps400-tbl.h: Add calcbsd, calcbxd, calckey and calcxkey
 168         instructions.
 169
 170 2016-06-10  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
 171
 172         * s390-dis.c (option_use_insn_len_bits_p): New file scope
 173         variable.
 174         (init_disasm): Handle new command line option "insnlength".
 175         (print_s390_disassembler_options): Mention new option in help
 176         output.
 177         (print_insn_s390): Use the encoded insn length when dumping
 178         unknown instructions.
 179
 180 2016-06-03  Pitchumani Sivanupandi  <pitchumani.s@atmel.com>
 181
 182         * avr-dis.c (avr_operand): Add default data address space origin (0x800000)
 183          to the address and set as symbol address for LDS/ STS immediate operands.
 184
 185 2016-06-07  Alan Modra  <amodra@gmail.com>
 186
 187         * ppc-dis.c (ppc_opts): Delete extraneous parentheses.  Default
 188         cpu for "vle" to e500.
 189         * ppc-opc.c (ALLOW8_SPRG): Remove PPC_OPCODE_VLE.
 190         (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW, DCBT_EO): Likewise.
 191         (PPCNONE): Delete, substitute throughout.
 192         (powerpc_opcodes): Remove PPCVLE from "flags".  Add to "deprecated"
 193         except for major opcode 4 and 31.
 194         (vle_opcodes <se_rfmci>): Add PPCRFMCI to flags.
 195
 196 2016-06-07  Matthew Wahab  <matthew.wahab@arm.com>
 197
 198         * arm-dis.c (arm_opcodes): Replace ARM_EXT_V8_2A with
 199         ARM_EXT_RAS in relevant entries.
 200
 201 2016-06-03  Peter Bergner <bergner@vnet.ibm.com>
 202
 203         PR binutils/20196
 204         * ppc-opc.c (powerpc_opcodes <lbarx, lharx, stbcx., sthcx.>): Enable
 205         opcodes for E6500.
 206
 207 2016-06-03  H.J. Lu  <hongjiu.lu@intel.com>
 208
 209         PR binutis/18386
 210         * i386-dis.c (indirEv): Replace stack_v_mode with indir_v_mode.
 211         (indir_v_mode): New.
 212         Add comments for '&'.
 213         (reg_table): Replace "{T|}" with "{&|}" on call and jmp.
 214         (putop): Handle '&'.
 215         (intel_operand_size): Handle indir_v_mode.
 216         (OP_E_register): Likewise.
 217         * i386-opc.tbl: Mark 64-bit indirect call/jmp as AMD64.  Add
 218         64-bit indirect call/jmp for AMD64.
 219         * i386-tbl.h: Regenerated
 220
 221 2016-06-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 222
 223         * arc-dis.c (struct arc_operand_iterator): New structure.
 224         (find_format_from_table): All the old content from find_format,
 225         with some minor adjustments, and parameter renaming.
 226         (find_format_long_instructions): New function.
 227         (find_format): Rewritten.
 228         (arc_insn_length): Add LSB parameter.
 229         (extract_operand_value): New function.
 230         (operand_iterator_next): New function.
 231         (print_insn_arc): Use new functions to find opcode, and iterator
 232         over operands.
 233         * arc-opc.c (insert_nps_3bit_dst_short): New function.
 234         (extract_nps_3bit_dst_short): New function.
 235         (insert_nps_3bit_src2_short): New function.
 236         (extract_nps_3bit_src2_short): New function.
 237         (insert_nps_bitop1_size): New function.
 238         (extract_nps_bitop1_size): New function.
 239         (insert_nps_bitop2_size): New function.
 240         (extract_nps_bitop2_size): New function.
 241         (insert_nps_bitop_mod4_msb): New function.
 242         (extract_nps_bitop_mod4_msb): New function.
 243         (insert_nps_bitop_mod4_lsb): New function.
 244         (extract_nps_bitop_mod4_lsb): New function.
 245         (insert_nps_bitop_dst_pos3_pos4): New function.
 246         (extract_nps_bitop_dst_pos3_pos4): New function.
 247         (insert_nps_bitop_ins_ext): New function.
 248         (extract_nps_bitop_ins_ext): New function.
 249         (arc_operands): Add new operands.
 250         (arc_long_opcodes): New global array.
 251         (arc_num_long_opcodes): New global.
 252         * arc-nps400-tbl.h: Add comments referencing arc_long_opcodes.
 253
 254 2016-06-01  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 255
 256         * nds32-asm.h: Add extern "C".
 257         * sh-opc.h: Likewise.
 258
 259 2016-06-01  Graham Markall  <graham.markall@embecosm.com>
 260
 261         * arc-nps400-tbl.h: Add operands a,b,u6, 0,b,u6, and
 262         0,b,limm to the rflt instruction.
 263
 264 2016-05-31  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 265
 266         * sh-opc.h (ARCH_SH_HAS_DSP): Make the shifted value an unsigned
 267         constant.
 268
 269 2016-05-29  H.J. Lu  <hongjiu.lu@intel.com>
 270
 271         PR gas/20145
 272         * i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS,
 273         CPU_ANY_AVX512CD_FLAGS, CPU_ANY_AVX512ER_FLAGS,
 274         CPU_ANY_AVX512PF_FLAGS, CPU_ANY_AVX512DQ_FLAGS,
 275         CPU_ANY_AVX512BW_FLAGS, CPU_ANY_AVX512VL_FLAGS,
 276         CPU_ANY_AVX512IFMA_FLAGS and CPU_ANY_AVX512VBMI_FLAGS.
 277         * i386-init.h: Regenerated.
 278
 279 2016-05-27  H.J. Lu  <hongjiu.lu@intel.com>
 280
 281         PR gas/20145
 282         * i386-gen.c (cpu_flag_init): Update CPU_XXX_FLAGS.  Remove
 283         CpuMMX from CPU_SSE_FLAGS.  Remove AVX and AVX512 bits from
 284         CPU_ANY_SSE_FLAGS.  Remove AVX512 bits from CPU_ANY_AVX_FLAGS.
 285         Add CPU_XSAVE_FLAGS to CPU_XSAVEOPT_FLAGS, CPU_XSAVE_FLAGS and
 286         CpuXSAVEC.  Add CPU_AVX_FLAGS to CpuF16C.  Remove CpuMMX from
 287         CPU_AVX512F_FLAGS, CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS,
 288         CPU_AVX512PF_FLAGS, CPU_AVX512DQ_FLAGS and CPU_AVX512BW_FLAGS.
 289         Add CPU_SSE2_FLAGS to CPU_SHA_FLAGS.   Add CPU_ANY_287_FLAGS,
 290         CPU_ANY_387_FLAGS, CPU_ANY_687_FLAGS, CPU_ANY_SSE2_FLAGS,
 291         CPU_ANY_SSE3_FLAGS, CPU_ANY_SSSE3_FLAGS, CPU_ANY_SSE4_1_FLAGS,
 292         CPU_ANY_SSE4_2_FLAGS and CPU_ANY_AVX2_FLAGS.  Enable CpuRegMMX
 293         for MMX.  Enable CpuRegXMM for SSE, AVX and AVX512.  Enable
 294         CpuRegYMM for AVX and AVX512VL,  Enable CpuRegZMM and
 295         CpuRegMask for AVX512.
 296         (cpu_flags): Add CpuRegMMX, CpuRegXMM, CpuRegYMM, CpuRegZMM
 297         and CpuRegMask.
 298         (set_bitfield_from_cpu_flag_init): New function.
 299         (set_bitfield): Remove const on f.  Call
 300         set_bitfield_from_cpu_flag_init to handle CPU_XXX_FLAGS.
 301         * i386-opc.h (CpuRegMMX): New.
 302         (CpuRegXMM): Likewise.
 303         (CpuRegYMM): Likewise.
 304         (CpuRegZMM): Likewise.
 305         (CpuRegMask): Likewise.
 306         (i386_cpu_flags): Add cpuregmmx, cpuregxmm, cpuregymm, cpuregzmm
 307         and cpuregmask.
 308         * i386-init.h: Regenerated.
 309         * i386-tbl.h: Likewise.
 310
 311 2016-05-27  H.J. Lu  <hongjiu.lu@intel.com>
 312
 313         PR gas/20154
 314         * i386-gen.c (cpu_flags): Remove CpuAMD64 and CpuIntel64.
 315         (opcode_modifiers): Add AMD64 and Intel64.
 316         (main): Properly verify CpuMax.
 317         * i386-opc.h (CpuAMD64): Removed.
 318         (CpuIntel64): Likewise.
 319         (CpuMax): Set to CpuNo64.
 320         (i386_cpu_flags): Remove cpuamd64 and cpuintel64.
 321         (AMD64): New.
 322         (Intel64): Likewise.
 323         (i386_opcode_modifier): Add amd64 and intel64.
 324         (i386-opc.tbl): Replace CpuAMD64/CpuIntel64 with AMD64/Intel64
 325         on call and jmp.
 326         * i386-init.h: Regenerated.
 327         * i386-tbl.h: Likewise.
 328
 329 2016-05-27  H.J. Lu  <hongjiu.lu@intel.com>
 330
 331         PR gas/20154
 332         * i386-gen.c (main): Fail if CpuMax is incorrect.
 333         * i386-opc.h (CpuMax): Set to CpuIntel64.
 334         * i386-tbl.h: Regenerated.
 335
 336 2016-05-27  Nick Clifton  <nickc@redhat.com>
 337
 338         PR target/20150
 339         * msp430-dis.c (msp430dis_read_two_bytes): New function.
 340         (msp430dis_opcode_unsigned): New function.
 341         (msp430dis_opcode_signed): New function.
 342         (msp430_singleoperand): Use the new opcode reading functions.
 343         Only disassenmble bytes if they were successfully read.
 344         (msp430_doubleoperand): Likewise.
 345         (msp430_branchinstr): Likewise.
 346         (msp430x_callx_instr): Likewise.
 347         (print_insn_msp430): Check that it is safe to read bytes before
 348         attempting disassembly.  Use the new opcode reading functions.
 349
 350 2016-05-26  Peter Bergner <bergner@vnet.ibm.com>
 351
 352         * ppc-opc.c (CY): New define.  Document it.
 353         (powerpc_opcodes) <addex[.], lwzmx, vmsumudm>: New mnemonics.
 354
 355 2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
 356
 357         * i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512DQ_FLAGS,
 358         CPU_AVX512BW_FLAGS, CPU_AVX512VL_FLAGS, CPU_AVX512IFMA_FLAGS
 359         and CPU_AVX512VBMI_FLAGS.  Add CpuAVX512DQ, CpuAVX512BW,
 360         CpuAVX512VL, CpuAVX512IFMA and CpuAVX512VBMI to
 361         CPU_ANY_AVX_FLAGS.
 362         * i386-init.h: Regenerated.
 363
 364 2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
 365
 366         PR gas/20141
 367         * i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512F_FLAGS,
 368         CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS and CPU_AVX512PF_FLAGS.
 369         * i386-init.h: Regenerated.
 370
 371 2016-05-25  H.J. Lu  <hongjiu.lu@intel.com>
 372
 373         * i386-gen.c (cpu_flag_init): Rename CPU_ANY87_FLAGS to
 374         CPU_ANY_X87_FLAGS.  Add CPU_ANY_MMX_FLAGS.
 375         * i386-init.h: Regenerated.
 376
 377 2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
 378
 379         * arc-dis.c (print_flags): Set branch_delay_insns, and insn_type
 380         information.
 381         (print_insn_arc): Set insn_type information.
 382         * arc-opc.c (C_CC): Add F_CLASS_COND.
 383         * arc-tbl.h (bbit0, bbit1): Update subclass to COND.
 384         (beq_s, bge_s, bgt_s, bhi_s, bhs_s): Likewise.
 385         (ble_s, blo_s, bls_s, blt_s, bne_s): Likewise.
 386         (breq, breq_s, brge, brhs, brlo, brlt): Likewise.
 387         (brne, brne_s, jeq_s, jne_s): Likewise.
 388
 389 2016-05-23  Claudiu Zissulescu  <claziss@synopsys.com>
 390
 391         * arc-tbl.h (neg): New instruction variant.
 392
 393 2016-05-23  Cupertino Miranda  <cmiranda@synopsys.com>
 394
 395         * arc-dis.c (find_format, find_format, get_auxreg)
 396         (print_insn_arc): Changed.
 397         * arc-ext.h (INSERT_XOP): Likewise.
 398
 399 2016-05-23  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 400
 401         * tic54x-dis.c (sprint_mmr): Adjust.
 402         * tic54x-opc.c: Likewise.
 403
 404 2016-05-19  Alan Modra  <amodra@gmail.com>
 405
 406         * ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.
 407
 408 2016-05-19  Alan Modra  <amodra@gmail.com>
 409
 410         * ppc-opc.c: Formatting.
 411         (NSISIGNOPT): Define.
 412         (powerpc_opcodes <subis>): Use NSISIGNOPT.
 413
 414 2016-05-18  Maciej W. Rozycki  <macro@imgtec.com>
 415
 416         * mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
 417         replacing references to `micromips_ase' throughout.
 418         (_print_insn_mips): Don't use file-level microMIPS annotation to
 419         determine the disassembly mode with the symbol table.
 420
 421 2016-05-13  Peter Bergner <bergner@vnet.ibm.com>
 422
 423         * ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
 424
 425 2016-05-11  Andrew Bennett  <andrew.bennett@imgtec.com>
 426
 427         * mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
 428         mips64r6.
 429         * mips-opc.c (D34): New macro.
 430         (mips_builtin_opcodes): Define bposge32c for DSPr3.
 431
 432 2016-05-10  Alexander Fomin  <alexander.fomin@intel.com>
 433
 434         * i386-dis.c (prefix_table): Add RDPID instruction.
 435         * i386-gen.c (cpu_flag_init): Add RDPID flag.
 436         (cpu_flags): Add RDPID bitfield.
 437         * i386-opc.h (enum): Add RDPID element.
 438         (i386_cpu_flags): Add RDPID field.
 439         * i386-opc.tbl: Add RDPID instruction.
 440         * i386-init.h: Regenerate.
 441         * i386-tbl.h: Regenerate.
 442
 443 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 444
 445         * arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
 446         branch type of a symbol.
 447         (print_insn): Likewise.
 448
 449 2016-05-10  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 450
 451         * arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
 452         Mainline Security Extensions instructions.
 453         (thumb_opcodes): Add entries for narrow ARMv8-M Security
 454         Extensions instructions.
 455         (thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
 456         instructions.
 457         (psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
 458         special registers.
 459
 460 2016-05-09  Jose E. Marchesi  <jose.marchesi@oracle.com>
 461
 462         * sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
 463
 464 2016-05-03  Claudiu Zissulescu  <claziss@synopsys.com>
 465
 466         * arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
 467         (arcExtMap_genOpcode): Likewise.
 468         * arc-opc.c (arg_32bit_rc): Define new variable.
 469         (arg_32bit_u6): Likewise.
 470         (arg_32bit_limm): Likewise.
 471
 472 2016-05-03  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 473
 474         * aarch64-gen.c (VERIFIER): Define.
 475         * aarch64-opc.c (VERIFIER): Define.
 476         (verify_ldpsw): Use static linkage.
 477         * aarch64-opc.h (verify_ldpsw): Remove.
 478         * aarch64-tbl.h: Use VERIFIER for verifiers.
 479
 480 2016-04-28  Nick Clifton  <nickc@redhat.com>
 481
 482         PR target/19722
 483         * aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
 484         * aarch64-opc.c (verify_ldpsw): New function.
 485         * aarch64-opc.h (verify_ldpsw): New prototype.
 486         * aarch64-tbl.h: Add initialiser for verifier field.
 487         (LDPSW): Set verifier to verify_ldpsw.
 488
 489 2016-04-23  H.J. Lu  <hongjiu.lu@intel.com>
 490
 491         PR binutils/19983
 492         PR binutils/19984
 493         * i386-dis.c (print_insn): Return -1 if size of bfd_vma is
 494         smaller than address size.
 495
 496 2016-04-20  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 497
 498         * alpha-dis.c: Regenerate.
 499         * crx-dis.c: Likewise.
 500         * disassemble.c: Likewise.
 501         * epiphany-opc.c: Likewise.
 502         * fr30-opc.c: Likewise.
 503         * frv-opc.c: Likewise.
 504         * ip2k-opc.c: Likewise.
 505         * iq2000-opc.c: Likewise.
 506         * lm32-opc.c: Likewise.
 507         * lm32-opinst.c: Likewise.
 508         * m32c-opc.c: Likewise.
 509         * m32r-opc.c: Likewise.
 510         * m32r-opinst.c: Likewise.
 511         * mep-opc.c: Likewise.
 512         * mt-opc.c: Likewise.
 513         * or1k-opc.c: Likewise.
 514         * or1k-opinst.c: Likewise.
 515         * tic80-opc.c: Likewise.
 516         * xc16x-opc.c: Likewise.
 517         * xstormy16-opc.c: Likewise.
 518
 519 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 520
 521         * arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
 522         fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
 523         calcsd, and calcxd instructions.
 524         * arc-opc.c (insert_nps_bitop_size): Delete.
 525         (extract_nps_bitop_size): Delete.
 526         (MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
 527         (extract_nps_qcmp_m3): Define.
 528         (extract_nps_qcmp_m2): Define.
 529         (extract_nps_qcmp_m1): Define.
 530         (arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
 531         (arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
 532         (arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
 533         NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
 534         NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
 535         NPS_QCMP_M3.
 536
 537 2016-04-19  Andrew Burgess  <andrew.burgess@embecosm.com>
 538
 539         * arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
 540
 541 2016-04-15  H.J. Lu  <hongjiu.lu@intel.com>
 542
 543         * Makefile.in: Regenerated with automake 1.11.6.
 544         * aclocal.m4: Likewise.
 545
 546 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 547
 548         * arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
 549         instructions.
 550         * arc-opc.c (insert_nps_cmem_uimm16): New function.
 551         (extract_nps_cmem_uimm16): New function.
 552         (arc_operands): Add NPS_XLDST_UIMM16 operand.
 553
 554 2016-04-14  Andrew Burgess  <andrew.burgess@embecosm.com>
 555
 556         * arc-dis.c (arc_insn_length): New function.
 557         (print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
 558         (find_format): Change insnLen parameter to unsigned.
 559
 560 2016-04-13  Nick Clifton  <nickc@redhat.com>
 561
 562         PR target/19937
 563         * v850-opc.c (v850_opcodes): Correct masks for long versions of
 564         the LD.B and LD.BU instructions.
 565
 566 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 567
 568         * arc-dis.c (find_format): Check for extension flags.
 569         (print_flags): New function.
 570         (print_insn_arc): Update for .extCondCode, .extCoreRegister and
 571         .extAuxRegister.
 572         * arc-ext.c (arcExtMap_coreRegName): Use
 573         LAST_EXTENSION_CORE_REGISTER.
 574         (arcExtMap_coreReadWrite): Likewise.
 575         (dump_ARC_extmap): Update printing.
 576         * arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
 577         (arc_aux_regs): Add cpu field.
 578         * arc-regs.h: Add cpu field, lower case name aux registers.
 579
 580 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 581
 582         * arc-tbl.h: Add rtsc, sleep with no arguments.
 583
 584 2016-04-12  Claudiu Zissulescu  <claziss@synopsys.com>
 585
 586         * arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
 587         Initialize.
 588         (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
 589         (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
 590         (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
 591         (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
 592         (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
 593         (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
 594         (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
 595         (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
 596         (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
 597         (arc_opcode arc_opcodes): Null terminate the array.
 598         (arc_num_opcodes): Remove.
 599         * arc-ext.h (INSERT_XOP): Define.
 600         (extInstruction_t): Likewise.
 601         (arcExtMap_instName): Delete.
 602         (arcExtMap_insn): New function.
 603         (arcExtMap_genOpcode): Likewise.
 604         * arc-ext.c (ExtInstruction): Remove.
 605         (create_map): Zero initialize instruction fields.
 606         (arcExtMap_instName): Remove.
 607         (arcExtMap_insn): New function.
 608         (dump_ARC_extmap): More info while debuging.
 609         (arcExtMap_genOpcode): New function.
 610         * arc-dis.c (find_format): New function.
 611         (print_insn_arc): Use find_format.
 612         (arc_get_disassembler): Enable dump_ARC_extmap only when
 613         debugging.
 614
 615 2016-04-11  Maciej W. Rozycki  <macro@imgtec.com>
 616
 617         * mips-dis.c (print_mips16_insn_arg): Mask unused extended
 618         instruction bits out.
 619
 620 2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
 621
 622         * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
 623         * arc-opc.c (arc_flag_operands): Add new flags.
 624         (arc_flag_classes): Add new classes.
 625
 626 2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
 627
 628         * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
 629
 630 2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>
 631
 632         * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
 633         encode1, rflt, crc16, and crc32 instructions.
 634         * arc-opc.c (arc_flag_operands): Add F_NPS_R.
 635         (arc_flag_classes): Add C_NPS_R.
 636         (insert_nps_bitop_size_2b): New function.
 637         (extract_nps_bitop_size_2b): Likewise.
 638         (insert_nps_bitop_uimm8): Likewise.
 639         (extract_nps_bitop_uimm8): Likewise.
 640         (arc_operands): Add new operand entries.
 641
 642 2016-04-05  Claudiu Zissulescu  <claziss@synopsys.com>
 643
 644         * arc-regs.h: Add a new subclass field.  Add double assist
 645         accumulator register values.
 646         * arc-tbl.h: Use DPA subclass to mark the double assist
 647         instructions.  Use DPX/SPX subclas to mark the FPX instructions.
 648         * arc-opc.c (RSP): Define instead of SP.
 649         (arc_aux_regs): Add the subclass field.
 650
 651 2016-04-05  Jiong Wang  <jiong.wang@arm.com>
 652
 653         * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
 654
 655 2016-03-31  Andrew Burgess  <andrew.burgess@embecosm.com>
 656
 657         * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
 658         NPS_R_SRC1.
 659
 660 2016-03-30  Andrew Burgess  <andrew.burgess@embecosm.com>
 661
 662         * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
 663         issues.  No functional changes.
 664
 665 2016-03-30  Claudiu Zissulescu  <claziss@synopsys.com>
 666
 667         * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
 668         (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
 669         (RTT): Remove duplicate.
 670         (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
 671         (PCT_CONFIG*): Remove.
 672         (D1L, D1H, D2H, D2L): Define.
 673
 674 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 675
 676         * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
 677
 678 2016-03-29  Claudiu Zissulescu  <claziss@synopsys.com>
 679
 680         * arc-tbl.h (invld07): Remove.
 681         * arc-ext-tbl.h: New file.
 682         * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
 683         * arc-opc.c (arc_opcodes): Add ext-tbl include.
 684
 685 2016-03-24  Jan Kratochvil  <jan.kratochvil@redhat.com>
 686
 687         Fix -Wstack-usage warnings.
 688         * aarch64-dis.c (print_operands): Substitute size.
 689         * aarch64-opc.c (print_register_offset_address): Substitute tblen.
 690
 691 2016-03-22  Jose E. Marchesi  <jose.marchesi@oracle.com>
 692
 693         * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
 694         to get a proper diagnostic when an invalid ASR register is used.
 695
 696 2016-03-22  Nick Clifton  <nickc@redhat.com>
 697
 698         * configure: Regenerate.
 699
 700 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 701
 702         * arc-nps400-tbl.h: New file.
 703         * arc-opc.c: Add top level comment.
 704         (insert_nps_3bit_dst): New function.
 705         (extract_nps_3bit_dst): New function.
 706         (insert_nps_3bit_src2): New function.
 707         (extract_nps_3bit_src2): New function.
 708         (insert_nps_bitop_size): New function.
 709         (extract_nps_bitop_size): New function.
 710         (arc_flag_operands): Add nps400 entries.
 711         (arc_flag_classes): Add nps400 entries.
 712         (arc_operands): Add nps400 entries.
 713         (arc_opcodes): Add nps400 include.
 714
 715 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 716
 717         * arc-opc.c (arc_flag_classes): Convert all flag classes to use
 718         the new class enum values.
 719
 720 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 721
 722         * arc-dis.c (print_insn_arc): Handle nps400.
 723
 724 2016-03-21  Andrew Burgess  <andrew.burgess@embecosm.com>
 725
 726         * arc-opc.c (BASE): Delete.
 727
 728 2016-03-18  Nick Clifton  <nickc@redhat.com>
 729
 730         PR target/19721
 731         * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
 732         of MOV insn that aliases an ORR insn.
 733
 734 2016-03-16  Jiong Wang  <jiong.wang@arm.com>
 735
 736         * arm-dis.c (neon_opcodes): Support new FP16 instructions.
 737
 738 2016-03-07  Trevor Saunders  <tbsaunde+binutils@tbsaunde.org>
 739
 740         * mcore-opc.h: Add const qualifiers.
 741         * microblaze-opc.h (struct op_code_struct): Likewise.
 742         * sh-opc.h: Likewise.
 743         * tic4x-dis.c (tic4x_print_indirect): Likewise.
 744         (tic4x_print_op): Likewise.
 745
 746 2016-03-02  Alan Modra  <amodra@gmail.com>
 747
 748         * or1k-desc.h: Regenerate.
 749         * fr30-ibld.c: Regenerate.
 750         * rl78-decode.c: Regenerate.
 751
 752 2016-03-01  Nick Clifton  <nickc@redhat.com>
 753
 754         PR target/19747
 755         * rl78-dis.c (print_insn_rl78_common): Fix typo.
 756
 757 2016-02-24  Renlin Li  <renlin.li@arm.com>
 758
 759         * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
 760         (print_insn_coprocessor): Support fp16 instructions.
 761
 762 2016-02-24  Renlin Li  <renlin.li@arm.com>
 763
 764         * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
 765         vminnm, vrint(mpna).
 766
 767 2016-02-24  Renlin Li  <renlin.li@arm.com>
 768
 769         * arm-dis.c (print_insn_coprocessor): Check co-processor number for
 770         cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
 771
 772 2016-02-15  H.J. Lu  <hongjiu.lu@intel.com>
 773
 774         * i386-dis.c (print_insn): Parenthesize expression to prevent
 775         truncated addresses.
 776         (OP_J): Likewise.
 777
 778 2016-02-10  Claudiu Zissulescu  <claziss@synopsys.com>
 779             Janek van Oirschot  <jvanoirs@synopsys.com>
 780
 781         * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
 782         variable.
 783
 784 2016-02-04  Nick Clifton  <nickc@redhat.com>
 785
 786         PR target/19561
 787         * msp430-dis.c (print_insn_msp430): Add a special case for
 788         decoding an RRC instruction with the ZC bit set in the extension
 789         word.
 790
 791 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 792
 793         * cgen-ibld.in (insert_normal): Rework calculation of shift.
 794         * epiphany-ibld.c: Regenerate.
 795         * fr30-ibld.c: Regenerate.
 796         * frv-ibld.c: Regenerate.
 797         * ip2k-ibld.c: Regenerate.
 798         * iq2000-ibld.c: Regenerate.
 799         * lm32-ibld.c: Regenerate.
 800         * m32c-ibld.c: Regenerate.
 801         * m32r-ibld.c: Regenerate.
 802         * mep-ibld.c: Regenerate.
 803         * mt-ibld.c: Regenerate.
 804         * or1k-ibld.c: Regenerate.
 805         * xc16x-ibld.c: Regenerate.
 806         * xstormy16-ibld.c: Regenerate.
 807
 808 2016-02-02  Andrew Burgess  <andrew.burgess@embecosm.com>
 809
 810         * epiphany-dis.c: Regenerated from latest cpu files.
 811
 812 2016-02-01  Michael McConville  <mmcco@mykolab.com>
 813
 814         * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
 815         test bit.
 816
 817 2016-01-25  Renlin Li  <renlin.li@arm.com>
 818
 819         * arm-dis.c (mapping_symbol_for_insn): New function.
 820         (find_ifthen_state): Call mapping_symbol_for_insn().
 821
 822 2016-01-20  Matthew Wahab  <matthew.wahab@arm.com>
 823
 824         * aarch64-opc.c (operand_general_constraint_met_p): Check validity
 825         of MSR UAO immediate operand.
 826
 827 2016-01-18  Maciej W. Rozycki  <macro@imgtec.com>
 828
 829         * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
 830         instruction support.
 831
 832 2016-01-17  Alan Modra  <amodra@gmail.com>
 833
 834         * configure: Regenerate.
 835
 836 2016-01-14  Nick Clifton  <nickc@redhat.com>
 837
 838         * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
 839         instructions that can support stack pointer operations.
 840         * rl78-decode.c: Regenerate.
 841         * rl78-dis.c: Fix display of stack pointer in MOVW based
 842         instructions.
 843
 844 2016-01-14  Matthew Wahab  <matthew.wahab@arm.com>
 845
 846         * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
 847         testing for RAS support.  Add checks for erxfr_el1, erxctlr_el1,
 848         erxtatus_el1 and erxaddr_el1.
 849
 850 2016-01-12  Matthew Wahab  <matthew.wahab@arm.com>
 851
 852         * arm-dis.c (arm_opcodes): Add "esb".
 853         (thumb_opcodes): Likewise.
 854
 855 2016-01-11  Peter Bergner <bergner@vnet.ibm.com>
 856
 857         * ppc-opc.c <xscmpnedp>: Delete.
 858         <xvcmpnedp>: Likewise.
 859         <xvcmpnedp.>: Likewise.
 860         <xvcmpnesp>: Likewise.
 861         <xvcmpnesp.>: Likewise.
 862
 863 2016-01-08  Andreas Schwab  <schwab@linux-m68k.org>
 864
 865         PR gas/13050
 866         * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
 867         addition to ISA_A.
 868
 869 2016-01-01  Alan Modra  <amodra@gmail.com>
 870
 871         Update year range in copyright notice of all files.
 872
 873 For older changes see ChangeLog-2015
 874 \f
 875 Copyright (C) 2016 Free Software Foundation, Inc.
 876
 877 Copying and distribution of this file, with or without modification,
 878 are permitted in any medium without royalty provided the copyright
 879 notice and this notice are preserved.
 880
 881 Local Variables:
 882 mode: change-log
 883 left-margin: 8
 884 fill-column: 74
 885 version-control: never
 886 End: