opcodes/ChangeLog

   1 2005-05-07  Nick Clifton  <nickc@redhat.com>
   2
   3         * Update the address and phone number of the FSF organization in
   4         the GPL notices in the following files:
   5         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
   6         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
   7         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
   8         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
   9         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
  10         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
  11         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
  12         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
  13         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
  14         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
  15         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
  16         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
  17         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
  18         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
  19         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
  20         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
  21         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
  22         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
  23         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
  24         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
  25         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
  26         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
  27         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
  28         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
  29         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
  30         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
  31         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
  32         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
  33         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
  34         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
  35         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
  36         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
  37         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
  38
  39 2005-05-05  James E Wilson  <wilson@specifixinc.com>
  40
  41         * ia64-opc.c: Include sysdep.h before libiberty.h.
  42
  43 2005-05-05  Nick Clifton  <nickc@redhat.com>
  44
  45         * configure.in (ALL_LINGUAS): Add vi.
  46         * configure: Regenerate.
  47         * po/vi.po: New.
  48
  49 2005-04-26  Jerome Guitton  <guitton@gnat.com>
  50
  51         * configure.in: Fix the check for basename declaration.
  52         * configure: Regenerate.
  53
  54 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
  55
  56         * ppc-opc.c (RTO): Define.
  57         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
  58         entries to suit PPC440.
  59
  60 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
  61
  62         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
  63         Add xcrypt-ctr.
  64
  65 2005-04-14  Nick Clifton  <nickc@redhat.com>
  66
  67         * po/fi.po: New translation: Finnish.
  68         * configure.in (ALL_LINGUAS): Add fi.
  69         * configure: Regenerate.
  70
  71 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
  72
  73         * Makefile.am (NO_WERROR): Define.
  74         * configure.in: Invoke AM_BINUTILS_WARNINGS.
  75         * Makefile.in: Regenerate.
  76         * aclocal.m4: Regenerate.
  77         * configure: Regenerate.
  78
  79 2005-04-04  Nick Clifton  <nickc@redhat.com>
  80
  81         * fr30-asm.c: Regenerate.
  82         * frv-asm.c: Regenerate.
  83         * iq2000-asm.c: Regenerate.
  84         * m32r-asm.c: Regenerate.
  85         * openrisc-asm.c: Regenerate.
  86
  87 2005-04-01  Jan Beulich  <jbeulich@novell.com>
  88
  89         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
  90         visible operands in Intel mode. The first operand of monitor is
  91         %rax in 64-bit mode.
  92
  93 2005-04-01  Jan Beulich  <jbeulich@novell.com>
  94
  95         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
  96         easier future additions.
  97
  98 2005-03-31  Jerome Guitton  <guitton@gnat.com>
  99
 100         * configure.in: Check for basename.
 101         * configure: Regenerate.
 102         * config.in: Ditto.
 103
 104 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 105
 106         * i386-dis.c (SEG_Fixup): New.
 107         (Sv): New.
 108         (dis386): Use "Sv" for 0x8c and 0x8e.
 109
 110 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 111             Nick Clifton  <nickc@redhat.com>
 112
 113         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 114         function entry mask addresses.
 115         (entry_addr_occupied_slots): New variable: The number of occupied
 116         elements in entry_addr.
 117         (entry_addr_total_slots): New variable: The total number of
 118         elements in entry_addr.
 119         (parse_disassembler_options): New function.  Fills in the entry_addr
 120         array.
 121         (free_entry_array): New function.  Release the memory used by the
 122         entry addr array.  Suppressed because there is no way to call it.
 123         (is_function_entry): Check if a given address is a function's
 124         start address by looking at supplied entry mask addresses and
 125         symbol information, if available.
 126         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 127
 128 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 129
 130         * cris-dis.c (print_with_operands): Use ~31L for long instead
 131         of ~31.
 132
 133 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 134
 135         * mmix-opc.c (O): Revert the last change.
 136         (Z): Likewise.
 137
 138 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 139
 140         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 141         (Z): Likewise.
 142
 143 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 144
 145         * mmix-opc.c (O, Z): Force expression as unsigned long.
 146
 147 2005-03-18  Nick Clifton  <nickc@redhat.com>
 148
 149         * ip2k-asm.c: Regenerate.
 150         * op/opcodes.pot: Regenerate.
 151
 152 2005-03-16  Nick Clifton  <nickc@redhat.com>
 153             Ben Elliston  <bje@au.ibm.com>
 154
 155         * configure.in (werror): New switch: Add -Werror to the
 156         compiler command line.  Enabled by default.  Disable via
 157         --disable-werror.
 158         * configure: Regenerate.
 159
 160 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 161
 162         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 163         BOOKE.
 164
 165 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 166
 167         * po/es.po: Commit new Spanish translation.
 168
 169         * po/fr.po: Commit new French translation.
 170
 171 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 172
 173         * vax-dis.c: Fix spelling error
 174         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 175         of just "Entry mask: < r1 ... >"
 176
 177 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 178
 179         * arm-dis.c (arm_opcodes): Document %E and %V.
 180         Add entries for v6T2 ARM instructions:
 181         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 182         (print_insn_arm): Add support for %E and %V.
 183         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 184
 185 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 186             Alan Modra  <amodra@bigpond.net.au>
 187
 188         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 189         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 190         (SPRG_MASK): Delete.
 191         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 192         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 193         mfsprg4..7 after msprg and consolidate.
 194
 195 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 196
 197         * vax-dis.c (entry_mask_bit): New array.
 198         (print_insn_vax): Decode function entry mask.
 199
 200 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 201
 202         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 203
 204 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 205
 206         * po/opcodes.pot: Regenerate.
 207
 208 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 209
 210         * arc-dis.c (a4_decoding_class): New enum.
 211         (dsmOneArcInst): Use the enum values for the decoding class.
 212         Remove redundant case in the switch for decodingClass value 11.
 213
 214 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 215
 216         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 217         accesses.
 218         (OP_C): Consider lock prefix in non-64-bit modes.
 219
 220 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 221
 222         * cris-dis.c (format_hex): Remove ineffective warning fix.
 223         * crx-dis.c (make_instruction): Warning fix.
 224         * frv-asm.c: Regenerate.
 225
 226 2005-02-23  Nick Clifton  <nickc@redhat.com>
 227
 228         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 229         read_memory.
 230
 231         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 232
 233         * crx-dis.c (make_instruction): Move argument structure into inner
 234         scope and ensure that all of its fields are initialised before
 235         they are used.
 236
 237         * fr30-asm.c: Regenerate.
 238         * fr30-dis.c: Regenerate.
 239         * frv-asm.c: Regenerate.
 240         * frv-dis.c: Regenerate.
 241         * ip2k-asm.c: Regenerate.
 242         * ip2k-dis.c: Regenerate.
 243         * iq2000-asm.c: Regenerate.
 244         * iq2000-dis.c: Regenerate.
 245         * m32r-asm.c: Regenerate.
 246         * m32r-dis.c: Regenerate.
 247         * openrisc-asm.c: Regenerate.
 248         * openrisc-dis.c: Regenerate.
 249         * xstormy16-asm.c: Regenerate.
 250         * xstormy16-dis.c: Regenerate.
 251
 252 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 253
 254         * arc-ext.c: Warning fixes.
 255         * arc-ext.h: Likewise.
 256         * cgen-opc.c: Likewise.
 257         * ia64-gen.c: Likewise.
 258         * maxq-dis.c: Likewise.
 259         * ns32k-dis.c: Likewise.
 260         * w65-dis.c: Likewise.
 261         * ia64-asmtab.c: Regenerate.
 262
 263 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 264
 265         * fr30-desc.c: Regenerate.
 266         * fr30-desc.h: Regenerate.
 267         * fr30-opc.c: Regenerate.
 268         * fr30-opc.h: Regenerate.
 269         * frv-desc.c: Regenerate.
 270         * frv-desc.h: Regenerate.
 271         * frv-opc.c: Regenerate.
 272         * frv-opc.h: Regenerate.
 273         * ip2k-desc.c: Regenerate.
 274         * ip2k-desc.h: Regenerate.
 275         * ip2k-opc.c: Regenerate.
 276         * ip2k-opc.h: Regenerate.
 277         * iq2000-desc.c: Regenerate.
 278         * iq2000-desc.h: Regenerate.
 279         * iq2000-opc.c: Regenerate.
 280         * iq2000-opc.h: Regenerate.
 281         * m32r-desc.c: Regenerate.
 282         * m32r-desc.h: Regenerate.
 283         * m32r-opc.c: Regenerate.
 284         * m32r-opc.h: Regenerate.
 285         * m32r-opinst.c: Regenerate.
 286         * openrisc-desc.c: Regenerate.
 287         * openrisc-desc.h: Regenerate.
 288         * openrisc-opc.c: Regenerate.
 289         * openrisc-opc.h: Regenerate.
 290         * xstormy16-desc.c: Regenerate.
 291         * xstormy16-desc.h: Regenerate.
 292         * xstormy16-opc.c: Regenerate.
 293         * xstormy16-opc.h: Regenerate.
 294
 295 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 296
 297         * Makefile.am: Run "make dep-am"
 298         * Makefile.in: Regenerate.
 299
 300 2005-02-15  Nick Clifton  <nickc@redhat.com>
 301
 302         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 303         compile time warnings.
 304         (print_keyword): Likewise.
 305         (default_print_insn): Likewise.
 306
 307         * fr30-desc.c: Regenerated.
 308         * fr30-desc.h: Regenerated.
 309         * fr30-dis.c: Regenerated.
 310         * fr30-opc.c: Regenerated.
 311         * fr30-opc.h: Regenerated.
 312         * frv-desc.c: Regenerated.
 313         * frv-dis.c: Regenerated.
 314         * frv-opc.c: Regenerated.
 315         * ip2k-asm.c: Regenerated.
 316         * ip2k-desc.c: Regenerated.
 317         * ip2k-desc.h: Regenerated.
 318         * ip2k-dis.c: Regenerated.
 319         * ip2k-opc.c: Regenerated.
 320         * ip2k-opc.h: Regenerated.
 321         * iq2000-desc.c: Regenerated.
 322         * iq2000-dis.c: Regenerated.
 323         * iq2000-opc.c: Regenerated.
 324         * m32r-asm.c: Regenerated.
 325         * m32r-desc.c: Regenerated.
 326         * m32r-desc.h: Regenerated.
 327         * m32r-dis.c: Regenerated.
 328         * m32r-opc.c: Regenerated.
 329         * m32r-opc.h: Regenerated.
 330         * m32r-opinst.c: Regenerated.
 331         * openrisc-desc.c: Regenerated.
 332         * openrisc-desc.h: Regenerated.
 333         * openrisc-dis.c: Regenerated.
 334         * openrisc-opc.c: Regenerated.
 335         * openrisc-opc.h: Regenerated.
 336         * xstormy16-desc.c: Regenerated.
 337         * xstormy16-desc.h: Regenerated.
 338         * xstormy16-dis.c: Regenerated.
 339         * xstormy16-opc.c: Regenerated.
 340         * xstormy16-opc.h: Regenerated.
 341
 342 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 343
 344         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 345         address.
 346
 347 2005-02-11  Nick Clifton  <nickc@redhat.com>
 348
 349         * iq2000-asm.c: Regenerate.
 350
 351         * frv-dis.c: Regenerate.
 352
 353 2005-02-07  Jim Blandy  <jimb@redhat.com>
 354
 355         * Makefile.am (CGEN): Load guile.scm before calling the main
 356         application script.
 357         * Makefile.in: Regenerated.
 358         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 359         Simply pass the cgen-opc.scm path to ${cgen} as its first
 360         argument; ${cgen} itself now contains the '-s', or whatever is
 361         appropriate for the Scheme being used.
 362
 363 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 364
 365         * configure: Regenerate to track ../gettext.m4.
 366
 367 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 368
 369         * ia64-gen.c (NELEMS): Define.
 370         (shrink): Generate alias with missing second predicate register when
 371         opcode has two outputs and these are both predicates.
 372         * ia64-opc-i.c (FULL17): Define.
 373         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 374         here to generate output template.
 375         (TBITCM, TNATCM): Undefine after use.
 376         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 377         first input. Add ld16 aliases without ar.csd as second output. Add
 378         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 379         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 380         ar.ccv as third/fourth inputs. Consolidate through...
 381         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 382         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 383         * ia64-asmtab.c: Regenerate.
 384
 385 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 386
 387         * configure: Regenerate to track ../gettext.m4 change.
 388
 389 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 390
 391         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 392         * frv-asm.c: Rebuilt.
 393         * frv-desc.c: Rebuilt.
 394         * frv-desc.h: Rebuilt.
 395         * frv-dis.c: Rebuilt.
 396         * frv-ibld.c: Rebuilt.
 397         * frv-opc.c: Rebuilt.
 398         * frv-opc.h: Rebuilt.
 399
 400 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 401
 402         * configure: Regenerate, ../gettext.m4 was updated.
 403
 404 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 405
 406         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 407         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 408         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 409         * mips-dis.c: Ditto.
 410
 411 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 412
 413         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 414
 415 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 416
 417         * mips-dis.c (no_aliases): New disassembly option flag.
 418         (set_default_mips_dis_options): Init no_aliases to zero.
 419         (parse_mips_dis_option): Handle no-aliases option.
 420         (print_insn_mips): Ignore table entries that are aliases
 421         if no_aliases is set.
 422         (print_insn_mips16): Ditto.
 423         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 424         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 425         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 426         * mips16-opc.c (mips16_opcodes): Ditto.
 427
 428 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 429
 430         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 431         (inheritance diagram): Add missing edge.
 432         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 433         easier for the testsuite.
 434         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 435         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 436         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 437         arch_sh2a_or_sh4_up child.
 438         (sh_table): Do renaming as above.
 439         Correct comment for ldc.l for gas testsuite to read.
 440         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 441         Correct comments for movy.w and movy.l for gas testsuite to read.
 442         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 443
 444 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 445
 446         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 447
 448 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 449
 450         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 451
 452 2005-01-10  Andreas Schwab  <schwab@suse.de>
 453
 454         * disassemble.c (disassemble_init_for_target) <case
 455         bfd_arch_ia64>: Set skip_zeroes to 16.
 456         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 457
 458 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 459
 460         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 461
 462 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 463
 464         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 465         memory references. Convert avr_operand() to C90 formatting.
 466
 467 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 468
 469         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 470
 471 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 472
 473         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 474         (no_op_insn): Initialize array with instructions that have no
 475         operands.
 476         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 477
 478 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 479
 480         * arm-dis.c: Correct top-level comment.
 481
 482 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 483
 484         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 485         architecuture defining the insn.
 486         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 487         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 488         field.
 489         Also include opcode/arm.h.
 490         * Makefile.am (arm-dis.lo): Update dependency list.
 491         * Makefile.in: Regenerate.
 492
 493 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 494
 495         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 496         reflect the change to the short immediate syntax.
 497
 498 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 499
 500         * or32-opc.c (debug): Warning fix.
 501         * po/POTFILES.in: Regenerate.
 502
 503         * maxq-dis.c: Formatting.
 504         (print_insn): Warning fix.
 505
 506 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 507
 508         * arm-dis.c (WORD_ADDRESS): Define.
 509         (print_insn): Use it.  Correct big-endian end-of-section handling.
 510
 511 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 512             Vineet Sharma      <vineets@noida.hcltech.com>
 513
 514         * maxq-dis.c: New file.
 515         * disassemble.c (ARCH_maxq): Define.
 516         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 517         instructions..
 518         * configure.in: Add case for bfd_maxq_arch.
 519         * configure: Regenerate.
 520         * Makefile.am: Add support for maxq-dis.c
 521         * Makefile.in: Regenerate.
 522         * aclocal.m4: Regenerate.
 523
 524 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 525
 526         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 527         mode.
 528         * crx-dis.c: Likewise.
 529
 530 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 531
 532         Generally, handle CRISv32.
 533         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 534         (struct cris_disasm_data): New type.
 535         (format_reg, format_hex, cris_constraint, print_flags)
 536         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 537         callers changed.
 538         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 539         (print_insn_crisv32_without_register_prefix)
 540         (print_insn_crisv10_v32_with_register_prefix)
 541         (print_insn_crisv10_v32_without_register_prefix)
 542         (cris_parse_disassembler_options): New functions.
 543         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 544         parameter.  All callers changed.
 545         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 546         failure.
 547         (cris_constraint) <case 'Y', 'U'>: New cases.
 548         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 549         for constraint 'n'.
 550         (print_with_operands) <case 'Y'>: New case.
 551         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 552         <case 'N', 'Y', 'Q'>: New cases.
 553         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 554         (print_insn_cris_with_register_prefix)
 555         (print_insn_cris_without_register_prefix): Call
 556         cris_parse_disassembler_options.
 557         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 558         for CRISv32 and the size of immediate operands.  New v32-only
 559         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 560         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 561         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 562         Change brp to be v3..v10.
 563         (cris_support_regs): New vector.
 564         (cris_opcodes): Update head comment.  New format characters '[',
 565         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 566         Add new opcodes for v32 and adjust existing opcodes to accommodate
 567         differences to earlier variants.
 568         (cris_cond15s): New vector.
 569
 570 2004-11-04 Jan Beulich <jbeulich@novell.com>
 571
 572         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 573         (indirEb): Remove.
 574         (Mp): Use f_mode rather than none at all.
 575         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 576         replaces what previously was x_mode; x_mode now means 128-bit SSE
 577         operands.
 578         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 579         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 580         pinsrw's second operand is Edqw.
 581         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 582         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 583         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 584         mode when an operand size override is present or always suffixing.
 585         More instructions will need to be added to this group.
 586         (putop): Handle new macro chars 'C' (short/long suffix selector),
 587         'I' (Intel mode override for following macro char), and 'J' (for
 588         adding the 'l' prefix to far branches in AT&T mode). When an
 589         alternative was specified in the template, honor macro character when
 590         specified for Intel mode.
 591         (OP_E): Handle new *_mode values. Correct pointer specifications for
 592         memory operands. Consolidate output of index register.
 593         (OP_G): Handle new *_mode values.
 594         (OP_I): Handle const_1_mode.
 595         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 596         respective opcode prefix bits have been consumed.
 597         (OP_EM, OP_EX): Provide some default handling for generating pointer
 598         specifications.
 599
 600 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 601
 602         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 603         COP_INST macro.
 604
 605 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 606
 607         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 608         (getregliststring): Support HI/LO and user registers.
 609         * crx-opc.c (crx_instruction): Update data structure according to the
 610         rearrangement done in CRX opcode header file.
 611         (crx_regtab):  Likewise.
 612         (crx_optab):  Likewise.
 613         (crx_instruction): Reorder load/stor instructions, remove unsupported
 614         formats.
 615         support new Co-Processor instruction 'cpi'.
 616
 617 2004-10-27  Nick Clifton  <nickc@redhat.com>
 618
 619         * opcodes/iq2000-asm.c: Regenerate.
 620         * opcodes/iq2000-desc.c: Regenerate.
 621         * opcodes/iq2000-desc.h: Regenerate.
 622         * opcodes/iq2000-dis.c: Regenerate.
 623         * opcodes/iq2000-ibld.c: Regenerate.
 624         * opcodes/iq2000-opc.c: Regenerate.
 625         * opcodes/iq2000-opc.h: Regenerate.
 626
 627 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 628
 629         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 630         us4, us5 (respectively).
 631         Remove unsupported 'popa' instruction.
 632         Reverse operands order in store co-processor instructions.
 633
 634 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 635
 636         * Makefile.am: Run "make dep-am"
 637         * Makefile.in: Regenerate.
 638
 639 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 640
 641         * xtensa-dis.c: Use ISO C90 formatting.
 642
 643 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 644
 645         * ppc-opc.c: Revert 2004-09-09 change.
 646
 647 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 648
 649         * xtensa-dis.c (state_names): Delete.
 650         (fetch_data): Use xtensa_isa_maxlength.
 651         (print_xtensa_operand): Replace operand parameter with opcode/operand
 652         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 653         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 654         instruction bundles.  Use xmalloc instead of malloc.
 655
 656 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 657
 658         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 659         initializers.
 660
 661 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 662
 663         * crx-opc.c (crx_instruction): Support Co-processor insns.
 664         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 665         (getregliststring): Change function to use the above enum.
 666         (print_arg): Handle CO-Processor insns.
 667         (crx_cinvs): Add 'b' option to invalidate the branch-target
 668         cache.
 669
 670 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 671
 672         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 673         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 674         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 675         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 676         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 677
 678 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 679
 680         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 681         rather than add it.
 682
 683 2004-09-30  Paul Brook  <paul@codesourcery.com>
 684
 685         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 686         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 687
 688 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 689
 690         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 691         (CONFIG_STATUS_DEPENDENCIES): New.
 692         (Makefile): Removed.
 693         (config.status): Likewise.
 694         * Makefile.in: Regenerated.
 695
 696 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 697
 698         * Makefile.am: Run "make dep-am".
 699         * Makefile.in: Regenerate.
 700         * aclocal.m4: Regenerate.
 701         * configure: Regenerate.
 702         * po/POTFILES.in: Regenerate.
 703         * po/opcodes.pot: Regenerate.
 704
 705 2004-09-11  Andreas Schwab  <schwab@suse.de>
 706
 707         * configure: Rebuild.
 708
 709 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 710
 711         * ppc-opc.c (L): Make this field not optional.
 712
 713 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 714
 715         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 716         Fix parameter to 'm[t|f]csr' insns.
 717
 718 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 719
 720         * configure.in: Autoupdate to autoconf 2.59.
 721         * aclocal.m4: Rebuild with aclocal 1.4p6.
 722         * configure: Rebuild with autoconf 2.59.
 723         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 724         bfd changes for autoconf 2.59 on the way).
 725         * config.in: Rebuild with autoheader 2.59.
 726
 727 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 728
 729         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 730
 731 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 732
 733         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 734         (GRPPADLCK2): New define.
 735         (twobyte_has_modrm): True for 0xA6.
 736         (grps): GRPPADLCK2 for opcode 0xA6.
 737
 738 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 739
 740         Introduce SH2a support.
 741         * sh-opc.h (arch_sh2a_base): Renumber.
 742         (arch_sh2a_nofpu_base): Remove.
 743         (arch_sh_base_mask): Adjust.
 744         (arch_opann_mask): New.
 745         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 746         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 747         (sh_table): Adjust whitespace.
 748         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 749         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 750         instruction list throughout.
 751         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 752         of arch_sh2a in instruction list throughout.
 753         (arch_sh2e_up): Accomodate above changes.
 754         (arch_sh2_up): Ditto.
 755         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 756         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 757         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 758         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 759         * sh-opc.h (arch_sh2a_nofpu): New.
 760         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 761         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 762         instruction.
 763         2004-01-20  DJ Delorie  <dj@redhat.com>
 764         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 765         2003-12-29  DJ Delorie  <dj@redhat.com>
 766         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 767         sh_opcode_info, sh_table): Add sh2a support.
 768         (arch_op32): New, to tag 32-bit opcodes.
 769         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 770         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 771         * sh-opc.h (arch_sh2a): Add.
 772         * sh-dis.c (arch_sh2a): Handle.
 773         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 774
 775 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 776
 777         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 778
 779 2004-07-22  Nick Clifton  <nickc@redhat.com>
 780
 781         PR/280
 782         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 783         insns - this is done by objdump itself.
 784         * h8500-dis.c (print_insn_h8500): Likewise.
 785
 786 2004-07-21  Jan Beulich <jbeulich@novell.com>
 787
 788         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 789         regardless of address size prefix in effect.
 790         (ptr_reg): Size or address registers does not depend on rex64, but
 791         on the presence of an address size override.
 792         (OP_MMX): Use rex.x only for xmm registers.
 793         (OP_EM): Use rex.z only for xmm registers.
 794
 795 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 796
 797         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 798         move/branch operations to the bottom so that VR5400 multimedia
 799         instructions take precedence in disassembly.
 800
 801 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 802
 803         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 804         ISA-specific "break" encoding.
 805
 806 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 807
 808         * arm-opc.h: Fix typo in comment.
 809
 810 2004-07-11  Andreas Schwab  <schwab@suse.de>
 811
 812         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 813
 814 2004-07-09  Andreas Schwab  <schwab@suse.de>
 815
 816         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 817
 818 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 819
 820         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 821         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 822         (crx-dis.lo): New target.
 823         (crx-opc.lo): Likewise.
 824         * Makefile.in: Regenerate.
 825         * configure.in: Handle bfd_crx_arch.
 826         * configure: Regenerate.
 827         * crx-dis.c: New file.
 828         * crx-opc.c: New file.
 829         * disassemble.c (ARCH_crx): Define.
 830         (disassembler): Handle ARCH_crx.
 831
 832 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 833
 834         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 835         * ia64-asmtab.c: Regnerate.
 836
 837 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 838
 839         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 840         (extract_fxm): Don't test dialect.
 841         (XFXFXM_MASK): Include the power4 bit.
 842         (XFXM): Add p4 param.
 843         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 844
 845 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 846
 847         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 848         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 849
 850 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 851
 852         * ppc-opc.c (BH, XLBH_MASK): Define.
 853         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 854
 855 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 856
 857         * i386-dis.c (x_mode): Comment.
 858         (two_source_ops): File scope.
 859         (float_mem): Correct fisttpll and fistpll.
 860         (float_mem_mode): New table.
 861         (dofloat): Use it.
 862         (OP_E): Correct intel mode PTR output.
 863         (ptr_reg): Use open_char and close_char.
 864         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 865         operands.  Set two_source_ops.
 866
 867 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 868
 869         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 870         instead of _raw_size.
 871
 872 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 873
 874         * ia64-gen.c (in_iclass): Handle more postinc st
 875         and ld variants.
 876         * ia64-asmtab.c: Rebuilt.
 877
 878 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 879
 880         * s390-opc.txt: Correct architecture mask for some opcodes.
 881         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 882         in the esa mode as well.
 883
 884 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 885
 886         * sh-dis.c (target_arch): Make unsigned.
 887         (print_insn_sh): Replace (most of) switch with a call to
 888         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 889         * sh-opc.h: Redefine architecture flags values.
 890         Add sh3-nommu architecture.
 891         Reorganise <arch>_up macros so they make more visual sense.
 892         (SH_MERGE_ARCH_SET): Define new macro.
 893         (SH_VALID_BASE_ARCH_SET): Likewise.
 894         (SH_VALID_MMU_ARCH_SET): Likewise.
 895         (SH_VALID_CO_ARCH_SET): Likewise.
 896         (SH_VALID_ARCH_SET): Likewise.
 897         (SH_MERGE_ARCH_SET_VALID): Likewise.
 898         (SH_ARCH_SET_HAS_FPU): Likewise.
 899         (SH_ARCH_SET_HAS_DSP): Likewise.
 900         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 901         (sh_get_arch_from_bfd_mach): Add prototype.
 902         (sh_get_arch_up_from_bfd_mach): Likewise.
 903         (sh_get_bfd_mach_from_arch_set): Likewise.
 904         (sh_merge_bfd_arc): Likewise.
 905
 906 2004-05-24  Peter Barada  <peter@the-baradas.com>
 907
 908         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 909         into new match_insn_m68k function.  Loop over canidate
 910         matches and select first that completely matches.
 911         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 912         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 913         to verify addressing for MAC/EMAC.
 914         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 915         reigster halves since 'fpu' and 'spl' look misleading.
 916         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 917         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 918         first, tighten up match masks.
 919         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 920         'size' from special case code in print_insn_m68k to
 921         determine decode size of insns.
 922
 923 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 924
 925         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 926         well as when -mpower4.
 927
 928 2004-05-13  Nick Clifton  <nickc@redhat.com>
 929
 930         * po/fr.po: Updated French translation.
 931
 932 2004-05-05  Peter Barada  <peter@the-baradas.com>
 933
 934         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 935         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 936         * m68k-op.c: Switch from ColdFire chips to core variants.
 937
 938 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 939
 940         PR 147.
 941         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 942
 943 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 944
 945         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 946         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 947
 948 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 949
 950         * sh-dis.c (print_insn_sh): Print the value in constant pool
 951         as a symbol if it looks like a symbol.
 952
 953 2004-04-22  Peter Barada <peter@the-baradas.com>
 954
 955         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 956         appropriate ColdFire architectures.
 957         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 958         mask addressing.
 959         Add EMAC instructions, fix MAC instructions. Remove
 960         macmw/macml/msacmw/msacml instructions since mask addressing now
 961         supported.
 962
 963 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 964
 965         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 966         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 967         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 968         macro.  Adjust all users.
 969
 970 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 971
 972         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 973         separately.
 974
 975 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 976
 977         * m32r-asm.c: Regenerate.
 978
 979 2004-03-29  Stan Shebs  <shebs@apple.com>
 980
 981         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 982         used.
 983
 984 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 985
 986         * aclocal.m4: Regenerate.
 987         * config.in: Regenerate.
 988         * configure: Regenerate.
 989         * po/POTFILES.in: Regenerate.
 990         * po/opcodes.pot: Regenerate.
 991
 992 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 993
 994         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 995         PPC_OPERANDS_GPR_0.
 996         * ppc-opc.c (RA0): Define.
 997         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 998         (RAOPT): Rename from RAO.  Update all uses.
 999         (powerpc_opcodes): Use RA0 as appropriate.
1000
1001 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1002
1003         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1004
1005 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1006
1007         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1008
1009 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1010
1011         * i386-dis.c (GRPPLOCK): Delete.
1012         (grps): Delete GRPPLOCK entry.
1013
1014 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1015
1016         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1017         (M, Mp): Use OP_M.
1018         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1019         (GRPPADLCK): Define.
1020         (dis386): Use NOP_Fixup on "nop".
1021         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1022         (twobyte_has_modrm): Set for 0xa7.
1023         (padlock_table): Delete.  Move to..
1024         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1025         and clflush.
1026         (print_insn): Revert PADLOCK_SPECIAL code.
1027         (OP_E): Delete sfence, lfence, mfence checks.
1028
1029 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1030
1031         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1032         (INVLPG_Fixup): New function.
1033         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1034
1035 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1036
1037         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1038         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1039         (padlock_table): New struct with PadLock instructions.
1040         (print_insn): Handle PADLOCK_SPECIAL.
1041
1042 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1043
1044         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1045         (OP_E): Twiddle clflush to sfence here.
1046
1047 2004-03-08  Nick Clifton  <nickc@redhat.com>
1048
1049         * po/de.po: Updated German translation.
1050
1051 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1052
1053         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1054         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1055         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1056         accordingly.
1057
1058 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1059
1060         * frv-asm.c: Regenerate.
1061         * frv-desc.c: Regenerate.
1062         * frv-desc.h: Regenerate.
1063         * frv-dis.c: Regenerate.
1064         * frv-ibld.c: Regenerate.
1065         * frv-opc.c: Regenerate.
1066         * frv-opc.h: Regenerate.
1067
1068 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1069
1070         * frv-desc.c, frv-opc.c: Regenerate.
1071
1072 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1073
1074         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1075
1076 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1077
1078         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1079         Also correct mistake in the comment.
1080
1081 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1082
1083         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1084         ensure that double registers have even numbers.
1085         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1086         that reserved instruction 0xfffd does not decode the same
1087         as 0xfdfd (ftrv).
1088         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1089         REG_N refers to a double register.
1090         Add REG_N_B01 nibble type and use it instead of REG_NM
1091         in ftrv.
1092         Adjust the bit patterns in a few comments.
1093
1094 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1095
1096         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1097
1098 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1099
1100         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1101
1102 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1103
1104         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1105
1106 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1107
1108         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1109         mtivor32, mtivor33, mtivor34.
1110
1111 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1112
1113         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1114
1115 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1116
1117         * arm-opc.h Maverick accumulator register opcode fixes.
1118
1119 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1120
1121         * m32r-dis.c: Regenerate.
1122
1123 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1124
1125         * sh-opc.h (sh_table): "fsrra", not "fssra".
1126
1127 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1128
1129         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1130         contraints.
1131
1132 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1133
1134         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1135
1136 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1137
1138         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1139         1.  Don't print scale factor on AT&T mode when index missing.
1140
1141 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1142
1143         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1144         when loaded into XR registers.
1145
1146 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1147
1148         * frv-desc.h: Regenerate.
1149         * frv-desc.c: Regenerate.
1150         * frv-opc.c: Regenerate.
1151
1152 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1153
1154         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1155
1156 2004-01-09  Paul Brook  <paul@codesourcery.com>
1157
1158         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1159         specific opcodes.
1160
1161 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1162
1163         * Makefile.am (libopcodes_la_DEPENDENCIES)
1164         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1165         comment about the problem.
1166         * Makefile.in: Regenerate.
1167
1168 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1169
1170         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1171         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1172         cut&paste errors in shifting/truncating numerical operands.
1173         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1174         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1175         (parse_uslo16): Likewise.
1176         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1177         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1178         (parse_s12): Likewise.
1179         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1180         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1181         (parse_uslo16): Likewise.
1182         (parse_uhi16): Parse gothi and gotfuncdeschi.
1183         (parse_d12): Parse got12 and gotfuncdesc12.
1184         (parse_s12): Likewise.
1185
1186 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1187
1188         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1189         instruction which looks similar to an 'rla' instruction.
1190
1191 For older changes see ChangeLog-0203
1192 \f
1193 Local Variables:
1194 mode: change-log
1195 left-margin: 8
1196 fill-column: 74
1197 version-control: never
1198 End: