599b5d509ece46d19c8e70194104f110a52df6b9
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2012-08-01 Alan Modra <amodra@gmail.com>
2
3 * h8300-dis.c: Fix printf arg warnings.
4 * i960-dis.c: Likewise.
5 * mips-dis.c: Likewise.
6 * pdp11-dis.c: Likewise.
7 * sh-dis.c: Likewise.
8 * v850-dis.c: Likewise.
9 * configure.in: Formatting.
10 * configure: Regenerate.
11 * rl78-decode.c: Regenerate.
12 * po/POTFILES.in: Regenerate.
13
14 2012-07-31 Chao-Ying Fu <fu@mips.com>
15 Catherine Moore <clm@codesourcery.com>
16 Maciej W. Rozycki <macro@codesourcery.com>
17
18 * micromips-opc.c (WR_a, RD_a, MOD_a): New macros.
19 (DSP_VOLA): Likewise.
20 (D32, D33): Likewise.
21 (micromips_opcodes): Add DSP ASE instructions.
22 * mips-dis.c (print_insn_micromips) <'2', '3'>: New cases.
23 <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
24
25 2012-07-31 Jan Beulich <jbeulich@suse.com>
26
27 * i386-opc.tbl (vmovntdqa): Move up into 256-bit integer AVX2
28 instruction group. Mark as requiring AVX2.
29 * i386-tbl.h: Re-generate.
30
31 2012-07-30 Nick Clifton <nickc@redhat.com>
32
33 * po/opcodes.pot: Updated template.
34 * po/es.po: Updated Spanish translation.
35 * po/fi.po: Updated Finnish translation.
36
37 2012-07-27 Mike Frysinger <vapier@gentoo.org>
38
39 * configure.in (BFD_VERSION): Run bfd/configure --version and
40 parse the output of that.
41 * configure: Regenerate.
42
43 2012-07-25 James Lemke <jwlemke@codesourcery.com>
44
45 * ppc-opc.c (powerpc_opcodes): Add/remove PPCVLE for some 32-bit insns.
46
47 2012-07-24 Stephan McCamant <smcc@cs.berkeley.edu>
48 Dr David Alan Gilbert <dave@treblig.org>
49
50 PR binutils/13135
51 * arm-dis.c: Add necessary casts for printing integer values.
52 Use %s when printing string values.
53 * hppa-dis.c: Likewise.
54 * m68k-dis.c: Likewise.
55 * microblaze-dis.c: Likewise.
56 * mips-dis.c: Likewise.
57 * sparc-dis.c: Likewise.
58
59 2012-07-19 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
60
61 PR binutils/14355
62 * i386-dis.c (VEX_LEN_0FXOP_08_CC): New.
63 (VEX_LEN_0FXOP_08_CD): Likewise.
64 (VEX_LEN_0FXOP_08_CE): Likewise.
65 (VEX_LEN_0FXOP_08_CF): Likewise.
66 (VEX_LEN_0FXOP_08_EC): Likewise.
67 (VEX_LEN_0FXOP_08_ED): Likewise.
68 (VEX_LEN_0FXOP_08_EE): Likewise.
69 (VEX_LEN_0FXOP_08_EF): Likewise.
70 (xop_table): Fix entries for vpcomb, vpcomw, vpcomd, vpcomq,
71 vpcomub, vpcomuw, vpcomud, vpcomuq.
72 (vex_len_table): Add entries for VEX_LEN_0FXOP_08_CC,
73 VEX_LEN_0FXOP_08_CD, VEX_LEN_0FXOP_08_CE, VEX_LEN_0FXOP_08_CF,
74 VEX_LEN_0FXOP_08_EC, VEX_LEN_0FXOP_08_ED, VEX_LEN_0FXOP_08_EE,
75 VEX_LEN_0FXOP_08_EF.
76
77 2012-07-16 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
78
79 * i386-dis.c (PREFIX_0F38F6): New.
80 (prefix_table): Add adcx, adox instructions.
81 (three_byte_table): Use PREFIX_0F38F6.
82 (mod_table): Add rdseed instruction.
83 * i386-gen.c (cpu_flag_init): Add CpuADX, CpuRDSEED, CpuPRFCHW.
84 (cpu_flags): Likewise.
85 * i386-opc.h: Add CpuADX, CpuRDSEED, CpuPRFCHW.
86 (i386_cpu_flags): Add fields cpurdseed, cpuadx, cpuprfchw.
87 * i386-opc.tbl: Add instrcutions adcx, adox, rdseed. Extend
88 prefetchw.
89 * i386-tbl.h: Regenerate.
90 * i386-init.h: Likewise.
91
92 2012-07-05 Thomas Schwinge <thomas@codesourcery.com>
93
94 * mips-dis.c: Remove gratuitous newline.
95
96 2012-07-05 Sean Keys <skeys@ipdatasys.com>
97
98 * xgate-dis.c: Removed an IF statement that will
99 always be false due to overlapping operand masks.
100 * xgate-opc.c: Corrected 'com' opcode entry and
101 fixed spacing.
102
103 2012-07-02 Roland McGrath <mcgrathr@google.com>
104
105 * i386-opc.tbl: Add RepPrefixOk to nop.
106 * i386-tbl.h: Regenerate.
107
108 2012-06-28 Nick Clifton <nickc@redhat.com>
109
110 * po/vi.po: Updated Vietnamese translation.
111
112 2012-06-22 Roland McGrath <mcgrathr@google.com>
113
114 * i386-opc.tbl: Add RepPrefixOk to ret.
115 * i386-tbl.h: Regenerate.
116
117 * i386-opc.h (RepPrefixOk): New enum constant.
118 (i386_opcode_modifier): New bitfield 'repprefixok'.
119 * i386-gen.c (opcode_modifiers): Add RepPrefixOk.
120 * i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
121 instructions that have IsString.
122 * i386-tbl.h: Regenerate.
123
124 2012-06-11 Andreas Schwab <schwab@linux-m68k.org>
125
126 * ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
127 (iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
128 (lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
129 (stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
130 (dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
131 (dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
132 (stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
133 (tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
134 (stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
135
136 2012-05-19 Alan Modra <amodra@gmail.com>
137
138 * ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
139 (get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
140
141 2012-05-18 Alan Modra <amodra@gmail.com>
142
143 * ia64-opc.c: Remove #include "ansidecl.h".
144 * z8kgen.c: Include sysdep.h first.
145
146 * arc-dis.c: Include sysdep.h first, remove some redundant includes.
147 * bfin-dis.c: Likewise.
148 * i860-dis.c: Likewise.
149 * ia64-dis.c: Likewise.
150 * ia64-gen.c: Likewise.
151 * m68hc11-dis.c: Likewise.
152 * mmix-dis.c: Likewise.
153 * msp430-dis.c: Likewise.
154 * or32-dis.c: Likewise.
155 * rl78-dis.c: Likewise.
156 * rx-dis.c: Likewise.
157 * tic4x-dis.c: Likewise.
158 * tilegx-opc.c: Likewise.
159 * tilepro-opc.c: Likewise.
160 * rx-decode.c: Regenerate.
161
162 2012-05-17 James Lemke <jwlemke@codesourcery.com>
163
164 * ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
165
166 2012-05-17 James Lemke <jwlemke@codesourcery.com>
167
168 * ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
169
170 2012-05-17 Daniel Richard G. <skunk@iskunk.org>
171 Nick Clifton <nickc@redhat.com>
172
173 PR 14072
174 * configure.in: Add check that sysdep.h has been included before
175 any system header files.
176 * configure: Regenerate.
177 * config.in: Regenerate.
178 * sysdep.h: Generate an error if included before config.h.
179 * alpha-opc.c: Include sysdep.h before any other header file.
180 * alpha-dis.c: Likewise.
181 * avr-dis.c: Likewise.
182 * cgen-opc.c: Likewise.
183 * cr16-dis.c: Likewise.
184 * cris-dis.c: Likewise.
185 * crx-dis.c: Likewise.
186 * d10v-dis.c: Likewise.
187 * d10v-opc.c: Likewise.
188 * d30v-dis.c: Likewise.
189 * d30v-opc.c: Likewise.
190 * h8500-dis.c: Likewise.
191 * i370-dis.c: Likewise.
192 * i370-opc.c: Likewise.
193 * m10200-dis.c: Likewise.
194 * m10300-dis.c: Likewise.
195 * micromips-opc.c: Likewise.
196 * mips-opc.c: Likewise.
197 * mips61-opc.c: Likewise.
198 * moxie-dis.c: Likewise.
199 * or32-opc.c: Likewise.
200 * pj-dis.c: Likewise.
201 * ppc-dis.c: Likewise.
202 * ppc-opc.c: Likewise.
203 * s390-dis.c: Likewise.
204 * sh-dis.c: Likewise.
205 * sh64-dis.c: Likewise.
206 * sparc-dis.c: Likewise.
207 * sparc-opc.c: Likewise.
208 * spu-dis.c: Likewise.
209 * tic30-dis.c: Likewise.
210 * tic54x-dis.c: Likewise.
211 * tic80-dis.c: Likewise.
212 * tic80-opc.c: Likewise.
213 * tilegx-dis.c: Likewise.
214 * tilepro-dis.c: Likewise.
215 * v850-dis.c: Likewise.
216 * v850-opc.c: Likewise.
217 * vax-dis.c: Likewise.
218 * w65-dis.c: Likewise.
219 * xgate-dis.c: Likewise.
220 * xtensa-dis.c: Likewise.
221 * rl78-decode.opc: Likewise.
222 * rl78-decode.c: Regenerate.
223 * rx-decode.opc: Likewise.
224 * rx-decode.c: Regenerate.
225
226 2012-05-17 Alan Modra <amodra@gmail.com>
227
228 * ppc_dis.c: Don't include elf/ppc.h.
229
230 2012-05-16 Meador Inge <meadori@codesourcery.com>
231
232 * arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
233 to PUSH/POP {reg}.
234
235 2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
236 Stephane Carrez <stcarrez@nerim.fr>
237
238 * configure.in: Add S12X and XGATE co-processor support to m68hc11
239 target.
240 * disassemble.c: Likewise.
241 * configure: Regenerate.
242 * m68hc11-dis.c: Make objdump output more consistent, use hex
243 instead of decimal and use 0x prefix for hex.
244 * m68hc11-opc.c: Add S12X and XGATE opcodes.
245
246 2012-05-14 James Lemke <jwlemke@codesourcery.com>
247
248 * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
249 (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
250 (vle_opcd_indices): New array.
251 (lookup_vle): New function.
252 (disassemble_init_powerpc): Revise for second (VLE) opcode table.
253 (print_insn_powerpc): Likewise.
254 * ppc-opc.c: Likewise.
255
256 2012-05-14 Catherine Moore <clm@codesourcery.com>
257 Maciej W. Rozycki <macro@codesourcery.com>
258 Rhonda Wittels <rhonda@codesourcery.com>
259 Nathan Froyd <froydnj@codesourcery.com>
260
261 * ppc-opc.c (insert_arx, extract_arx): New functions.
262 (insert_ary, extract_ary): New functions.
263 (insert_li20, extract_li20): New functions.
264 (insert_rx, extract_rx): New functions.
265 (insert_ry, extract_ry): New functions.
266 (insert_sci8, extract_sci8): New functions.
267 (insert_sci8n, extract_sci8n): New functions.
268 (insert_sd4h, extract_sd4h): New functions.
269 (insert_sd4w, extract_sd4w): New functions.
270 (insert_vlesi, extract_vlesi): New functions.
271 (insert_vlensi, extract_vlensi): New functions.
272 (insert_vleui, extract_vleui): New functions.
273 (insert_vleil, extract_vleil): New functions.
274 (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
275 (BI16, BI32, BO32, B8): New.
276 (B15, B24, CRD32, CRS): New.
277 (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
278 (DB, IMM20, RD, Rx, ARX, RY, RZ): New.
279 (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
280 (SH6_MASK): Use PPC_OPSHIFT_INV.
281 (SI8, UI5, OIMM5, UI7, BO16): New.
282 (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
283 (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
284 (ALLOW8_SPRG): New.
285 (insert_sprg, extract_sprg): Check ALLOW8_SPRG.
286 (OPVUP, OPVUP_MASK OPVUP): New
287 (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
288 (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
289 (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
290 (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
291 (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
292 (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
293 (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
294 (SE_IM5, SE_IM5_MASK): New.
295 (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
296 (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
297 (BO32DNZ, BO32DZ): New.
298 (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
299 (PPCVLE): New.
300 (powerpc_opcodes): Add new VLE instructions. Update existing
301 instruction to include PPCVLE if supported.
302 * ppc-dis.c (ppc_opts): Add vle entry.
303 (get_powerpc_dialect): New function.
304 (powerpc_init_dialect): VLE support.
305 (print_insn_big_powerpc): Call get_powerpc_dialect.
306 (print_insn_little_powerpc): Likewise.
307 (operand_value_powerpc): Handle negative shift counts.
308 (print_insn_powerpc): Handle 2-byte instruction lengths.
309
310 2012-05-11 Daniel Richard G. <skunk@iskunk.org>
311
312 PR binutils/14028
313 * configure.in: Invoke ACX_HEADER_STRING.
314 * configure: Regenerate.
315 * config.in: Regenerate.
316 * sysdep.h: If STRINGS_WITH_STRING is defined then include both
317 string.h and strings.h.
318
319 2012-05-11 Nick Clifton <nickc@redhat.com>
320
321 PR binutils/14006
322 * arm-dis.c (print_insn): Fix detection of instruction mode in
323 files containing multiple executable sections.
324
325 2012-05-03 Sean Keys <skeys@ipdatasys.com>
326
327 * Makefile.in, configure: regenerate
328 * disassemble.c (disassembler): Recognize ARCH_XGATE.
329 * xgate-dis.c (read_memory, print_insn, print_insn_xgate):
330 New functions.
331 * configure.in: Recognize xgate.
332 * xgate-dis.c, xgate-opc.c: New files for support of xgate
333 * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
334 and opcode generation for xgate.
335
336 2012-04-30 DJ Delorie <dj@redhat.com>
337
338 * rx-decode.opc (MOV): Do not sign-extend immediates which are
339 already the maximum bit size.
340 * rx-decode.c: Regenerate.
341
342 2012-04-27 David S. Miller <davem@davemloft.net>
343
344 * sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
345 * sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
346
347 * sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
348 * sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
349
350 * sparc-opc.c (CBCOND): New define.
351 (CBCOND_XCC): Likewise.
352 (cbcond): New helper macro.
353 (sparc_opcodes): Add compare-and-branch instructions.
354
355 * sparc-dis.c (print_insn_sparc): Handle ')'.
356 * sparc-opc.c (sparc_opcodes): Add crypto instructions.
357
358 * sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
359 into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
360
361 2012-04-12 David S. Miller <davem@davemloft.net>
362
363 * sparc-dis.c (X_DISP10): Define.
364 (print_insn_sparc): Handle '='.
365
366 2012-04-01 Mike Frysinger <vapier@gentoo.org>
367
368 * bfin-dis.c (fmtconst): Replace decimal handling with a single
369 sprintf call and the '*' field width.
370
371 2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
372
373 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
374
375 2012-03-16 Alan Modra <amodra@gmail.com>
376
377 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
378 (powerpc_opcd_indices): Bump array size.
379 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
380 corresponding to unused opcodes to following entry.
381 (lookup_powerpc): New function, extracted and optimised from..
382 (print_insn_powerpc): ..here.
383
384 2012-03-15 Alan Modra <amodra@gmail.com>
385 James Lemke <jwlemke@codesourcery.com>
386
387 * disassemble.c (disassemble_init_for_target): Handle ppc init.
388 * ppc-dis.c (private): New var.
389 (powerpc_init_dialect): Don't return calloc failure, instead use
390 private.
391 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
392 (powerpc_opcd_indices): New array.
393 (disassemble_init_powerpc): New function.
394 (print_insn_big_powerpc): Don't init dialect here.
395 (print_insn_little_powerpc): Likewise.
396 (print_insn_powerpc): Start search using powerpc_opcd_indices.
397
398 2012-03-10 Edmar Wienskoski <edmar@freescale.com>
399
400 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
401 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
402 (PPCVEC2, PPCTMR, E6500): New short names.
403 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
404 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
405 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
406 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
407 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
408 optional operands on sync instruction for E6500 target.
409
410 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
411
412 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
413
414 2012-02-27 Alan Modra <amodra@gmail.com>
415
416 * mt-dis.c: Regenerate.
417
418 2012-02-27 Alan Modra <amodra@gmail.com>
419
420 * v850-opc.c (extract_v8): Rearrange to make it obvious this
421 is the inverse of corresponding insert function.
422 (extract_d22, extract_u9, extract_r4): Likewise.
423 (extract_d9): Correct sign extension.
424 (extract_d16_15): Don't assume "long" is 32 bits, and don't
425 rely on implementation defined behaviour for shift right of
426 signed types.
427 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
428 (extract_d23): Likewise, and correct mask.
429
430 2012-02-27 Alan Modra <amodra@gmail.com>
431
432 * crx-dis.c (print_arg): Mask constant to 32 bits.
433 * crx-opc.c (cst4_map): Use int array.
434
435 2012-02-27 Alan Modra <amodra@gmail.com>
436
437 * arc-dis.c (BITS): Don't use shifts to mask off bits.
438 (FIELDD): Sign extend with xor,sub.
439
440 2012-02-25 Walter Lee <walt@tilera.com>
441
442 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
443 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
444 TILEPRO_OPC_LW_TLS_SN.
445
446 2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
447
448 * i386-opc.h (HLEPrefixNone): New.
449 (HLEPrefixLock): Likewise.
450 (HLEPrefixAny): Likewise.
451 (HLEPrefixRelease): Likewise.
452
453 2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
454
455 * i386-dis.c (HLE_Fixup1): New.
456 (HLE_Fixup2): Likewise.
457 (HLE_Fixup3): Likewise.
458 (Ebh1): Likewise.
459 (Evh1): Likewise.
460 (Ebh2): Likewise.
461 (Evh2): Likewise.
462 (Ebh3): Likewise.
463 (Evh3): Likewise.
464 (MOD_C6_REG_7): Likewise.
465 (MOD_C7_REG_7): Likewise.
466 (RM_C6_REG_7): Likewise.
467 (RM_C7_REG_7): Likewise.
468 (XACQUIRE_PREFIX): Likewise.
469 (XRELEASE_PREFIX): Likewise.
470 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
471 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
472 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
473 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
474 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
475 MOD_C6_REG_7 and MOD_C7_REG_7.
476 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
477 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
478 xtest.
479 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
480 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
481
482 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
483 CPU_RTM_FLAGS.
484 (cpu_flags): Add CpuHLE and CpuRTM.
485 (opcode_modifiers): Add HLEPrefixOk.
486
487 * i386-opc.h (CpuHLE): New.
488 (CpuRTM): Likewise.
489 (HLEPrefixOk): Likewise.
490 (i386_cpu_flags): Add cpuhle and cpurtm.
491 (i386_opcode_modifier): Add hleprefixok.
492
493 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
494 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
495 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
496 operand. Add xacquire, xrelease, xabort, xbegin, xend and
497 xtest.
498 * i386-init.h: Regenerated.
499 * i386-tbl.h: Likewise.
500
501 2012-01-24 DJ Delorie <dj@redhat.com>
502
503 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
504 * rl78-decode.c: Regenerate.
505
506 2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
507
508 PR binutils/10173
509 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
510
511 2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
512
513 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
514 register and move them after pmove with PSR/PCSR register.
515
516 2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
517
518 * i386-dis.c (mod_table): Add vmfunc.
519
520 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
521 (cpu_flags): CpuVMFUNC.
522
523 * i386-opc.h (CpuVMFUNC): New.
524 (i386_cpu_flags): Add cpuvmfunc.
525
526 * i386-opc.tbl: Add vmfunc.
527 * i386-init.h: Regenerated.
528 * i386-tbl.h: Likewise.
529
530 For older changes see ChangeLog-2011
531 \f
532 Local Variables:
533 mode: change-log
534 left-margin: 8
535 fill-column: 74
536 version-control: never
537 End:
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