opcodes/ChangeLog

   1 2005-04-04  Nick Clifton  <nickc@redhat.com>
   2
   3         * fr30-asm.c: Regenerate.
   4         * frv-asm.c: Regenerate.
   5         * iq2000-asm.c: Regenerate.
   6         * m32r-asm.c: Regenerate.
   7         * openrisc-asm.c: Regenerate.
   8
   9 2005-04-01  Jan Beulich  <jbeulich@novell.com>
  10
  11         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
  12         visible operands in Intel mode. The first operand of monitor is
  13         %rax in 64-bit mode.
  14
  15 2005-04-01  Jan Beulich  <jbeulich@novell.com>
  16
  17         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
  18         easier future additions.
  19
  20 2005-03-31  Jerome Guitton  <guitton@gnat.com>
  21
  22         * configure.in: Check for basename.
  23         * configure: Regenerate.
  24         * config.in: Ditto.
  25
  26 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
  27
  28         * i386-dis.c (SEG_Fixup): New.
  29         (Sv): New.
  30         (dis386): Use "Sv" for 0x8c and 0x8e.
  31
  32 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
  33             Nick Clifton  <nickc@redhat.com>
  34
  35         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
  36         function entry mask addresses.
  37         (entry_addr_occupied_slots): New variable: The number of occupied
  38         elements in entry_addr.
  39         (entry_addr_total_slots): New variable: The total number of
  40         elements in entry_addr.
  41         (parse_disassembler_options): New function.  Fills in the entry_addr
  42         array.
  43         (free_entry_array): New function.  Release the memory used by the
  44         entry addr array.  Suppressed because there is no way to call it.
  45         (is_function_entry): Check if a given address is a function's
  46         start address by looking at supplied entry mask addresses and
  47         symbol information, if available.
  48         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
  49
  50 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
  51
  52         * cris-dis.c (print_with_operands): Use ~31L for long instead
  53         of ~31.
  54
  55 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
  56
  57         * mmix-opc.c (O): Revert the last change.
  58         (Z): Likewise.
  59
  60 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
  61
  62         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
  63         (Z): Likewise.
  64
  65 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
  66
  67         * mmix-opc.c (O, Z): Force expression as unsigned long.
  68
  69 2005-03-18  Nick Clifton  <nickc@redhat.com>
  70
  71         * ip2k-asm.c: Regenerate.
  72         * op/opcodes.pot: Regenerate.
  73
  74 2005-03-16  Nick Clifton  <nickc@redhat.com>
  75             Ben Elliston  <bje@au.ibm.com>
  76
  77         * configure.in (werror): New switch: Add -Werror to the
  78         compiler command line.  Enabled by default.  Disable via
  79         --disable-werror.
  80         * configure: Regenerate.
  81
  82 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
  83
  84         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
  85         BOOKE.
  86
  87 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
  88
  89         * po/es.po: Commit new Spanish translation.
  90
  91         * po/fr.po: Commit new French translation.
  92
  93 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
  94
  95         * vax-dis.c: Fix spelling error
  96         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
  97         of just "Entry mask: < r1 ... >"
  98
  99 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 100
 101         * arm-dis.c (arm_opcodes): Document %E and %V.
 102         Add entries for v6T2 ARM instructions:
 103         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 104         (print_insn_arm): Add support for %E and %V.
 105         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 106
 107 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 108             Alan Modra  <amodra@bigpond.net.au>
 109
 110         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 111         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 112         (SPRG_MASK): Delete.
 113         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 114         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 115         mfsprg4..7 after msprg and consolidate.
 116
 117 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 118
 119         * vax-dis.c (entry_mask_bit): New array.
 120         (print_insn_vax): Decode function entry mask.
 121
 122 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 123
 124         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 125
 126 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 127
 128         * po/opcodes.pot: Regenerate.
 129
 130 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 131
 132         * arc-dis.c (a4_decoding_class): New enum.
 133         (dsmOneArcInst): Use the enum values for the decoding class.
 134         Remove redundant case in the switch for decodingClass value 11.
 135
 136 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 137
 138         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 139         accesses.
 140         (OP_C): Consider lock prefix in non-64-bit modes.
 141
 142 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 143
 144         * cris-dis.c (format_hex): Remove ineffective warning fix.
 145         * crx-dis.c (make_instruction): Warning fix.
 146         * frv-asm.c: Regenerate.
 147
 148 2005-02-23  Nick Clifton  <nickc@redhat.com>
 149
 150         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 151         read_memory.
 152
 153         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 154
 155         * crx-dis.c (make_instruction): Move argument structure into inner
 156         scope and ensure that all of its fields are initialised before
 157         they are used.
 158
 159         * fr30-asm.c: Regenerate.
 160         * fr30-dis.c: Regenerate.
 161         * frv-asm.c: Regenerate.
 162         * frv-dis.c: Regenerate.
 163         * ip2k-asm.c: Regenerate.
 164         * ip2k-dis.c: Regenerate.
 165         * iq2000-asm.c: Regenerate.
 166         * iq2000-dis.c: Regenerate.
 167         * m32r-asm.c: Regenerate.
 168         * m32r-dis.c: Regenerate.
 169         * openrisc-asm.c: Regenerate.
 170         * openrisc-dis.c: Regenerate.
 171         * xstormy16-asm.c: Regenerate.
 172         * xstormy16-dis.c: Regenerate.
 173
 174 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 175
 176         * arc-ext.c: Warning fixes.
 177         * arc-ext.h: Likewise.
 178         * cgen-opc.c: Likewise.
 179         * ia64-gen.c: Likewise.
 180         * maxq-dis.c: Likewise.
 181         * ns32k-dis.c: Likewise.
 182         * w65-dis.c: Likewise.
 183         * ia64-asmtab.c: Regenerate.
 184
 185 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 186
 187         * fr30-desc.c: Regenerate.
 188         * fr30-desc.h: Regenerate.
 189         * fr30-opc.c: Regenerate.
 190         * fr30-opc.h: Regenerate.
 191         * frv-desc.c: Regenerate.
 192         * frv-desc.h: Regenerate.
 193         * frv-opc.c: Regenerate.
 194         * frv-opc.h: Regenerate.
 195         * ip2k-desc.c: Regenerate.
 196         * ip2k-desc.h: Regenerate.
 197         * ip2k-opc.c: Regenerate.
 198         * ip2k-opc.h: Regenerate.
 199         * iq2000-desc.c: Regenerate.
 200         * iq2000-desc.h: Regenerate.
 201         * iq2000-opc.c: Regenerate.
 202         * iq2000-opc.h: Regenerate.
 203         * m32r-desc.c: Regenerate.
 204         * m32r-desc.h: Regenerate.
 205         * m32r-opc.c: Regenerate.
 206         * m32r-opc.h: Regenerate.
 207         * m32r-opinst.c: Regenerate.
 208         * openrisc-desc.c: Regenerate.
 209         * openrisc-desc.h: Regenerate.
 210         * openrisc-opc.c: Regenerate.
 211         * openrisc-opc.h: Regenerate.
 212         * xstormy16-desc.c: Regenerate.
 213         * xstormy16-desc.h: Regenerate.
 214         * xstormy16-opc.c: Regenerate.
 215         * xstormy16-opc.h: Regenerate.
 216
 217 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 218
 219         * Makefile.am: Run "make dep-am"
 220         * Makefile.in: Regenerate.
 221
 222 2005-02-15  Nick Clifton  <nickc@redhat.com>
 223
 224         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 225         compile time warnings.
 226         (print_keyword): Likewise.
 227         (default_print_insn): Likewise.
 228
 229         * fr30-desc.c: Regenerated.
 230         * fr30-desc.h: Regenerated.
 231         * fr30-dis.c: Regenerated.
 232         * fr30-opc.c: Regenerated.
 233         * fr30-opc.h: Regenerated.
 234         * frv-desc.c: Regenerated.
 235         * frv-dis.c: Regenerated.
 236         * frv-opc.c: Regenerated.
 237         * ip2k-asm.c: Regenerated.
 238         * ip2k-desc.c: Regenerated.
 239         * ip2k-desc.h: Regenerated.
 240         * ip2k-dis.c: Regenerated.
 241         * ip2k-opc.c: Regenerated.
 242         * ip2k-opc.h: Regenerated.
 243         * iq2000-desc.c: Regenerated.
 244         * iq2000-dis.c: Regenerated.
 245         * iq2000-opc.c: Regenerated.
 246         * m32r-asm.c: Regenerated.
 247         * m32r-desc.c: Regenerated.
 248         * m32r-desc.h: Regenerated.
 249         * m32r-dis.c: Regenerated.
 250         * m32r-opc.c: Regenerated.
 251         * m32r-opc.h: Regenerated.
 252         * m32r-opinst.c: Regenerated.
 253         * openrisc-desc.c: Regenerated.
 254         * openrisc-desc.h: Regenerated.
 255         * openrisc-dis.c: Regenerated.
 256         * openrisc-opc.c: Regenerated.
 257         * openrisc-opc.h: Regenerated.
 258         * xstormy16-desc.c: Regenerated.
 259         * xstormy16-desc.h: Regenerated.
 260         * xstormy16-dis.c: Regenerated.
 261         * xstormy16-opc.c: Regenerated.
 262         * xstormy16-opc.h: Regenerated.
 263
 264 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 265
 266         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 267         address.
 268
 269 2005-02-11  Nick Clifton  <nickc@redhat.com>
 270
 271         * iq2000-asm.c: Regenerate.
 272
 273         * frv-dis.c: Regenerate.
 274
 275 2005-02-07  Jim Blandy  <jimb@redhat.com>
 276
 277         * Makefile.am (CGEN): Load guile.scm before calling the main
 278         application script.
 279         * Makefile.in: Regenerated.
 280         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 281         Simply pass the cgen-opc.scm path to ${cgen} as its first
 282         argument; ${cgen} itself now contains the '-s', or whatever is
 283         appropriate for the Scheme being used.
 284
 285 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 286
 287         * configure: Regenerate to track ../gettext.m4.
 288
 289 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 290
 291         * ia64-gen.c (NELEMS): Define.
 292         (shrink): Generate alias with missing second predicate register when
 293         opcode has two outputs and these are both predicates.
 294         * ia64-opc-i.c (FULL17): Define.
 295         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 296         here to generate output template.
 297         (TBITCM, TNATCM): Undefine after use.
 298         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 299         first input. Add ld16 aliases without ar.csd as second output. Add
 300         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 301         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 302         ar.ccv as third/fourth inputs. Consolidate through...
 303         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 304         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 305         * ia64-asmtab.c: Regenerate.
 306
 307 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 308
 309         * configure: Regenerate to track ../gettext.m4 change.
 310
 311 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 312
 313         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 314         * frv-asm.c: Rebuilt.
 315         * frv-desc.c: Rebuilt.
 316         * frv-desc.h: Rebuilt.
 317         * frv-dis.c: Rebuilt.
 318         * frv-ibld.c: Rebuilt.
 319         * frv-opc.c: Rebuilt.
 320         * frv-opc.h: Rebuilt.
 321
 322 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 323
 324         * configure: Regenerate, ../gettext.m4 was updated.
 325
 326 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 327
 328         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 329         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 330         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 331         * mips-dis.c: Ditto.
 332
 333 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 334
 335         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 336
 337 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 338
 339         * mips-dis.c (no_aliases): New disassembly option flag.
 340         (set_default_mips_dis_options): Init no_aliases to zero.
 341         (parse_mips_dis_option): Handle no-aliases option.
 342         (print_insn_mips): Ignore table entries that are aliases
 343         if no_aliases is set.
 344         (print_insn_mips16): Ditto.
 345         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 346         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 347         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 348         * mips16-opc.c (mips16_opcodes): Ditto.
 349
 350 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 351
 352         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 353         (inheritance diagram): Add missing edge.
 354         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 355         easier for the testsuite.
 356         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 357         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 358         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 359         arch_sh2a_or_sh4_up child.
 360         (sh_table): Do renaming as above.
 361         Correct comment for ldc.l for gas testsuite to read.
 362         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 363         Correct comments for movy.w and movy.l for gas testsuite to read.
 364         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 365
 366 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 367
 368         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 369
 370 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 371
 372         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 373
 374 2005-01-10  Andreas Schwab  <schwab@suse.de>
 375
 376         * disassemble.c (disassemble_init_for_target) <case
 377         bfd_arch_ia64>: Set skip_zeroes to 16.
 378         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 379
 380 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 381
 382         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 383
 384 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 385
 386         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 387         memory references. Convert avr_operand() to C90 formatting.
 388
 389 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 390
 391         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 392
 393 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 394
 395         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 396         (no_op_insn): Initialize array with instructions that have no
 397         operands.
 398         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 399
 400 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 401
 402         * arm-dis.c: Correct top-level comment.
 403
 404 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 405
 406         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 407         architecuture defining the insn.
 408         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 409         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 410         field.
 411         Also include opcode/arm.h.
 412         * Makefile.am (arm-dis.lo): Update dependency list.
 413         * Makefile.in: Regenerate.
 414
 415 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 416
 417         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 418         reflect the change to the short immediate syntax.
 419
 420 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 421
 422         * or32-opc.c (debug): Warning fix.
 423         * po/POTFILES.in: Regenerate.
 424
 425         * maxq-dis.c: Formatting.
 426         (print_insn): Warning fix.
 427
 428 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 429
 430         * arm-dis.c (WORD_ADDRESS): Define.
 431         (print_insn): Use it.  Correct big-endian end-of-section handling.
 432
 433 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 434             Vineet Sharma      <vineets@noida.hcltech.com>
 435
 436         * maxq-dis.c: New file.
 437         * disassemble.c (ARCH_maxq): Define.
 438         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 439         instructions..
 440         * configure.in: Add case for bfd_maxq_arch.
 441         * configure: Regenerate.
 442         * Makefile.am: Add support for maxq-dis.c
 443         * Makefile.in: Regenerate.
 444         * aclocal.m4: Regenerate.
 445
 446 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 447
 448         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 449         mode.
 450         * crx-dis.c: Likewise.
 451
 452 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 453
 454         Generally, handle CRISv32.
 455         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 456         (struct cris_disasm_data): New type.
 457         (format_reg, format_hex, cris_constraint, print_flags)
 458         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 459         callers changed.
 460         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 461         (print_insn_crisv32_without_register_prefix)
 462         (print_insn_crisv10_v32_with_register_prefix)
 463         (print_insn_crisv10_v32_without_register_prefix)
 464         (cris_parse_disassembler_options): New functions.
 465         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 466         parameter.  All callers changed.
 467         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 468         failure.
 469         (cris_constraint) <case 'Y', 'U'>: New cases.
 470         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 471         for constraint 'n'.
 472         (print_with_operands) <case 'Y'>: New case.
 473         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 474         <case 'N', 'Y', 'Q'>: New cases.
 475         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 476         (print_insn_cris_with_register_prefix)
 477         (print_insn_cris_without_register_prefix): Call
 478         cris_parse_disassembler_options.
 479         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 480         for CRISv32 and the size of immediate operands.  New v32-only
 481         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 482         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 483         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 484         Change brp to be v3..v10.
 485         (cris_support_regs): New vector.
 486         (cris_opcodes): Update head comment.  New format characters '[',
 487         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 488         Add new opcodes for v32 and adjust existing opcodes to accommodate
 489         differences to earlier variants.
 490         (cris_cond15s): New vector.
 491
 492 2004-11-04 Jan Beulich <jbeulich@novell.com>
 493
 494         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 495         (indirEb): Remove.
 496         (Mp): Use f_mode rather than none at all.
 497         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 498         replaces what previously was x_mode; x_mode now means 128-bit SSE
 499         operands.
 500         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 501         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 502         pinsrw's second operand is Edqw.
 503         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 504         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 505         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 506         mode when an operand size override is present or always suffixing.
 507         More instructions will need to be added to this group.
 508         (putop): Handle new macro chars 'C' (short/long suffix selector),
 509         'I' (Intel mode override for following macro char), and 'J' (for
 510         adding the 'l' prefix to far branches in AT&T mode). When an
 511         alternative was specified in the template, honor macro character when
 512         specified for Intel mode.
 513         (OP_E): Handle new *_mode values. Correct pointer specifications for
 514         memory operands. Consolidate output of index register.
 515         (OP_G): Handle new *_mode values.
 516         (OP_I): Handle const_1_mode.
 517         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 518         respective opcode prefix bits have been consumed.
 519         (OP_EM, OP_EX): Provide some default handling for generating pointer
 520         specifications.
 521
 522 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 523
 524         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 525         COP_INST macro.
 526
 527 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 528
 529         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 530         (getregliststring): Support HI/LO and user registers.
 531         * crx-opc.c (crx_instruction): Update data structure according to the
 532         rearrangement done in CRX opcode header file.
 533         (crx_regtab):  Likewise.
 534         (crx_optab):  Likewise.
 535         (crx_instruction): Reorder load/stor instructions, remove unsupported
 536         formats.
 537         support new Co-Processor instruction 'cpi'.
 538
 539 2004-10-27  Nick Clifton  <nickc@redhat.com>
 540
 541         * opcodes/iq2000-asm.c: Regenerate.
 542         * opcodes/iq2000-desc.c: Regenerate.
 543         * opcodes/iq2000-desc.h: Regenerate.
 544         * opcodes/iq2000-dis.c: Regenerate.
 545         * opcodes/iq2000-ibld.c: Regenerate.
 546         * opcodes/iq2000-opc.c: Regenerate.
 547         * opcodes/iq2000-opc.h: Regenerate.
 548
 549 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 550
 551         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 552         us4, us5 (respectively).
 553         Remove unsupported 'popa' instruction.
 554         Reverse operands order in store co-processor instructions.
 555
 556 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 557
 558         * Makefile.am: Run "make dep-am"
 559         * Makefile.in: Regenerate.
 560
 561 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 562
 563         * xtensa-dis.c: Use ISO C90 formatting.
 564
 565 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 566
 567         * ppc-opc.c: Revert 2004-09-09 change.
 568
 569 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 570
 571         * xtensa-dis.c (state_names): Delete.
 572         (fetch_data): Use xtensa_isa_maxlength.
 573         (print_xtensa_operand): Replace operand parameter with opcode/operand
 574         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 575         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 576         instruction bundles.  Use xmalloc instead of malloc.
 577
 578 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 579
 580         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 581         initializers.
 582
 583 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 584
 585         * crx-opc.c (crx_instruction): Support Co-processor insns.
 586         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 587         (getregliststring): Change function to use the above enum.
 588         (print_arg): Handle CO-Processor insns.
 589         (crx_cinvs): Add 'b' option to invalidate the branch-target
 590         cache.
 591
 592 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 593
 594         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 595         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 596         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 597         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 598         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 599
 600 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 601
 602         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 603         rather than add it.
 604
 605 2004-09-30  Paul Brook  <paul@codesourcery.com>
 606
 607         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 608         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 609
 610 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 611
 612         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 613         (CONFIG_STATUS_DEPENDENCIES): New.
 614         (Makefile): Removed.
 615         (config.status): Likewise.
 616         * Makefile.in: Regenerated.
 617
 618 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 619
 620         * Makefile.am: Run "make dep-am".
 621         * Makefile.in: Regenerate.
 622         * aclocal.m4: Regenerate.
 623         * configure: Regenerate.
 624         * po/POTFILES.in: Regenerate.
 625         * po/opcodes.pot: Regenerate.
 626
 627 2004-09-11  Andreas Schwab  <schwab@suse.de>
 628
 629         * configure: Rebuild.
 630
 631 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 632
 633         * ppc-opc.c (L): Make this field not optional.
 634
 635 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 636
 637         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 638         Fix parameter to 'm[t|f]csr' insns.
 639
 640 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 641
 642         * configure.in: Autoupdate to autoconf 2.59.
 643         * aclocal.m4: Rebuild with aclocal 1.4p6.
 644         * configure: Rebuild with autoconf 2.59.
 645         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 646         bfd changes for autoconf 2.59 on the way).
 647         * config.in: Rebuild with autoheader 2.59.
 648
 649 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 650
 651         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 652
 653 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 654
 655         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 656         (GRPPADLCK2): New define.
 657         (twobyte_has_modrm): True for 0xA6.
 658         (grps): GRPPADLCK2 for opcode 0xA6.
 659
 660 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 661
 662         Introduce SH2a support.
 663         * sh-opc.h (arch_sh2a_base): Renumber.
 664         (arch_sh2a_nofpu_base): Remove.
 665         (arch_sh_base_mask): Adjust.
 666         (arch_opann_mask): New.
 667         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 668         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 669         (sh_table): Adjust whitespace.
 670         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 671         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 672         instruction list throughout.
 673         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 674         of arch_sh2a in instruction list throughout.
 675         (arch_sh2e_up): Accomodate above changes.
 676         (arch_sh2_up): Ditto.
 677         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 678         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 679         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 680         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 681         * sh-opc.h (arch_sh2a_nofpu): New.
 682         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 683         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 684         instruction.
 685         2004-01-20  DJ Delorie  <dj@redhat.com>
 686         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 687         2003-12-29  DJ Delorie  <dj@redhat.com>
 688         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 689         sh_opcode_info, sh_table): Add sh2a support.
 690         (arch_op32): New, to tag 32-bit opcodes.
 691         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 692         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 693         * sh-opc.h (arch_sh2a): Add.
 694         * sh-dis.c (arch_sh2a): Handle.
 695         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 696
 697 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 698
 699         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 700
 701 2004-07-22  Nick Clifton  <nickc@redhat.com>
 702
 703         PR/280
 704         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 705         insns - this is done by objdump itself.
 706         * h8500-dis.c (print_insn_h8500): Likewise.
 707
 708 2004-07-21  Jan Beulich <jbeulich@novell.com>
 709
 710         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 711         regardless of address size prefix in effect.
 712         (ptr_reg): Size or address registers does not depend on rex64, but
 713         on the presence of an address size override.
 714         (OP_MMX): Use rex.x only for xmm registers.
 715         (OP_EM): Use rex.z only for xmm registers.
 716
 717 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 718
 719         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 720         move/branch operations to the bottom so that VR5400 multimedia
 721         instructions take precedence in disassembly.
 722
 723 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 724
 725         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 726         ISA-specific "break" encoding.
 727
 728 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 729
 730         * arm-opc.h: Fix typo in comment.
 731
 732 2004-07-11  Andreas Schwab  <schwab@suse.de>
 733
 734         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 735
 736 2004-07-09  Andreas Schwab  <schwab@suse.de>
 737
 738         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 739
 740 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 741
 742         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 743         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 744         (crx-dis.lo): New target.
 745         (crx-opc.lo): Likewise.
 746         * Makefile.in: Regenerate.
 747         * configure.in: Handle bfd_crx_arch.
 748         * configure: Regenerate.
 749         * crx-dis.c: New file.
 750         * crx-opc.c: New file.
 751         * disassemble.c (ARCH_crx): Define.
 752         (disassembler): Handle ARCH_crx.
 753
 754 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 755
 756         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 757         * ia64-asmtab.c: Regnerate.
 758
 759 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 760
 761         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 762         (extract_fxm): Don't test dialect.
 763         (XFXFXM_MASK): Include the power4 bit.
 764         (XFXM): Add p4 param.
 765         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 766
 767 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 768
 769         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 770         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 771
 772 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 773
 774         * ppc-opc.c (BH, XLBH_MASK): Define.
 775         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 776
 777 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 778
 779         * i386-dis.c (x_mode): Comment.
 780         (two_source_ops): File scope.
 781         (float_mem): Correct fisttpll and fistpll.
 782         (float_mem_mode): New table.
 783         (dofloat): Use it.
 784         (OP_E): Correct intel mode PTR output.
 785         (ptr_reg): Use open_char and close_char.
 786         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 787         operands.  Set two_source_ops.
 788
 789 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 790
 791         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 792         instead of _raw_size.
 793
 794 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 795
 796         * ia64-gen.c (in_iclass): Handle more postinc st
 797         and ld variants.
 798         * ia64-asmtab.c: Rebuilt.
 799
 800 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 801
 802         * s390-opc.txt: Correct architecture mask for some opcodes.
 803         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 804         in the esa mode as well.
 805
 806 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 807
 808         * sh-dis.c (target_arch): Make unsigned.
 809         (print_insn_sh): Replace (most of) switch with a call to
 810         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 811         * sh-opc.h: Redefine architecture flags values.
 812         Add sh3-nommu architecture.
 813         Reorganise <arch>_up macros so they make more visual sense.
 814         (SH_MERGE_ARCH_SET): Define new macro.
 815         (SH_VALID_BASE_ARCH_SET): Likewise.
 816         (SH_VALID_MMU_ARCH_SET): Likewise.
 817         (SH_VALID_CO_ARCH_SET): Likewise.
 818         (SH_VALID_ARCH_SET): Likewise.
 819         (SH_MERGE_ARCH_SET_VALID): Likewise.
 820         (SH_ARCH_SET_HAS_FPU): Likewise.
 821         (SH_ARCH_SET_HAS_DSP): Likewise.
 822         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 823         (sh_get_arch_from_bfd_mach): Add prototype.
 824         (sh_get_arch_up_from_bfd_mach): Likewise.
 825         (sh_get_bfd_mach_from_arch_set): Likewise.
 826         (sh_merge_bfd_arc): Likewise.
 827
 828 2004-05-24  Peter Barada  <peter@the-baradas.com>
 829
 830         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 831         into new match_insn_m68k function.  Loop over canidate
 832         matches and select first that completely matches.
 833         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 834         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 835         to verify addressing for MAC/EMAC.
 836         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 837         reigster halves since 'fpu' and 'spl' look misleading.
 838         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 839         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 840         first, tighten up match masks.
 841         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 842         'size' from special case code in print_insn_m68k to
 843         determine decode size of insns.
 844
 845 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 846
 847         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 848         well as when -mpower4.
 849
 850 2004-05-13  Nick Clifton  <nickc@redhat.com>
 851
 852         * po/fr.po: Updated French translation.
 853
 854 2004-05-05  Peter Barada  <peter@the-baradas.com>
 855
 856         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 857         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 858         * m68k-op.c: Switch from ColdFire chips to core variants.
 859
 860 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 861
 862         PR 147.
 863         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 864
 865 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 866
 867         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 868         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 869
 870 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 871
 872         * sh-dis.c (print_insn_sh): Print the value in constant pool
 873         as a symbol if it looks like a symbol.
 874
 875 2004-04-22  Peter Barada <peter@the-baradas.com>
 876
 877         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 878         appropriate ColdFire architectures.
 879         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 880         mask addressing.
 881         Add EMAC instructions, fix MAC instructions. Remove
 882         macmw/macml/msacmw/msacml instructions since mask addressing now
 883         supported.
 884
 885 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 886
 887         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 888         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 889         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 890         macro.  Adjust all users.
 891
 892 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 893
 894         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 895         separately.
 896
 897 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 898
 899         * m32r-asm.c: Regenerate.
 900
 901 2004-03-29  Stan Shebs  <shebs@apple.com>
 902
 903         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 904         used.
 905
 906 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 907
 908         * aclocal.m4: Regenerate.
 909         * config.in: Regenerate.
 910         * configure: Regenerate.
 911         * po/POTFILES.in: Regenerate.
 912         * po/opcodes.pot: Regenerate.
 913
 914 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 915
 916         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 917         PPC_OPERANDS_GPR_0.
 918         * ppc-opc.c (RA0): Define.
 919         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 920         (RAOPT): Rename from RAO.  Update all uses.
 921         (powerpc_opcodes): Use RA0 as appropriate.
 922
 923 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 924
 925         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 926
 927 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 928
 929         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 930
 931 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 932
 933         * i386-dis.c (GRPPLOCK): Delete.
 934         (grps): Delete GRPPLOCK entry.
 935
 936 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 937
 938         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 939         (M, Mp): Use OP_M.
 940         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 941         (GRPPADLCK): Define.
 942         (dis386): Use NOP_Fixup on "nop".
 943         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 944         (twobyte_has_modrm): Set for 0xa7.
 945         (padlock_table): Delete.  Move to..
 946         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 947         and clflush.
 948         (print_insn): Revert PADLOCK_SPECIAL code.
 949         (OP_E): Delete sfence, lfence, mfence checks.
 950
 951 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 952
 953         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 954         (INVLPG_Fixup): New function.
 955         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 956
 957 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 958
 959         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 960         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 961         (padlock_table): New struct with PadLock instructions.
 962         (print_insn): Handle PADLOCK_SPECIAL.
 963
 964 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 965
 966         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 967         (OP_E): Twiddle clflush to sfence here.
 968
 969 2004-03-08  Nick Clifton  <nickc@redhat.com>
 970
 971         * po/de.po: Updated German translation.
 972
 973 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 974
 975         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 976         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 977         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 978         accordingly.
 979
 980 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 981
 982         * frv-asm.c: Regenerate.
 983         * frv-desc.c: Regenerate.
 984         * frv-desc.h: Regenerate.
 985         * frv-dis.c: Regenerate.
 986         * frv-ibld.c: Regenerate.
 987         * frv-opc.c: Regenerate.
 988         * frv-opc.h: Regenerate.
 989
 990 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 991
 992         * frv-desc.c, frv-opc.c: Regenerate.
 993
 994 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 995
 996         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
 997
 998 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
 999
1000         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1001         Also correct mistake in the comment.
1002
1003 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1004
1005         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1006         ensure that double registers have even numbers.
1007         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1008         that reserved instruction 0xfffd does not decode the same
1009         as 0xfdfd (ftrv).
1010         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1011         REG_N refers to a double register.
1012         Add REG_N_B01 nibble type and use it instead of REG_NM
1013         in ftrv.
1014         Adjust the bit patterns in a few comments.
1015
1016 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1017
1018         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1019
1020 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1021
1022         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1023
1024 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1025
1026         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1027
1028 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1029
1030         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1031         mtivor32, mtivor33, mtivor34.
1032
1033 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1034
1035         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1036
1037 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1038
1039         * arm-opc.h Maverick accumulator register opcode fixes.
1040
1041 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1042
1043         * m32r-dis.c: Regenerate.
1044
1045 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1046
1047         * sh-opc.h (sh_table): "fsrra", not "fssra".
1048
1049 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1050
1051         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1052         contraints.
1053
1054 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1055
1056         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1057
1058 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1059
1060         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1061         1.  Don't print scale factor on AT&T mode when index missing.
1062
1063 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1064
1065         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1066         when loaded into XR registers.
1067
1068 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1069
1070         * frv-desc.h: Regenerate.
1071         * frv-desc.c: Regenerate.
1072         * frv-opc.c: Regenerate.
1073
1074 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1075
1076         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1077
1078 2004-01-09  Paul Brook  <paul@codesourcery.com>
1079
1080         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1081         specific opcodes.
1082
1083 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1084
1085         * Makefile.am (libopcodes_la_DEPENDENCIES)
1086         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1087         comment about the problem.
1088         * Makefile.in: Regenerate.
1089
1090 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1091
1092         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1093         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1094         cut&paste errors in shifting/truncating numerical operands.
1095         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1096         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1097         (parse_uslo16): Likewise.
1098         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1099         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1100         (parse_s12): Likewise.
1101         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1102         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1103         (parse_uslo16): Likewise.
1104         (parse_uhi16): Parse gothi and gotfuncdeschi.
1105         (parse_d12): Parse got12 and gotfuncdesc12.
1106         (parse_s12): Likewise.
1107
1108 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1109
1110         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1111         instruction which looks similar to an 'rla' instruction.
1112
1113 For older changes see ChangeLog-0203
1114 \f
1115 Local Variables:
1116 mode: change-log
1117 left-margin: 8
1118 fill-column: 74
1119 version-control: never
1120 End: