PR binutils/6773
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2010-02-24 Nick Clifton <nickc@redhat.com>
2
3 PR binutils/6773
4 * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
5 <prefix>asx. Replace <prefix>subaddx with <prefix>sax.
6 (thumb32_opcodes): Likewise.
7
8 2010-02-15 Nick Clifton <nickc@redhat.com>
9
10 * po/vi.po: Updated Vietnamese translation.
11
12 2010-02-12 Doug Evans <dje@sebabeach.org>
13
14 * lm32-opinst.c: Regenerate.
15
16 2010-02-11 Doug Evans <dje@sebabeach.org>
17
18 * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
19 (print_address): Delete CGEN_PRINT_ADDRESS.
20 * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
21 * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
22 * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
23 * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
24
25 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
26 * frv-desc.c, * frv-desc.h, * frv-opc.c,
27 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
28 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
29 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
30 * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
31 * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
32 * mep-desc.c, * mep-desc.h, * mep-opc.c,
33 * mt-desc.c, * mt-desc.h, * mt-opc.c,
34 * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
35 * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
36 * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
37
38 2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
39
40 * i386-dis.c: Update copyright.
41 * i386-gen.c: Likewise.
42 * i386-opc.h: Likewise.
43 * i386-opc.tbl: Likewise.
44
45 2010-02-10 Quentin Neill <quentin.neill@amd.com>
46 Sebastian Pop <sebastian.pop@amd.com>
47
48 * i386-dis.c (OP_EX_VexImmW): Reintroduced
49 function to handle 5th imm8 operand.
50 (PREFIX_VEX_3A48): Added.
51 (PREFIX_VEX_3A49): Added.
52 (VEX_W_3A48_P_2): Added.
53 (VEX_W_3A49_P_2): Added.
54 (prefix table): Added entries for PREFIX_VEX_3A48
55 and PREFIX_VEX_3A49.
56 (vex table): Added entries for VEX_W_3A48_P_2 and
57 and VEX_W_3A49_P_2.
58 * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
59 for Vec_Imm4 operands.
60 * i386-opc.h (enum): Added Vec_Imm4.
61 (i386_operand_type): Added vec_imm4.
62 * i386-opc.tbl: Add entries for vpermilp[ds].
63 * i386-init.h: Regenerated.
64 * i386-tbl.h: Regenerated.
65
66 2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
67
68 * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
69 and "pwr7". Move "a2" into alphabetical order.
70
71 2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
72
73 * ppc-dis.c (ppc_opts): Add titan entry.
74 * ppc-opc.c (TITAN, MULHW): Define.
75 (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
76
77 2010-02-03 Quentin Neill <quentin.neill@amd.com>
78
79 * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
80 to CPU_BDVER1_FLAGS
81 * i386-init.h: Regenerated.
82
83 2010-02-03 Anthony Green <green@moxielogic.com>
84
85 * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
86 0x0f, and make 0x00 an illegal instruction.
87
88 2010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
89
90 * opcodes/arm-dis.c (struct arm_private_data): New.
91 (print_insn_coprocessor, print_insn_arm): Update to use struct
92 arm_private_data.
93 (is_mapping_symbol, get_map_sym_type): New functions.
94 (get_sym_code_type): Check the symbol's section. Do not check
95 mapping symbols.
96 (print_insn): Default to disassembling ARM mode code. Check
97 for mapping symbols separately from other symbols. Use
98 struct arm_private_data.
99
100 2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
101
102 * i386-dis.c (EXVexWdqScalar): New.
103 (vex_scalar_w_dq_mode): Likewise.
104 (prefix_table): Update entries for PREFIX_VEX_3899,
105 PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
106 PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
107 PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
108 PREFIX_VEX_38BD and PREFIX_VEX_38BF.
109 (intel_operand_size): Handle vex_scalar_w_dq_mode.
110 (OP_EX): Likewise.
111
112 2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
113
114 * i386-dis.c (XMScalar): New.
115 (EXdScalar): Likewise.
116 (EXqScalar): Likewise.
117 (EXqScalarS): Likewise.
118 (VexScalar): Likewise.
119 (EXdVexScalarS): Likewise.
120 (EXqVexScalarS): Likewise.
121 (XMVexScalar): Likewise.
122 (scalar_mode): Likewise.
123 (d_scalar_mode): Likewise.
124 (d_scalar_swap_mode): Likewise.
125 (q_scalar_mode): Likewise.
126 (q_scalar_swap_mode): Likewise.
127 (vex_scalar_mode): Likewise.
128 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
129 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
130 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
131 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
132 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
133 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
134 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
135 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
136 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
137 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
138 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
139 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
140 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
141 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
142 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
143 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
144 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
145 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
146 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
147 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
148 q_scalar_mode, q_scalar_swap_mode.
149 (OP_XMM): Handle scalar_mode.
150 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
151 and q_scalar_swap_mode.
152 (OP_VEX): Handle vex_scalar_mode.
153
154 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
155
156 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
157
158 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
159
160 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
161
162 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
163
164 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
165
166 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
167
168 * i386-dis.c (Bad_Opcode): New.
169 (bad_opcode): Likewise.
170 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
171 (dis386_twobyte): Likewise.
172 (reg_table): Likewise.
173 (prefix_table): Likewise.
174 (x86_64_table): Likewise.
175 (vex_len_table): Likewise.
176 (vex_w_table): Likewise.
177 (mod_table): Likewise.
178 (rm_table): Likewise.
179 (float_reg): Likewise.
180 (reg_table): Remove trailing "(bad)" entries.
181 (prefix_table): Likewise.
182 (x86_64_table): Likewise.
183 (vex_len_table): Likewise.
184 (vex_w_table): Likewise.
185 (mod_table): Likewise.
186 (rm_table): Likewise.
187 (get_valid_dis386): Handle bytemode 0.
188
189 2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
190
191 * i386-opc.h (VEXScalar): New.
192
193 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
194 instructions.
195 * i386-tbl.h: Regenerated.
196
197 2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
198
199 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
200
201 * i386-opc.tbl: Add xsave64 and xrstor64.
202 * i386-tbl.h: Regenerated.
203
204 2010-01-20 Nick Clifton <nickc@redhat.com>
205
206 PR 11170
207 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
208 based post-indexed addressing.
209
210 2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
211
212 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
213 * i386-tbl.h: Regenerated.
214
215 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
216
217 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
218 comments.
219
220 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
221
222 * i386-dis.c (names_mm): New.
223 (intel_names_mm): Likewise.
224 (att_names_mm): Likewise.
225 (names_xmm): Likewise.
226 (intel_names_xmm): Likewise.
227 (att_names_xmm): Likewise.
228 (names_ymm): Likewise.
229 (intel_names_ymm): Likewise.
230 (att_names_ymm): Likewise.
231 (print_insn): Set names_mm, names_xmm and names_ymm.
232 (OP_MMX): Use names_mm, names_xmm and names_ymm.
233 (OP_XMM): Likewise.
234 (OP_EM): Likewise.
235 (OP_EMC): Likewise.
236 (OP_MXC): Likewise.
237 (OP_EX): Likewise.
238 (XMM_Fixup): Likewise.
239 (OP_VEX): Likewise.
240 (OP_EX_VexReg): Likewise.
241 (OP_Vex_2src): Likewise.
242 (OP_Vex_2src_1): Likewise.
243 (OP_Vex_2src_2): Likewise.
244 (OP_REG_VexI4): Likewise.
245
246 2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
247
248 * i386-dis.c (print_insn): Update comments.
249
250 2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
251
252 * i386-dis.c (rex_original): Removed.
253 (ckprefix): Remove rex_original.
254 (print_insn): Update comments.
255
256 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
257
258 * Makefile.in: Regenerate.
259 * configure: Regenerate.
260
261 2010-01-07 Doug Evans <dje@sebabeach.org>
262
263 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
264 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
265 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
266 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
267 * xstormy16-ibld.c: Regenerate.
268
269 2010-01-06 Quentin Neill <quentin.neill@amd.com>
270
271 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
272 * i386-init.h: Regenerated.
273
274 2010-01-06 Daniel Gutson <dgutson@codesourcery.com>
275
276 * arm-dis.c (print_insn): Fixed search for next symbol and data
277 dumping condition, and the initial mapping symbol state.
278
279 2010-01-05 Doug Evans <dje@sebabeach.org>
280
281 * cgen-ibld.in: #include "cgen/basic-modes.h".
282 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
283 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
284 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
285 * xstormy16-ibld.c: Regenerate.
286
287 2010-01-04 Nick Clifton <nickc@redhat.com>
288
289 PR 11123
290 * arm-dis.c (print_insn_coprocessor): Initialise value.
291
292 2010-01-04 Edmar Wienskoski <edmar@freescale.com>
293
294 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
295
296 2010-01-02 Doug Evans <dje@sebabeach.org>
297
298 * cgen-asm.in: Update copyright year.
299 * cgen-dis.in: Update copyright year.
300 * cgen-ibld.in: Update copyright year.
301 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
302 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
303 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
304 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
305 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
306 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
307 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
308 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
309 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
310 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
311 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
312 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
313 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
314 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
315 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
316 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
317 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
318 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
319 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
320 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
321 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
322
323 For older changes see ChangeLog-2009
324 \f
325 Local Variables:
326 mode: change-log
327 left-margin: 8
328 fill-column: 74
329 version-control: never
330 End:
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