opcodes/ChangeLog

   1 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * bfin-dis.c (decode_CC2stat_0): Decode all ASTAT bits.
   4
   5 2010-09-22  Robin Getz  <robin.getz@analog.com>
   6
   7         * bfin-dis.c (IS_DREG, IS_PREG, IS_GENREG, IS_DAGREG): Reject
   8         register values greater than 8.
   9         (IS_RESERVEDREG, allreg, mostreg): New helpers.
  10         (decode_ProgCtrl_0): Call IS_DREG/IS_PREG as appropriate.
  11         (decode_PushPopReg_0): Call mostreg/allreg as appropriate.
  12         (decode_CC2dreg_0): Check valid CC register number.
  13
  14 2010-09-22  Robin Getz  <robin.getz@analog.com>
  15
  16         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after DBG.
  17
  18 2010-09-22  Robin Getz  <robin.getz@analog.com>
  19
  20         * bfin-dis.c (machine_registers): Add AC0_COPY, V_COPY, and RND_MOD.
  21         (reg_names): Likewise.
  22         (decode_statbits): Likewise; while reformatting to make manageable.
  23
  24 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  25
  26         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after OUTC.
  27         (decode_pseudoOChar_0): New function.
  28         (_print_insn_bfin): Remove #if 0 and call new decode_pseudoOChar_0.
  29
  30 2010-09-22  Robin Getz  <robin.getz@analog.com>
  31
  32         * bfin-dis.c (decode_dsp32shift_0): Decode sub opcodes 2/2 as
  33         LSHIFT instead of SHIFT.
  34
  35 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  36
  37         * bfin-dis.c (constant_formats): Constify the whole structure.
  38         (fmtconst): Add const to return value.
  39         (reg_names): Mark const.
  40         (decode_multfunc): Mark s0/s1 as const.
  41         (decode_macfunc): Mark a/sop as const.
  42
  43 2010-09-17  Tejas Belagod  <tejas.belagod@arm.com>
  44
  45         * arm_dis.c (coprocessor_opcodes): Add MRC entry for APSR_nzcv.
  46
  47 2010-09-14  Maciej W. Rozycki  <macro@codesourcery.com>
  48
  49         * mips-opc.c (mips_builtin_opcodes): Add "sync_acquire",
  50         "sync_mb", "sync_release", "sync_rmb" and "sync_wmb".
  51
  52 2010-09-10  Pierre Muller  <muller@ics.u-strasbg.fr>
  53
  54         * src/opcodes/dlx-dis.c (print_insn_dlx): Use dlx_insn type for
  55         dlx_insn_type array.
  56
  57 2010-08-31  H.J. Lu  <hongjiu.lu@intel.com>
  58
  59         PR binutils/11960
  60         * i386-dis.c (sIv): New.
  61         (dis386): Replace Iq with sIv on "pushT".
  62         (reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT.
  63         (x86_64_table): Replace {T|}/{P|} with P.
  64         (putop): Add 'w' to 'T'/'P' if needed for Intel syntax.
  65         (OP_sI): Update v_mode.  Remove w_mode.
  66
  67 2010-08-27  Nathan Froyd  <froydnj@codesourcery.com>
  68
  69         * ppc-opc.c (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate
  70         on E500 and E500MC.
  71
  72 2010-08-17  H.J. Lu  <hongjiu.lu@intel.com>
  73
  74         * i386-dis.c (reg_table): Replace Eb with Mb on prefetch and
  75         prefetchw.
  76
  77 2010-08-06  Quentin Neill <quentin.neill@amd.com>
  78
  79         * i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
  80         to processor flags for PENTIUMPRO processors and later.
  81         * i386-opc.h (enum): Add CpuNop.
  82         (i386_cpu_flags): Add cpunop bit.
  83         * i386-opc.tbl: Change nop cpu_flags.
  84         * i386-init.h: Regenerated.
  85         * i386-tbl.h: Likewise.
  86
  87 2010-08-06  Quentin Neill <quentin.neill@amd.com>
  88
  89         * i386-opc.h (enum): Fix typos in comments.
  90
  91 2010-08-06  Alan Modra  <amodra@gmail.com>
  92
  93         * disassemble.c: Formatting.
  94         (disassemble_init_for_target <ARCH_m32c>): Comment on endian.
  95
  96 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
  97
  98         * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
  99         * i386-tbl.h: Regenerated.
 100
 101 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
 102
 103         * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
 104
 105         * i386-opc.tbl: Add ud1.  Remove Cpu686 from ud2/ud2a/ud2b.
 106         * i386-tbl.h: Regenerated.
 107
 108 2010-07-29  DJ Delorie  <dj@redhat.com>
 109
 110         * rx-decode.opc (SRR): New.
 111         (rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
 112         r0,r0) and NOP3 (max r0,r0) special cases.
 113         * rx-decode.c: Regenerate.
 114
 115 2010-07-28  H.J. Lu  <hongjiu.lu@intel.com>
 116
 117         * i386-dis.c: Add 0F to VEX opcode enums.
 118
 119 2010-07-27  DJ Delorie  <dj@redhat.com>
 120
 121         * rx-decode.opc (store_flags): Remove, replace with F_* macros.
 122         (rx_decode_opcode): Likewise.
 123         * rx-decode.c: Regenerate.
 124
 125 2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
 126             Ina Pandit  <ina.pandit@kpitcummins.com>
 127
 128         * v850-dis.c (v850_sreg_names): Updated structure for system
 129         registers.
 130         (float_cc_names): new structure for condition codes.
 131         (print_value): Update the function that prints value.
 132         (get_operand_value): New function to get the operand value.
 133         (disassemble): Updated to handle the disassembly of instructions.
 134         (print_insn_v850): Updated function to print instruction for different
 135         families.
 136         * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
 137         extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
 138         extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
 139         insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
 140         extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
 141         extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
 142         extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
 143         insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
 144         (insert_d8_7, insert_d5_4, insert_i5div): Remove.
 145         (v850_operands): Update with the relocation name. Also update
 146         the instructions with specific set of processors.
 147
 148 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
 149
 150         * arm-dis.c (print_insn_arm): Add cases for printing more
 151         symbolic operands.
 152         (print_insn_thumb32): Likewise.
 153
 154 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 155
 156         * mips-dis.c (print_insn_mips): Correct branch instruction type
 157         determination.
 158
 159 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 160
 161         * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
 162         type and delay slot determination.
 163         (print_insn_mips16): Extend branch instruction type and delay
 164         slot determination to cover all instructions.
 165         * mips16-opc.c (BR): Remove macro.
 166         (UBR, CBR): New macros.
 167         (mips16_opcodes): Update branch annotation for "b", "beqz",
 168         "bnez", "bteqz" and "btnez".  Add branch annotation for "jalrc"
 169         and "jrc".
 170
 171 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 172
 173         AVX Programming Reference (June, 2010)
 174         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
 175         * i386-opc.tbl: Likewise.
 176         * i386-tbl.h: Regenerated.
 177
 178 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 179
 180         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
 181
 182 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
 183
 184         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
 185         ppc_cpu_t before inverting.
 186         (ppc_parse_cpu): Likewise.
 187         (print_insn_powerpc): Likewise.
 188
 189 2010-07-03  Alan Modra  <amodra@gmail.com>
 190
 191         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
 192         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
 193         (PPC64, MFDEC2): Update.
 194         (NON32, NO371): Define.
 195         (powerpc_opcode): Update to not use old opcode flags, and avoid
 196         -m601 duplicates.
 197
 198 2010-07-03  DJ Delorie  <dj@delorie.com>
 199
 200         * m32c-ibld.c: Regenerate.
 201
 202 2010-07-03  Alan Modra  <amodra@gmail.com>
 203
 204         * ppc-opc.c (PWR2COM): Define.
 205         (PPCPWR2): Add PPC_OPCODE_COMMON.
 206         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
 207         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
 208         "rac" from -mcom.
 209
 210 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
 211
 212         AVX Programming Reference (June, 2010)
 213         * i386-dis.c (PREFIX_0FAE_REG_0): New.
 214         (PREFIX_0FAE_REG_1): Likewise.
 215         (PREFIX_0FAE_REG_2): Likewise.
 216         (PREFIX_0FAE_REG_3): Likewise.
 217         (PREFIX_VEX_3813): Likewise.
 218         (PREFIX_VEX_3A1D): Likewise.
 219         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 220         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
 221         PREFIX_VEX_3A1D.
 222         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
 223         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 224         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
 225
 226         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
 227         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
 228         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
 229
 230         * i386-opc.h (CpuXsaveopt): New.
 231         (CpuFSGSBase): Likewise.
 232         (CpuRdRnd): Likewise.
 233         (CpuF16C): Likewise.
 234         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
 235         cpuf16c.
 236
 237         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
 238         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
 239         * i386-init.h: Regenerated.
 240         * i386-tbl.h: Likewise.
 241
 242 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 243
 244         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
 245         and mtocrf on EFS.
 246
 247 2010-06-29  Alan Modra  <amodra@gmail.com>
 248
 249         * maxq-dis.c: Delete file.
 250         * Makefile.am: Remove references to maxq.
 251         * configure.in: Likewise.
 252         * disassemble.c: Likewise.
 253         * Makefile.in: Regenerate.
 254         * configure: Regenerate.
 255         * po/POTFILES.in: Regenerate.
 256
 257 2010-06-29  Alan Modra  <amodra@gmail.com>
 258
 259         * mep-dis.c: Regenerate.
 260
 261 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 262
 263         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
 264
 265 2010-06-27  Alan Modra  <amodra@gmail.com>
 266
 267         * arc-dis.c (arc_sprintf): Delete set but unused variables.
 268         (decodeInstr): Likewise.
 269         * dlx-dis.c (print_insn_dlx): Likewise.
 270         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 271         * maxq-dis.c (check_move, print_insn): Likewise.
 272         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 273         * msp430-dis.c (msp430_branchinstr): Likewise.
 274         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 275         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 276         * sparc-dis.c (print_insn_sparc): Likewise.
 277         * fr30-asm.c: Regenerate.
 278         * frv-asm.c: Regenerate.
 279         * ip2k-asm.c: Regenerate.
 280         * iq2000-asm.c: Regenerate.
 281         * lm32-asm.c: Regenerate.
 282         * m32c-asm.c: Regenerate.
 283         * m32r-asm.c: Regenerate.
 284         * mep-asm.c: Regenerate.
 285         * mt-asm.c: Regenerate.
 286         * openrisc-asm.c: Regenerate.
 287         * xc16x-asm.c: Regenerate.
 288         * xstormy16-asm.c: Regenerate.
 289
 290 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 291
 292         PR gas/11673
 293         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 294
 295 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 296
 297         PR binutils/11676
 298         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 299
 300 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 301
 302         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 303         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 304         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 305         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 306         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 307         Treat lwsync as msync on e500.
 308
 309 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 310
 311         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 312
 313 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 314
 315         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 316         constants is the same on 32-bit and 64-bit hosts.
 317
 318 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 319
 320         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 321         .short directives so that they can be reassembled.
 322
 323 2010-05-26  Catherine Moore <clm@codesourcery.com>
 324             David Ung  <davidu@mips.com>
 325
 326         * mips-opc.c: Change membership to I1 for instructions ssnop and
 327         ehb.
 328
 329 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 330
 331         * i386-dis.c (sib): New.
 332         (get_sib): Likewise.
 333         (print_insn): Call get_sib.
 334         OP_E_memory): Use sib.
 335
 336 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 337
 338         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 339         * mips-opc.c (I16): Remove.
 340         (mips_builtin_op): Reclassify jalx.
 341
 342 2010-05-19  Alan Modra  <amodra@gmail.com>
 343
 344         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 345         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 346
 347 2010-05-13  Alan Modra  <amodra@gmail.com>
 348
 349         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 350
 351 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 352
 353         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 354         format.
 355         (print_insn_thumb16): Add support for new %W format.
 356
 357 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 358
 359         * Makefile.in: Regenerate with automake 1.11.1.
 360         * aclocal.m4: Ditto.
 361
 362 2010-05-05  Nick Clifton  <nickc@redhat.com>
 363
 364         * po/es.po: Updated Spanish translation.
 365
 366 2010-04-22  Nick Clifton  <nickc@redhat.com>
 367
 368         * po/opcodes.pot: Updated by the Translation project.
 369         * po/vi.po: Updated Vietnamese translation.
 370
 371 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 372
 373         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 374         bits in opcode.
 375
 376 2010-04-09  Nick Clifton  <nickc@redhat.com>
 377
 378         * i386-dis.c (print_insn): Remove unused variable op.
 379         (OP_sI): Remove unused variable mask.
 380
 381 2010-04-07  Alan Modra  <amodra@gmail.com>
 382
 383         * configure: Regenerate.
 384
 385 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 386
 387         * ppc-opc.c (RBOPT): New define.
 388         ("dccci"): Enable for PPCA2.  Make operands optional.
 389         ("iccci"): Likewise.  Do not deprecate for PPC476.
 390
 391 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 392
 393         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 394
 395 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 396
 397         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 398         * Makefile.in: Regenerate.
 399         * configure.in (bfd_tic6x_arch): New.
 400         * configure: Regenerate.
 401         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 402         (disassembler): Handle TI C6X.
 403         * tic6x-dis.c: New.
 404
 405 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 406
 407         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 408
 409 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 410
 411         * dis-buf.c (buffer_read_memory): Give error for reading just
 412         before the start of memory.
 413
 414 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 415             Quentin Neill <quentin.neill@amd.com>
 416
 417         * i386-dis.c (OP_LWP_I): Removed.
 418         (reg_table): Do not use OP_LWP_I, use Iq.
 419         (OP_LWPCB_E): Remove use of names16.
 420         (OP_LWP_E): Same.
 421         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 422         should not set the Vex.length bit.
 423         * i386-tbl.h: Regenerated.
 424
 425 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 426
 427         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 428
 429 2010-02-24  Nick Clifton  <nickc@redhat.com>
 430
 431         PR binutils/6773
 432         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 433         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 434         (thumb32_opcodes): Likewise.
 435
 436 2010-02-15  Nick Clifton  <nickc@redhat.com>
 437
 438         * po/vi.po: Updated Vietnamese translation.
 439
 440 2010-02-12  Doug Evans  <dje@sebabeach.org>
 441
 442         * lm32-opinst.c: Regenerate.
 443
 444 2010-02-11  Doug Evans  <dje@sebabeach.org>
 445
 446         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 447         (print_address): Delete CGEN_PRINT_ADDRESS.
 448         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 449         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 450         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 451         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 452
 453         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 454         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 455         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 456         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 457         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 458         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 459         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 460         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 461         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 462         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 463         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 464         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 465
 466 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 467
 468         * i386-dis.c: Update copyright.
 469         * i386-gen.c: Likewise.
 470         * i386-opc.h: Likewise.
 471         * i386-opc.tbl: Likewise.
 472
 473 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 474             Sebastian Pop  <sebastian.pop@amd.com>
 475
 476         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 477         function to handle 5th imm8 operand.
 478         (PREFIX_VEX_3A48): Added.
 479         (PREFIX_VEX_3A49): Added.
 480         (VEX_W_3A48_P_2): Added.
 481         (VEX_W_3A49_P_2): Added.
 482         (prefix table): Added entries for PREFIX_VEX_3A48
 483         and PREFIX_VEX_3A49.
 484         (vex table): Added entries for VEX_W_3A48_P_2 and
 485         and VEX_W_3A49_P_2.
 486         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 487         for Vec_Imm4 operands.
 488         * i386-opc.h (enum): Added Vec_Imm4.
 489         (i386_operand_type): Added vec_imm4.
 490         * i386-opc.tbl: Add entries for vpermilp[ds].
 491         * i386-init.h: Regenerated.
 492         * i386-tbl.h: Regenerated.
 493
 494 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 495
 496         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 497         and "pwr7".  Move "a2" into alphabetical order.
 498
 499 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 500
 501         * ppc-dis.c (ppc_opts): Add titan entry.
 502         * ppc-opc.c (TITAN, MULHW): Define.
 503         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 504
 505 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 506
 507         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 508         to CPU_BDVER1_FLAGS
 509         * i386-init.h: Regenerated.
 510
 511 2010-02-03  Anthony Green  <green@moxielogic.com>
 512
 513         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 514         0x0f, and make 0x00 an illegal instruction.
 515
 516 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 517
 518         * opcodes/arm-dis.c (struct arm_private_data): New.
 519         (print_insn_coprocessor, print_insn_arm): Update to use struct
 520         arm_private_data.
 521         (is_mapping_symbol, get_map_sym_type): New functions.
 522         (get_sym_code_type): Check the symbol's section.  Do not check
 523         mapping symbols.
 524         (print_insn): Default to disassembling ARM mode code.  Check
 525         for mapping symbols separately from other symbols.  Use
 526         struct arm_private_data.
 527
 528 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 529
 530         * i386-dis.c (EXVexWdqScalar): New.
 531         (vex_scalar_w_dq_mode): Likewise.
 532         (prefix_table): Update entries for PREFIX_VEX_3899,
 533         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 534         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 535         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 536         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 537         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 538         (OP_EX): Likewise.
 539
 540 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 541
 542         * i386-dis.c (XMScalar): New.
 543         (EXdScalar): Likewise.
 544         (EXqScalar): Likewise.
 545         (EXqScalarS): Likewise.
 546         (VexScalar): Likewise.
 547         (EXdVexScalarS): Likewise.
 548         (EXqVexScalarS): Likewise.
 549         (XMVexScalar): Likewise.
 550         (scalar_mode): Likewise.
 551         (d_scalar_mode): Likewise.
 552         (d_scalar_swap_mode): Likewise.
 553         (q_scalar_mode): Likewise.
 554         (q_scalar_swap_mode): Likewise.
 555         (vex_scalar_mode): Likewise.
 556         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 557         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 558         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 559         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 560         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 561         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 562         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 563         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 564         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 565         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 566         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 567         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 568         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 569         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 570         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 571         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 572         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 573         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 574         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 575         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 576         q_scalar_mode, q_scalar_swap_mode.
 577         (OP_XMM): Handle scalar_mode.
 578         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 579         and q_scalar_swap_mode.
 580         (OP_VEX): Handle vex_scalar_mode.
 581
 582 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 583
 584         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 585
 586 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 587
 588         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 589
 590 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 591
 592         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 593
 594 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 595
 596         * i386-dis.c (Bad_Opcode): New.
 597         (bad_opcode): Likewise.
 598         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 599         (dis386_twobyte): Likewise.
 600         (reg_table): Likewise.
 601         (prefix_table): Likewise.
 602         (x86_64_table): Likewise.
 603         (vex_len_table): Likewise.
 604         (vex_w_table): Likewise.
 605         (mod_table): Likewise.
 606         (rm_table): Likewise.
 607         (float_reg): Likewise.
 608         (reg_table): Remove trailing "(bad)" entries.
 609         (prefix_table): Likewise.
 610         (x86_64_table): Likewise.
 611         (vex_len_table): Likewise.
 612         (vex_w_table): Likewise.
 613         (mod_table): Likewise.
 614         (rm_table): Likewise.
 615         (get_valid_dis386): Handle bytemode 0.
 616
 617 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 618
 619         * i386-opc.h (VEXScalar): New.
 620
 621         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 622         instructions.
 623         * i386-tbl.h: Regenerated.
 624
 625 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 626
 627         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 628
 629         * i386-opc.tbl: Add xsave64 and xrstor64.
 630         * i386-tbl.h: Regenerated.
 631
 632 2010-01-20  Nick Clifton  <nickc@redhat.com>
 633
 634         PR 11170
 635         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 636         based post-indexed addressing.
 637
 638 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 639
 640         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 641         * i386-tbl.h: Regenerated.
 642
 643 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 644
 645         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 646         comments.
 647
 648 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 649
 650         * i386-dis.c (names_mm): New.
 651         (intel_names_mm): Likewise.
 652         (att_names_mm): Likewise.
 653         (names_xmm): Likewise.
 654         (intel_names_xmm): Likewise.
 655         (att_names_xmm): Likewise.
 656         (names_ymm): Likewise.
 657         (intel_names_ymm): Likewise.
 658         (att_names_ymm): Likewise.
 659         (print_insn): Set names_mm, names_xmm and names_ymm.
 660         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 661         (OP_XMM): Likewise.
 662         (OP_EM): Likewise.
 663         (OP_EMC): Likewise.
 664         (OP_MXC): Likewise.
 665         (OP_EX): Likewise.
 666         (XMM_Fixup): Likewise.
 667         (OP_VEX): Likewise.
 668         (OP_EX_VexReg): Likewise.
 669         (OP_Vex_2src): Likewise.
 670         (OP_Vex_2src_1): Likewise.
 671         (OP_Vex_2src_2): Likewise.
 672         (OP_REG_VexI4): Likewise.
 673
 674 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 675
 676         * i386-dis.c (print_insn): Update comments.
 677
 678 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 679
 680         * i386-dis.c (rex_original): Removed.
 681         (ckprefix): Remove rex_original.
 682         (print_insn): Update comments.
 683
 684 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 685
 686         * Makefile.in: Regenerate.
 687         * configure: Regenerate.
 688
 689 2010-01-07  Doug Evans  <dje@sebabeach.org>
 690
 691         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 692         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 693         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 694         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 695         * xstormy16-ibld.c: Regenerate.
 696
 697 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 698
 699         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 700         * i386-init.h: Regenerated.
 701
 702 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 703
 704         * arm-dis.c (print_insn): Fixed search for next symbol and data
 705         dumping condition, and the initial mapping symbol state.
 706
 707 2010-01-05  Doug Evans  <dje@sebabeach.org>
 708
 709         * cgen-ibld.in: #include "cgen/basic-modes.h".
 710         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 711         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 712         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 713         * xstormy16-ibld.c: Regenerate.
 714
 715 2010-01-04  Nick Clifton  <nickc@redhat.com>
 716
 717         PR 11123
 718         * arm-dis.c (print_insn_coprocessor): Initialise value.
 719
 720 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 721
 722         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 723
 724 2010-01-02  Doug Evans  <dje@sebabeach.org>
 725
 726         * cgen-asm.in: Update copyright year.
 727         * cgen-dis.in: Update copyright year.
 728         * cgen-ibld.in: Update copyright year.
 729         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 730         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 731         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 732         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 733         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 734         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 735         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 736         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 737         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 738         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 739         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 740         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 741         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 742         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 743         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 744         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 745         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 746         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 747         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 748         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 749         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 750
 751 For older changes see ChangeLog-2009
 752 \f
 753 Local Variables:
 754 mode: change-log
 755 left-margin: 8
 756 fill-column: 74
 757 version-control: never
 758 End: