1 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
3 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
5 2005-07-01 Nick Clifton <nickc@redhat.com>
7 * a29k-dis.c: Update to ISO C90 style function declarations and
9 * alpha-opc.c: Likewise.
10 * arc-dis.c: Likewise.
11 * arc-opc.c: Likewise.
12 * avr-dis.c: Likewise.
13 * cgen-asm.in: Likewise.
14 * cgen-dis.in: Likewise.
15 * cgen-ibld.in: Likewise.
16 * cgen-opc.c: Likewise.
17 * cris-dis.c: Likewise.
18 * d10v-dis.c: Likewise.
19 * d30v-dis.c: Likewise.
20 * d30v-opc.c: Likewise.
21 * dis-buf.c: Likewise.
22 * dlx-dis.c: Likewise.
23 * h8300-dis.c: Likewise.
24 * h8500-dis.c: Likewise.
25 * hppa-dis.c: Likewise.
26 * i370-dis.c: Likewise.
27 * i370-opc.c: Likewise.
28 * m10200-dis.c: Likewise.
29 * m10300-dis.c: Likewise.
30 * m68k-dis.c: Likewise.
31 * m88k-dis.c: Likewise.
32 * mips-dis.c: Likewise.
33 * mmix-dis.c: Likewise.
34 * msp430-dis.c: Likewise.
35 * ns32k-dis.c: Likewise.
36 * or32-dis.c: Likewise.
37 * or32-opc.c: Likewise.
38 * pdp11-dis.c: Likewise.
40 * s390-dis.c: Likewise.
42 * sh64-dis.c: Likewise.
43 * sparc-dis.c: Likewise.
44 * sparc-opc.c: Likewise.
46 * tic30-dis.c: Likewise.
47 * tic4x-dis.c: Likewise.
48 * tic80-dis.c: Likewise.
49 * v850-dis.c: Likewise.
50 * v850-opc.c: Likewise.
51 * vax-dis.c: Likewise.
52 * w65-dis.c: Likewise.
58 * iq2000-*: Regenerate.
61 * openrisc-*: Regenerate.
62 * xstormy16-*: Regenerate.
64 2005-06-23 Ben Elliston <bje@gnu.org>
66 * m68k-dis.c: Use ISC C90.
67 * m68k-opc.c: Formatting fixes.
69 2005-06-16 David Ung <davidu@mips.com>
71 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
72 instructions to the table; seb/seh/sew/zeb/zeh/zew.
74 2005-06-15 Dave Brolley <brolley@redhat.com>
76 Contribute Morpho ms1 on behalf of Red Hat
77 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
78 ms1-opc.h: New files, Morpho ms1 target.
80 2004-05-14 Stan Cox <scox@redhat.com>
82 * disassemble.c (ARCH_ms1): Define.
83 (disassembler): Handle bfd_arch_ms1
85 2004-05-13 Michael Snyder <msnyder@redhat.com>
87 * Makefile.am, Makefile.in: Add ms1 target.
88 * configure.in: Ditto.
90 2005-06-08 Zack Weinberg <zack@codesourcery.com>
92 * arm-opc.h: Delete; fold contents into ...
93 * arm-dis.c: ... here. Move includes of internal COFF headers
94 next to includes of internal ELF headers.
95 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
96 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
97 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
98 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
99 (iwmmxt_wwnames, iwmmxt_wwssnames):
101 (regnames): Remove iWMMXt coprocessor register sets.
102 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
103 (get_arm_regnames): Adjust fourth argument to match above changes.
104 (set_iwmmxt_regnames): Delete.
105 (print_insn_arm): Constify 'c'. Use ISO syntax for function
106 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
107 and iwmmxt_cregnames, not set_iwmmxt_regnames.
108 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
109 ISO syntax for function pointer calls.
111 2005-06-07 Zack Weinberg <zack@codesourcery.com>
113 * arm-dis.c: Split up the comments describing the format codes, so
114 that the ARM and 16-bit Thumb opcode tables each have comments
115 preceding them that describe all the codes, and only the codes,
116 valid in those tables. (32-bit Thumb table is already like this.)
117 Reorder the lists in all three comments to match the order in
118 which the codes are implemented.
119 Remove all forward declarations of static functions. Convert all
120 function definitions to ISO C format.
121 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
123 (print_insn_thumb16): Remove unused case 'I'.
124 (print_insn): Update for changed calling convention of subroutines.
126 2005-05-25 Jan Beulich <jbeulich@novell.com>
128 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
129 hex (but retain it being displayed as signed). Remove redundant
130 checks. Add handling of displacements for 16-bit addressing in Intel
133 2005-05-25 Jan Beulich <jbeulich@novell.com>
135 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
136 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
137 masking of 'rm' in 16-bit memory address handling.
139 2005-05-19 Anton Blanchard <anton@samba.org>
141 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
142 (print_ppc_disassembler_options): Document it.
143 * ppc-opc.c (SVC_LEV): Define.
144 (LEV): Allow optional operand.
146 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
147 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
149 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
151 * Makefile.in: Regenerate.
153 2005-05-17 Zack Weinberg <zack@codesourcery.com>
155 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
156 instructions. Adjust disassembly of some opcodes to match
158 (thumb32_opcodes): New table.
159 (print_insn_thumb): Rename print_insn_thumb16; don't handle
160 two-halfword branches here.
161 (print_insn_thumb32): New function.
162 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
163 and print_insn_thumb32. Be consistent about order of
164 halfwords when printing 32-bit instructions.
166 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
169 * i386-dis.c (branch_v_mode): New.
170 (indirEv): Use branch_v_mode instead of v_mode.
171 (OP_E): Handle branch_v_mode.
173 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
175 * d10v-dis.c (dis_2_short): Support 64bit host.
177 2005-05-07 Nick Clifton <nickc@redhat.com>
179 * po/nl.po: Updated translation.
181 2005-05-07 Nick Clifton <nickc@redhat.com>
183 * Update the address and phone number of the FSF organization in
184 the GPL notices in the following files:
185 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
186 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
187 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
188 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
189 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
190 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
191 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
192 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
193 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
194 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
195 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
196 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
197 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
198 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
199 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
200 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
201 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
202 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
203 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
204 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
205 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
206 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
207 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
208 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
209 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
210 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
211 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
212 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
213 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
214 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
215 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
216 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
217 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
219 2005-05-05 James E Wilson <wilson@specifixinc.com>
221 * ia64-opc.c: Include sysdep.h before libiberty.h.
223 2005-05-05 Nick Clifton <nickc@redhat.com>
225 * configure.in (ALL_LINGUAS): Add vi.
226 * configure: Regenerate.
229 2005-04-26 Jerome Guitton <guitton@gnat.com>
231 * configure.in: Fix the check for basename declaration.
232 * configure: Regenerate.
234 2005-04-19 Alan Modra <amodra@bigpond.net.au>
236 * ppc-opc.c (RTO): Define.
237 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
238 entries to suit PPC440.
240 2005-04-18 Mark Kettenis <kettenis@gnu.org>
242 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
245 2005-04-14 Nick Clifton <nickc@redhat.com>
247 * po/fi.po: New translation: Finnish.
248 * configure.in (ALL_LINGUAS): Add fi.
249 * configure: Regenerate.
251 2005-04-14 Alan Modra <amodra@bigpond.net.au>
253 * Makefile.am (NO_WERROR): Define.
254 * configure.in: Invoke AM_BINUTILS_WARNINGS.
255 * Makefile.in: Regenerate.
256 * aclocal.m4: Regenerate.
257 * configure: Regenerate.
259 2005-04-04 Nick Clifton <nickc@redhat.com>
261 * fr30-asm.c: Regenerate.
262 * frv-asm.c: Regenerate.
263 * iq2000-asm.c: Regenerate.
264 * m32r-asm.c: Regenerate.
265 * openrisc-asm.c: Regenerate.
267 2005-04-01 Jan Beulich <jbeulich@novell.com>
269 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
270 visible operands in Intel mode. The first operand of monitor is
273 2005-04-01 Jan Beulich <jbeulich@novell.com>
275 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
276 easier future additions.
278 2005-03-31 Jerome Guitton <guitton@gnat.com>
280 * configure.in: Check for basename.
281 * configure: Regenerate.
284 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
286 * i386-dis.c (SEG_Fixup): New.
288 (dis386): Use "Sv" for 0x8c and 0x8e.
290 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
291 Nick Clifton <nickc@redhat.com>
293 * vax-dis.c: (entry_addr): New varible: An array of user supplied
294 function entry mask addresses.
295 (entry_addr_occupied_slots): New variable: The number of occupied
296 elements in entry_addr.
297 (entry_addr_total_slots): New variable: The total number of
298 elements in entry_addr.
299 (parse_disassembler_options): New function. Fills in the entry_addr
301 (free_entry_array): New function. Release the memory used by the
302 entry addr array. Suppressed because there is no way to call it.
303 (is_function_entry): Check if a given address is a function's
304 start address by looking at supplied entry mask addresses and
305 symbol information, if available.
306 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
308 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
310 * cris-dis.c (print_with_operands): Use ~31L for long instead
313 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
315 * mmix-opc.c (O): Revert the last change.
318 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
320 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
323 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
325 * mmix-opc.c (O, Z): Force expression as unsigned long.
327 2005-03-18 Nick Clifton <nickc@redhat.com>
329 * ip2k-asm.c: Regenerate.
330 * op/opcodes.pot: Regenerate.
332 2005-03-16 Nick Clifton <nickc@redhat.com>
333 Ben Elliston <bje@au.ibm.com>
335 * configure.in (werror): New switch: Add -Werror to the
336 compiler command line. Enabled by default. Disable via
338 * configure: Regenerate.
340 2005-03-16 Alan Modra <amodra@bigpond.net.au>
342 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
345 2005-03-15 Alan Modra <amodra@bigpond.net.au>
347 * po/es.po: Commit new Spanish translation.
349 * po/fr.po: Commit new French translation.
351 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
353 * vax-dis.c: Fix spelling error
354 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
355 of just "Entry mask: < r1 ... >"
357 2005-03-12 Zack Weinberg <zack@codesourcery.com>
359 * arm-dis.c (arm_opcodes): Document %E and %V.
360 Add entries for v6T2 ARM instructions:
361 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
362 (print_insn_arm): Add support for %E and %V.
363 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
365 2005-03-10 Jeff Baker <jbaker@qnx.com>
366 Alan Modra <amodra@bigpond.net.au>
368 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
369 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
371 (XSPRG_MASK): Mask off extra bits now part of sprg field.
372 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
373 mfsprg4..7 after msprg and consolidate.
375 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
377 * vax-dis.c (entry_mask_bit): New array.
378 (print_insn_vax): Decode function entry mask.
380 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
382 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
384 2005-03-05 Alan Modra <amodra@bigpond.net.au>
386 * po/opcodes.pot: Regenerate.
388 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
390 * arc-dis.c (a4_decoding_class): New enum.
391 (dsmOneArcInst): Use the enum values for the decoding class.
392 Remove redundant case in the switch for decodingClass value 11.
394 2005-03-02 Jan Beulich <jbeulich@novell.com>
396 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
398 (OP_C): Consider lock prefix in non-64-bit modes.
400 2005-02-24 Alan Modra <amodra@bigpond.net.au>
402 * cris-dis.c (format_hex): Remove ineffective warning fix.
403 * crx-dis.c (make_instruction): Warning fix.
404 * frv-asm.c: Regenerate.
406 2005-02-23 Nick Clifton <nickc@redhat.com>
408 * cgen-dis.in: Use bfd_byte for buffers that are passed to
411 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
413 * crx-dis.c (make_instruction): Move argument structure into inner
414 scope and ensure that all of its fields are initialised before
417 * fr30-asm.c: Regenerate.
418 * fr30-dis.c: Regenerate.
419 * frv-asm.c: Regenerate.
420 * frv-dis.c: Regenerate.
421 * ip2k-asm.c: Regenerate.
422 * ip2k-dis.c: Regenerate.
423 * iq2000-asm.c: Regenerate.
424 * iq2000-dis.c: Regenerate.
425 * m32r-asm.c: Regenerate.
426 * m32r-dis.c: Regenerate.
427 * openrisc-asm.c: Regenerate.
428 * openrisc-dis.c: Regenerate.
429 * xstormy16-asm.c: Regenerate.
430 * xstormy16-dis.c: Regenerate.
432 2005-02-22 Alan Modra <amodra@bigpond.net.au>
434 * arc-ext.c: Warning fixes.
435 * arc-ext.h: Likewise.
436 * cgen-opc.c: Likewise.
437 * ia64-gen.c: Likewise.
438 * maxq-dis.c: Likewise.
439 * ns32k-dis.c: Likewise.
440 * w65-dis.c: Likewise.
441 * ia64-asmtab.c: Regenerate.
443 2005-02-22 Alan Modra <amodra@bigpond.net.au>
445 * fr30-desc.c: Regenerate.
446 * fr30-desc.h: Regenerate.
447 * fr30-opc.c: Regenerate.
448 * fr30-opc.h: Regenerate.
449 * frv-desc.c: Regenerate.
450 * frv-desc.h: Regenerate.
451 * frv-opc.c: Regenerate.
452 * frv-opc.h: Regenerate.
453 * ip2k-desc.c: Regenerate.
454 * ip2k-desc.h: Regenerate.
455 * ip2k-opc.c: Regenerate.
456 * ip2k-opc.h: Regenerate.
457 * iq2000-desc.c: Regenerate.
458 * iq2000-desc.h: Regenerate.
459 * iq2000-opc.c: Regenerate.
460 * iq2000-opc.h: Regenerate.
461 * m32r-desc.c: Regenerate.
462 * m32r-desc.h: Regenerate.
463 * m32r-opc.c: Regenerate.
464 * m32r-opc.h: Regenerate.
465 * m32r-opinst.c: Regenerate.
466 * openrisc-desc.c: Regenerate.
467 * openrisc-desc.h: Regenerate.
468 * openrisc-opc.c: Regenerate.
469 * openrisc-opc.h: Regenerate.
470 * xstormy16-desc.c: Regenerate.
471 * xstormy16-desc.h: Regenerate.
472 * xstormy16-opc.c: Regenerate.
473 * xstormy16-opc.h: Regenerate.
475 2005-02-21 Alan Modra <amodra@bigpond.net.au>
477 * Makefile.am: Run "make dep-am"
478 * Makefile.in: Regenerate.
480 2005-02-15 Nick Clifton <nickc@redhat.com>
482 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
483 compile time warnings.
484 (print_keyword): Likewise.
485 (default_print_insn): Likewise.
487 * fr30-desc.c: Regenerated.
488 * fr30-desc.h: Regenerated.
489 * fr30-dis.c: Regenerated.
490 * fr30-opc.c: Regenerated.
491 * fr30-opc.h: Regenerated.
492 * frv-desc.c: Regenerated.
493 * frv-dis.c: Regenerated.
494 * frv-opc.c: Regenerated.
495 * ip2k-asm.c: Regenerated.
496 * ip2k-desc.c: Regenerated.
497 * ip2k-desc.h: Regenerated.
498 * ip2k-dis.c: Regenerated.
499 * ip2k-opc.c: Regenerated.
500 * ip2k-opc.h: Regenerated.
501 * iq2000-desc.c: Regenerated.
502 * iq2000-dis.c: Regenerated.
503 * iq2000-opc.c: Regenerated.
504 * m32r-asm.c: Regenerated.
505 * m32r-desc.c: Regenerated.
506 * m32r-desc.h: Regenerated.
507 * m32r-dis.c: Regenerated.
508 * m32r-opc.c: Regenerated.
509 * m32r-opc.h: Regenerated.
510 * m32r-opinst.c: Regenerated.
511 * openrisc-desc.c: Regenerated.
512 * openrisc-desc.h: Regenerated.
513 * openrisc-dis.c: Regenerated.
514 * openrisc-opc.c: Regenerated.
515 * openrisc-opc.h: Regenerated.
516 * xstormy16-desc.c: Regenerated.
517 * xstormy16-desc.h: Regenerated.
518 * xstormy16-dis.c: Regenerated.
519 * xstormy16-opc.c: Regenerated.
520 * xstormy16-opc.h: Regenerated.
522 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
524 * dis-buf.c (perror_memory): Use sprintf_vma to print out
527 2005-02-11 Nick Clifton <nickc@redhat.com>
529 * iq2000-asm.c: Regenerate.
531 * frv-dis.c: Regenerate.
533 2005-02-07 Jim Blandy <jimb@redhat.com>
535 * Makefile.am (CGEN): Load guile.scm before calling the main
537 * Makefile.in: Regenerated.
538 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
539 Simply pass the cgen-opc.scm path to ${cgen} as its first
540 argument; ${cgen} itself now contains the '-s', or whatever is
541 appropriate for the Scheme being used.
543 2005-01-31 Andrew Cagney <cagney@gnu.org>
545 * configure: Regenerate to track ../gettext.m4.
547 2005-01-31 Jan Beulich <jbeulich@novell.com>
549 * ia64-gen.c (NELEMS): Define.
550 (shrink): Generate alias with missing second predicate register when
551 opcode has two outputs and these are both predicates.
552 * ia64-opc-i.c (FULL17): Define.
553 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
554 here to generate output template.
555 (TBITCM, TNATCM): Undefine after use.
556 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
557 first input. Add ld16 aliases without ar.csd as second output. Add
558 st16 aliases without ar.csd as second input. Add cmpxchg aliases
559 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
560 ar.ccv as third/fourth inputs. Consolidate through...
561 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
562 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
563 * ia64-asmtab.c: Regenerate.
565 2005-01-27 Andrew Cagney <cagney@gnu.org>
567 * configure: Regenerate to track ../gettext.m4 change.
569 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
571 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
572 * frv-asm.c: Rebuilt.
573 * frv-desc.c: Rebuilt.
574 * frv-desc.h: Rebuilt.
575 * frv-dis.c: Rebuilt.
576 * frv-ibld.c: Rebuilt.
577 * frv-opc.c: Rebuilt.
578 * frv-opc.h: Rebuilt.
580 2005-01-24 Andrew Cagney <cagney@gnu.org>
582 * configure: Regenerate, ../gettext.m4 was updated.
584 2005-01-21 Fred Fish <fnf@specifixinc.com>
586 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
587 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
588 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
591 2005-01-20 Alan Modra <amodra@bigpond.net.au>
593 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
595 2005-01-19 Fred Fish <fnf@specifixinc.com>
597 * mips-dis.c (no_aliases): New disassembly option flag.
598 (set_default_mips_dis_options): Init no_aliases to zero.
599 (parse_mips_dis_option): Handle no-aliases option.
600 (print_insn_mips): Ignore table entries that are aliases
601 if no_aliases is set.
602 (print_insn_mips16): Ditto.
603 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
604 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
605 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
606 * mips16-opc.c (mips16_opcodes): Ditto.
608 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
610 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
611 (inheritance diagram): Add missing edge.
612 (arch_sh1_up): Rename arch_sh_up to match external name to make life
613 easier for the testsuite.
614 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
615 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
616 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
617 arch_sh2a_or_sh4_up child.
618 (sh_table): Do renaming as above.
619 Correct comment for ldc.l for gas testsuite to read.
620 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
621 Correct comments for movy.w and movy.l for gas testsuite to read.
622 Correct comments for fmov.d and fmov.s for gas testsuite to read.
624 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
626 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
628 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
630 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
632 2005-01-10 Andreas Schwab <schwab@suse.de>
634 * disassemble.c (disassemble_init_for_target) <case
635 bfd_arch_ia64>: Set skip_zeroes to 16.
636 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
638 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
640 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
642 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
644 * avr-dis.c: Prettyprint. Added printing of symbol names in all
645 memory references. Convert avr_operand() to C90 formatting.
647 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
649 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
651 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
653 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
654 (no_op_insn): Initialize array with instructions that have no
656 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
658 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
660 * arm-dis.c: Correct top-level comment.
662 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
664 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
665 architecuture defining the insn.
666 (arm_opcodes, thumb_opcodes): Delete. Move to ...
667 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
669 Also include opcode/arm.h.
670 * Makefile.am (arm-dis.lo): Update dependency list.
671 * Makefile.in: Regenerate.
673 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
675 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
676 reflect the change to the short immediate syntax.
678 2004-11-19 Alan Modra <amodra@bigpond.net.au>
680 * or32-opc.c (debug): Warning fix.
681 * po/POTFILES.in: Regenerate.
683 * maxq-dis.c: Formatting.
684 (print_insn): Warning fix.
686 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
688 * arm-dis.c (WORD_ADDRESS): Define.
689 (print_insn): Use it. Correct big-endian end-of-section handling.
691 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
692 Vineet Sharma <vineets@noida.hcltech.com>
694 * maxq-dis.c: New file.
695 * disassemble.c (ARCH_maxq): Define.
696 (disassembler): Add 'print_insn_maxq_little' for handling maxq
698 * configure.in: Add case for bfd_maxq_arch.
699 * configure: Regenerate.
700 * Makefile.am: Add support for maxq-dis.c
701 * Makefile.in: Regenerate.
702 * aclocal.m4: Regenerate.
704 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
706 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
708 * crx-dis.c: Likewise.
710 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
712 Generally, handle CRISv32.
713 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
714 (struct cris_disasm_data): New type.
715 (format_reg, format_hex, cris_constraint, print_flags)
716 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
718 (format_sup_reg, print_insn_crisv32_with_register_prefix)
719 (print_insn_crisv32_without_register_prefix)
720 (print_insn_crisv10_v32_with_register_prefix)
721 (print_insn_crisv10_v32_without_register_prefix)
722 (cris_parse_disassembler_options): New functions.
723 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
724 parameter. All callers changed.
725 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
727 (cris_constraint) <case 'Y', 'U'>: New cases.
728 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
730 (print_with_operands) <case 'Y'>: New case.
731 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
732 <case 'N', 'Y', 'Q'>: New cases.
733 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
734 (print_insn_cris_with_register_prefix)
735 (print_insn_cris_without_register_prefix): Call
736 cris_parse_disassembler_options.
737 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
738 for CRISv32 and the size of immediate operands. New v32-only
739 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
740 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
741 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
742 Change brp to be v3..v10.
743 (cris_support_regs): New vector.
744 (cris_opcodes): Update head comment. New format characters '[',
745 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
746 Add new opcodes for v32 and adjust existing opcodes to accommodate
747 differences to earlier variants.
748 (cris_cond15s): New vector.
750 2004-11-04 Jan Beulich <jbeulich@novell.com>
752 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
754 (Mp): Use f_mode rather than none at all.
755 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
756 replaces what previously was x_mode; x_mode now means 128-bit SSE
758 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
759 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
760 pinsrw's second operand is Edqw.
761 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
762 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
763 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
764 mode when an operand size override is present or always suffixing.
765 More instructions will need to be added to this group.
766 (putop): Handle new macro chars 'C' (short/long suffix selector),
767 'I' (Intel mode override for following macro char), and 'J' (for
768 adding the 'l' prefix to far branches in AT&T mode). When an
769 alternative was specified in the template, honor macro character when
770 specified for Intel mode.
771 (OP_E): Handle new *_mode values. Correct pointer specifications for
772 memory operands. Consolidate output of index register.
773 (OP_G): Handle new *_mode values.
774 (OP_I): Handle const_1_mode.
775 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
776 respective opcode prefix bits have been consumed.
777 (OP_EM, OP_EX): Provide some default handling for generating pointer
780 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
782 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
785 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
787 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
788 (getregliststring): Support HI/LO and user registers.
789 * crx-opc.c (crx_instruction): Update data structure according to the
790 rearrangement done in CRX opcode header file.
791 (crx_regtab): Likewise.
792 (crx_optab): Likewise.
793 (crx_instruction): Reorder load/stor instructions, remove unsupported
795 support new Co-Processor instruction 'cpi'.
797 2004-10-27 Nick Clifton <nickc@redhat.com>
799 * opcodes/iq2000-asm.c: Regenerate.
800 * opcodes/iq2000-desc.c: Regenerate.
801 * opcodes/iq2000-desc.h: Regenerate.
802 * opcodes/iq2000-dis.c: Regenerate.
803 * opcodes/iq2000-ibld.c: Regenerate.
804 * opcodes/iq2000-opc.c: Regenerate.
805 * opcodes/iq2000-opc.h: Regenerate.
807 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
809 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
810 us4, us5 (respectively).
811 Remove unsupported 'popa' instruction.
812 Reverse operands order in store co-processor instructions.
814 2004-10-15 Alan Modra <amodra@bigpond.net.au>
816 * Makefile.am: Run "make dep-am"
817 * Makefile.in: Regenerate.
819 2004-10-12 Bob Wilson <bob.wilson@acm.org>
821 * xtensa-dis.c: Use ISO C90 formatting.
823 2004-10-09 Alan Modra <amodra@bigpond.net.au>
825 * ppc-opc.c: Revert 2004-09-09 change.
827 2004-10-07 Bob Wilson <bob.wilson@acm.org>
829 * xtensa-dis.c (state_names): Delete.
830 (fetch_data): Use xtensa_isa_maxlength.
831 (print_xtensa_operand): Replace operand parameter with opcode/operand
832 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
833 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
834 instruction bundles. Use xmalloc instead of malloc.
836 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
838 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
841 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
843 * crx-opc.c (crx_instruction): Support Co-processor insns.
844 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
845 (getregliststring): Change function to use the above enum.
846 (print_arg): Handle CO-Processor insns.
847 (crx_cinvs): Add 'b' option to invalidate the branch-target
850 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
852 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
853 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
854 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
855 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
856 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
858 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
860 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
863 2004-09-30 Paul Brook <paul@codesourcery.com>
865 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
866 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
868 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
870 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
871 (CONFIG_STATUS_DEPENDENCIES): New.
873 (config.status): Likewise.
874 * Makefile.in: Regenerated.
876 2004-09-17 Alan Modra <amodra@bigpond.net.au>
878 * Makefile.am: Run "make dep-am".
879 * Makefile.in: Regenerate.
880 * aclocal.m4: Regenerate.
881 * configure: Regenerate.
882 * po/POTFILES.in: Regenerate.
883 * po/opcodes.pot: Regenerate.
885 2004-09-11 Andreas Schwab <schwab@suse.de>
887 * configure: Rebuild.
889 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
891 * ppc-opc.c (L): Make this field not optional.
893 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
895 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
896 Fix parameter to 'm[t|f]csr' insns.
898 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
900 * configure.in: Autoupdate to autoconf 2.59.
901 * aclocal.m4: Rebuild with aclocal 1.4p6.
902 * configure: Rebuild with autoconf 2.59.
903 * Makefile.in: Rebuild with automake 1.4p6 (picking up
904 bfd changes for autoconf 2.59 on the way).
905 * config.in: Rebuild with autoheader 2.59.
907 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
909 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
911 2004-07-30 Michal Ludvig <mludvig@suse.cz>
913 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
914 (GRPPADLCK2): New define.
915 (twobyte_has_modrm): True for 0xA6.
916 (grps): GRPPADLCK2 for opcode 0xA6.
918 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
920 Introduce SH2a support.
921 * sh-opc.h (arch_sh2a_base): Renumber.
922 (arch_sh2a_nofpu_base): Remove.
923 (arch_sh_base_mask): Adjust.
924 (arch_opann_mask): New.
925 (arch_sh2a, arch_sh2a_nofpu): Adjust.
926 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
927 (sh_table): Adjust whitespace.
928 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
929 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
930 instruction list throughout.
931 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
932 of arch_sh2a in instruction list throughout.
933 (arch_sh2e_up): Accomodate above changes.
934 (arch_sh2_up): Ditto.
935 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
936 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
937 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
938 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
939 * sh-opc.h (arch_sh2a_nofpu): New.
940 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
941 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
943 2004-01-20 DJ Delorie <dj@redhat.com>
944 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
945 2003-12-29 DJ Delorie <dj@redhat.com>
946 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
947 sh_opcode_info, sh_table): Add sh2a support.
948 (arch_op32): New, to tag 32-bit opcodes.
949 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
950 2003-12-02 Michael Snyder <msnyder@redhat.com>
951 * sh-opc.h (arch_sh2a): Add.
952 * sh-dis.c (arch_sh2a): Handle.
953 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
955 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
957 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
959 2004-07-22 Nick Clifton <nickc@redhat.com>
962 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
963 insns - this is done by objdump itself.
964 * h8500-dis.c (print_insn_h8500): Likewise.
966 2004-07-21 Jan Beulich <jbeulich@novell.com>
968 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
969 regardless of address size prefix in effect.
970 (ptr_reg): Size or address registers does not depend on rex64, but
971 on the presence of an address size override.
972 (OP_MMX): Use rex.x only for xmm registers.
973 (OP_EM): Use rex.z only for xmm registers.
975 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
977 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
978 move/branch operations to the bottom so that VR5400 multimedia
979 instructions take precedence in disassembly.
981 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
983 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
984 ISA-specific "break" encoding.
986 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
988 * arm-opc.h: Fix typo in comment.
990 2004-07-11 Andreas Schwab <schwab@suse.de>
992 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
994 2004-07-09 Andreas Schwab <schwab@suse.de>
996 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
998 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1000 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1001 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1002 (crx-dis.lo): New target.
1003 (crx-opc.lo): Likewise.
1004 * Makefile.in: Regenerate.
1005 * configure.in: Handle bfd_crx_arch.
1006 * configure: Regenerate.
1007 * crx-dis.c: New file.
1008 * crx-opc.c: New file.
1009 * disassemble.c (ARCH_crx): Define.
1010 (disassembler): Handle ARCH_crx.
1012 2004-06-29 James E Wilson <wilson@specifixinc.com>
1014 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1015 * ia64-asmtab.c: Regnerate.
1017 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1019 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1020 (extract_fxm): Don't test dialect.
1021 (XFXFXM_MASK): Include the power4 bit.
1022 (XFXM): Add p4 param.
1023 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1025 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1027 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1028 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1030 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1032 * ppc-opc.c (BH, XLBH_MASK): Define.
1033 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1035 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1037 * i386-dis.c (x_mode): Comment.
1038 (two_source_ops): File scope.
1039 (float_mem): Correct fisttpll and fistpll.
1040 (float_mem_mode): New table.
1042 (OP_E): Correct intel mode PTR output.
1043 (ptr_reg): Use open_char and close_char.
1044 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1045 operands. Set two_source_ops.
1047 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1049 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1050 instead of _raw_size.
1052 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1054 * ia64-gen.c (in_iclass): Handle more postinc st
1056 * ia64-asmtab.c: Rebuilt.
1058 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1060 * s390-opc.txt: Correct architecture mask for some opcodes.
1061 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1062 in the esa mode as well.
1064 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1066 * sh-dis.c (target_arch): Make unsigned.
1067 (print_insn_sh): Replace (most of) switch with a call to
1068 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1069 * sh-opc.h: Redefine architecture flags values.
1070 Add sh3-nommu architecture.
1071 Reorganise <arch>_up macros so they make more visual sense.
1072 (SH_MERGE_ARCH_SET): Define new macro.
1073 (SH_VALID_BASE_ARCH_SET): Likewise.
1074 (SH_VALID_MMU_ARCH_SET): Likewise.
1075 (SH_VALID_CO_ARCH_SET): Likewise.
1076 (SH_VALID_ARCH_SET): Likewise.
1077 (SH_MERGE_ARCH_SET_VALID): Likewise.
1078 (SH_ARCH_SET_HAS_FPU): Likewise.
1079 (SH_ARCH_SET_HAS_DSP): Likewise.
1080 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1081 (sh_get_arch_from_bfd_mach): Add prototype.
1082 (sh_get_arch_up_from_bfd_mach): Likewise.
1083 (sh_get_bfd_mach_from_arch_set): Likewise.
1084 (sh_merge_bfd_arc): Likewise.
1086 2004-05-24 Peter Barada <peter@the-baradas.com>
1088 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1089 into new match_insn_m68k function. Loop over canidate
1090 matches and select first that completely matches.
1091 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1092 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1093 to verify addressing for MAC/EMAC.
1094 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1095 reigster halves since 'fpu' and 'spl' look misleading.
1096 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1097 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1098 first, tighten up match masks.
1099 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1100 'size' from special case code in print_insn_m68k to
1101 determine decode size of insns.
1103 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1105 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1106 well as when -mpower4.
1108 2004-05-13 Nick Clifton <nickc@redhat.com>
1110 * po/fr.po: Updated French translation.
1112 2004-05-05 Peter Barada <peter@the-baradas.com>
1114 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1115 variants in arch_mask. Only set m68881/68851 for 68k chips.
1116 * m68k-op.c: Switch from ColdFire chips to core variants.
1118 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1121 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1123 2004-04-29 Ben Elliston <bje@au.ibm.com>
1125 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1126 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1128 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1130 * sh-dis.c (print_insn_sh): Print the value in constant pool
1131 as a symbol if it looks like a symbol.
1133 2004-04-22 Peter Barada <peter@the-baradas.com>
1135 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1136 appropriate ColdFire architectures.
1137 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1139 Add EMAC instructions, fix MAC instructions. Remove
1140 macmw/macml/msacmw/msacml instructions since mask addressing now
1143 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1145 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1146 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1147 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1148 macro. Adjust all users.
1150 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1152 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1155 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1157 * m32r-asm.c: Regenerate.
1159 2004-03-29 Stan Shebs <shebs@apple.com>
1161 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1164 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1166 * aclocal.m4: Regenerate.
1167 * config.in: Regenerate.
1168 * configure: Regenerate.
1169 * po/POTFILES.in: Regenerate.
1170 * po/opcodes.pot: Regenerate.
1172 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1174 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1176 * ppc-opc.c (RA0): Define.
1177 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1178 (RAOPT): Rename from RAO. Update all uses.
1179 (powerpc_opcodes): Use RA0 as appropriate.
1181 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1183 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1185 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1187 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1189 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1191 * i386-dis.c (GRPPLOCK): Delete.
1192 (grps): Delete GRPPLOCK entry.
1194 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1196 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1198 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1199 (GRPPADLCK): Define.
1200 (dis386): Use NOP_Fixup on "nop".
1201 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1202 (twobyte_has_modrm): Set for 0xa7.
1203 (padlock_table): Delete. Move to..
1204 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1206 (print_insn): Revert PADLOCK_SPECIAL code.
1207 (OP_E): Delete sfence, lfence, mfence checks.
1209 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1211 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1212 (INVLPG_Fixup): New function.
1213 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1215 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1217 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1218 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1219 (padlock_table): New struct with PadLock instructions.
1220 (print_insn): Handle PADLOCK_SPECIAL.
1222 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1224 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1225 (OP_E): Twiddle clflush to sfence here.
1227 2004-03-08 Nick Clifton <nickc@redhat.com>
1229 * po/de.po: Updated German translation.
1231 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1233 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1234 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1235 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1238 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1240 * frv-asm.c: Regenerate.
1241 * frv-desc.c: Regenerate.
1242 * frv-desc.h: Regenerate.
1243 * frv-dis.c: Regenerate.
1244 * frv-ibld.c: Regenerate.
1245 * frv-opc.c: Regenerate.
1246 * frv-opc.h: Regenerate.
1248 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1250 * frv-desc.c, frv-opc.c: Regenerate.
1252 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1254 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1256 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1258 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1259 Also correct mistake in the comment.
1261 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1263 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1264 ensure that double registers have even numbers.
1265 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1266 that reserved instruction 0xfffd does not decode the same
1268 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1269 REG_N refers to a double register.
1270 Add REG_N_B01 nibble type and use it instead of REG_NM
1272 Adjust the bit patterns in a few comments.
1274 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1276 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1278 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1280 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1282 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1284 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1286 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1288 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1289 mtivor32, mtivor33, mtivor34.
1291 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1293 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1295 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1297 * arm-opc.h Maverick accumulator register opcode fixes.
1299 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1301 * m32r-dis.c: Regenerate.
1303 2004-01-27 Michael Snyder <msnyder@redhat.com>
1305 * sh-opc.h (sh_table): "fsrra", not "fssra".
1307 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1309 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1312 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1314 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1316 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1318 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1319 1. Don't print scale factor on AT&T mode when index missing.
1321 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1323 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1324 when loaded into XR registers.
1326 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1328 * frv-desc.h: Regenerate.
1329 * frv-desc.c: Regenerate.
1330 * frv-opc.c: Regenerate.
1332 2004-01-13 Michael Snyder <msnyder@redhat.com>
1334 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1336 2004-01-09 Paul Brook <paul@codesourcery.com>
1338 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1341 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1343 * Makefile.am (libopcodes_la_DEPENDENCIES)
1344 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1345 comment about the problem.
1346 * Makefile.in: Regenerate.
1348 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1350 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1351 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1352 cut&paste errors in shifting/truncating numerical operands.
1353 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1354 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1355 (parse_uslo16): Likewise.
1356 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1357 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1358 (parse_s12): Likewise.
1359 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1360 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1361 (parse_uslo16): Likewise.
1362 (parse_uhi16): Parse gothi and gotfuncdeschi.
1363 (parse_d12): Parse got12 and gotfuncdesc12.
1364 (parse_s12): Likewise.
1366 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1368 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1369 instruction which looks similar to an 'rla' instruction.
1371 For older changes see ChangeLog-0203
1377 version-control: never