opcodes/ChangeLog

   1 2006-03-05  Nick Clifton  <nickc@redhat.com>
   2
   3         * cgen-ibld.in (insert_normal): Cope with attempts to insert a
   4         signed 32-bit value into an unsigned 32-bit field when the host is
   5         a 64-bit machine.
   6         * fr30-ibld.c: Regenerate.
   7         * frv-ibld.c: Regenerate.
   8         * ip2k-ibld.c: Regenerate.
   9         * iq2000-asm.c: Regenerate.
  10         * iq2000-ibld.c: Regenerate.
  11         * m32c-ibld.c: Regenerate.
  12         * m32r-ibld.c: Regenerate.
  13         * openrisc-ibld.c: Regenerate.
  14         * xc16x-ibld.c: Regenerate.
  15         * xstormy16-ibld.c: Regenerate.
  16
  17 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
  18
  19         * xc16x-asm.c: Regenerate.
  20         * xc16x-dis.c: Regenerate.
  21
  22 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
  23
  24         * po/Make-in: Add html target.
  25
  26 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
  27
  28         * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
  29         Intel Merom New Instructions.
  30         (THREE_BYTE_0): Likewise.
  31         (THREE_BYTE_1): Likewise.
  32         (three_byte_table): Likewise.
  33         (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
  34         THREE_BYTE_1 for entry 0x3a.
  35         (twobyte_has_modrm): Updated.
  36         (twobyte_uses_SSE_prefix): Likewise.
  37         (print_insn): Handle 3-byte opcodes used by Intel Merom New
  38         Instructions.
  39
  40 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
  41
  42         * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
  43         (v9_hpriv_reg_names): New table.
  44         (print_insn_sparc): Allow values up to 16 for '?' and '!'.
  45         New cases '$' and '%' for read/write hyperprivileged register.
  46         * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
  47         window handling and rdhpr/wrhpr instructions.
  48
  49 2006-02-24  DJ Delorie  <dj@redhat.com>
  50
  51         * m32c-desc.c: Regenerate with linker relaxation attributes.
  52         * m32c-desc.h: Likewise.
  53         * m32c-dis.c: Likewise.
  54         * m32c-opc.c: Likewise.
  55
  56 2006-02-24  Paul Brook  <paul@codesourcery.com>
  57
  58         * arm-dis.c (arm_opcodes): Add V7 instructions.
  59         (thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
  60         (print_arm_address): New function.
  61         (print_insn_arm): Use it.  Add 'P' and 'U' cases.
  62         (psr_name): New function.
  63         (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
  64
  65 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
  66
  67         * ia64-opc-i.c (bXc): New.
  68         (mXc): Likewise.
  69         (OpX2TaTbYaXcC): Likewise.
  70         (TF). Likewise.
  71         (TFCM). Likewise.
  72         (ia64_opcodes_i): Add instructions for tf.
  73
  74         * ia64-opc.h (IMMU5b): New.
  75
  76         * ia64-asmtab.c: Regenerated.
  77
  78 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
  79
  80         * ia64-gen.c: Update copyright years.
  81         * ia64-opc-b.c: Likewise.
  82
  83 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
  84
  85         * ia64-gen.c (lookup_regindex): Handle ".vm".
  86         (print_dependency_table): Handle '\"'.
  87
  88         * ia64-ic.tbl: Updated from SDM 2.2.
  89         * ia64-raw.tbl: Likewise.
  90         * ia64-waw.tbl: Likewise.
  91         * ia64-asmtab.c: Regenerated.
  92
  93         * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
  94
  95 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
  96             Anil Paranjape   <anilp1@kpitcummins.com>
  97             Shilin Shakti    <shilins@kpitcummins.com>
  98
  99         * xc16x-desc.h: New file
 100         * xc16x-desc.c: New file
 101         * xc16x-opc.h: New file
 102         * xc16x-opc.c: New file
 103         * xc16x-ibld.c: New file
 104         * xc16x-asm.c: New file
 105         * xc16x-dis.c: New file
 106         * Makefile.am: Entries for xc16x
 107         * Makefile.in: Regenerate
 108         * cofigure.in: Add xc16x target information.
 109         * configure: Regenerate.
 110         * disassemble.c: Add xc16x target information.
 111
 112 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 113
 114         * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
 115         moves.
 116
 117 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 118
 119         * i386-dis.c ('Z'): Add a new macro.
 120         (dis386_twobyte): Use "movZ" for control register moves.
 121
 122 2006-02-10  Nick Clifton  <nickc@redhat.com>
 123
 124         * iq2000-asm.c: Regenerate.
 125
 126 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 127
 128         * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
 129
 130 2006-01-26  David Ung  <davidu@mips.com>
 131
 132         * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
 133         ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
 134         floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
 135         nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
 136         rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
 137
 138 2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>
 139
 140         * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
 141         ld_d_r, pref_xd_cb): Use signed char to hold data to be
 142         disassembled.
 143         * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
 144         buffer overflows when disassembling instructions like
 145         ld (ix+123),0x23
 146         * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
 147         operand, if the offset is negative.
 148
 149 2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>
 150
 151         * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
 152         unsigned char to hold data to be disassembled.
 153
 154 2006-01-17  Andreas Schwab  <schwab@suse.de>
 155
 156         PR binutils/1486
 157         * disassemble.c (disassemble_init_for_target): Set
 158         disassembler_needs_relocs for bfd_arch_arm.
 159
 160 2006-01-16  Paul Brook  <paul@codesourcery.com>
 161
 162         * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
 163         f?add?, and f?sub? instructions.
 164
 165 2006-01-16  Nick Clifton  <nickc@redhat.com>
 166
 167         * po/zh_CN.po: New Chinese (simplified) translation.
 168         * configure.in (ALL_LINGUAS): Add "zh_CH".
 169         * configure: Regenerate.
 170
 171 2006-01-05  Paul Brook  <paul@codesourcery.com>
 172
 173         * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
 174
 175 2006-01-06  DJ Delorie  <dj@redhat.com>
 176
 177         * m32c-desc.c: Regenerate.
 178         * m32c-opc.c: Regenerate.
 179         * m32c-opc.h: Regenerate.
 180
 181 2006-01-03  DJ Delorie  <dj@redhat.com>
 182
 183         * cgen-ibld.in (extract_normal): Avoid memory range errors.
 184         * m32c-ibld.c: Regenerated.
 185
 186 For older changes see ChangeLog-2005
 187 \f
 188 Local Variables:
 189 mode: change-log
 190 left-margin: 8
 191 fill-column: 74
 192 version-control: never
 193 End: