* opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2006-04-26 Nathan Sidwell <nathan@codesourcery.com>
2 Julian Brown <julian@codesourcery.com>
3
4 * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
5 %<code>[zy] into %[zy]<code>. Expand meaning of %<bitfield>['`?].
6 Add unified load/store instruction names.
7 (neon_opcode_table): New.
8 (arm_opcodes): Expand meaning of %<bitfield>['`?].
9 (arm_decode_bitfield): New.
10 (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
11 Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
12 (print_insn_neon): New.
13 (print_insn_arm): Adjust print_insn_coprocessor call. Call
14 print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
15 (print_insn_thumb32): Likewise.
16
17 2006-04-19 Alan Modra <amodra@bigpond.net.au>
18
19 * Makefile.am: Run "make dep-am".
20 * Makefile.in: Regenerate.
21
22 2006-04-19 Alan Modra <amodra@bigpond.net.au>
23
24 * avr-dis.c (avr_operand): Warning fix.
25
26 * configure: Regenerate.
27
28 2006-04-16 Daniel Jacobowitz <dan@codesourcery.com>
29
30 * po/POTFILES.in: Regenerated.
31
32 2006-04-12 Hochstein <hochstein@algo.informatik.tu-darmstadt.de>
33
34 PR binutils/2454
35 * avr-dis.c (avr_operand): Arrange for a comment to appear before
36 the symolic form of an address, so that the output of objdump -d
37 can be reassembled.
38
39 2006-04-10 DJ Delorie <dj@redhat.com>
40
41 * m32c-asm.c: Regenerate.
42
43 2006-04-06 Carlos O'Donell <carlos@codesourcery.com>
44
45 * Makefile.am: Add install-html target.
46 * Makefile.in: Regenerate.
47
48 2006-04-06 Nick Clifton <nickc@redhat.com>
49
50 * po/vi/po: Updated Vietnamese translation.
51
52 2006-03-31 Paul Koning <ni1d@arrl.net>
53
54 * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
55
56 2006-03-16 Bernd Schmidt <bernd.schmidt@analog.com>
57
58 * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
59 logic to identify halfword shifts.
60
61 2006-03-16 Paul Brook <paul@codesourcery.com>
62
63 * arm-dis.c (arm_opcodes): Rename swi to svc.
64 (thumb_opcodes): Ditto.
65
66 2006-03-13 DJ Delorie <dj@redhat.com>
67
68 * m32c-asm.c: Regenerate.
69 * m32c-desc.c: Likewise.
70 * m32c-desc.h: Likewise.
71 * m32c-dis.c: Likewise.
72 * m32c-ibld.c: Likewise.
73 * m32c-opc.c: Likewise.
74 * m32c-opc.h: Likewise.
75
76 2006-03-10 DJ Delorie <dj@redhat.com>
77
78 * m32c-desc.c: Regenerate with mul.l, mulu.l.
79 * m32c-opc.c: Likewise.
80 * m32c-opc.h: Likewise.
81
82
83 2006-03-09 Nick Clifton <nickc@redhat.com>
84
85 * po/sv.po: Updated Swedish translation.
86
87 2006-03-07 H.J. Lu <hongjiu.lu@intel.com>
88
89 PR binutils/2428
90 * i386-dis.c (REP_Fixup): New function.
91 (AL): Remove duplicate.
92 (Xbr): New.
93 (Xvr): Likewise.
94 (Ybr): Likewise.
95 (Yvr): Likewise.
96 (indirDXr): Likewise.
97 (ALr): Likewise.
98 (eAXr): Likewise.
99 (dis386): Updated entries of ins, outs, movs, lods and stos.
100
101 2006-03-05 Nick Clifton <nickc@redhat.com>
102
103 * cgen-ibld.in (insert_normal): Cope with attempts to insert a
104 signed 32-bit value into an unsigned 32-bit field when the host is
105 a 64-bit machine.
106 * fr30-ibld.c: Regenerate.
107 * frv-ibld.c: Regenerate.
108 * ip2k-ibld.c: Regenerate.
109 * iq2000-asm.c: Regenerate.
110 * iq2000-ibld.c: Regenerate.
111 * m32c-ibld.c: Regenerate.
112 * m32r-ibld.c: Regenerate.
113 * openrisc-ibld.c: Regenerate.
114 * xc16x-ibld.c: Regenerate.
115 * xstormy16-ibld.c: Regenerate.
116
117 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
118
119 * xc16x-asm.c: Regenerate.
120 * xc16x-dis.c: Regenerate.
121
122 2006-02-27 Carlos O'Donell <carlos@codesourcery.com>
123
124 * po/Make-in: Add html target.
125
126 2006-02-27 H.J. Lu <hongjiu.lu@intel.com>
127
128 * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
129 Intel Merom New Instructions.
130 (THREE_BYTE_0): Likewise.
131 (THREE_BYTE_1): Likewise.
132 (three_byte_table): Likewise.
133 (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
134 THREE_BYTE_1 for entry 0x3a.
135 (twobyte_has_modrm): Updated.
136 (twobyte_uses_SSE_prefix): Likewise.
137 (print_insn): Handle 3-byte opcodes used by Intel Merom New
138 Instructions.
139
140 2006-02-24 David S. Miller <davem@sunset.davemloft.net>
141
142 * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
143 (v9_hpriv_reg_names): New table.
144 (print_insn_sparc): Allow values up to 16 for '?' and '!'.
145 New cases '$' and '%' for read/write hyperprivileged register.
146 * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
147 window handling and rdhpr/wrhpr instructions.
148
149 2006-02-24 DJ Delorie <dj@redhat.com>
150
151 * m32c-desc.c: Regenerate with linker relaxation attributes.
152 * m32c-desc.h: Likewise.
153 * m32c-dis.c: Likewise.
154 * m32c-opc.c: Likewise.
155
156 2006-02-24 Paul Brook <paul@codesourcery.com>
157
158 * arm-dis.c (arm_opcodes): Add V7 instructions.
159 (thumb32_opcodes): Ditto. Handle V7M MSR/MRS variants.
160 (print_arm_address): New function.
161 (print_insn_arm): Use it. Add 'P' and 'U' cases.
162 (psr_name): New function.
163 (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
164
165 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
166
167 * ia64-opc-i.c (bXc): New.
168 (mXc): Likewise.
169 (OpX2TaTbYaXcC): Likewise.
170 (TF). Likewise.
171 (TFCM). Likewise.
172 (ia64_opcodes_i): Add instructions for tf.
173
174 * ia64-opc.h (IMMU5b): New.
175
176 * ia64-asmtab.c: Regenerated.
177
178 2006-02-23 H.J. Lu <hongjiu.lu@intel.com>
179
180 * ia64-gen.c: Update copyright years.
181 * ia64-opc-b.c: Likewise.
182
183 2006-02-22 H.J. Lu <hongjiu.lu@intel.com>
184
185 * ia64-gen.c (lookup_regindex): Handle ".vm".
186 (print_dependency_table): Handle '\"'.
187
188 * ia64-ic.tbl: Updated from SDM 2.2.
189 * ia64-raw.tbl: Likewise.
190 * ia64-waw.tbl: Likewise.
191 * ia64-asmtab.c: Regenerated.
192
193 * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
194
195 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
196 Anil Paranjape <anilp1@kpitcummins.com>
197 Shilin Shakti <shilins@kpitcummins.com>
198
199 * xc16x-desc.h: New file
200 * xc16x-desc.c: New file
201 * xc16x-opc.h: New file
202 * xc16x-opc.c: New file
203 * xc16x-ibld.c: New file
204 * xc16x-asm.c: New file
205 * xc16x-dis.c: New file
206 * Makefile.am: Entries for xc16x
207 * Makefile.in: Regenerate
208 * cofigure.in: Add xc16x target information.
209 * configure: Regenerate.
210 * disassemble.c: Add xc16x target information.
211
212 2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
213
214 * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
215 moves.
216
217 2006-02-11 H.J. Lu <hongjiu.lu@intel.com>
218
219 * i386-dis.c ('Z'): Add a new macro.
220 (dis386_twobyte): Use "movZ" for control register moves.
221
222 2006-02-10 Nick Clifton <nickc@redhat.com>
223
224 * iq2000-asm.c: Regenerate.
225
226 2006-02-07 Nathan Sidwell <nathan@codesourcery.com>
227
228 * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
229
230 2006-01-26 David Ung <davidu@mips.com>
231
232 * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
233 ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
234 floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
235 nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
236 rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
237
238 2006-01-18 Arnold Metselaar <arnoldm@sourceware.org>
239
240 * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
241 ld_d_r, pref_xd_cb): Use signed char to hold data to be
242 disassembled.
243 * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
244 buffer overflows when disassembling instructions like
245 ld (ix+123),0x23
246 * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
247 operand, if the offset is negative.
248
249 2006-01-17 Arnold Metselaar <arnoldm@sourceware.org>
250
251 * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
252 unsigned char to hold data to be disassembled.
253
254 2006-01-17 Andreas Schwab <schwab@suse.de>
255
256 PR binutils/1486
257 * disassemble.c (disassemble_init_for_target): Set
258 disassembler_needs_relocs for bfd_arch_arm.
259
260 2006-01-16 Paul Brook <paul@codesourcery.com>
261
262 * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
263 f?add?, and f?sub? instructions.
264
265 2006-01-16 Nick Clifton <nickc@redhat.com>
266
267 * po/zh_CN.po: New Chinese (simplified) translation.
268 * configure.in (ALL_LINGUAS): Add "zh_CH".
269 * configure: Regenerate.
270
271 2006-01-05 Paul Brook <paul@codesourcery.com>
272
273 * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
274
275 2006-01-06 DJ Delorie <dj@redhat.com>
276
277 * m32c-desc.c: Regenerate.
278 * m32c-opc.c: Regenerate.
279 * m32c-opc.h: Regenerate.
280
281 2006-01-03 DJ Delorie <dj@redhat.com>
282
283 * cgen-ibld.in (extract_normal): Avoid memory range errors.
284 * m32c-ibld.c: Regenerated.
285
286 For older changes see ChangeLog-2005
287 \f
288 Local Variables:
289 mode: change-log
290 left-margin: 8
291 fill-column: 74
292 version-control: never
293 End:
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