opcodes/ChangeLog

   1 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         AVX Programming Reference (June, 2010)
   4         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
   5         * i386-opc.tbl: Likewise.
   6         * i386-tbl.h: Regenerated.
   7
   8 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
   9
  10         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
  11
  12 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
  13
  14         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
  15         ppc_cpu_t before inverting.
  16         (ppc_parse_cpu): Likewise.
  17         (print_insn_powerpc): Likewise.
  18
  19 2010-07-03  Alan Modra  <amodra@gmail.com>
  20
  21         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
  22         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
  23         (PPC64, MFDEC2): Update.
  24         (NON32, NO371): Define.
  25         (powerpc_opcode): Update to not use old opcode flags, and avoid
  26         -m601 duplicates.
  27
  28 2010-07-03  DJ Delorie  <dj@delorie.com>
  29
  30         * m32c-ibld.c: Regenerate.
  31
  32 2010-07-03  Alan Modra  <amodra@gmail.com>
  33
  34         * ppc-opc.c (PWR2COM): Define.
  35         (PPCPWR2): Add PPC_OPCODE_COMMON.
  36         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
  37         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
  38         "rac" from -mcom.
  39
  40 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
  41
  42         AVX Programming Reference (June, 2010)
  43         * i386-dis.c (PREFIX_0FAE_REG_0): New.
  44         (PREFIX_0FAE_REG_1): Likewise.
  45         (PREFIX_0FAE_REG_2): Likewise.
  46         (PREFIX_0FAE_REG_3): Likewise.
  47         (PREFIX_VEX_3813): Likewise.
  48         (PREFIX_VEX_3A1D): Likewise.
  49         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
  50         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
  51         PREFIX_VEX_3A1D.
  52         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
  53         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
  54         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
  55
  56         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
  57         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
  58         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
  59
  60         * i386-opc.h (CpuXsaveopt): New.
  61         (CpuFSGSBase): Likewise.
  62         (CpuRdRnd): Likewise.
  63         (CpuF16C): Likewise.
  64         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
  65         cpuf16c.
  66
  67         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
  68         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
  69         * i386-init.h: Regenerated.
  70         * i386-tbl.h: Likewise.
  71
  72 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
  73
  74         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
  75         and mtocrf on EFS.
  76
  77 2010-06-29  Alan Modra  <amodra@gmail.com>
  78
  79         * maxq-dis.c: Delete file.
  80         * Makefile.am: Remove references to maxq.
  81         * configure.in: Likewise.
  82         * disassemble.c: Likewise.
  83         * Makefile.in: Regenerate.
  84         * configure: Regenerate.
  85         * po/POTFILES.in: Regenerate.
  86
  87 2010-06-29  Alan Modra  <amodra@gmail.com>
  88
  89         * mep-dis.c: Regenerate.
  90
  91 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  92
  93         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
  94
  95 2010-06-27  Alan Modra  <amodra@gmail.com>
  96
  97         * arc-dis.c (arc_sprintf): Delete set but unused variables.
  98         (decodeInstr): Likewise.
  99         * dlx-dis.c (print_insn_dlx): Likewise.
 100         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 101         * maxq-dis.c (check_move, print_insn): Likewise.
 102         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 103         * msp430-dis.c (msp430_branchinstr): Likewise.
 104         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 105         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 106         * sparc-dis.c (print_insn_sparc): Likewise.
 107         * fr30-asm.c: Regenerate.
 108         * frv-asm.c: Regenerate.
 109         * ip2k-asm.c: Regenerate.
 110         * iq2000-asm.c: Regenerate.
 111         * lm32-asm.c: Regenerate.
 112         * m32c-asm.c: Regenerate.
 113         * m32r-asm.c: Regenerate.
 114         * mep-asm.c: Regenerate.
 115         * mt-asm.c: Regenerate.
 116         * openrisc-asm.c: Regenerate.
 117         * xc16x-asm.c: Regenerate.
 118         * xstormy16-asm.c: Regenerate.
 119
 120 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 121
 122         PR gas/11673
 123         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 124
 125 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 126
 127         PR binutils/11676
 128         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 129
 130 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 131
 132         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 133         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 134         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 135         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 136         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 137         Treat lwsync as msync on e500.
 138
 139 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 140
 141         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 142
 143 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 144
 145         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 146         constants is the same on 32-bit and 64-bit hosts.
 147
 148 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 149
 150         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 151         .short directives so that they can be reassembled.
 152
 153 2010-05-26  Catherine Moore <clm@codesourcery.com>
 154             David Ung  <davidu@mips.com>
 155
 156         * mips-opc.c: Change membership to I1 for instructions ssnop and
 157         ehb.
 158
 159 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 160
 161         * i386-dis.c (sib): New.
 162         (get_sib): Likewise.
 163         (print_insn): Call get_sib.
 164         OP_E_memory): Use sib.
 165
 166 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 167
 168         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 169         * mips-opc.c (I16): Remove.
 170         (mips_builtin_op): Reclassify jalx.
 171
 172 2010-05-19  Alan Modra  <amodra@gmail.com>
 173
 174         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 175         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 176
 177 2010-05-13  Alan Modra  <amodra@gmail.com>
 178
 179         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 180
 181 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 182
 183         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 184         format.
 185         (print_insn_thumb16): Add support for new %W format.
 186
 187 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 188
 189         * Makefile.in: Regenerate with automake 1.11.1.
 190         * aclocal.m4: Ditto.
 191
 192 2010-05-05  Nick Clifton  <nickc@redhat.com>
 193
 194         * po/es.po: Updated Spanish translation.
 195
 196 2010-04-22  Nick Clifton  <nickc@redhat.com>
 197
 198         * po/opcodes.pot: Updated by the Translation project.
 199         * po/vi.po: Updated Vietnamese translation.
 200
 201 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 202
 203         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 204         bits in opcode.
 205
 206 2010-04-09  Nick Clifton  <nickc@redhat.com>
 207
 208         * i386-dis.c (print_insn): Remove unused variable op.
 209         (OP_sI): Remove unused variable mask.
 210
 211 2010-04-07  Alan Modra  <amodra@gmail.com>
 212
 213         * configure: Regenerate.
 214
 215 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 216
 217         * ppc-opc.c (RBOPT): New define.
 218         ("dccci"): Enable for PPCA2.  Make operands optional.
 219         ("iccci"): Likewise.  Do not deprecate for PPC476.
 220
 221 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 222
 223         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 224
 225 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 226
 227         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 228         * Makefile.in: Regenerate.
 229         * configure.in (bfd_tic6x_arch): New.
 230         * configure: Regenerate.
 231         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 232         (disassembler): Handle TI C6X.
 233         * tic6x-dis.c: New.
 234
 235 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 236
 237         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 238
 239 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 240
 241         * dis-buf.c (buffer_read_memory): Give error for reading just
 242         before the start of memory.
 243
 244 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 245             Quentin Neill <quentin.neill@amd.com>
 246
 247         * i386-dis.c (OP_LWP_I): Removed.
 248         (reg_table): Do not use OP_LWP_I, use Iq.
 249         (OP_LWPCB_E): Remove use of names16.
 250         (OP_LWP_E): Same.
 251         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 252         should not set the Vex.length bit.
 253         * i386-tbl.h: Regenerated.
 254
 255 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 256
 257         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 258
 259 2010-02-24  Nick Clifton  <nickc@redhat.com>
 260
 261         PR binutils/6773
 262         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 263         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 264         (thumb32_opcodes): Likewise.
 265
 266 2010-02-15  Nick Clifton  <nickc@redhat.com>
 267
 268         * po/vi.po: Updated Vietnamese translation.
 269
 270 2010-02-12  Doug Evans  <dje@sebabeach.org>
 271
 272         * lm32-opinst.c: Regenerate.
 273
 274 2010-02-11  Doug Evans  <dje@sebabeach.org>
 275
 276         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 277         (print_address): Delete CGEN_PRINT_ADDRESS.
 278         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 279         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 280         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 281         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 282
 283         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 284         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 285         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 286         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 287         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 288         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 289         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 290         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 291         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 292         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 293         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 294         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 295
 296 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 297
 298         * i386-dis.c: Update copyright.
 299         * i386-gen.c: Likewise.
 300         * i386-opc.h: Likewise.
 301         * i386-opc.tbl: Likewise.
 302
 303 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 304             Sebastian Pop  <sebastian.pop@amd.com>
 305
 306         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 307         function to handle 5th imm8 operand.
 308         (PREFIX_VEX_3A48): Added.
 309         (PREFIX_VEX_3A49): Added.
 310         (VEX_W_3A48_P_2): Added.
 311         (VEX_W_3A49_P_2): Added.
 312         (prefix table): Added entries for PREFIX_VEX_3A48
 313         and PREFIX_VEX_3A49.
 314         (vex table): Added entries for VEX_W_3A48_P_2 and
 315         and VEX_W_3A49_P_2.
 316         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 317         for Vec_Imm4 operands.
 318         * i386-opc.h (enum): Added Vec_Imm4.
 319         (i386_operand_type): Added vec_imm4.
 320         * i386-opc.tbl: Add entries for vpermilp[ds].
 321         * i386-init.h: Regenerated.
 322         * i386-tbl.h: Regenerated.
 323
 324 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 325
 326         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 327         and "pwr7".  Move "a2" into alphabetical order.
 328
 329 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 330
 331         * ppc-dis.c (ppc_opts): Add titan entry.
 332         * ppc-opc.c (TITAN, MULHW): Define.
 333         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 334
 335 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 336
 337         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 338         to CPU_BDVER1_FLAGS
 339         * i386-init.h: Regenerated.
 340
 341 2010-02-03  Anthony Green  <green@moxielogic.com>
 342
 343         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 344         0x0f, and make 0x00 an illegal instruction.
 345
 346 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 347
 348         * opcodes/arm-dis.c (struct arm_private_data): New.
 349         (print_insn_coprocessor, print_insn_arm): Update to use struct
 350         arm_private_data.
 351         (is_mapping_symbol, get_map_sym_type): New functions.
 352         (get_sym_code_type): Check the symbol's section.  Do not check
 353         mapping symbols.
 354         (print_insn): Default to disassembling ARM mode code.  Check
 355         for mapping symbols separately from other symbols.  Use
 356         struct arm_private_data.
 357
 358 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 359
 360         * i386-dis.c (EXVexWdqScalar): New.
 361         (vex_scalar_w_dq_mode): Likewise.
 362         (prefix_table): Update entries for PREFIX_VEX_3899,
 363         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 364         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 365         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 366         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 367         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 368         (OP_EX): Likewise.
 369
 370 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 371
 372         * i386-dis.c (XMScalar): New.
 373         (EXdScalar): Likewise.
 374         (EXqScalar): Likewise.
 375         (EXqScalarS): Likewise.
 376         (VexScalar): Likewise.
 377         (EXdVexScalarS): Likewise.
 378         (EXqVexScalarS): Likewise.
 379         (XMVexScalar): Likewise.
 380         (scalar_mode): Likewise.
 381         (d_scalar_mode): Likewise.
 382         (d_scalar_swap_mode): Likewise.
 383         (q_scalar_mode): Likewise.
 384         (q_scalar_swap_mode): Likewise.
 385         (vex_scalar_mode): Likewise.
 386         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 387         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 388         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 389         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 390         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 391         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 392         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 393         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 394         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 395         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 396         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 397         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 398         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 399         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 400         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 401         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 402         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 403         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 404         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 405         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 406         q_scalar_mode, q_scalar_swap_mode.
 407         (OP_XMM): Handle scalar_mode.
 408         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 409         and q_scalar_swap_mode.
 410         (OP_VEX): Handle vex_scalar_mode.
 411
 412 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 413
 414         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 415
 416 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 417
 418         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 419
 420 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 421
 422         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 423
 424 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 425
 426         * i386-dis.c (Bad_Opcode): New.
 427         (bad_opcode): Likewise.
 428         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 429         (dis386_twobyte): Likewise.
 430         (reg_table): Likewise.
 431         (prefix_table): Likewise.
 432         (x86_64_table): Likewise.
 433         (vex_len_table): Likewise.
 434         (vex_w_table): Likewise.
 435         (mod_table): Likewise.
 436         (rm_table): Likewise.
 437         (float_reg): Likewise.
 438         (reg_table): Remove trailing "(bad)" entries.
 439         (prefix_table): Likewise.
 440         (x86_64_table): Likewise.
 441         (vex_len_table): Likewise.
 442         (vex_w_table): Likewise.
 443         (mod_table): Likewise.
 444         (rm_table): Likewise.
 445         (get_valid_dis386): Handle bytemode 0.
 446
 447 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 448
 449         * i386-opc.h (VEXScalar): New.
 450
 451         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 452         instructions.
 453         * i386-tbl.h: Regenerated.
 454
 455 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 456
 457         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 458
 459         * i386-opc.tbl: Add xsave64 and xrstor64.
 460         * i386-tbl.h: Regenerated.
 461
 462 2010-01-20  Nick Clifton  <nickc@redhat.com>
 463
 464         PR 11170
 465         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 466         based post-indexed addressing.
 467
 468 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 469
 470         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 471         * i386-tbl.h: Regenerated.
 472
 473 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 474
 475         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 476         comments.
 477
 478 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 479
 480         * i386-dis.c (names_mm): New.
 481         (intel_names_mm): Likewise.
 482         (att_names_mm): Likewise.
 483         (names_xmm): Likewise.
 484         (intel_names_xmm): Likewise.
 485         (att_names_xmm): Likewise.
 486         (names_ymm): Likewise.
 487         (intel_names_ymm): Likewise.
 488         (att_names_ymm): Likewise.
 489         (print_insn): Set names_mm, names_xmm and names_ymm.
 490         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 491         (OP_XMM): Likewise.
 492         (OP_EM): Likewise.
 493         (OP_EMC): Likewise.
 494         (OP_MXC): Likewise.
 495         (OP_EX): Likewise.
 496         (XMM_Fixup): Likewise.
 497         (OP_VEX): Likewise.
 498         (OP_EX_VexReg): Likewise.
 499         (OP_Vex_2src): Likewise.
 500         (OP_Vex_2src_1): Likewise.
 501         (OP_Vex_2src_2): Likewise.
 502         (OP_REG_VexI4): Likewise.
 503
 504 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 505
 506         * i386-dis.c (print_insn): Update comments.
 507
 508 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 509
 510         * i386-dis.c (rex_original): Removed.
 511         (ckprefix): Remove rex_original.
 512         (print_insn): Update comments.
 513
 514 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 515
 516         * Makefile.in: Regenerate.
 517         * configure: Regenerate.
 518
 519 2010-01-07  Doug Evans  <dje@sebabeach.org>
 520
 521         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 522         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 523         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 524         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 525         * xstormy16-ibld.c: Regenerate.
 526
 527 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 528
 529         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 530         * i386-init.h: Regenerated.
 531
 532 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 533
 534         * arm-dis.c (print_insn): Fixed search for next symbol and data
 535         dumping condition, and the initial mapping symbol state.
 536
 537 2010-01-05  Doug Evans  <dje@sebabeach.org>
 538
 539         * cgen-ibld.in: #include "cgen/basic-modes.h".
 540         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 541         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 542         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 543         * xstormy16-ibld.c: Regenerate.
 544
 545 2010-01-04  Nick Clifton  <nickc@redhat.com>
 546
 547         PR 11123
 548         * arm-dis.c (print_insn_coprocessor): Initialise value.
 549
 550 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 551
 552         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 553
 554 2010-01-02  Doug Evans  <dje@sebabeach.org>
 555
 556         * cgen-asm.in: Update copyright year.
 557         * cgen-dis.in: Update copyright year.
 558         * cgen-ibld.in: Update copyright year.
 559         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 560         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 561         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 562         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 563         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 564         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 565         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 566         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 567         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 568         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 569         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 570         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 571         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 572         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 573         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 574         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 575         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 576         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 577         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 578         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 579         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 580
 581 For older changes see ChangeLog-2009
 582 \f
 583 Local Variables:
 584 mode: change-log
 585 left-margin: 8
 586 fill-column: 74
 587 version-control: never
 588 End: