opcodes/ChangeLog

   1 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
   2
   3         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
   4         * Makefile.in: Regenerate.
   5         * configure.in (bfd_tic6x_arch): New.
   6         * configure: Regenerate.
   7         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
   8         (disassembler): Handle TI C6X.
   9         * tic6x-dis.c: New.
  10
  11 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
  12
  13         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
  14
  15 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
  16
  17         * dis-buf.c (buffer_read_memory): Give error for reading just
  18         before the start of memory.
  19
  20 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
  21             Quentin Neill <quentin.neill@amd.com>
  22
  23         * i386-dis.c (OP_LWP_I): Removed.
  24         (reg_table): Do not use OP_LWP_I, use Iq.
  25         (OP_LWPCB_E): Remove use of names16.
  26         (OP_LWP_E): Same.
  27         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
  28         should not set the Vex.length bit.
  29         * i386-tbl.h: Regenerated.
  30
  31 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
  32
  33         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
  34
  35 2010-02-24  Nick Clifton  <nickc@redhat.com>
  36
  37         PR binutils/6773
  38         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
  39         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
  40         (thumb32_opcodes): Likewise.
  41
  42 2010-02-15  Nick Clifton  <nickc@redhat.com>
  43
  44         * po/vi.po: Updated Vietnamese translation.
  45
  46 2010-02-12  Doug Evans  <dje@sebabeach.org>
  47
  48         * lm32-opinst.c: Regenerate.
  49
  50 2010-02-11  Doug Evans  <dje@sebabeach.org>
  51
  52         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
  53         (print_address): Delete CGEN_PRINT_ADDRESS.
  54         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
  55         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
  56         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
  57         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
  58
  59         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
  60         * frv-desc.c, * frv-desc.h, * frv-opc.c,
  61         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
  62         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
  63         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
  64         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
  65         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
  66         * mep-desc.c, * mep-desc.h, * mep-opc.c,
  67         * mt-desc.c, * mt-desc.h, * mt-opc.c,
  68         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
  69         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
  70         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
  71
  72 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
  73
  74         * i386-dis.c: Update copyright.
  75         * i386-gen.c: Likewise.
  76         * i386-opc.h: Likewise.
  77         * i386-opc.tbl: Likewise.
  78
  79 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
  80             Sebastian Pop  <sebastian.pop@amd.com>
  81
  82         * i386-dis.c (OP_EX_VexImmW): Reintroduced
  83         function to handle 5th imm8 operand.
  84         (PREFIX_VEX_3A48): Added.
  85         (PREFIX_VEX_3A49): Added.
  86         (VEX_W_3A48_P_2): Added.
  87         (VEX_W_3A49_P_2): Added.
  88         (prefix table): Added entries for PREFIX_VEX_3A48
  89         and PREFIX_VEX_3A49.
  90         (vex table): Added entries for VEX_W_3A48_P_2 and
  91         and VEX_W_3A49_P_2.
  92         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
  93         for Vec_Imm4 operands.
  94         * i386-opc.h (enum): Added Vec_Imm4.
  95         (i386_operand_type): Added vec_imm4.
  96         * i386-opc.tbl: Add entries for vpermilp[ds].
  97         * i386-init.h: Regenerated.
  98         * i386-tbl.h: Regenerated.
  99
 100 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 101
 102         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 103         and "pwr7".  Move "a2" into alphabetical order.
 104
 105 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 106
 107         * ppc-dis.c (ppc_opts): Add titan entry.
 108         * ppc-opc.c (TITAN, MULHW): Define.
 109         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 110
 111 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 112
 113         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 114         to CPU_BDVER1_FLAGS
 115         * i386-init.h: Regenerated.
 116
 117 2010-02-03  Anthony Green  <green@moxielogic.com>
 118
 119         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 120         0x0f, and make 0x00 an illegal instruction.
 121
 122 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 123
 124         * opcodes/arm-dis.c (struct arm_private_data): New.
 125         (print_insn_coprocessor, print_insn_arm): Update to use struct
 126         arm_private_data.
 127         (is_mapping_symbol, get_map_sym_type): New functions.
 128         (get_sym_code_type): Check the symbol's section.  Do not check
 129         mapping symbols.
 130         (print_insn): Default to disassembling ARM mode code.  Check
 131         for mapping symbols separately from other symbols.  Use
 132         struct arm_private_data.
 133
 134 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 135
 136         * i386-dis.c (EXVexWdqScalar): New.
 137         (vex_scalar_w_dq_mode): Likewise.
 138         (prefix_table): Update entries for PREFIX_VEX_3899,
 139         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 140         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 141         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 142         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 143         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 144         (OP_EX): Likewise.
 145
 146 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 147
 148         * i386-dis.c (XMScalar): New.
 149         (EXdScalar): Likewise.
 150         (EXqScalar): Likewise.
 151         (EXqScalarS): Likewise.
 152         (VexScalar): Likewise.
 153         (EXdVexScalarS): Likewise.
 154         (EXqVexScalarS): Likewise.
 155         (XMVexScalar): Likewise.
 156         (scalar_mode): Likewise.
 157         (d_scalar_mode): Likewise.
 158         (d_scalar_swap_mode): Likewise.
 159         (q_scalar_mode): Likewise.
 160         (q_scalar_swap_mode): Likewise.
 161         (vex_scalar_mode): Likewise.
 162         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 163         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 164         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 165         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 166         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 167         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 168         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 169         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 170         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 171         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 172         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 173         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 174         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 175         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 176         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 177         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 178         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 179         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 180         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 181         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 182         q_scalar_mode, q_scalar_swap_mode.
 183         (OP_XMM): Handle scalar_mode.
 184         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 185         and q_scalar_swap_mode.
 186         (OP_VEX): Handle vex_scalar_mode.
 187
 188 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 189
 190         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 191
 192 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 193
 194         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 195
 196 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 197
 198         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 199
 200 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 201
 202         * i386-dis.c (Bad_Opcode): New.
 203         (bad_opcode): Likewise.
 204         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 205         (dis386_twobyte): Likewise.
 206         (reg_table): Likewise.
 207         (prefix_table): Likewise.
 208         (x86_64_table): Likewise.
 209         (vex_len_table): Likewise.
 210         (vex_w_table): Likewise.
 211         (mod_table): Likewise.
 212         (rm_table): Likewise.
 213         (float_reg): Likewise.
 214         (reg_table): Remove trailing "(bad)" entries.
 215         (prefix_table): Likewise.
 216         (x86_64_table): Likewise.
 217         (vex_len_table): Likewise.
 218         (vex_w_table): Likewise.
 219         (mod_table): Likewise.
 220         (rm_table): Likewise.
 221         (get_valid_dis386): Handle bytemode 0.
 222
 223 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 224
 225         * i386-opc.h (VEXScalar): New.
 226
 227         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 228         instructions.
 229         * i386-tbl.h: Regenerated.
 230
 231 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 232
 233         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 234
 235         * i386-opc.tbl: Add xsave64 and xrstor64.
 236         * i386-tbl.h: Regenerated.
 237
 238 2010-01-20  Nick Clifton  <nickc@redhat.com>
 239
 240         PR 11170
 241         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 242         based post-indexed addressing.
 243
 244 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 245
 246         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 247         * i386-tbl.h: Regenerated.
 248
 249 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 250
 251         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 252         comments.
 253
 254 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 255
 256         * i386-dis.c (names_mm): New.
 257         (intel_names_mm): Likewise.
 258         (att_names_mm): Likewise.
 259         (names_xmm): Likewise.
 260         (intel_names_xmm): Likewise.
 261         (att_names_xmm): Likewise.
 262         (names_ymm): Likewise.
 263         (intel_names_ymm): Likewise.
 264         (att_names_ymm): Likewise.
 265         (print_insn): Set names_mm, names_xmm and names_ymm.
 266         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 267         (OP_XMM): Likewise.
 268         (OP_EM): Likewise.
 269         (OP_EMC): Likewise.
 270         (OP_MXC): Likewise.
 271         (OP_EX): Likewise.
 272         (XMM_Fixup): Likewise.
 273         (OP_VEX): Likewise.
 274         (OP_EX_VexReg): Likewise.
 275         (OP_Vex_2src): Likewise.
 276         (OP_Vex_2src_1): Likewise.
 277         (OP_Vex_2src_2): Likewise.
 278         (OP_REG_VexI4): Likewise.
 279
 280 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 281
 282         * i386-dis.c (print_insn): Update comments.
 283
 284 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 285
 286         * i386-dis.c (rex_original): Removed.
 287         (ckprefix): Remove rex_original.
 288         (print_insn): Update comments.
 289
 290 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 291
 292         * Makefile.in: Regenerate.
 293         * configure: Regenerate.
 294
 295 2010-01-07  Doug Evans  <dje@sebabeach.org>
 296
 297         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 298         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 299         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 300         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 301         * xstormy16-ibld.c: Regenerate.
 302
 303 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 304
 305         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 306         * i386-init.h: Regenerated.
 307
 308 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 309
 310         * arm-dis.c (print_insn): Fixed search for next symbol and data
 311         dumping condition, and the initial mapping symbol state.
 312
 313 2010-01-05  Doug Evans  <dje@sebabeach.org>
 314
 315         * cgen-ibld.in: #include "cgen/basic-modes.h".
 316         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 317         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 318         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 319         * xstormy16-ibld.c: Regenerate.
 320
 321 2010-01-04  Nick Clifton  <nickc@redhat.com>
 322
 323         PR 11123
 324         * arm-dis.c (print_insn_coprocessor): Initialise value.
 325
 326 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 327
 328         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 329
 330 2010-01-02  Doug Evans  <dje@sebabeach.org>
 331
 332         * cgen-asm.in: Update copyright year.
 333         * cgen-dis.in: Update copyright year.
 334         * cgen-ibld.in: Update copyright year.
 335         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 336         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 337         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 338         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 339         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 340         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 341         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 342         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 343         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 344         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 345         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 346         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 347         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 348         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 349         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 350         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 351         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 352         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 353         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 354         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 355         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 356
 357 For older changes see ChangeLog-2009
 358 \f
 359 Local Variables:
 360 mode: change-log
 361 left-margin: 8
 362 fill-column: 74
 363 version-control: never
 364 End: