opcodes/ChangeLog

   1 2005-06-16  David Ung  <davidu@mips.com>
   2
   3         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
   4         instructions to the table; seb/seh/sew/zeb/zeh/zew.
   5
   6 2005-06-15  Dave Brolley  <brolley@redhat.com>
   7
   8         Contribute Morpho ms1 on behalf of Red Hat
   9         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
  10         ms1-opc.h: New files, Morpho ms1 target.
  11
  12         2004-05-14  Stan Cox  <scox@redhat.com>
  13
  14         * disassemble.c (ARCH_ms1): Define.
  15         (disassembler): Handle bfd_arch_ms1
  16
  17         2004-05-13  Michael Snyder  <msnyder@redhat.com>
  18
  19         * Makefile.am, Makefile.in: Add ms1 target.
  20         * configure.in: Ditto.
  21
  22 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
  23
  24         * arm-opc.h: Delete; fold contents into ...
  25         * arm-dis.c: ... here.  Move includes of internal COFF headers
  26         next to includes of internal ELF headers.
  27         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
  28         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
  29         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
  30         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
  31         (iwmmxt_wwnames, iwmmxt_wwssnames):
  32         Make const.
  33         (regnames): Remove iWMMXt coprocessor register sets.
  34         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
  35         (get_arm_regnames): Adjust fourth argument to match above changes.
  36         (set_iwmmxt_regnames): Delete.
  37         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
  38         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
  39         and iwmmxt_cregnames, not set_iwmmxt_regnames.
  40         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
  41         ISO syntax for function pointer calls.
  42
  43 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
  44
  45         * arm-dis.c: Split up the comments describing the format codes, so
  46         that the ARM and 16-bit Thumb opcode tables each have comments
  47         preceding them that describe all the codes, and only the codes,
  48         valid in those tables.  (32-bit Thumb table is already like this.)
  49         Reorder the lists in all three comments to match the order in
  50         which the codes are implemented.
  51         Remove all forward declarations of static functions.  Convert all
  52         function definitions to ISO C format.
  53         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
  54         Return nothing.
  55         (print_insn_thumb16): Remove unused case 'I'.
  56         (print_insn): Update for changed calling convention of subroutines.
  57
  58 2005-05-25  Jan Beulich  <jbeulich@novell.com>
  59
  60         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
  61         hex (but retain it being displayed as signed). Remove redundant
  62         checks. Add handling of displacements for 16-bit addressing in Intel
  63         mode.
  64
  65 2005-05-25  Jan Beulich  <jbeulich@novell.com>
  66
  67         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
  68         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
  69         masking of 'rm' in 16-bit memory address handling.
  70
  71 2005-05-19  Anton Blanchard  <anton@samba.org>
  72
  73         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
  74         (print_ppc_disassembler_options): Document it.
  75         * ppc-opc.c (SVC_LEV): Define.
  76         (LEV): Allow optional operand.
  77         (POWER5): Define.
  78         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
  79         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
  80
  81 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
  82
  83         * Makefile.in:  Regenerate.
  84
  85 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
  86
  87         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
  88         instructions.  Adjust disassembly of some opcodes to match
  89         unified syntax.
  90         (thumb32_opcodes): New table.
  91         (print_insn_thumb): Rename print_insn_thumb16; don't handle
  92         two-halfword branches here.
  93         (print_insn_thumb32): New function.
  94         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
  95         and print_insn_thumb32.  Be consistent about order of
  96         halfwords when printing 32-bit instructions.
  97
  98 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
  99
 100         PR 843
 101         * i386-dis.c (branch_v_mode): New.
 102         (indirEv): Use branch_v_mode instead of v_mode.
 103         (OP_E): Handle branch_v_mode.
 104
 105 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 106
 107         * d10v-dis.c (dis_2_short): Support 64bit host.
 108
 109 2005-05-07  Nick Clifton  <nickc@redhat.com>
 110
 111         * po/nl.po: Updated translation.
 112
 113 2005-05-07  Nick Clifton  <nickc@redhat.com>
 114
 115         * Update the address and phone number of the FSF organization in
 116         the GPL notices in the following files:
 117         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 118         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 119         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 120         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 121         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 122         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 123         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 124         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 125         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 126         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 127         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 128         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 129         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 130         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 131         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 132         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 133         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 134         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 135         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 136         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 137         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 138         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 139         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 140         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 141         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 142         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 143         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 144         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 145         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 146         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 147         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 148         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 149         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 150
 151 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 152
 153         * ia64-opc.c: Include sysdep.h before libiberty.h.
 154
 155 2005-05-05  Nick Clifton  <nickc@redhat.com>
 156
 157         * configure.in (ALL_LINGUAS): Add vi.
 158         * configure: Regenerate.
 159         * po/vi.po: New.
 160
 161 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 162
 163         * configure.in: Fix the check for basename declaration.
 164         * configure: Regenerate.
 165
 166 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 167
 168         * ppc-opc.c (RTO): Define.
 169         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 170         entries to suit PPC440.
 171
 172 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 173
 174         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 175         Add xcrypt-ctr.
 176
 177 2005-04-14  Nick Clifton  <nickc@redhat.com>
 178
 179         * po/fi.po: New translation: Finnish.
 180         * configure.in (ALL_LINGUAS): Add fi.
 181         * configure: Regenerate.
 182
 183 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 184
 185         * Makefile.am (NO_WERROR): Define.
 186         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 187         * Makefile.in: Regenerate.
 188         * aclocal.m4: Regenerate.
 189         * configure: Regenerate.
 190
 191 2005-04-04  Nick Clifton  <nickc@redhat.com>
 192
 193         * fr30-asm.c: Regenerate.
 194         * frv-asm.c: Regenerate.
 195         * iq2000-asm.c: Regenerate.
 196         * m32r-asm.c: Regenerate.
 197         * openrisc-asm.c: Regenerate.
 198
 199 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 200
 201         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 202         visible operands in Intel mode. The first operand of monitor is
 203         %rax in 64-bit mode.
 204
 205 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 206
 207         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 208         easier future additions.
 209
 210 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 211
 212         * configure.in: Check for basename.
 213         * configure: Regenerate.
 214         * config.in: Ditto.
 215
 216 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 217
 218         * i386-dis.c (SEG_Fixup): New.
 219         (Sv): New.
 220         (dis386): Use "Sv" for 0x8c and 0x8e.
 221
 222 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 223             Nick Clifton  <nickc@redhat.com>
 224
 225         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 226         function entry mask addresses.
 227         (entry_addr_occupied_slots): New variable: The number of occupied
 228         elements in entry_addr.
 229         (entry_addr_total_slots): New variable: The total number of
 230         elements in entry_addr.
 231         (parse_disassembler_options): New function.  Fills in the entry_addr
 232         array.
 233         (free_entry_array): New function.  Release the memory used by the
 234         entry addr array.  Suppressed because there is no way to call it.
 235         (is_function_entry): Check if a given address is a function's
 236         start address by looking at supplied entry mask addresses and
 237         symbol information, if available.
 238         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 239
 240 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 241
 242         * cris-dis.c (print_with_operands): Use ~31L for long instead
 243         of ~31.
 244
 245 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 246
 247         * mmix-opc.c (O): Revert the last change.
 248         (Z): Likewise.
 249
 250 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 251
 252         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 253         (Z): Likewise.
 254
 255 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 256
 257         * mmix-opc.c (O, Z): Force expression as unsigned long.
 258
 259 2005-03-18  Nick Clifton  <nickc@redhat.com>
 260
 261         * ip2k-asm.c: Regenerate.
 262         * op/opcodes.pot: Regenerate.
 263
 264 2005-03-16  Nick Clifton  <nickc@redhat.com>
 265             Ben Elliston  <bje@au.ibm.com>
 266
 267         * configure.in (werror): New switch: Add -Werror to the
 268         compiler command line.  Enabled by default.  Disable via
 269         --disable-werror.
 270         * configure: Regenerate.
 271
 272 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 273
 274         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 275         BOOKE.
 276
 277 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 278
 279         * po/es.po: Commit new Spanish translation.
 280
 281         * po/fr.po: Commit new French translation.
 282
 283 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 284
 285         * vax-dis.c: Fix spelling error
 286         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 287         of just "Entry mask: < r1 ... >"
 288
 289 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 290
 291         * arm-dis.c (arm_opcodes): Document %E and %V.
 292         Add entries for v6T2 ARM instructions:
 293         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 294         (print_insn_arm): Add support for %E and %V.
 295         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 296
 297 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 298             Alan Modra  <amodra@bigpond.net.au>
 299
 300         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 301         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 302         (SPRG_MASK): Delete.
 303         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 304         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 305         mfsprg4..7 after msprg and consolidate.
 306
 307 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 308
 309         * vax-dis.c (entry_mask_bit): New array.
 310         (print_insn_vax): Decode function entry mask.
 311
 312 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 313
 314         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 315
 316 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 317
 318         * po/opcodes.pot: Regenerate.
 319
 320 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 321
 322         * arc-dis.c (a4_decoding_class): New enum.
 323         (dsmOneArcInst): Use the enum values for the decoding class.
 324         Remove redundant case in the switch for decodingClass value 11.
 325
 326 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 327
 328         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 329         accesses.
 330         (OP_C): Consider lock prefix in non-64-bit modes.
 331
 332 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 333
 334         * cris-dis.c (format_hex): Remove ineffective warning fix.
 335         * crx-dis.c (make_instruction): Warning fix.
 336         * frv-asm.c: Regenerate.
 337
 338 2005-02-23  Nick Clifton  <nickc@redhat.com>
 339
 340         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 341         read_memory.
 342
 343         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 344
 345         * crx-dis.c (make_instruction): Move argument structure into inner
 346         scope and ensure that all of its fields are initialised before
 347         they are used.
 348
 349         * fr30-asm.c: Regenerate.
 350         * fr30-dis.c: Regenerate.
 351         * frv-asm.c: Regenerate.
 352         * frv-dis.c: Regenerate.
 353         * ip2k-asm.c: Regenerate.
 354         * ip2k-dis.c: Regenerate.
 355         * iq2000-asm.c: Regenerate.
 356         * iq2000-dis.c: Regenerate.
 357         * m32r-asm.c: Regenerate.
 358         * m32r-dis.c: Regenerate.
 359         * openrisc-asm.c: Regenerate.
 360         * openrisc-dis.c: Regenerate.
 361         * xstormy16-asm.c: Regenerate.
 362         * xstormy16-dis.c: Regenerate.
 363
 364 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 365
 366         * arc-ext.c: Warning fixes.
 367         * arc-ext.h: Likewise.
 368         * cgen-opc.c: Likewise.
 369         * ia64-gen.c: Likewise.
 370         * maxq-dis.c: Likewise.
 371         * ns32k-dis.c: Likewise.
 372         * w65-dis.c: Likewise.
 373         * ia64-asmtab.c: Regenerate.
 374
 375 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 376
 377         * fr30-desc.c: Regenerate.
 378         * fr30-desc.h: Regenerate.
 379         * fr30-opc.c: Regenerate.
 380         * fr30-opc.h: Regenerate.
 381         * frv-desc.c: Regenerate.
 382         * frv-desc.h: Regenerate.
 383         * frv-opc.c: Regenerate.
 384         * frv-opc.h: Regenerate.
 385         * ip2k-desc.c: Regenerate.
 386         * ip2k-desc.h: Regenerate.
 387         * ip2k-opc.c: Regenerate.
 388         * ip2k-opc.h: Regenerate.
 389         * iq2000-desc.c: Regenerate.
 390         * iq2000-desc.h: Regenerate.
 391         * iq2000-opc.c: Regenerate.
 392         * iq2000-opc.h: Regenerate.
 393         * m32r-desc.c: Regenerate.
 394         * m32r-desc.h: Regenerate.
 395         * m32r-opc.c: Regenerate.
 396         * m32r-opc.h: Regenerate.
 397         * m32r-opinst.c: Regenerate.
 398         * openrisc-desc.c: Regenerate.
 399         * openrisc-desc.h: Regenerate.
 400         * openrisc-opc.c: Regenerate.
 401         * openrisc-opc.h: Regenerate.
 402         * xstormy16-desc.c: Regenerate.
 403         * xstormy16-desc.h: Regenerate.
 404         * xstormy16-opc.c: Regenerate.
 405         * xstormy16-opc.h: Regenerate.
 406
 407 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 408
 409         * Makefile.am: Run "make dep-am"
 410         * Makefile.in: Regenerate.
 411
 412 2005-02-15  Nick Clifton  <nickc@redhat.com>
 413
 414         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 415         compile time warnings.
 416         (print_keyword): Likewise.
 417         (default_print_insn): Likewise.
 418
 419         * fr30-desc.c: Regenerated.
 420         * fr30-desc.h: Regenerated.
 421         * fr30-dis.c: Regenerated.
 422         * fr30-opc.c: Regenerated.
 423         * fr30-opc.h: Regenerated.
 424         * frv-desc.c: Regenerated.
 425         * frv-dis.c: Regenerated.
 426         * frv-opc.c: Regenerated.
 427         * ip2k-asm.c: Regenerated.
 428         * ip2k-desc.c: Regenerated.
 429         * ip2k-desc.h: Regenerated.
 430         * ip2k-dis.c: Regenerated.
 431         * ip2k-opc.c: Regenerated.
 432         * ip2k-opc.h: Regenerated.
 433         * iq2000-desc.c: Regenerated.
 434         * iq2000-dis.c: Regenerated.
 435         * iq2000-opc.c: Regenerated.
 436         * m32r-asm.c: Regenerated.
 437         * m32r-desc.c: Regenerated.
 438         * m32r-desc.h: Regenerated.
 439         * m32r-dis.c: Regenerated.
 440         * m32r-opc.c: Regenerated.
 441         * m32r-opc.h: Regenerated.
 442         * m32r-opinst.c: Regenerated.
 443         * openrisc-desc.c: Regenerated.
 444         * openrisc-desc.h: Regenerated.
 445         * openrisc-dis.c: Regenerated.
 446         * openrisc-opc.c: Regenerated.
 447         * openrisc-opc.h: Regenerated.
 448         * xstormy16-desc.c: Regenerated.
 449         * xstormy16-desc.h: Regenerated.
 450         * xstormy16-dis.c: Regenerated.
 451         * xstormy16-opc.c: Regenerated.
 452         * xstormy16-opc.h: Regenerated.
 453
 454 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 455
 456         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 457         address.
 458
 459 2005-02-11  Nick Clifton  <nickc@redhat.com>
 460
 461         * iq2000-asm.c: Regenerate.
 462
 463         * frv-dis.c: Regenerate.
 464
 465 2005-02-07  Jim Blandy  <jimb@redhat.com>
 466
 467         * Makefile.am (CGEN): Load guile.scm before calling the main
 468         application script.
 469         * Makefile.in: Regenerated.
 470         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 471         Simply pass the cgen-opc.scm path to ${cgen} as its first
 472         argument; ${cgen} itself now contains the '-s', or whatever is
 473         appropriate for the Scheme being used.
 474
 475 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 476
 477         * configure: Regenerate to track ../gettext.m4.
 478
 479 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 480
 481         * ia64-gen.c (NELEMS): Define.
 482         (shrink): Generate alias with missing second predicate register when
 483         opcode has two outputs and these are both predicates.
 484         * ia64-opc-i.c (FULL17): Define.
 485         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 486         here to generate output template.
 487         (TBITCM, TNATCM): Undefine after use.
 488         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 489         first input. Add ld16 aliases without ar.csd as second output. Add
 490         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 491         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 492         ar.ccv as third/fourth inputs. Consolidate through...
 493         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 494         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 495         * ia64-asmtab.c: Regenerate.
 496
 497 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 498
 499         * configure: Regenerate to track ../gettext.m4 change.
 500
 501 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 502
 503         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 504         * frv-asm.c: Rebuilt.
 505         * frv-desc.c: Rebuilt.
 506         * frv-desc.h: Rebuilt.
 507         * frv-dis.c: Rebuilt.
 508         * frv-ibld.c: Rebuilt.
 509         * frv-opc.c: Rebuilt.
 510         * frv-opc.h: Rebuilt.
 511
 512 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 513
 514         * configure: Regenerate, ../gettext.m4 was updated.
 515
 516 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 517
 518         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 519         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 520         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 521         * mips-dis.c: Ditto.
 522
 523 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 524
 525         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 526
 527 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 528
 529         * mips-dis.c (no_aliases): New disassembly option flag.
 530         (set_default_mips_dis_options): Init no_aliases to zero.
 531         (parse_mips_dis_option): Handle no-aliases option.
 532         (print_insn_mips): Ignore table entries that are aliases
 533         if no_aliases is set.
 534         (print_insn_mips16): Ditto.
 535         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 536         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 537         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 538         * mips16-opc.c (mips16_opcodes): Ditto.
 539
 540 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 541
 542         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 543         (inheritance diagram): Add missing edge.
 544         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 545         easier for the testsuite.
 546         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 547         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 548         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 549         arch_sh2a_or_sh4_up child.
 550         (sh_table): Do renaming as above.
 551         Correct comment for ldc.l for gas testsuite to read.
 552         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 553         Correct comments for movy.w and movy.l for gas testsuite to read.
 554         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 555
 556 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 557
 558         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 559
 560 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 561
 562         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 563
 564 2005-01-10  Andreas Schwab  <schwab@suse.de>
 565
 566         * disassemble.c (disassemble_init_for_target) <case
 567         bfd_arch_ia64>: Set skip_zeroes to 16.
 568         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 569
 570 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 571
 572         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 573
 574 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 575
 576         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 577         memory references. Convert avr_operand() to C90 formatting.
 578
 579 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 580
 581         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 582
 583 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 584
 585         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 586         (no_op_insn): Initialize array with instructions that have no
 587         operands.
 588         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 589
 590 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 591
 592         * arm-dis.c: Correct top-level comment.
 593
 594 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 595
 596         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 597         architecuture defining the insn.
 598         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 599         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 600         field.
 601         Also include opcode/arm.h.
 602         * Makefile.am (arm-dis.lo): Update dependency list.
 603         * Makefile.in: Regenerate.
 604
 605 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 606
 607         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 608         reflect the change to the short immediate syntax.
 609
 610 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 611
 612         * or32-opc.c (debug): Warning fix.
 613         * po/POTFILES.in: Regenerate.
 614
 615         * maxq-dis.c: Formatting.
 616         (print_insn): Warning fix.
 617
 618 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 619
 620         * arm-dis.c (WORD_ADDRESS): Define.
 621         (print_insn): Use it.  Correct big-endian end-of-section handling.
 622
 623 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 624             Vineet Sharma      <vineets@noida.hcltech.com>
 625
 626         * maxq-dis.c: New file.
 627         * disassemble.c (ARCH_maxq): Define.
 628         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 629         instructions..
 630         * configure.in: Add case for bfd_maxq_arch.
 631         * configure: Regenerate.
 632         * Makefile.am: Add support for maxq-dis.c
 633         * Makefile.in: Regenerate.
 634         * aclocal.m4: Regenerate.
 635
 636 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 637
 638         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 639         mode.
 640         * crx-dis.c: Likewise.
 641
 642 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 643
 644         Generally, handle CRISv32.
 645         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 646         (struct cris_disasm_data): New type.
 647         (format_reg, format_hex, cris_constraint, print_flags)
 648         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 649         callers changed.
 650         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 651         (print_insn_crisv32_without_register_prefix)
 652         (print_insn_crisv10_v32_with_register_prefix)
 653         (print_insn_crisv10_v32_without_register_prefix)
 654         (cris_parse_disassembler_options): New functions.
 655         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 656         parameter.  All callers changed.
 657         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 658         failure.
 659         (cris_constraint) <case 'Y', 'U'>: New cases.
 660         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 661         for constraint 'n'.
 662         (print_with_operands) <case 'Y'>: New case.
 663         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 664         <case 'N', 'Y', 'Q'>: New cases.
 665         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 666         (print_insn_cris_with_register_prefix)
 667         (print_insn_cris_without_register_prefix): Call
 668         cris_parse_disassembler_options.
 669         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 670         for CRISv32 and the size of immediate operands.  New v32-only
 671         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 672         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 673         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 674         Change brp to be v3..v10.
 675         (cris_support_regs): New vector.
 676         (cris_opcodes): Update head comment.  New format characters '[',
 677         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 678         Add new opcodes for v32 and adjust existing opcodes to accommodate
 679         differences to earlier variants.
 680         (cris_cond15s): New vector.
 681
 682 2004-11-04 Jan Beulich <jbeulich@novell.com>
 683
 684         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 685         (indirEb): Remove.
 686         (Mp): Use f_mode rather than none at all.
 687         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 688         replaces what previously was x_mode; x_mode now means 128-bit SSE
 689         operands.
 690         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 691         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 692         pinsrw's second operand is Edqw.
 693         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 694         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 695         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 696         mode when an operand size override is present or always suffixing.
 697         More instructions will need to be added to this group.
 698         (putop): Handle new macro chars 'C' (short/long suffix selector),
 699         'I' (Intel mode override for following macro char), and 'J' (for
 700         adding the 'l' prefix to far branches in AT&T mode). When an
 701         alternative was specified in the template, honor macro character when
 702         specified for Intel mode.
 703         (OP_E): Handle new *_mode values. Correct pointer specifications for
 704         memory operands. Consolidate output of index register.
 705         (OP_G): Handle new *_mode values.
 706         (OP_I): Handle const_1_mode.
 707         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 708         respective opcode prefix bits have been consumed.
 709         (OP_EM, OP_EX): Provide some default handling for generating pointer
 710         specifications.
 711
 712 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 713
 714         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 715         COP_INST macro.
 716
 717 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 718
 719         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 720         (getregliststring): Support HI/LO and user registers.
 721         * crx-opc.c (crx_instruction): Update data structure according to the
 722         rearrangement done in CRX opcode header file.
 723         (crx_regtab):  Likewise.
 724         (crx_optab):  Likewise.
 725         (crx_instruction): Reorder load/stor instructions, remove unsupported
 726         formats.
 727         support new Co-Processor instruction 'cpi'.
 728
 729 2004-10-27  Nick Clifton  <nickc@redhat.com>
 730
 731         * opcodes/iq2000-asm.c: Regenerate.
 732         * opcodes/iq2000-desc.c: Regenerate.
 733         * opcodes/iq2000-desc.h: Regenerate.
 734         * opcodes/iq2000-dis.c: Regenerate.
 735         * opcodes/iq2000-ibld.c: Regenerate.
 736         * opcodes/iq2000-opc.c: Regenerate.
 737         * opcodes/iq2000-opc.h: Regenerate.
 738
 739 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 740
 741         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 742         us4, us5 (respectively).
 743         Remove unsupported 'popa' instruction.
 744         Reverse operands order in store co-processor instructions.
 745
 746 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 747
 748         * Makefile.am: Run "make dep-am"
 749         * Makefile.in: Regenerate.
 750
 751 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 752
 753         * xtensa-dis.c: Use ISO C90 formatting.
 754
 755 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 756
 757         * ppc-opc.c: Revert 2004-09-09 change.
 758
 759 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 760
 761         * xtensa-dis.c (state_names): Delete.
 762         (fetch_data): Use xtensa_isa_maxlength.
 763         (print_xtensa_operand): Replace operand parameter with opcode/operand
 764         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 765         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 766         instruction bundles.  Use xmalloc instead of malloc.
 767
 768 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 769
 770         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 771         initializers.
 772
 773 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 774
 775         * crx-opc.c (crx_instruction): Support Co-processor insns.
 776         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 777         (getregliststring): Change function to use the above enum.
 778         (print_arg): Handle CO-Processor insns.
 779         (crx_cinvs): Add 'b' option to invalidate the branch-target
 780         cache.
 781
 782 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 783
 784         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 785         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 786         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 787         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 788         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 789
 790 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 791
 792         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 793         rather than add it.
 794
 795 2004-09-30  Paul Brook  <paul@codesourcery.com>
 796
 797         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 798         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 799
 800 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 801
 802         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 803         (CONFIG_STATUS_DEPENDENCIES): New.
 804         (Makefile): Removed.
 805         (config.status): Likewise.
 806         * Makefile.in: Regenerated.
 807
 808 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 809
 810         * Makefile.am: Run "make dep-am".
 811         * Makefile.in: Regenerate.
 812         * aclocal.m4: Regenerate.
 813         * configure: Regenerate.
 814         * po/POTFILES.in: Regenerate.
 815         * po/opcodes.pot: Regenerate.
 816
 817 2004-09-11  Andreas Schwab  <schwab@suse.de>
 818
 819         * configure: Rebuild.
 820
 821 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 822
 823         * ppc-opc.c (L): Make this field not optional.
 824
 825 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 826
 827         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 828         Fix parameter to 'm[t|f]csr' insns.
 829
 830 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 831
 832         * configure.in: Autoupdate to autoconf 2.59.
 833         * aclocal.m4: Rebuild with aclocal 1.4p6.
 834         * configure: Rebuild with autoconf 2.59.
 835         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 836         bfd changes for autoconf 2.59 on the way).
 837         * config.in: Rebuild with autoheader 2.59.
 838
 839 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 840
 841         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 842
 843 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 844
 845         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 846         (GRPPADLCK2): New define.
 847         (twobyte_has_modrm): True for 0xA6.
 848         (grps): GRPPADLCK2 for opcode 0xA6.
 849
 850 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 851
 852         Introduce SH2a support.
 853         * sh-opc.h (arch_sh2a_base): Renumber.
 854         (arch_sh2a_nofpu_base): Remove.
 855         (arch_sh_base_mask): Adjust.
 856         (arch_opann_mask): New.
 857         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 858         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 859         (sh_table): Adjust whitespace.
 860         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 861         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 862         instruction list throughout.
 863         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 864         of arch_sh2a in instruction list throughout.
 865         (arch_sh2e_up): Accomodate above changes.
 866         (arch_sh2_up): Ditto.
 867         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 868         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 869         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 870         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 871         * sh-opc.h (arch_sh2a_nofpu): New.
 872         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 873         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 874         instruction.
 875         2004-01-20  DJ Delorie  <dj@redhat.com>
 876         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 877         2003-12-29  DJ Delorie  <dj@redhat.com>
 878         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 879         sh_opcode_info, sh_table): Add sh2a support.
 880         (arch_op32): New, to tag 32-bit opcodes.
 881         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 882         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 883         * sh-opc.h (arch_sh2a): Add.
 884         * sh-dis.c (arch_sh2a): Handle.
 885         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 886
 887 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 888
 889         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 890
 891 2004-07-22  Nick Clifton  <nickc@redhat.com>
 892
 893         PR/280
 894         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 895         insns - this is done by objdump itself.
 896         * h8500-dis.c (print_insn_h8500): Likewise.
 897
 898 2004-07-21  Jan Beulich <jbeulich@novell.com>
 899
 900         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 901         regardless of address size prefix in effect.
 902         (ptr_reg): Size or address registers does not depend on rex64, but
 903         on the presence of an address size override.
 904         (OP_MMX): Use rex.x only for xmm registers.
 905         (OP_EM): Use rex.z only for xmm registers.
 906
 907 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 908
 909         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 910         move/branch operations to the bottom so that VR5400 multimedia
 911         instructions take precedence in disassembly.
 912
 913 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 914
 915         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 916         ISA-specific "break" encoding.
 917
 918 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 919
 920         * arm-opc.h: Fix typo in comment.
 921
 922 2004-07-11  Andreas Schwab  <schwab@suse.de>
 923
 924         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 925
 926 2004-07-09  Andreas Schwab  <schwab@suse.de>
 927
 928         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 929
 930 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 931
 932         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 933         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 934         (crx-dis.lo): New target.
 935         (crx-opc.lo): Likewise.
 936         * Makefile.in: Regenerate.
 937         * configure.in: Handle bfd_crx_arch.
 938         * configure: Regenerate.
 939         * crx-dis.c: New file.
 940         * crx-opc.c: New file.
 941         * disassemble.c (ARCH_crx): Define.
 942         (disassembler): Handle ARCH_crx.
 943
 944 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 945
 946         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 947         * ia64-asmtab.c: Regnerate.
 948
 949 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 950
 951         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 952         (extract_fxm): Don't test dialect.
 953         (XFXFXM_MASK): Include the power4 bit.
 954         (XFXM): Add p4 param.
 955         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 956
 957 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 958
 959         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 960         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 961
 962 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 963
 964         * ppc-opc.c (BH, XLBH_MASK): Define.
 965         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 966
 967 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 968
 969         * i386-dis.c (x_mode): Comment.
 970         (two_source_ops): File scope.
 971         (float_mem): Correct fisttpll and fistpll.
 972         (float_mem_mode): New table.
 973         (dofloat): Use it.
 974         (OP_E): Correct intel mode PTR output.
 975         (ptr_reg): Use open_char and close_char.
 976         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 977         operands.  Set two_source_ops.
 978
 979 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 980
 981         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 982         instead of _raw_size.
 983
 984 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 985
 986         * ia64-gen.c (in_iclass): Handle more postinc st
 987         and ld variants.
 988         * ia64-asmtab.c: Rebuilt.
 989
 990 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 991
 992         * s390-opc.txt: Correct architecture mask for some opcodes.
 993         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 994         in the esa mode as well.
 995
 996 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 997
 998         * sh-dis.c (target_arch): Make unsigned.
 999         (print_insn_sh): Replace (most of) switch with a call to
1000         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1001         * sh-opc.h: Redefine architecture flags values.
1002         Add sh3-nommu architecture.
1003         Reorganise <arch>_up macros so they make more visual sense.
1004         (SH_MERGE_ARCH_SET): Define new macro.
1005         (SH_VALID_BASE_ARCH_SET): Likewise.
1006         (SH_VALID_MMU_ARCH_SET): Likewise.
1007         (SH_VALID_CO_ARCH_SET): Likewise.
1008         (SH_VALID_ARCH_SET): Likewise.
1009         (SH_MERGE_ARCH_SET_VALID): Likewise.
1010         (SH_ARCH_SET_HAS_FPU): Likewise.
1011         (SH_ARCH_SET_HAS_DSP): Likewise.
1012         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1013         (sh_get_arch_from_bfd_mach): Add prototype.
1014         (sh_get_arch_up_from_bfd_mach): Likewise.
1015         (sh_get_bfd_mach_from_arch_set): Likewise.
1016         (sh_merge_bfd_arc): Likewise.
1017
1018 2004-05-24  Peter Barada  <peter@the-baradas.com>
1019
1020         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1021         into new match_insn_m68k function.  Loop over canidate
1022         matches and select first that completely matches.
1023         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1024         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1025         to verify addressing for MAC/EMAC.
1026         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1027         reigster halves since 'fpu' and 'spl' look misleading.
1028         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1029         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1030         first, tighten up match masks.
1031         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1032         'size' from special case code in print_insn_m68k to
1033         determine decode size of insns.
1034
1035 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1036
1037         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1038         well as when -mpower4.
1039
1040 2004-05-13  Nick Clifton  <nickc@redhat.com>
1041
1042         * po/fr.po: Updated French translation.
1043
1044 2004-05-05  Peter Barada  <peter@the-baradas.com>
1045
1046         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1047         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1048         * m68k-op.c: Switch from ColdFire chips to core variants.
1049
1050 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1051
1052         PR 147.
1053         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1054
1055 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1056
1057         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1058         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1059
1060 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1061
1062         * sh-dis.c (print_insn_sh): Print the value in constant pool
1063         as a symbol if it looks like a symbol.
1064
1065 2004-04-22  Peter Barada <peter@the-baradas.com>
1066
1067         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1068         appropriate ColdFire architectures.
1069         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1070         mask addressing.
1071         Add EMAC instructions, fix MAC instructions. Remove
1072         macmw/macml/msacmw/msacml instructions since mask addressing now
1073         supported.
1074
1075 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1076
1077         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1078         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1079         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1080         macro.  Adjust all users.
1081
1082 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1083
1084         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1085         separately.
1086
1087 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1088
1089         * m32r-asm.c: Regenerate.
1090
1091 2004-03-29  Stan Shebs  <shebs@apple.com>
1092
1093         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1094         used.
1095
1096 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1097
1098         * aclocal.m4: Regenerate.
1099         * config.in: Regenerate.
1100         * configure: Regenerate.
1101         * po/POTFILES.in: Regenerate.
1102         * po/opcodes.pot: Regenerate.
1103
1104 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1105
1106         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1107         PPC_OPERANDS_GPR_0.
1108         * ppc-opc.c (RA0): Define.
1109         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1110         (RAOPT): Rename from RAO.  Update all uses.
1111         (powerpc_opcodes): Use RA0 as appropriate.
1112
1113 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1114
1115         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1116
1117 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1118
1119         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1120
1121 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1122
1123         * i386-dis.c (GRPPLOCK): Delete.
1124         (grps): Delete GRPPLOCK entry.
1125
1126 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1127
1128         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1129         (M, Mp): Use OP_M.
1130         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1131         (GRPPADLCK): Define.
1132         (dis386): Use NOP_Fixup on "nop".
1133         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1134         (twobyte_has_modrm): Set for 0xa7.
1135         (padlock_table): Delete.  Move to..
1136         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1137         and clflush.
1138         (print_insn): Revert PADLOCK_SPECIAL code.
1139         (OP_E): Delete sfence, lfence, mfence checks.
1140
1141 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1142
1143         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1144         (INVLPG_Fixup): New function.
1145         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1146
1147 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1148
1149         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1150         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1151         (padlock_table): New struct with PadLock instructions.
1152         (print_insn): Handle PADLOCK_SPECIAL.
1153
1154 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1155
1156         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1157         (OP_E): Twiddle clflush to sfence here.
1158
1159 2004-03-08  Nick Clifton  <nickc@redhat.com>
1160
1161         * po/de.po: Updated German translation.
1162
1163 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1164
1165         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1166         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1167         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1168         accordingly.
1169
1170 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1171
1172         * frv-asm.c: Regenerate.
1173         * frv-desc.c: Regenerate.
1174         * frv-desc.h: Regenerate.
1175         * frv-dis.c: Regenerate.
1176         * frv-ibld.c: Regenerate.
1177         * frv-opc.c: Regenerate.
1178         * frv-opc.h: Regenerate.
1179
1180 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1181
1182         * frv-desc.c, frv-opc.c: Regenerate.
1183
1184 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1185
1186         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1187
1188 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1189
1190         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1191         Also correct mistake in the comment.
1192
1193 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1194
1195         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1196         ensure that double registers have even numbers.
1197         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1198         that reserved instruction 0xfffd does not decode the same
1199         as 0xfdfd (ftrv).
1200         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1201         REG_N refers to a double register.
1202         Add REG_N_B01 nibble type and use it instead of REG_NM
1203         in ftrv.
1204         Adjust the bit patterns in a few comments.
1205
1206 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1207
1208         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1209
1210 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1211
1212         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1213
1214 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1215
1216         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1217
1218 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1219
1220         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1221         mtivor32, mtivor33, mtivor34.
1222
1223 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1224
1225         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1226
1227 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1228
1229         * arm-opc.h Maverick accumulator register opcode fixes.
1230
1231 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1232
1233         * m32r-dis.c: Regenerate.
1234
1235 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1236
1237         * sh-opc.h (sh_table): "fsrra", not "fssra".
1238
1239 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1240
1241         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1242         contraints.
1243
1244 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1245
1246         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1247
1248 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1249
1250         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1251         1.  Don't print scale factor on AT&T mode when index missing.
1252
1253 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1254
1255         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1256         when loaded into XR registers.
1257
1258 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1259
1260         * frv-desc.h: Regenerate.
1261         * frv-desc.c: Regenerate.
1262         * frv-opc.c: Regenerate.
1263
1264 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1265
1266         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1267
1268 2004-01-09  Paul Brook  <paul@codesourcery.com>
1269
1270         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1271         specific opcodes.
1272
1273 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1274
1275         * Makefile.am (libopcodes_la_DEPENDENCIES)
1276         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1277         comment about the problem.
1278         * Makefile.in: Regenerate.
1279
1280 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1281
1282         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1283         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1284         cut&paste errors in shifting/truncating numerical operands.
1285         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1286         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1287         (parse_uslo16): Likewise.
1288         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1289         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1290         (parse_s12): Likewise.
1291         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1292         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1293         (parse_uslo16): Likewise.
1294         (parse_uhi16): Parse gothi and gotfuncdeschi.
1295         (parse_d12): Parse got12 and gotfuncdesc12.
1296         (parse_s12): Likewise.
1297
1298 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1299
1300         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1301         instruction which looks similar to an 'rla' instruction.
1302
1303 For older changes see ChangeLog-0203
1304 \f
1305 Local Variables:
1306 mode: change-log
1307 left-margin: 8
1308 fill-column: 74
1309 version-control: never
1310 End: