opcodes/ChangeLog

   1 2010-07-29  DJ Delorie  <dj@redhat.com>
   2
   3         * rx-decode.opc (SRR): New.
   4         (rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
   5         r0,r0) and NOP3 (max r0,r0) special cases.
   6         * rx-decode.c: Regenerate.
   7
   8 2010-07-28  H.J. Lu  <hongjiu.lu@intel.com>
   9
  10         * i386-dis.c: Add 0F to VEX opcode enums.
  11
  12 2010-07-27  DJ Delorie  <dj@redhat.com>
  13
  14         * rx-decode.opc (store_flags): Remove, replace with F_* macros.
  15         (rx_decode_opcode): Likewise.
  16         * rx-decode.c: Regenerate.
  17
  18 2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
  19             Ina Pandit  <ina.pandit@kpitcummins.com>
  20
  21         * v850-dis.c (v850_sreg_names): Updated structure for system
  22         registers.
  23         (float_cc_names): new structure for condition codes.
  24         (print_value): Update the function that prints value.
  25         (get_operand_value): New function to get the operand value.
  26         (disassemble): Updated to handle the disassembly of instructions.
  27         (print_insn_v850): Updated function to print instruction for different
  28         families.
  29         * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
  30         extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
  31         extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
  32         insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
  33         extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
  34         extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
  35         extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
  36         insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
  37         (insert_d8_7, insert_d5_4, insert_i5div): Remove.
  38         (v850_operands): Update with the relocation name. Also update
  39         the instructions with specific set of processors.
  40
  41 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
  42
  43         * arm-dis.c (print_insn_arm): Add cases for printing more
  44         symbolic operands.
  45         (print_insn_thumb32): Likewise.
  46
  47 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
  48
  49         * mips-dis.c (print_insn_mips): Correct branch instruction type
  50         determination.
  51
  52 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
  53
  54         * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
  55         type and delay slot determination.
  56         (print_insn_mips16): Extend branch instruction type and delay
  57         slot determination to cover all instructions.
  58         * mips16-opc.c (BR): Remove macro.
  59         (UBR, CBR): New macros.
  60         (mips16_opcodes): Update branch annotation for "b", "beqz",
  61         "bnez", "bteqz" and "btnez".  Add branch annotation for "jalrc"
  62         and "jrc".
  63
  64 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
  65
  66         AVX Programming Reference (June, 2010)
  67         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
  68         * i386-opc.tbl: Likewise.
  69         * i386-tbl.h: Regenerated.
  70
  71 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
  72
  73         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
  74
  75 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
  76
  77         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
  78         ppc_cpu_t before inverting.
  79         (ppc_parse_cpu): Likewise.
  80         (print_insn_powerpc): Likewise.
  81
  82 2010-07-03  Alan Modra  <amodra@gmail.com>
  83
  84         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
  85         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
  86         (PPC64, MFDEC2): Update.
  87         (NON32, NO371): Define.
  88         (powerpc_opcode): Update to not use old opcode flags, and avoid
  89         -m601 duplicates.
  90
  91 2010-07-03  DJ Delorie  <dj@delorie.com>
  92
  93         * m32c-ibld.c: Regenerate.
  94
  95 2010-07-03  Alan Modra  <amodra@gmail.com>
  96
  97         * ppc-opc.c (PWR2COM): Define.
  98         (PPCPWR2): Add PPC_OPCODE_COMMON.
  99         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
 100         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
 101         "rac" from -mcom.
 102
 103 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
 104
 105         AVX Programming Reference (June, 2010)
 106         * i386-dis.c (PREFIX_0FAE_REG_0): New.
 107         (PREFIX_0FAE_REG_1): Likewise.
 108         (PREFIX_0FAE_REG_2): Likewise.
 109         (PREFIX_0FAE_REG_3): Likewise.
 110         (PREFIX_VEX_3813): Likewise.
 111         (PREFIX_VEX_3A1D): Likewise.
 112         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 113         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
 114         PREFIX_VEX_3A1D.
 115         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
 116         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 117         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
 118
 119         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
 120         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
 121         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
 122
 123         * i386-opc.h (CpuXsaveopt): New.
 124         (CpuFSGSBase): Likewise.
 125         (CpuRdRnd): Likewise.
 126         (CpuF16C): Likewise.
 127         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
 128         cpuf16c.
 129
 130         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
 131         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
 132         * i386-init.h: Regenerated.
 133         * i386-tbl.h: Likewise.
 134
 135 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 136
 137         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
 138         and mtocrf on EFS.
 139
 140 2010-06-29  Alan Modra  <amodra@gmail.com>
 141
 142         * maxq-dis.c: Delete file.
 143         * Makefile.am: Remove references to maxq.
 144         * configure.in: Likewise.
 145         * disassemble.c: Likewise.
 146         * Makefile.in: Regenerate.
 147         * configure: Regenerate.
 148         * po/POTFILES.in: Regenerate.
 149
 150 2010-06-29  Alan Modra  <amodra@gmail.com>
 151
 152         * mep-dis.c: Regenerate.
 153
 154 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 155
 156         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
 157
 158 2010-06-27  Alan Modra  <amodra@gmail.com>
 159
 160         * arc-dis.c (arc_sprintf): Delete set but unused variables.
 161         (decodeInstr): Likewise.
 162         * dlx-dis.c (print_insn_dlx): Likewise.
 163         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 164         * maxq-dis.c (check_move, print_insn): Likewise.
 165         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 166         * msp430-dis.c (msp430_branchinstr): Likewise.
 167         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 168         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 169         * sparc-dis.c (print_insn_sparc): Likewise.
 170         * fr30-asm.c: Regenerate.
 171         * frv-asm.c: Regenerate.
 172         * ip2k-asm.c: Regenerate.
 173         * iq2000-asm.c: Regenerate.
 174         * lm32-asm.c: Regenerate.
 175         * m32c-asm.c: Regenerate.
 176         * m32r-asm.c: Regenerate.
 177         * mep-asm.c: Regenerate.
 178         * mt-asm.c: Regenerate.
 179         * openrisc-asm.c: Regenerate.
 180         * xc16x-asm.c: Regenerate.
 181         * xstormy16-asm.c: Regenerate.
 182
 183 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 184
 185         PR gas/11673
 186         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 187
 188 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 189
 190         PR binutils/11676
 191         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 192
 193 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 194
 195         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 196         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 197         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 198         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 199         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 200         Treat lwsync as msync on e500.
 201
 202 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 203
 204         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 205
 206 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 207
 208         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 209         constants is the same on 32-bit and 64-bit hosts.
 210
 211 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 212
 213         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 214         .short directives so that they can be reassembled.
 215
 216 2010-05-26  Catherine Moore <clm@codesourcery.com>
 217             David Ung  <davidu@mips.com>
 218
 219         * mips-opc.c: Change membership to I1 for instructions ssnop and
 220         ehb.
 221
 222 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 223
 224         * i386-dis.c (sib): New.
 225         (get_sib): Likewise.
 226         (print_insn): Call get_sib.
 227         OP_E_memory): Use sib.
 228
 229 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 230
 231         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 232         * mips-opc.c (I16): Remove.
 233         (mips_builtin_op): Reclassify jalx.
 234
 235 2010-05-19  Alan Modra  <amodra@gmail.com>
 236
 237         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 238         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 239
 240 2010-05-13  Alan Modra  <amodra@gmail.com>
 241
 242         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 243
 244 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 245
 246         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 247         format.
 248         (print_insn_thumb16): Add support for new %W format.
 249
 250 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 251
 252         * Makefile.in: Regenerate with automake 1.11.1.
 253         * aclocal.m4: Ditto.
 254
 255 2010-05-05  Nick Clifton  <nickc@redhat.com>
 256
 257         * po/es.po: Updated Spanish translation.
 258
 259 2010-04-22  Nick Clifton  <nickc@redhat.com>
 260
 261         * po/opcodes.pot: Updated by the Translation project.
 262         * po/vi.po: Updated Vietnamese translation.
 263
 264 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 265
 266         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 267         bits in opcode.
 268
 269 2010-04-09  Nick Clifton  <nickc@redhat.com>
 270
 271         * i386-dis.c (print_insn): Remove unused variable op.
 272         (OP_sI): Remove unused variable mask.
 273
 274 2010-04-07  Alan Modra  <amodra@gmail.com>
 275
 276         * configure: Regenerate.
 277
 278 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 279
 280         * ppc-opc.c (RBOPT): New define.
 281         ("dccci"): Enable for PPCA2.  Make operands optional.
 282         ("iccci"): Likewise.  Do not deprecate for PPC476.
 283
 284 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 285
 286         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 287
 288 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 289
 290         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 291         * Makefile.in: Regenerate.
 292         * configure.in (bfd_tic6x_arch): New.
 293         * configure: Regenerate.
 294         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 295         (disassembler): Handle TI C6X.
 296         * tic6x-dis.c: New.
 297
 298 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 299
 300         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 301
 302 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 303
 304         * dis-buf.c (buffer_read_memory): Give error for reading just
 305         before the start of memory.
 306
 307 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 308             Quentin Neill <quentin.neill@amd.com>
 309
 310         * i386-dis.c (OP_LWP_I): Removed.
 311         (reg_table): Do not use OP_LWP_I, use Iq.
 312         (OP_LWPCB_E): Remove use of names16.
 313         (OP_LWP_E): Same.
 314         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 315         should not set the Vex.length bit.
 316         * i386-tbl.h: Regenerated.
 317
 318 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 319
 320         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 321
 322 2010-02-24  Nick Clifton  <nickc@redhat.com>
 323
 324         PR binutils/6773
 325         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 326         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 327         (thumb32_opcodes): Likewise.
 328
 329 2010-02-15  Nick Clifton  <nickc@redhat.com>
 330
 331         * po/vi.po: Updated Vietnamese translation.
 332
 333 2010-02-12  Doug Evans  <dje@sebabeach.org>
 334
 335         * lm32-opinst.c: Regenerate.
 336
 337 2010-02-11  Doug Evans  <dje@sebabeach.org>
 338
 339         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 340         (print_address): Delete CGEN_PRINT_ADDRESS.
 341         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 342         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 343         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 344         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 345
 346         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 347         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 348         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 349         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 350         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 351         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 352         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 353         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 354         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 355         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 356         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 357         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 358
 359 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 360
 361         * i386-dis.c: Update copyright.
 362         * i386-gen.c: Likewise.
 363         * i386-opc.h: Likewise.
 364         * i386-opc.tbl: Likewise.
 365
 366 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 367             Sebastian Pop  <sebastian.pop@amd.com>
 368
 369         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 370         function to handle 5th imm8 operand.
 371         (PREFIX_VEX_3A48): Added.
 372         (PREFIX_VEX_3A49): Added.
 373         (VEX_W_3A48_P_2): Added.
 374         (VEX_W_3A49_P_2): Added.
 375         (prefix table): Added entries for PREFIX_VEX_3A48
 376         and PREFIX_VEX_3A49.
 377         (vex table): Added entries for VEX_W_3A48_P_2 and
 378         and VEX_W_3A49_P_2.
 379         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 380         for Vec_Imm4 operands.
 381         * i386-opc.h (enum): Added Vec_Imm4.
 382         (i386_operand_type): Added vec_imm4.
 383         * i386-opc.tbl: Add entries for vpermilp[ds].
 384         * i386-init.h: Regenerated.
 385         * i386-tbl.h: Regenerated.
 386
 387 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 388
 389         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 390         and "pwr7".  Move "a2" into alphabetical order.
 391
 392 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 393
 394         * ppc-dis.c (ppc_opts): Add titan entry.
 395         * ppc-opc.c (TITAN, MULHW): Define.
 396         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 397
 398 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 399
 400         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 401         to CPU_BDVER1_FLAGS
 402         * i386-init.h: Regenerated.
 403
 404 2010-02-03  Anthony Green  <green@moxielogic.com>
 405
 406         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 407         0x0f, and make 0x00 an illegal instruction.
 408
 409 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 410
 411         * opcodes/arm-dis.c (struct arm_private_data): New.
 412         (print_insn_coprocessor, print_insn_arm): Update to use struct
 413         arm_private_data.
 414         (is_mapping_symbol, get_map_sym_type): New functions.
 415         (get_sym_code_type): Check the symbol's section.  Do not check
 416         mapping symbols.
 417         (print_insn): Default to disassembling ARM mode code.  Check
 418         for mapping symbols separately from other symbols.  Use
 419         struct arm_private_data.
 420
 421 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 422
 423         * i386-dis.c (EXVexWdqScalar): New.
 424         (vex_scalar_w_dq_mode): Likewise.
 425         (prefix_table): Update entries for PREFIX_VEX_3899,
 426         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 427         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 428         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 429         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 430         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 431         (OP_EX): Likewise.
 432
 433 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 434
 435         * i386-dis.c (XMScalar): New.
 436         (EXdScalar): Likewise.
 437         (EXqScalar): Likewise.
 438         (EXqScalarS): Likewise.
 439         (VexScalar): Likewise.
 440         (EXdVexScalarS): Likewise.
 441         (EXqVexScalarS): Likewise.
 442         (XMVexScalar): Likewise.
 443         (scalar_mode): Likewise.
 444         (d_scalar_mode): Likewise.
 445         (d_scalar_swap_mode): Likewise.
 446         (q_scalar_mode): Likewise.
 447         (q_scalar_swap_mode): Likewise.
 448         (vex_scalar_mode): Likewise.
 449         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 450         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 451         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 452         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 453         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 454         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 455         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 456         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 457         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 458         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 459         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 460         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 461         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 462         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 463         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 464         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 465         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 466         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 467         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 468         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 469         q_scalar_mode, q_scalar_swap_mode.
 470         (OP_XMM): Handle scalar_mode.
 471         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 472         and q_scalar_swap_mode.
 473         (OP_VEX): Handle vex_scalar_mode.
 474
 475 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 476
 477         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 478
 479 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 480
 481         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 482
 483 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 484
 485         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 486
 487 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 488
 489         * i386-dis.c (Bad_Opcode): New.
 490         (bad_opcode): Likewise.
 491         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 492         (dis386_twobyte): Likewise.
 493         (reg_table): Likewise.
 494         (prefix_table): Likewise.
 495         (x86_64_table): Likewise.
 496         (vex_len_table): Likewise.
 497         (vex_w_table): Likewise.
 498         (mod_table): Likewise.
 499         (rm_table): Likewise.
 500         (float_reg): Likewise.
 501         (reg_table): Remove trailing "(bad)" entries.
 502         (prefix_table): Likewise.
 503         (x86_64_table): Likewise.
 504         (vex_len_table): Likewise.
 505         (vex_w_table): Likewise.
 506         (mod_table): Likewise.
 507         (rm_table): Likewise.
 508         (get_valid_dis386): Handle bytemode 0.
 509
 510 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 511
 512         * i386-opc.h (VEXScalar): New.
 513
 514         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 515         instructions.
 516         * i386-tbl.h: Regenerated.
 517
 518 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 519
 520         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 521
 522         * i386-opc.tbl: Add xsave64 and xrstor64.
 523         * i386-tbl.h: Regenerated.
 524
 525 2010-01-20  Nick Clifton  <nickc@redhat.com>
 526
 527         PR 11170
 528         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 529         based post-indexed addressing.
 530
 531 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 532
 533         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 534         * i386-tbl.h: Regenerated.
 535
 536 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 537
 538         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 539         comments.
 540
 541 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 542
 543         * i386-dis.c (names_mm): New.
 544         (intel_names_mm): Likewise.
 545         (att_names_mm): Likewise.
 546         (names_xmm): Likewise.
 547         (intel_names_xmm): Likewise.
 548         (att_names_xmm): Likewise.
 549         (names_ymm): Likewise.
 550         (intel_names_ymm): Likewise.
 551         (att_names_ymm): Likewise.
 552         (print_insn): Set names_mm, names_xmm and names_ymm.
 553         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 554         (OP_XMM): Likewise.
 555         (OP_EM): Likewise.
 556         (OP_EMC): Likewise.
 557         (OP_MXC): Likewise.
 558         (OP_EX): Likewise.
 559         (XMM_Fixup): Likewise.
 560         (OP_VEX): Likewise.
 561         (OP_EX_VexReg): Likewise.
 562         (OP_Vex_2src): Likewise.
 563         (OP_Vex_2src_1): Likewise.
 564         (OP_Vex_2src_2): Likewise.
 565         (OP_REG_VexI4): Likewise.
 566
 567 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 568
 569         * i386-dis.c (print_insn): Update comments.
 570
 571 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 572
 573         * i386-dis.c (rex_original): Removed.
 574         (ckprefix): Remove rex_original.
 575         (print_insn): Update comments.
 576
 577 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 578
 579         * Makefile.in: Regenerate.
 580         * configure: Regenerate.
 581
 582 2010-01-07  Doug Evans  <dje@sebabeach.org>
 583
 584         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 585         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 586         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 587         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 588         * xstormy16-ibld.c: Regenerate.
 589
 590 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 591
 592         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 593         * i386-init.h: Regenerated.
 594
 595 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 596
 597         * arm-dis.c (print_insn): Fixed search for next symbol and data
 598         dumping condition, and the initial mapping symbol state.
 599
 600 2010-01-05  Doug Evans  <dje@sebabeach.org>
 601
 602         * cgen-ibld.in: #include "cgen/basic-modes.h".
 603         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 604         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 605         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 606         * xstormy16-ibld.c: Regenerate.
 607
 608 2010-01-04  Nick Clifton  <nickc@redhat.com>
 609
 610         PR 11123
 611         * arm-dis.c (print_insn_coprocessor): Initialise value.
 612
 613 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 614
 615         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 616
 617 2010-01-02  Doug Evans  <dje@sebabeach.org>
 618
 619         * cgen-asm.in: Update copyright year.
 620         * cgen-dis.in: Update copyright year.
 621         * cgen-ibld.in: Update copyright year.
 622         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 623         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 624         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 625         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 626         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 627         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 628         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 629         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 630         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 631         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 632         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 633         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 634         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 635         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 636         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 637         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 638         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 639         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 640         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 641         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 642         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 643
 644 For older changes see ChangeLog-2009
 645 \f
 646 Local Variables:
 647 mode: change-log
 648 left-margin: 8
 649 fill-column: 74
 650 version-control: never
 651 End: