opcodes/ChangeLog

   1 2007-01-04  Paul Brook  <paul@codesourcery.com>
   2
   3         * arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
   4
   5 2007-01-04  Andreas Schwab  <schwab@suse.de>
   6
   7         * m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns.
   8
   9 2007-01-04  Julian Brown  <julian@codesourcery.com>
  10
  11         * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl,
  12         vqrshl instructions.
  13
  14 2006-12-27  Kazu Hirata  <kazu@codesourcery.com>
  15
  16         * m68k-dis.c (print_insn_arg): Add support for cac and mbb.
  17
  18 2006-12-27  Kazu Hirata  <kazu@codesourcery.com>
  19
  20         * m68k-opc.c (m68k_opcodes): Add sleep and trapx.
  21
  22 2006-12-15  H.J. Lu  <hongjiu.lu@intel.com>
  23
  24         * i386-dis.c (o_mode): New for 16-byte operand.
  25         (intel_operand_size): Generate "OWORD PTR " for o_mode.
  26         (CMPXCHG8B_Fixup): Set bytemode to o_mode instead of x_mode.
  27
  28 2006-12-14  H.J. Lu  <hongjiu.lu@intel.com>
  29
  30         * i386-dis.c (CMPXCHG8B_Fixup): New.
  31         (grps): Use CMPXCHG8B_Fixup for cmpxchg8b.
  32
  33 2006-12-11  H.J. Lu  <hongjiu.lu@intel.com>
  34
  35         * i386-dis.c (Eq): Replaced by ...
  36         (Mq): New. This.
  37         (Ma): Defined with OP_M instead of OP_E.
  38         (grps): Updated cmpxchg8b and vmptrst for Eq -> Mq.
  39         (OP_M): Added bound, cmpxchg8b and vmptrst to bad modrm list.
  40
  41 2006-12-11  Daniel Jacobowitz  <dan@codesourcery.com>
  42
  43         * po/Make-in (.po.gmo): Put gmo files in objdir.
  44
  45 2006-12-09  H.J. Lu  <hongjiu.lu@intel.com>
  46
  47         * i386-dis.c (X86_64_1): New.
  48         (X86_64_2): Likewise.
  49         (X86_64_3): Likewise.
  50         (dis386): Replace 0x60, 0x61 and 0x62 entries with x86-64
  51         tables.
  52         (x86_64_table): Add entries for 0x60, 0x61 and 0x62.
  53
  54 2006-12-09  H.J. Lu  <hongjiu.lu@intel.com>
  55
  56         * i386-dis.c: Adjust white spaces.
  57
  58 2006-12-04  Jan Beulich  <jbeulich@novell.com>
  59
  60         * i386-dis.c (OP_J): Update used_prefixes in v_mode.
  61
  62 2006-11-30  Jan Beulich  <jbeulich@novell.com>
  63
  64         * i386-dis.c (SEG_Fixup): Delete.
  65         (Sv): Use OP_SEG.
  66         (putop): New suffix character 'D'.
  67         (dis386): Use it.
  68         (grps): Likewise.
  69         (OP_SEG): Handle bytemode other than w_mode.
  70
  71 2006-11-30  Jan Beulich  <jbeulich@novell.com>
  72
  73         * i386-dis.c (zAX): New.
  74         (Xz): New.
  75         (Yzr): New.
  76         (z_mode): New.
  77         (z_mode_ax_reg): New.
  78         (putop): New suffix character 'G'.
  79         (dis386): Use it for in, out, ins, and outs.
  80         (intel_operand_size): Handle z_mode.
  81         (OP_REG): Delete unreachable case indir_dx_reg.
  82         (OP_IMREG): Fix Intel syntax output for case indir_dx_reg. Handle
  83         z_mode_ax_reg.
  84         (OP_ESreg): Fix Intel syntax operand size handling.
  85         (OP_DSreg): Likewise.
  86
  87 2006-11-30  Jan Beulich  <jbeulich@novell.com>
  88
  89         * i386-dis.c (dis386): Use 'R' and 'O' for cbw/cwd unconditionally.
  90         (putop): For 'O' suffix, print 'q' in Intel mode, and mark data prefix
  91         used. For 'R' and 'W' suffix, simplify and fix Intel mode.
  92
  93 2006-11-29  Paul Brook  <paul@codesourcery.com>
  94
  95         * arm-dis.c (coprocessor_opcodes): Fix bitfields for fconstd/fconstd.
  96
  97 2006-11-22  Daniel Jacobowitz  <dan@codesourcery.com>
  98
  99         * arm-dis.c (last_is_thumb): Delete.
 100         (enum map_type, last_type): New.
 101         (print_insn_data): New.
 102         (get_sym_code_type): Take MAP_TYPE argument.  Check the type of
 103         the right symbol.  Handle $d.
 104         (print_insn): Check for mapping symbols even without a normal
 105         symbol.  Adjust searching.  If $d is found see how much data
 106         to print.  Handle data.
 107
 108 2006-11-16  Nathan Sidwell  <nathan@codesourcery.com>
 109
 110         * m68k-opc.c (m68k_opcodes): Place trap instructions before set
 111         conditionals.  Add tpf coldfire instruction as alias for trapf.
 112
 113 2006-11-09  H.J. Lu  <hongjiu.lu@intel.com>
 114
 115         * i386-dis.c (print_insn): Check PREFIX_REPNZ before
 116         PREFIX_DATA when prefix user table is used.
 117
 118 2006-11-09  H.J. Lu  <hongjiu.lu@intel.com>
 119
 120         * i386-dis.c (twobyte_uses_SSE_prefix): Renamed to ...
 121         (twobyte_uses_DATA_prefix): This.
 122         (twobyte_uses_REPNZ_prefix): New.
 123         (twobyte_uses_REPZ_prefix): Likewise.
 124         (threebyte_0x38_uses_DATA_prefix): Likewise.
 125         (threebyte_0x38_uses_REPNZ_prefix): Likewise.
 126         (threebyte_0x38_uses_REPZ_prefix): Likewise.
 127         (threebyte_0x3a_uses_DATA_prefix): Likewise.
 128         (threebyte_0x3a_uses_REPNZ_prefix): Likewise.
 129         (threebyte_0x3a_uses_REPZ_prefix): Likewise.
 130         (print_insn): Updated checking usages of DATA/REPNZ/REPZ
 131         prefixes.
 132
 133 2006-11-06  Troy Rollo  <troy@corvu.com.au>
 134
 135         * ppc-opc.c: Restore COM to mfcr wrongly removed 2003-07-04.
 136
 137 2006-11-01  Mei Ligang  <ligang@sunnorth.com.cn>
 138
 139         * score-opc.h (score_opcodes): Delete modifier '0x'.
 140
 141 2006-10-30  Paul Brook  <paul@codesourcery.com>
 142
 143         * arm-dis.c (last_is_thumb, last_mapping_sym, last_mapping_addr): New.
 144         (get_sym_code_type): New function.
 145         (print_insn): Search for mapping symbols.
 146
 147 2006-10-31  Mei Ligang  <ligang@sunnorth.com.cn>
 148
 149         * score-dis.c (print_insn): Correct the error code to print
 150         correct PCE instruction disassembly.
 151
 152 2006-10-26  Ben Elliston  <bje@au.ibm.com>
 153             Anton Blanchard  <anton@samba.org>
 154             Peter Bergner  <bergner@vnet.ibm.com>
 155
 156         * ppc-opc.c (A_L, DCM, DGM, TE, RMC, R, SP, S, SH16, XRT_L, EH,
 157         AFRALFRC_MASK, Z, ZRC, Z_MASK, XLRT_MASK, XEH_MASK): Define.
 158         (POWER6): Define.
 159         (powerpc_opcodes): Extend "lwarx", "ldarx", "dcbf", "fres", "fres.",
 160         "frsqrtes", "frsqrtes." "fre", "fre.", "frsqrte" and "frsqrte.".
 161         Add "doze", "nap", "sleep", "rvwinkle", "dcbfl", "prtyw", "prtyd",
 162         "mfcfar", "cmpb", "lfdpx", "stfdpx", "mtcfar", "mffgpr", "mftgpr",
 163         "lwzcix", "lhzcix", "lbzcix", "ldcix", "lfiwax", "stwcix", "sthcix",
 164         "stbcix", "stdcix", "lfdp", "dadd", "dadd.", "dqua", "dqua.", "dmul",
 165         "dmul.", "drrnd", "drrnd.", "dscli", "dscli.", "dquai", "dquai.",
 166         "dscri", "dscri.", "drintx", "drintx.", "dcmpo", "dtstex", "dtstdc",
 167         "dtstdg", "dtstsf", "drintn", "drintn.", "dctdp", "dctdp.", "dctfix",
 168         "dctfix.", "ddedpd", "ddedpd.", "dxex", "dxex.", "dsub", "dsub.",
 169         "ddiv", "ddiv.", "dcmpu", "drsp", "drsp.", "dcffix", "dcffix.",
 170         "denbcd", "denbcd.", "diex", "diex.", "stfdp", "daddq", "daddq.",
 171         "dquaq", "dquaq.", "fcpsgn", "fcpsgn.", "dmulq", "dmulq.",
 172         "drrndq", "drrndq.", "dscliq", "dscliq.", "dquaiq", "dquaiq.",
 173         "dscriq", "dscriq.", "drintxq", "drintxq.", "dcmpoq", "dtstexq",
 174         "dtstdcq", "dtstdgq", "dtstsfq", "drintnq", "drintnq.",
 175         "dctqpq", "dctqpq.", "dctfixq", "dctfixq.", "ddedpdq", "ddedpdq.",
 176         "dxexq", "dxexq.", "dsubq", "dsubq.", "ddivq", "ddivq.", "dcmpuq",
 177         "drdpq", "drdpq.", "dcffixq", "dcffixq.", "denbcdq", "denbcdq.",
 178         "diexq" and "diexq." opcodes.
 179
 180 2006-10-26  Daniel Jacobowitz  <dan@codesourcery.com>
 181
 182         * h8300-dis.c (bfd_h8_disassemble): Add missing consts.
 183
 184 2006-10-25  Trevor Smigiel  <Trevor_Smigiel@playstation.sony.com>
 185             Yukishige Shibata  <shibata@rd.scei.sony.co.jp>
 186             Nobuhisa Fujinami  <fnami@rd.scei.sony.co.jp>
 187             Takeaki Fukuoka  <fukuoka@rd.scei.sony.co.jp>
 188             Alan Modra  <amodra@bigpond.net.au>
 189
 190         * spu-dis.c: New file.
 191         * spu-opc.c: New file.
 192         * configure.in: Add SPU support.
 193         * disassemble.c: Likewise.
 194         * Makefile.am: Likewise.  Run "make dep-am".
 195         * Makefile.in: Regenerate.
 196         * configure: Regenerate.
 197         * po/POTFILES.in: Regenerate.
 198
 199 2006-10-24  Andrew Pinski  <andrew_pinski@playstation.sony.com>
 200
 201         * ppc-opc.c (CELL): New define.
 202         (powerpc_opcodes): Enable hrfid for Cell.  Add ldbrx and stdbrx,
 203         cell specific instructions.  Add {st,l}x{r,l}{,l} cell specific
 204         VMX instructions.
 205         * ppc-dis.c (powerpc_dialect): Handle cell.
 206
 207 2006-10-23  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 208
 209         * i386-dis.c (dis386): Add support for the change in POPCNT opcode in
 210         amdfam10 architecture.
 211         (PREGRP37): NEW.
 212         (print_insn): Disallow REP prefix for POPCNT.
 213
 214 2006-10-20  Andrew Stubbs  <andrew.stubbs@st.com>
 215
 216         * sh-dis.c (print_insn_sh): Remove 0x from output to prevent GDB
 217         duplicating it.
 218
 219 2006-10-18  Dave Brolley  <brolley@redhat.com>
 220
 221         * configure.in (BFD_MACHINES): Add cgen-bitset.lo for bfd_sh_arch.
 222         * configure: Regenerated.
 223
 224 2006-09-29  Alan Modra  <amodra@bigpond.net.au>
 225
 226         * po/POTFILES.in: Regenerate.
 227
 228 2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
 229             Joseph Myers  <joseph@codesourcery.com>
 230             Ian Lance Taylor  <ian@wasabisystems.com>
 231             Ben Elliston  <bje@wasabisystems.com>
 232
 233         * arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
 234         only be used with the default multiply-add operation, so if N is
 235         set, don't bother printing X.  Add new iwmmxt instructions.
 236         (IWMMXT_INSN_COUNT): Update.
 237         (iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
 238         with a 'c' suffix.
 239         (print_insn_coprocessor): Check for iWMMXt2.  Handle format
 240         specifiers 'r', 'i'.
 241
 242 2006-09-24  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 243
 244         PR binutils/3100
 245         * i386-dis.c (prefix_user_table): Fix the second operand of
 246         maskmovdqu instruction to allow only %xmm register instead of
 247         both %xmm register and memory.
 248
 249 2006-09-23  H.J. Lu  <hongjiu.lu@intel.com>
 250
 251         PR binutils/3235
 252         * i386-dis.c (OP_OFF64): Get 32bit offset if there is an
 253         address size prefix.
 254
 255 2006-09-17  Mei Ligang  <ligang@sunnorth.com.cn>
 256
 257         * score-dis.c: New file.
 258         * score-opc.h: New file.
 259         * Makefile.am: Add Score files.
 260         * Makefile.in: Regenerate.
 261         * configure.in: Add support for Score target.
 262         * configure: Regenerate.
 263         * disassemble.c: Add support for Score target.
 264
 265 2006-09-16  Nick Clifton  <nickc@redhat.com>
 266             Pedro Alves  <pedro_alves@portugalmail.pt>
 267
 268         * arm-dis.c: Make use of new STRING_COMMA_LEN and CONST_STRNEQ
 269         macros defined in bfd.h.
 270         * cris-dis.c: Likewise.
 271         * h8300-dis.c: Likewise.
 272         * i386-dis.c: Likewise.
 273         * ia64-gen.c: Likewise.
 274         * mips-dis: Likewise.
 275
 276 2006-09-04  Paul Brook  <paul@codesourcery.com>
 277
 278         * arm-dis.c (neon_opcode): Fix suffix on VMOVN.
 279
 280 2006-08-23  H.J. Lu  <hongjiu.lu@intel.com>
 281
 282         * i386-dis.c (three_byte_table): Expand to 256 elements.
 283
 284 2006-08-04  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 285
 286         PR binutils/3000
 287         * i386-dis.c (MXC,EMC): Define.
 288         (OP_MXC): New function to handle cvt* (convert instructions) between
 289         %xmm and %mm register correctly.
 290         (OP_EMC): ditto.
 291         (prefix_user_table): Modified cvtpi2pd,cvtpd2pi and cvttpd2pi
 292         instruction operands in PREGRP2,PREGRP3,PREGRP4 appropriately
 293         with EMC/MXC.
 294
 295 2006-07-29  Richard Sandiford  <richard@codesourcery.com>
 296
 297         * m68k-opc.c (m68k_opcodes): Fix operand specificer in the Coldfire
 298         "fdaddl" entry.
 299
 300 2006-07-19  Paul Brook  <paul@codesourcery.com>
 301
 302         * armd-dis.c (arm_opcodes): Fix rbit opcode.
 303
 304 2006-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 305
 306         * i386-dis.c (grps): Change "sldtQ", "strQ" and "smswQ" to
 307         "sldt", "str" and "smsw".
 308
 309 2006-07-15  H.J. Lu  <hongjiu.lu@intel.com>
 310
 311         PR binutils/2829
 312         * i386-dis.c (GRP11_C6): NEW.
 313         (GRP11_C7): Likewise.
 314         (GRP12): Updated.
 315         (GRP13): Likewise.
 316         (GRP14): Likewise.
 317         (GRP15): Likewise.
 318         (GRP16): Likewise.
 319         (GRPAMD): Likewise.
 320         (GRPPADLCK1): Likewise.
 321         (GRPPADLCK2): Likewise.
 322         (dis386): Use GRP11_C6 and GRP11_C7 for entres 0xc6 and 0xc7,
 323         respectively.
 324         (grps): Add entries for GRP11_C6 and GRP11_C7.
 325
 326 2006-07-10 Dwarakanath Rajagopal        <dwarak.rajagopal@amd.com>
 327            Michael Meissner             <michael.meissner@amd.com>
 328
 329         * i386-dis.c (dis386): Add support for 4 operand instructions. Add
 330         support for amdfam10 SSE4a/ABM instructions. Modify all
 331         initializer macros to have additional arguments. Disallow REP
 332         prefix for non-string instructions.
 333         (print_insn): Ditto.
 334
 335 2006-07-05  Julian Brown  <julian@codesourcery.com>
 336
 337         * arm-dis.c (coprocessor): Alter fmsrr disassembly syntax.
 338
 339 2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>
 340
 341         * i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
 342         (twobyte_has_modrm): Set 1 for 0x1f.
 343
 344 2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>
 345
 346         * i386-dis.c (NOP_Fixup): Removed.
 347         (NOP_Fixup1): New.
 348         (NOP_Fixup2): Likewise.
 349         (dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
 350
 351 2006-06-12  Julian Brown  <julian@codesourcery.com>
 352
 353         * arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed
 354         on 64-bit hosts.
 355
 356 2006-06-10  H.J. Lu  <hongjiu.lu@intel.com>
 357
 358         * i386.c (GRP10): Renamed to ...
 359         (GRP12): This.
 360         (GRP11): Renamed to ...
 361         (GRP13): This.
 362         (GRP12): Renamed to ...
 363         (GRP14): This.
 364         (GRP13): Renamed to ...
 365         (GRP15): This.
 366         (GRP14): Renamed to ...
 367         (GRP16): This.
 368         (dis386_twobyte): Updated.
 369         (grps): Likewise.
 370
 371 2006-06-09  Nick Clifton  <nickc@redhat.com>
 372
 373         * po/fi.po: Updated Finnish translation.
 374
 375 2006-06-07  Joseph S. Myers  <joseph@codesourcery.com>
 376
 377         * po/Make-in (pdf, ps): New dummy targets.
 378
 379 2006-06-06  Paul Brook  <paul@codesourcery.com>
 380
 381         * arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm
 382         instructions.
 383         (neon_opcodes): Add conditional execution specifiers.
 384         (thumb_opcodes): Ditto.
 385         (thumb32_opcodes): Ditto.
 386         (arm_conditional): Change 0xe to "al" and add "" to end.
 387         (ifthen_state, ifthen_next_state, ifthen_address): New.
 388         (IFTHEN_COND): Define.
 389         (print_insn_coprocessor, print_insn_neon): Print thumb conditions.
 390         (print_insn_arm): Change %c to use new values of arm_conditional.
 391         (print_insn_thumb16): Print thumb conditions.  Add %I.
 392         (print_insn_thumb32): Print thumb conditions.
 393         (find_ifthen_state): New function.
 394         (print_insn): Track IT block state.
 395
 396 2006-06-06  Ben Elliston  <bje@au.ibm.com>
 397             Anton Blanchard  <anton@samba.org>
 398             Peter Bergner  <bergner@vnet.ibm.com>
 399
 400         * ppc-dis.c (powerpc_dialect): Handle power6 option.
 401         (print_ppc_disassembler_options): Mention power6.
 402
 403 2006-06-06  Thiemo Seufer  <ths@mips.com>
 404             Chao-ying Fu  <fu@mips.com>
 405
 406         * mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
 407         * mips-opc.c: Add DSP64 instructions.
 408
 409 2006-06-06  Alan Modra  <amodra@bigpond.net.au>
 410
 411         * m68hc11-dis.c (print_insn): Warning fix.
 412
 413 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 414
 415         * po/Make-in (top_builddir): Define.
 416
 417 2006-06-05  Alan Modra  <amodra@bigpond.net.au>
 418
 419         * Makefile.am: Run "make dep-am".
 420         * Makefile.in: Regenerate.
 421         * config.in: Regenerate.
 422
 423 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 424
 425         * Makefile.am (INCLUDES): Use @INCINTL@.
 426         * acinclude.m4: Include new gettext macros.
 427         * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
 428         Remove local code for po/Makefile.
 429         * Makefile.in, aclocal.m4, configure: Regenerated.
 430
 431 2006-05-30  Nick Clifton  <nickc@redhat.com>
 432
 433         * po/es.po: Updated Spanish translation.
 434
 435 2006-05-25  Richard Sandiford  <richard@codesourcery.com>
 436
 437         * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
 438         and fmovem entries.  Put register list entries before immediate
 439         mask entries.  Use "l" rather than "L" in the fmovem entries.
 440         * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
 441         out from INFO.
 442         (m68k_scan_mask): New function, split out from...
 443         (print_insn_m68k): ...here.  If no architecture has been set,
 444         first try printing an m680x0 instruction, then try a Coldfire one.
 445
 446 2006-05-24  Nick Clifton  <nickc@redhat.com>
 447
 448         * po/ga.po: Updated Irish translation.
 449
 450 2006-05-22  Nick Clifton  <nickc@redhat.com>
 451
 452         * crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
 453
 454 2006-05-22  Nick Clifton  <nickc@redhat.com>
 455
 456         * po/nl.po: Updated translation.
 457
 458 2006-05-18  Alan Modra  <amodra@bigpond.net.au>
 459
 460         * avr-dis.c: Formatting fix.
 461
 462 2006-05-14  Thiemo Seufer  <ths@mips.com>
 463
 464         * mips16-opc.c (I1, I32, I64): New shortcut defines.
 465         (mips16_opcodes): Change membership of instructions to their
 466         lowest baseline ISA.
 467
 468 2006-05-09  H.J. Lu  <hongjiu.lu@intel.com>
 469
 470         * i386-dis.c (grps): Update sgdt/sidt for 64bit.
 471
 472 2006-05-05  Julian Brown  <julian@codesourcery.com>
 473
 474         * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
 475         vldm/vstm.
 476
 477 2006-05-05  Thiemo Seufer  <ths@mips.com>
 478             David Ung  <davidu@mips.com>
 479
 480         * mips-opc.c: Add macro for cache instruction.
 481
 482 2006-05-04  Thiemo Seufer  <ths@mips.com>
 483             Nigel Stephens  <nigel@mips.com>
 484             David Ung  <davidu@mips.com>
 485
 486         * mips-dis.c (mips_arch_choices): Add smartmips instruction
 487         decoding to MIPS32 and MIPS32R2.  Limit DSP decoding to release
 488         2 ISAs.  Add MIPS3D decoding to MIPS32R2.  Add MT decoding to
 489         MIPS64R2.
 490         * mips-opc.c: fix random typos in comments.
 491         (INSN_SMARTMIPS): New defines.
 492         (mips_builtin_opcodes): Add paired single support for MIPS32R2.
 493         Move bc3f, bc3fl, bc3t, bc3tl downwards.  Move flushi, flushd,
 494         flushid, wb upwards.  Move cfc3, ctc3 downwards.  Rework the
 495         FP_S and FP_D flags to denote single and double register
 496         accesses separately.  Move dmfc3, dmtc3, mfc3, mtc3 downwards.
 497         Allow jr.hb and jalr.hb for release 1 ISAs.  Allow luxc1, suxc1
 498         for MIPS32R2.  Add SmartMIPS instructions.  Add two-argument
 499         variants of bc2f, bc2fl, bc2t, bc2tl.  Add mfhc2, mthc2 to
 500         release 2 ISAs.
 501         * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
 502
 503 2006-05-03  Thiemo Seufer  <ths@mips.com>
 504
 505         * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
 506
 507 2006-05-02  Thiemo Seufer  <ths@mips.com>
 508             Nigel Stephens  <nigel@mips.com>
 509             David Ung  <davidu@mips.com>
 510
 511         * mips-dis.c (print_insn_args): Force mips16 to odd addresses.
 512         (print_mips16_insn_arg): Force mips16 to odd addresses.
 513
 514 2006-04-30  Thiemo Seufer  <ths@mips.com>
 515             David Ung  <davidu@mips.com>
 516
 517         * mips-opc.c (mips_builtin_opcodes): Add udi instructions
 518         "udi0" to "udi15".
 519         * mips-dis.c (print_insn_args): Adds udi argument handling.
 520
 521 2006-04-28  James E Wilson  <wilson@specifix.com>
 522
 523         * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
 524         error message.
 525
 526 2006-04-28  Thiemo Seufer  <ths@mips.com>
 527             David Ung  <davidu@mips.com>
 528             Nigel Stephens  <nigel@mips.com>
 529
 530         * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
 531         names.
 532
 533 2006-04-28  Thiemo Seufer  <ths@mips.com>
 534             Nigel Stephens  <nigel@mips.com>
 535             David Ung  <davidu@mips.com>
 536
 537         * mips-dis.c (print_insn_args): Add mips_opcode argument.
 538         (print_insn_mips):  Adjust print_insn_args call.
 539
 540 2006-04-28  Thiemo Seufer  <ths@mips.com>
 541             Nigel Stephens  <nigel@mips.com>
 542
 543         * mips-dis.c (print_insn_args): Print $fcc only for FP
 544         instructions, use $cc elsewise.
 545
 546 2006-04-28  Thiemo Seufer  <ths@mips.com>
 547             Nigel Stephens  <nigel@mips.com>
 548
 549         * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
 550         Map MIPS16 registers to O32 names.
 551         (print_mips16_insn_arg): Use mips16_reg_names.
 552
 553 2006-04-26  Julian Brown  <julian@codesourcery.com>
 554
 555         * arm-dis.c (print_insn_neon): Disassemble floating-point constant
 556         VMOV.
 557
 558 2006-04-26  Nathan Sidwell  <nathan@codesourcery.com>
 559             Julian Brown  <julian@codesourcery.com>
 560
 561         * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
 562         %<code>[zy] into %[zy]<code>.  Expand meaning of %<bitfield>['`?].
 563         Add unified load/store instruction names.
 564         (neon_opcode_table): New.
 565         (arm_opcodes): Expand meaning of %<bitfield>['`?].
 566         (arm_decode_bitfield): New.
 567         (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
 568         Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
 569         (print_insn_neon): New.
 570         (print_insn_arm): Adjust print_insn_coprocessor call. Call
 571         print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
 572         (print_insn_thumb32): Likewise.
 573
 574 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 575
 576         * Makefile.am: Run "make dep-am".
 577         * Makefile.in: Regenerate.
 578
 579 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 580
 581         * avr-dis.c (avr_operand): Warning fix.
 582
 583         * configure: Regenerate.
 584
 585 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 586
 587         * po/POTFILES.in: Regenerated.
 588
 589 2006-04-12   Hochstein  <hochstein@algo.informatik.tu-darmstadt.de>
 590
 591         PR binutils/2454
 592         * avr-dis.c (avr_operand): Arrange for a comment to appear before
 593         the symolic form of an address, so that the output of objdump -d
 594         can be reassembled.
 595
 596 2006-04-10  DJ Delorie  <dj@redhat.com>
 597
 598         * m32c-asm.c: Regenerate.
 599
 600 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 601
 602         * Makefile.am: Add install-html target.
 603         * Makefile.in: Regenerate.
 604
 605 2006-04-06  Nick Clifton  <nickc@redhat.com>
 606
 607         * po/vi/po: Updated Vietnamese translation.
 608
 609 2006-03-31  Paul Koning  <ni1d@arrl.net>
 610
 611         * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
 612
 613 2006-03-16  Bernd Schmidt  <bernd.schmidt@analog.com>
 614
 615         * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
 616         logic to identify halfword shifts.
 617
 618 2006-03-16  Paul Brook  <paul@codesourcery.com>
 619
 620         * arm-dis.c (arm_opcodes): Rename swi to svc.
 621         (thumb_opcodes): Ditto.
 622
 623 2006-03-13  DJ Delorie  <dj@redhat.com>
 624
 625         * m32c-asm.c: Regenerate.
 626         * m32c-desc.c: Likewise.
 627         * m32c-desc.h: Likewise.
 628         * m32c-dis.c: Likewise.
 629         * m32c-ibld.c: Likewise.
 630         * m32c-opc.c: Likewise.
 631         * m32c-opc.h: Likewise.
 632
 633 2006-03-10  DJ Delorie  <dj@redhat.com>
 634
 635         * m32c-desc.c: Regenerate with mul.l, mulu.l.
 636         * m32c-opc.c: Likewise.
 637         * m32c-opc.h: Likewise.
 638
 639
 640 2006-03-09  Nick Clifton  <nickc@redhat.com>
 641
 642         * po/sv.po: Updated Swedish translation.
 643
 644 2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>
 645
 646         PR binutils/2428
 647         * i386-dis.c (REP_Fixup): New function.
 648         (AL): Remove duplicate.
 649         (Xbr): New.
 650         (Xvr): Likewise.
 651         (Ybr): Likewise.
 652         (Yvr): Likewise.
 653         (indirDXr): Likewise.
 654         (ALr): Likewise.
 655         (eAXr): Likewise.
 656         (dis386): Updated entries of ins, outs, movs, lods and stos.
 657
 658 2006-03-05  Nick Clifton  <nickc@redhat.com>
 659
 660         * cgen-ibld.in (insert_normal): Cope with attempts to insert a
 661         signed 32-bit value into an unsigned 32-bit field when the host is
 662         a 64-bit machine.
 663         * fr30-ibld.c: Regenerate.
 664         * frv-ibld.c: Regenerate.
 665         * ip2k-ibld.c: Regenerate.
 666         * iq2000-asm.c: Regenerate.
 667         * iq2000-ibld.c: Regenerate.
 668         * m32c-ibld.c: Regenerate.
 669         * m32r-ibld.c: Regenerate.
 670         * openrisc-ibld.c: Regenerate.
 671         * xc16x-ibld.c: Regenerate.
 672         * xstormy16-ibld.c: Regenerate.
 673
 674 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 675
 676         * xc16x-asm.c: Regenerate.
 677         * xc16x-dis.c: Regenerate.
 678
 679 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 680
 681         * po/Make-in: Add html target.
 682
 683 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 684
 685         * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
 686         Intel Merom New Instructions.
 687         (THREE_BYTE_0): Likewise.
 688         (THREE_BYTE_1): Likewise.
 689         (three_byte_table): Likewise.
 690         (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
 691         THREE_BYTE_1 for entry 0x3a.
 692         (twobyte_has_modrm): Updated.
 693         (twobyte_uses_SSE_prefix): Likewise.
 694         (print_insn): Handle 3-byte opcodes used by Intel Merom New
 695         Instructions.
 696
 697 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 698
 699         * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
 700         (v9_hpriv_reg_names): New table.
 701         (print_insn_sparc): Allow values up to 16 for '?' and '!'.
 702         New cases '$' and '%' for read/write hyperprivileged register.
 703         * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
 704         window handling and rdhpr/wrhpr instructions.
 705
 706 2006-02-24  DJ Delorie  <dj@redhat.com>
 707
 708         * m32c-desc.c: Regenerate with linker relaxation attributes.
 709         * m32c-desc.h: Likewise.
 710         * m32c-dis.c: Likewise.
 711         * m32c-opc.c: Likewise.
 712
 713 2006-02-24  Paul Brook  <paul@codesourcery.com>
 714
 715         * arm-dis.c (arm_opcodes): Add V7 instructions.
 716         (thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
 717         (print_arm_address): New function.
 718         (print_insn_arm): Use it.  Add 'P' and 'U' cases.
 719         (psr_name): New function.
 720         (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
 721
 722 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 723
 724         * ia64-opc-i.c (bXc): New.
 725         (mXc): Likewise.
 726         (OpX2TaTbYaXcC): Likewise.
 727         (TF). Likewise.
 728         (TFCM). Likewise.
 729         (ia64_opcodes_i): Add instructions for tf.
 730
 731         * ia64-opc.h (IMMU5b): New.
 732
 733         * ia64-asmtab.c: Regenerated.
 734
 735 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 736
 737         * ia64-gen.c: Update copyright years.
 738         * ia64-opc-b.c: Likewise.
 739
 740 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 741
 742         * ia64-gen.c (lookup_regindex): Handle ".vm".
 743         (print_dependency_table): Handle '\"'.
 744
 745         * ia64-ic.tbl: Updated from SDM 2.2.
 746         * ia64-raw.tbl: Likewise.
 747         * ia64-waw.tbl: Likewise.
 748         * ia64-asmtab.c: Regenerated.
 749
 750         * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
 751
 752 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 753             Anil Paranjape   <anilp1@kpitcummins.com>
 754             Shilin Shakti    <shilins@kpitcummins.com>
 755
 756         * xc16x-desc.h: New file
 757         * xc16x-desc.c: New file
 758         * xc16x-opc.h: New file
 759         * xc16x-opc.c: New file
 760         * xc16x-ibld.c: New file
 761         * xc16x-asm.c: New file
 762         * xc16x-dis.c: New file
 763         * Makefile.am: Entries for xc16x
 764         * Makefile.in: Regenerate
 765         * cofigure.in: Add xc16x target information.
 766         * configure: Regenerate.
 767         * disassemble.c: Add xc16x target information.
 768
 769 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 770
 771         * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
 772         moves.
 773
 774 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 775
 776         * i386-dis.c ('Z'): Add a new macro.
 777         (dis386_twobyte): Use "movZ" for control register moves.
 778
 779 2006-02-10  Nick Clifton  <nickc@redhat.com>
 780
 781         * iq2000-asm.c: Regenerate.
 782
 783 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 784
 785         * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
 786
 787 2006-01-26  David Ung  <davidu@mips.com>
 788
 789         * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
 790         ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
 791         floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
 792         nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
 793         rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
 794
 795 2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>
 796
 797         * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
 798         ld_d_r, pref_xd_cb): Use signed char to hold data to be
 799         disassembled.
 800         * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
 801         buffer overflows when disassembling instructions like
 802         ld (ix+123),0x23
 803         * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
 804         operand, if the offset is negative.
 805
 806 2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>
 807
 808         * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
 809         unsigned char to hold data to be disassembled.
 810
 811 2006-01-17  Andreas Schwab  <schwab@suse.de>
 812
 813         PR binutils/1486
 814         * disassemble.c (disassemble_init_for_target): Set
 815         disassembler_needs_relocs for bfd_arch_arm.
 816
 817 2006-01-16  Paul Brook  <paul@codesourcery.com>
 818
 819         * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
 820         f?add?, and f?sub? instructions.
 821
 822 2006-01-16  Nick Clifton  <nickc@redhat.com>
 823
 824         * po/zh_CN.po: New Chinese (simplified) translation.
 825         * configure.in (ALL_LINGUAS): Add "zh_CH".
 826         * configure: Regenerate.
 827
 828 2006-01-05  Paul Brook  <paul@codesourcery.com>
 829
 830         * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
 831
 832 2006-01-06  DJ Delorie  <dj@redhat.com>
 833
 834         * m32c-desc.c: Regenerate.
 835         * m32c-opc.c: Regenerate.
 836         * m32c-opc.h: Regenerate.
 837
 838 2006-01-03  DJ Delorie  <dj@redhat.com>
 839
 840         * cgen-ibld.in (extract_normal): Avoid memory range errors.
 841         * m32c-ibld.c: Regenerated.
 842
 843 For older changes see ChangeLog-2005
 844 \f
 845 Local Variables:
 846 mode: change-log
 847 left-margin: 8
 848 fill-column: 74
 849 version-control: never
 850 End: