opcodes/ChangeLog

   1 2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
   2
   3         From  Robin Getz  <robin.getz@analog.com>
   4         * bfin-dis.c (bu32): Typedef.
   5         (enum const_forms_t): Add c_uimm32 and c_huimm32.
   6         (constant_formats[]): Add uimm32 and huimm16.
   7         (fmtconst_val): New.
   8         (uimm32): Define.
   9         (huimm32): Define.
  10         (imm16_val): Define.
  11         (luimm16_val): Define.
  12         (struct saved_state): Define.
  13         (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
  14         A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
  15         LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
  16         (get_allreg): New.
  17         (decode_LDIMMhalf_0): Print out the whole register value.
  18
  19         From Jie Zhang  <jie.zhang@analog.com>
  20         * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
  21         multiply and multiply-accumulate to data register instruction.
  22
  23 2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
  24
  25         * aclocal.m4: Regenerate.
  26         * configure: Likewise.
  27         * Makefile.in: Likewise.
  28
  29 2008-03-13  Alan Modra  <amodra@bigpond.net.au>
  30
  31         * Makefile.am: Run "make dep-am".
  32         * Makefile.in: Regenerate.
  33         * configure: Regenerate.
  34
  35 2008-03-07  Alan Modra  <amodra@bigpond.net.au>
  36
  37         * ppc-opc.c (powerpc_opcodes): Order and format.
  38
  39 2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
  40
  41         * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
  42         * i386-tbl.h: Regenerated.
  43
  44 2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
  45
  46         * i386-opc.tbl: Disallow 16-bit near indirect branches for
  47         x86-64.
  48         * i386-tbl.h: Regenerated.
  49
  50 2008-02-21  Jan Beulich  <jbeulich@novell.com>
  51
  52         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
  53         and Fword for far indirect jmp. Allow Reg16 and Word for near
  54         indirect jmp on x86-64. Disallow Fword for lcall.
  55         * i386-tbl.h: Re-generate.
  56
  57 2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
  58
  59         * cr16-opc.c  (cr16_num_optab): Defined
  60
  61 2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>
  62
  63         * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
  64         * i386-init.h: Regenerated.
  65
  66 2008-02-14  Nick Clifton  <nickc@redhat.com>
  67
  68         PR binutils/5524
  69         * configure.in (SHARED_LIBADD): Select the correct host specific
  70         file extension for shared libraries.
  71         * configure: Regenerate.
  72
  73 2008-02-13  Jan Beulich  <jbeulich@novell.com>
  74
  75         * i386-opc.h (RegFlat): New.
  76         * i386-reg.tbl (flat): Add.
  77         * i386-tbl.h: Re-generate.
  78
  79 2008-02-13  Jan Beulich  <jbeulich@novell.com>
  80
  81         * i386-dis.c (a_mode): New.
  82         (cond_jump_mode): Adjust.
  83         (Ma): Change to a_mode.
  84         (intel_operand_size): Handle a_mode.
  85         * i386-opc.tbl: Allow Dword and Qword for bound.
  86         * i386-tbl.h: Re-generate.
  87
  88 2008-02-13  Jan Beulich  <jbeulich@novell.com>
  89
  90         * i386-gen.c (process_i386_registers): Process new fields.
  91         * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
  92         unsigned char. Add dw2_regnum and Dw2Inval.
  93         * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
  94         register names.
  95         * i386-tbl.h: Re-generate.
  96
  97 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
  98
  99         * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
 100         * i386-init.h: Updated.
 101
 102 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 103
 104         * i386-gen.c (cpu_flags): Add CpuXsave.
 105
 106         * i386-opc.h (CpuXsave): New.
 107         (CpuLM): Updated.
 108         (i386_cpu_flags): Add cpuxsave.
 109
 110         * i386-dis.c (MOD_0FAE_REG_4): New.
 111         (RM_0F01_REG_2): Likewise.
 112         (MOD_0FAE_REG_5): Updated.
 113         (RM_0F01_REG_3): Likewise.
 114         (reg_table): Use MOD_0FAE_REG_4.
 115         (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
 116         for xrstor.
 117         (rm_table): Add RM_0F01_REG_2.
 118
 119         * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
 120         * i386-init.h: Regenerated.
 121         * i386-tbl.h: Likewise.
 122
 123 2008-02-11  Jan Beulich  <jbeulich@novell.com>
 124
 125         * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
 126         Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
 127         * i386-tbl.h: Re-generate.
 128
 129 2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
 130
 131         PR 5715
 132         * configure: Regenerated.
 133
 134 2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
 135
 136         * mips-dis.c: Update copyright.
 137         (mips_arch_choices): Add Octeon.
 138         * mips-opc.c: Update copyright.
 139         (IOCT): New macro.
 140         (mips_builtin_opcodes): Add Octeon instruction synciobdma.
 141
 142 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 143
 144         * ppc-opc.c: Support optional L form mtmsr.
 145
 146 2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 147
 148         * i386-dis.c (OP_E_extended): Handle r12 like rsp.
 149
 150 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 151
 152         * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
 153         * i386-init.h: Regenerated.
 154
 155 2008-01-23  Tristan Gingold  <gingold@adacore.com>
 156
 157         * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
 158         ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 159
 160 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 161
 162         * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
 163         (cpu_flags): Likewise.
 164
 165         * i386-opc.h (CpuMMX2): Removed.
 166         (CpuSSE): Updated.
 167
 168         * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
 169         * i386-init.h: Regenerated.
 170         * i386-tbl.h: Likewise.
 171
 172 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 173
 174         * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
 175         CPU_SMX_FLAGS.
 176         * i386-init.h: Regenerated.
 177
 178 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 179
 180         * i386-opc.tbl: Use Qword on movddup.
 181         * i386-tbl.h: Regenerated.
 182
 183 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 184
 185         * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
 186         * i386-tbl.h: Regenerated.
 187
 188 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 189
 190         * i386-dis.c (Mx): New.
 191         (PREFIX_0FC3): Likewise.
 192         (PREFIX_0FC7_REG_6): Updated.
 193         (dis386_twobyte): Use PREFIX_0FC3.
 194         (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
 195         Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
 196         movntss.
 197
 198 2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 199
 200         * i386-gen.c (opcode_modifiers): Add IntelSyntax.
 201         (operand_types): Add Mem.
 202
 203         * i386-opc.h (IntelSyntax): New.
 204         * i386-opc.h (Mem): New.
 205         (Byte): Updated.
 206         (Opcode_Modifier_Max): Updated.
 207         (i386_opcode_modifier): Add intelsyntax.
 208         (i386_operand_type): Add mem.
 209
 210         * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
 211         instructions.
 212
 213         * i386-reg.tbl: Add size for accumulator.
 214
 215         * i386-init.h: Regenerated.
 216         * i386-tbl.h: Likewise.
 217
 218 2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 219
 220         * i386-opc.h (Byte): Fix a typo.
 221
 222 2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 223
 224         PR gas/5534
 225         * i386-gen.c (operand_type_init): Add Dword to
 226         OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
 227         (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
 228         Qword and Xmmword.
 229         (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
 230         Xmmword, Unspecified and Anysize.
 231         (set_bitfield): Make Mmword an alias of Qword.  Make Oword
 232         an alias of Xmmword.
 233
 234         * i386-opc.h (CheckSize): Removed.
 235         (Byte): Updated.
 236         (Word): Likewise.
 237         (Dword): Likewise.
 238         (Qword): Likewise.
 239         (Xmmword): Likewise.
 240         (FWait): Updated.
 241         (OTMax): Likewise.
 242         (i386_opcode_modifier): Remove checksize, byte, word, dword,
 243         qword and xmmword.
 244         (Fword): New.
 245         (TBYTE): Likewise.
 246         (Unspecified): Likewise.
 247         (Anysize): Likewise.
 248         (i386_operand_type): Add byte, word, dword, fword, qword,
 249         tbyte xmmword, unspecified and anysize.
 250
 251         * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
 252         Tbyte, Xmmword, Unspecified and Anysize.
 253
 254         * i386-reg.tbl: Add size for accumulator.
 255
 256         * i386-init.h: Regenerated.
 257         * i386-tbl.h: Likewise.
 258
 259 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
 260
 261         * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
 262         (REG_0F18): Updated.
 263         (reg_table): Updated.
 264         (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
 265         (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
 266
 267 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 268
 269         * i386-gen.c (set_bitfield): Use fail () on error.
 270
 271 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 272
 273         * i386-gen.c (lineno): New.
 274         (filename): Likewise.
 275         (set_bitfield): Report filename and line numer on error.
 276         (process_i386_opcodes): Set filename and update lineno.
 277         (process_i386_registers): Likewise.
 278
 279 2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
 280
 281         * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
 282         ATTSyntax.
 283
 284         * i386-opc.h (IntelMnemonic): Renamed to ..
 285         (ATTSyntax): This
 286         (Opcode_Modifier_Max): Updated.
 287         (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
 288         and intelsyntax.
 289
 290         * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
 291         on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
 292         * i386-tbl.h: Regenerated.
 293
 294 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 295
 296         * i386-gen.c: Update copyright to 2008.
 297         * i386-opc.h: Likewise.
 298         * i386-opc.tbl: Likewise.
 299
 300         * i386-init.h: Regenerated.
 301         * i386-tbl.h: Likewise.
 302
 303 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 304
 305         * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
 306         pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
 307         * i386-tbl.h: Regenerated.
 308
 309 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 310
 311         * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
 312         CpuSSE4_2_Or_ABM.
 313         (cpu_flags): Likewise.
 314
 315         * i386-opc.h (CpuSSE4_1_Or_5): Removed.
 316         (CpuSSE4_2_Or_ABM): Likewise.
 317         (CpuLM): Updated.
 318         (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
 319
 320         * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
 321         Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
 322         and CpuPadLock, respectively.
 323         * i386-init.h: Regenerated.
 324         * i386-tbl.h: Likewise.
 325
 326 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 327
 328         * i386-gen.c (opcode_modifiers): Remove No_xSuf.
 329
 330         * i386-opc.h (No_xSuf): Removed.
 331         (CheckSize): Updated.
 332
 333         * i386-tbl.h: Regenerated.
 334
 335 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 336
 337         * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
 338         CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
 339         CPU_SSE5_FLAGS.
 340         (cpu_flags): Add CpuSSE4_2_Or_ABM.
 341
 342         * i386-opc.h (CpuSSE4_2_Or_ABM): New.
 343         (CpuLM): Updated.
 344         (i386_cpu_flags): Add cpusse4_2_or_abm.
 345
 346         * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
 347         CpuABM|CpuSSE4_2 on popcnt.
 348         * i386-init.h: Regenerated.
 349         * i386-tbl.h: Likewise.
 350
 351 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 352
 353         * i386-opc.h: Update comments.
 354
 355 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 356
 357         * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
 358         * i386-opc.h: Likewise.
 359         * i386-opc.tbl: Likewise.
 360
 361 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 362
 363         PR gas/5534
 364         * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
 365         Byte, Word, Dword, QWord and Xmmword.
 366
 367         * i386-opc.h (No_xSuf): New.
 368         (CheckSize): Likewise.
 369         (Byte): Likewise.
 370         (Word): Likewise.
 371         (Dword): Likewise.
 372         (QWord): Likewise.
 373         (Xmmword): Likewise.
 374         (FWait): Updated.
 375         (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
 376         Dword, QWord and Xmmword.
 377
 378         * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
 379         used.
 380         * i386-tbl.h: Regenerated.
 381
 382 2008-01-02  Mark Kettenis  <kettenis@gnu.org>
 383
 384         * m88k-dis.c (instructions): Fix fcvt.* instructions.
 385         From Miod Vallat.
 386
 387 For older changes see ChangeLog-2007
 388 \f
 389 Local Variables:
 390 mode: change-log
 391 left-margin: 8
 392 fill-column: 74
 393 version-control: never
 394 End: