1 2005-11-16 Alan Modra <amodra@bigpond.net.au>
3 * ppc-opc.c (powerpc_opcodes): Add frin,friz,frip,frim. Correct
6 2005-11-14 David Ung <davidu@mips.com>
8 * mips16-opc.c: Add MIPS16e save/restore opcodes.
9 * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
10 codes for save/restore.
12 2005-11-10 Andreas Schwab <schwab@suse.de>
14 * m68k-dis.c (print_insn_m68k): Only match FPU insns with
17 2005-11-08 H.J. Lu <hongjiu.lu@intel.com>
19 * m32c-desc.c: Regenerated.
21 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
24 * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
25 ms1-opc.c, ms1-opc.h: Regenerated.
27 2005-11-07 Steve Ellcey <sje@cup.hp.com>
29 * configure: Regenerate after modifying bfd/warning.m4.
31 2005-11-07 Alan Modra <amodra@bigpond.net.au>
33 * i386-dis.c (ckprefix): Handle rex on fwait. Don't print
34 ignored rex prefixes here.
35 (print_insn): Instead, handle them similarly to fwait followed
38 2005-11-02 H.J. Lu <hongjiu.lu@intel.com>
40 * iq2000-desc.c: Regenerated.
41 * iq2000-desc.h: Likewise.
42 * iq2000-dis.c: Likewise.
43 * iq2000-opc.c: Likewise.
45 2005-11-02 Paul Brook <paul@codesourcery.com>
47 * arm-dis.c (print_insn_thumb32): Word align blx target address.
49 2005-10-31 Alan Modra <amodra@bigpond.net.au>
51 * arm-dis.c (print_insn): Warning fix.
53 2005-10-30 H.J. Lu <hongjiu.lu@intel.com>
55 * Makefile.am: Run "make dep-am".
56 * Makefile.in: Regenerated.
58 * dep-in.sed: Replace " ./" with " ".
60 2005-10-28 Dave Brolley <brolley@redhat.com>
62 * All CGEN-generated sources: Regenerate.
64 Contribute the following changes:
65 2005-09-19 Dave Brolley <brolley@redhat.com>
67 * disassemble.c (disassemble_init_for_target): Add 'break' to case for
68 bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
71 2005-02-16 Dave Brolley <brolley@redhat.com>
73 * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
74 cgen_isa_mask_* to cgen_bitset_*.
75 * cgen-opc.c: Likewise.
77 2003-11-28 Richard Sandiford <rsandifo@redhat.com>
79 * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
80 * *-dis.c: Regenerate.
82 2003-06-05 DJ Delorie <dj@redhat.com>
84 * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
85 it, as it may point to a reused buffer. Set prev_isas when we
88 2002-12-13 Dave Brolley <brolley@redhat.com>
90 * cgen-opc.c (cgen_isa_mask_create): New support function for
92 (cgen_isa_mask_init): Ditto.
93 (cgen_isa_mask_clear): Ditto.
94 (cgen_isa_mask_add): Ditto.
95 (cgen_isa_mask_set): Ditto.
96 (cgen_isa_supported): Ditto.
97 (cgen_isa_mask_compare): Ditto.
98 (cgen_isa_mask_intersection): Ditto.
99 (cgen_isa_mask_copy): Ditto.
100 (cgen_isa_mask_combine): Ditto.
101 * cgen-dis.in (libiberty.h): #include it.
102 (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
103 (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
104 * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
105 * Makefile.in: Regenerated.
107 2005-10-27 DJ Delorie <dj@redhat.com>
109 * m32c-asm.c: Regenerate.
110 * m32c-desc.c: Regenerate.
111 * m32c-desc.h: Regenerate.
112 * m32c-dis.c: Regenerate.
113 * m32c-ibld.c: Regenerate.
114 * m32c-opc.c: Regenerate.
115 * m32c-opc.h: Regenerate.
117 2005-10-26 DJ Delorie <dj@redhat.com>
119 * m32c-asm.c: Regenerate.
120 * m32c-desc.c: Regenerate.
121 * m32c-desc.h: Regenerate.
122 * m32c-dis.c: Regenerate.
123 * m32c-ibld.c: Regenerate.
124 * m32c-opc.c: Regenerate.
125 * m32c-opc.h: Regenerate.
127 2005-10-26 Paul Brook <paul@codesourcery.com>
129 * arm-dis.c (arm_opcodes): Correct "sel" entry.
131 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
133 * m32r-asm.c: Regenerate.
135 2005-10-25 DJ Delorie <dj@redhat.com>
137 * m32c-asm.c: Regenerate.
138 * m32c-desc.c: Regenerate.
139 * m32c-desc.h: Regenerate.
140 * m32c-dis.c: Regenerate.
141 * m32c-ibld.c: Regenerate.
142 * m32c-opc.c: Regenerate.
143 * m32c-opc.h: Regenerate.
145 2005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
147 * configure.in: Add target architecture bfd_arch_z80.
148 * configure: Regenerated.
149 * disassemble.c (disassembler)<ARCH_z80>: Add case
151 * z80-dis.c: New file.
153 2005-10-25 Alan Modra <amodra@bigpond.net.au>
155 * po/POTFILES.in: Regenerate.
156 * po/opcodes.pot: Regenerate.
158 2005-10-24 Jan Beulich <jbeulich@novell.com>
160 * ia64-asmtab.c: Regenerate.
162 2005-10-21 DJ Delorie <dj@redhat.com>
164 * m32c-asm.c: Regenerate.
165 * m32c-desc.c: Regenerate.
166 * m32c-desc.h: Regenerate.
167 * m32c-dis.c: Regenerate.
168 * m32c-ibld.c: Regenerate.
169 * m32c-opc.c: Regenerate.
170 * m32c-opc.h: Regenerate.
172 2005-10-21 Nick Clifton <nickc@redhat.com>
174 * bfin-dis.c: Tidy up code, removing redundant constructs.
176 2005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
178 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
181 2005-10-18 Nick Clifton <nickc@redhat.com>
183 * m32r-asm.c: Regenerate after updating m32r.opc.
185 2005-10-18 Jie Zhang <jie.zhang@analog.com>
187 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
188 reading instruction from memory.
190 2005-10-18 Nick Clifton <nickc@redhat.com>
192 * m32r-asm.c: Regenerate after updating m32r.opc.
194 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
196 * m32r-asm.c: Regenerate after updating m32r.opc.
198 2005-10-08 James Lemke <jim@wasabisystems.com>
200 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
203 2005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
205 * ppc-dis.c (struct dis_private): Remove.
206 (powerpc_dialect): Avoid aliasing warnings.
207 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
209 2005-09-30 Nick Clifton <nickc@redhat.com>
211 * po/ga.po: New Irish translation.
212 * configure.in (ALL_LINGUAS): Add "ga".
213 * configure: Regenerate.
215 2005-09-30 H.J. Lu <hongjiu.lu@intel.com>
217 * Makefile.am: Run "make dep-am".
218 * Makefile.in: Regenerated.
219 * aclocal.m4: Likewise.
220 * configure: Likewise.
222 2005-09-30 Catherine Moore <clm@cm00re.com>
224 * Makefile.am: Bfin support.
225 * Makefile.in: Regenerated.
226 * aclocal.m4: Regenerated.
227 * bfin-dis.c: New file.
228 * configure.in: Bfin support.
229 * configure: Regenerated.
230 * disassemble.c (ARCH_bfin): Define.
231 (disassembler): Add case for bfd_arch_bfin.
233 2005-09-28 Jan Beulich <jbeulich@novell.com>
235 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
238 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
239 (dis386): Document and use new 'V' meta character. Use it for
240 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
241 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
242 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
243 data prefix as used whenever DFLAG was examined. Handle 'V'.
244 (intel_operand_size): Use stack_v_mode.
245 (OP_E): Use stack_v_mode, but handle only the special case of
246 64-bit mode without operand size override here; fall through to
247 v_mode case otherwise.
248 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
249 and no operand size override is present.
250 (OP_J): Use get32s for obtaining the displacement also when rex64
253 2005-09-08 Paul Brook <paul@codesourcery.com>
255 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
257 2005-09-06 Chao-ying Fu <fu@mips.com>
259 * mips-opc.c (MT32): New define.
260 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
261 bottom to avoid opcode collision with "mftr" and "mttr".
263 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
264 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
267 2005-09-02 Paul Brook <paul@codesourcery.com>
269 * arm-dis.c (coprocessor_opcodes): Add null terminator.
271 2005-09-02 Paul Brook <paul@codesourcery.com>
273 * arm-dis.c (coprocessor_opcodes): New.
274 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
275 (print_insn_coprocessor): New function.
276 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
278 (print_insn_thumb32): Use print_insn_coprocessor.
280 2005-08-30 Paul Brook <paul@codesourcery.com>
282 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
284 2005-08-26 Jan Beulich <jbeulich@novell.com>
286 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
288 (OP_E): Call intel_operand_size, move call site out of mode
290 (OP_OFF): Call intel_operand_size if suffix_always. Remove
291 ATTRIBUTE_UNUSED from parameters.
292 (OP_OFF64): Likewise.
293 (OP_ESreg): Call intel_operand_size.
294 (OP_DSreg): Likewise.
295 (OP_DIR): Use colon rather than semicolon as separator of far
298 2005-08-25 Chao-ying Fu <fu@mips.com>
300 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
301 (mips_builtin_opcodes): Add DSP instructions.
302 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
304 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
307 2005-08-23 David Ung <davidu@mips.com>
309 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
310 instructions to the table.
312 2005-08-18 Alan Modra <amodra@bigpond.net.au>
314 * a29k-dis.c: Delete.
315 * Makefile.am: Remove a29k support.
316 * configure.in: Likewise.
317 * disassemble.c: Likewise.
318 * Makefile.in: Regenerate.
319 * configure: Regenerate.
320 * po/POTFILES.in: Regenerate.
322 2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
324 * ppc-dis.c (powerpc_dialect): Handle e300.
325 (print_ppc_disassembler_options): Likewise.
326 * ppc-opc.c (PPCE300): Define.
327 (powerpc_opcodes): Mark icbt as available for the e300.
329 2005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
331 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
332 Use "rp" instead of "%r2" in "b,l" insns.
334 2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
336 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
337 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
339 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
340 and 4 bit optional masks.
341 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
342 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
343 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
344 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
345 (s390_opformats): Likewise.
346 * s390-opc.txt: Add new instructions for cpu type z9-109.
348 2005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
350 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
352 2005-07-29 Paul Brook <paul@codesourcery.com>
354 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
356 2005-07-29 Paul Brook <paul@codesourcery.com>
358 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
359 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
361 2005-07-25 DJ Delorie <dj@redhat.com>
363 * m32c-asm.c Regenerate.
364 * m32c-dis.c Regenerate.
366 2005-07-20 DJ Delorie <dj@redhat.com>
368 * disassemble.c (disassemble_init_for_target): M32C ISAs are
369 enums, so convert them to bit masks, which attributes are.
371 2005-07-18 Nick Clifton <nickc@redhat.com>
373 * configure.in: Restore alpha ordering to list of arches.
374 * configure: Regenerate.
375 * disassemble.c: Restore alpha ordering to list of arches.
377 2005-07-18 Nick Clifton <nickc@redhat.com>
379 * m32c-asm.c: Regenerate.
380 * m32c-desc.c: Regenerate.
381 * m32c-desc.h: Regenerate.
382 * m32c-dis.c: Regenerate.
383 * m32c-ibld.h: Regenerate.
384 * m32c-opc.c: Regenerate.
385 * m32c-opc.h: Regenerate.
387 2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
389 * i386-dis.c (PNI_Fixup): Update comment.
390 (VMX_Fixup): Properly handle the suffix check.
392 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
394 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
397 2005-07-16 Alan Modra <amodra@bigpond.net.au>
399 * Makefile.am: Run "make dep-am".
400 (stamp-m32c): Fix cpu dependencies.
401 * Makefile.in: Regenerate.
402 * ip2k-dis.c: Regenerate.
404 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
406 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
407 (VMX_Fixup): New. Fix up Intel VMX Instructions.
411 (dis386_twobyte): Updated entries 0x78 and 0x79.
412 (twobyte_has_modrm): Likewise.
413 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
414 (OP_G): Handle m_mode.
416 2005-07-14 Jim Blandy <jimb@redhat.com>
418 Add support for the Renesas M32C and M16C.
419 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
420 * m32c-desc.h, m32c-opc.h: New.
421 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
422 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
424 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
425 m32c-ibld.lo, m32c-opc.lo.
426 (CLEANFILES): List stamp-m32c.
427 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
428 (CGEN_CPUS): Add m32c.
429 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
430 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
431 (m32c_opc_h): New variable.
432 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
433 (m32c-opc.lo): New rules.
434 * Makefile.in: Regenerated.
435 * configure.in: Add case for bfd_m32c_arch.
436 * configure: Regenerated.
437 * disassemble.c (ARCH_m32c): New.
438 [ARCH_m32c]: #include "m32c-desc.h".
439 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
440 (disassemble_init_for_target) [ARCH_m32c]: Same.
442 * cgen-ops.h, cgen-types.h: New files.
443 * Makefile.am (HFILES): List them.
444 * Makefile.in: Regenerated.
446 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
448 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
449 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
450 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
451 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
452 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
453 v850-dis.c: Fix format bugs.
454 * ia64-gen.c (fail, warn): Add format attribute.
455 * or32-opc.c (debug): Likewise.
457 2005-07-07 Khem Raj <kraj@mvista.com>
459 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
462 2005-07-06 Alan Modra <amodra@bigpond.net.au>
464 * Makefile.am (stamp-m32r): Fix path to cpu files.
465 (stamp-m32r, stamp-iq2000): Likewise.
466 * Makefile.in: Regenerate.
467 * m32r-asm.c: Regenerate.
468 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
469 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
471 2005-07-05 Nick Clifton <nickc@redhat.com>
473 * iq2000-asm.c: Regenerate.
474 * ms1-asm.c: Regenerate.
476 2005-07-05 Jan Beulich <jbeulich@novell.com>
478 * i386-dis.c (SVME_Fixup): New.
479 (grps): Use it for the lidt entry.
480 (PNI_Fixup): Call OP_M rather than OP_E.
481 (INVLPG_Fixup): Likewise.
483 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
485 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
487 2005-07-01 Nick Clifton <nickc@redhat.com>
489 * a29k-dis.c: Update to ISO C90 style function declarations and
491 * alpha-opc.c: Likewise.
492 * arc-dis.c: Likewise.
493 * arc-opc.c: Likewise.
494 * avr-dis.c: Likewise.
495 * cgen-asm.in: Likewise.
496 * cgen-dis.in: Likewise.
497 * cgen-ibld.in: Likewise.
498 * cgen-opc.c: Likewise.
499 * cris-dis.c: Likewise.
500 * d10v-dis.c: Likewise.
501 * d30v-dis.c: Likewise.
502 * d30v-opc.c: Likewise.
503 * dis-buf.c: Likewise.
504 * dlx-dis.c: Likewise.
505 * h8300-dis.c: Likewise.
506 * h8500-dis.c: Likewise.
507 * hppa-dis.c: Likewise.
508 * i370-dis.c: Likewise.
509 * i370-opc.c: Likewise.
510 * m10200-dis.c: Likewise.
511 * m10300-dis.c: Likewise.
512 * m68k-dis.c: Likewise.
513 * m88k-dis.c: Likewise.
514 * mips-dis.c: Likewise.
515 * mmix-dis.c: Likewise.
516 * msp430-dis.c: Likewise.
517 * ns32k-dis.c: Likewise.
518 * or32-dis.c: Likewise.
519 * or32-opc.c: Likewise.
520 * pdp11-dis.c: Likewise.
521 * pj-dis.c: Likewise.
522 * s390-dis.c: Likewise.
523 * sh-dis.c: Likewise.
524 * sh64-dis.c: Likewise.
525 * sparc-dis.c: Likewise.
526 * sparc-opc.c: Likewise.
527 * sysdep.h: Likewise.
528 * tic30-dis.c: Likewise.
529 * tic4x-dis.c: Likewise.
530 * tic80-dis.c: Likewise.
531 * v850-dis.c: Likewise.
532 * v850-opc.c: Likewise.
533 * vax-dis.c: Likewise.
534 * w65-dis.c: Likewise.
535 * z8kgen.c: Likewise.
537 * fr30-*: Regenerate.
539 * ip2k-*: Regenerate.
540 * iq2000-*: Regenerate.
541 * m32r-*: Regenerate.
543 * openrisc-*: Regenerate.
544 * xstormy16-*: Regenerate.
546 2005-06-23 Ben Elliston <bje@gnu.org>
548 * m68k-dis.c: Use ISC C90.
549 * m68k-opc.c: Formatting fixes.
551 2005-06-16 David Ung <davidu@mips.com>
553 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
554 instructions to the table; seb/seh/sew/zeb/zeh/zew.
556 2005-06-15 Dave Brolley <brolley@redhat.com>
558 Contribute Morpho ms1 on behalf of Red Hat
559 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
560 ms1-opc.h: New files, Morpho ms1 target.
562 2004-05-14 Stan Cox <scox@redhat.com>
564 * disassemble.c (ARCH_ms1): Define.
565 (disassembler): Handle bfd_arch_ms1
567 2004-05-13 Michael Snyder <msnyder@redhat.com>
569 * Makefile.am, Makefile.in: Add ms1 target.
570 * configure.in: Ditto.
572 2005-06-08 Zack Weinberg <zack@codesourcery.com>
574 * arm-opc.h: Delete; fold contents into ...
575 * arm-dis.c: ... here. Move includes of internal COFF headers
576 next to includes of internal ELF headers.
577 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
578 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
579 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
580 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
581 (iwmmxt_wwnames, iwmmxt_wwssnames):
583 (regnames): Remove iWMMXt coprocessor register sets.
584 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
585 (get_arm_regnames): Adjust fourth argument to match above changes.
586 (set_iwmmxt_regnames): Delete.
587 (print_insn_arm): Constify 'c'. Use ISO syntax for function
588 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
589 and iwmmxt_cregnames, not set_iwmmxt_regnames.
590 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
591 ISO syntax for function pointer calls.
593 2005-06-07 Zack Weinberg <zack@codesourcery.com>
595 * arm-dis.c: Split up the comments describing the format codes, so
596 that the ARM and 16-bit Thumb opcode tables each have comments
597 preceding them that describe all the codes, and only the codes,
598 valid in those tables. (32-bit Thumb table is already like this.)
599 Reorder the lists in all three comments to match the order in
600 which the codes are implemented.
601 Remove all forward declarations of static functions. Convert all
602 function definitions to ISO C format.
603 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
605 (print_insn_thumb16): Remove unused case 'I'.
606 (print_insn): Update for changed calling convention of subroutines.
608 2005-05-25 Jan Beulich <jbeulich@novell.com>
610 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
611 hex (but retain it being displayed as signed). Remove redundant
612 checks. Add handling of displacements for 16-bit addressing in Intel
615 2005-05-25 Jan Beulich <jbeulich@novell.com>
617 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
618 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
619 masking of 'rm' in 16-bit memory address handling.
621 2005-05-19 Anton Blanchard <anton@samba.org>
623 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
624 (print_ppc_disassembler_options): Document it.
625 * ppc-opc.c (SVC_LEV): Define.
626 (LEV): Allow optional operand.
628 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
629 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
631 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
633 * Makefile.in: Regenerate.
635 2005-05-17 Zack Weinberg <zack@codesourcery.com>
637 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
638 instructions. Adjust disassembly of some opcodes to match
640 (thumb32_opcodes): New table.
641 (print_insn_thumb): Rename print_insn_thumb16; don't handle
642 two-halfword branches here.
643 (print_insn_thumb32): New function.
644 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
645 and print_insn_thumb32. Be consistent about order of
646 halfwords when printing 32-bit instructions.
648 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
651 * i386-dis.c (branch_v_mode): New.
652 (indirEv): Use branch_v_mode instead of v_mode.
653 (OP_E): Handle branch_v_mode.
655 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
657 * d10v-dis.c (dis_2_short): Support 64bit host.
659 2005-05-07 Nick Clifton <nickc@redhat.com>
661 * po/nl.po: Updated translation.
663 2005-05-07 Nick Clifton <nickc@redhat.com>
665 * Update the address and phone number of the FSF organization in
666 the GPL notices in the following files:
667 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
668 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
669 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
670 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
671 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
672 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
673 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
674 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
675 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
676 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
677 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
678 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
679 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
680 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
681 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
682 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
683 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
684 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
685 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
686 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
687 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
688 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
689 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
690 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
691 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
692 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
693 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
694 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
695 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
696 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
697 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
698 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
699 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
701 2005-05-05 James E Wilson <wilson@specifixinc.com>
703 * ia64-opc.c: Include sysdep.h before libiberty.h.
705 2005-05-05 Nick Clifton <nickc@redhat.com>
707 * configure.in (ALL_LINGUAS): Add vi.
708 * configure: Regenerate.
711 2005-04-26 Jerome Guitton <guitton@gnat.com>
713 * configure.in: Fix the check for basename declaration.
714 * configure: Regenerate.
716 2005-04-19 Alan Modra <amodra@bigpond.net.au>
718 * ppc-opc.c (RTO): Define.
719 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
720 entries to suit PPC440.
722 2005-04-18 Mark Kettenis <kettenis@gnu.org>
724 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
727 2005-04-14 Nick Clifton <nickc@redhat.com>
729 * po/fi.po: New translation: Finnish.
730 * configure.in (ALL_LINGUAS): Add fi.
731 * configure: Regenerate.
733 2005-04-14 Alan Modra <amodra@bigpond.net.au>
735 * Makefile.am (NO_WERROR): Define.
736 * configure.in: Invoke AM_BINUTILS_WARNINGS.
737 * Makefile.in: Regenerate.
738 * aclocal.m4: Regenerate.
739 * configure: Regenerate.
741 2005-04-04 Nick Clifton <nickc@redhat.com>
743 * fr30-asm.c: Regenerate.
744 * frv-asm.c: Regenerate.
745 * iq2000-asm.c: Regenerate.
746 * m32r-asm.c: Regenerate.
747 * openrisc-asm.c: Regenerate.
749 2005-04-01 Jan Beulich <jbeulich@novell.com>
751 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
752 visible operands in Intel mode. The first operand of monitor is
755 2005-04-01 Jan Beulich <jbeulich@novell.com>
757 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
758 easier future additions.
760 2005-03-31 Jerome Guitton <guitton@gnat.com>
762 * configure.in: Check for basename.
763 * configure: Regenerate.
766 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
768 * i386-dis.c (SEG_Fixup): New.
770 (dis386): Use "Sv" for 0x8c and 0x8e.
772 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
773 Nick Clifton <nickc@redhat.com>
775 * vax-dis.c: (entry_addr): New varible: An array of user supplied
776 function entry mask addresses.
777 (entry_addr_occupied_slots): New variable: The number of occupied
778 elements in entry_addr.
779 (entry_addr_total_slots): New variable: The total number of
780 elements in entry_addr.
781 (parse_disassembler_options): New function. Fills in the entry_addr
783 (free_entry_array): New function. Release the memory used by the
784 entry addr array. Suppressed because there is no way to call it.
785 (is_function_entry): Check if a given address is a function's
786 start address by looking at supplied entry mask addresses and
787 symbol information, if available.
788 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
790 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
792 * cris-dis.c (print_with_operands): Use ~31L for long instead
795 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
797 * mmix-opc.c (O): Revert the last change.
800 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
802 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
805 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
807 * mmix-opc.c (O, Z): Force expression as unsigned long.
809 2005-03-18 Nick Clifton <nickc@redhat.com>
811 * ip2k-asm.c: Regenerate.
812 * op/opcodes.pot: Regenerate.
814 2005-03-16 Nick Clifton <nickc@redhat.com>
815 Ben Elliston <bje@au.ibm.com>
817 * configure.in (werror): New switch: Add -Werror to the
818 compiler command line. Enabled by default. Disable via
820 * configure: Regenerate.
822 2005-03-16 Alan Modra <amodra@bigpond.net.au>
824 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
827 2005-03-15 Alan Modra <amodra@bigpond.net.au>
829 * po/es.po: Commit new Spanish translation.
831 * po/fr.po: Commit new French translation.
833 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
835 * vax-dis.c: Fix spelling error
836 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
837 of just "Entry mask: < r1 ... >"
839 2005-03-12 Zack Weinberg <zack@codesourcery.com>
841 * arm-dis.c (arm_opcodes): Document %E and %V.
842 Add entries for v6T2 ARM instructions:
843 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
844 (print_insn_arm): Add support for %E and %V.
845 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
847 2005-03-10 Jeff Baker <jbaker@qnx.com>
848 Alan Modra <amodra@bigpond.net.au>
850 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
851 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
853 (XSPRG_MASK): Mask off extra bits now part of sprg field.
854 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
855 mfsprg4..7 after msprg and consolidate.
857 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
859 * vax-dis.c (entry_mask_bit): New array.
860 (print_insn_vax): Decode function entry mask.
862 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
864 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
866 2005-03-05 Alan Modra <amodra@bigpond.net.au>
868 * po/opcodes.pot: Regenerate.
870 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
872 * arc-dis.c (a4_decoding_class): New enum.
873 (dsmOneArcInst): Use the enum values for the decoding class.
874 Remove redundant case in the switch for decodingClass value 11.
876 2005-03-02 Jan Beulich <jbeulich@novell.com>
878 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
880 (OP_C): Consider lock prefix in non-64-bit modes.
882 2005-02-24 Alan Modra <amodra@bigpond.net.au>
884 * cris-dis.c (format_hex): Remove ineffective warning fix.
885 * crx-dis.c (make_instruction): Warning fix.
886 * frv-asm.c: Regenerate.
888 2005-02-23 Nick Clifton <nickc@redhat.com>
890 * cgen-dis.in: Use bfd_byte for buffers that are passed to
893 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
895 * crx-dis.c (make_instruction): Move argument structure into inner
896 scope and ensure that all of its fields are initialised before
899 * fr30-asm.c: Regenerate.
900 * fr30-dis.c: Regenerate.
901 * frv-asm.c: Regenerate.
902 * frv-dis.c: Regenerate.
903 * ip2k-asm.c: Regenerate.
904 * ip2k-dis.c: Regenerate.
905 * iq2000-asm.c: Regenerate.
906 * iq2000-dis.c: Regenerate.
907 * m32r-asm.c: Regenerate.
908 * m32r-dis.c: Regenerate.
909 * openrisc-asm.c: Regenerate.
910 * openrisc-dis.c: Regenerate.
911 * xstormy16-asm.c: Regenerate.
912 * xstormy16-dis.c: Regenerate.
914 2005-02-22 Alan Modra <amodra@bigpond.net.au>
916 * arc-ext.c: Warning fixes.
917 * arc-ext.h: Likewise.
918 * cgen-opc.c: Likewise.
919 * ia64-gen.c: Likewise.
920 * maxq-dis.c: Likewise.
921 * ns32k-dis.c: Likewise.
922 * w65-dis.c: Likewise.
923 * ia64-asmtab.c: Regenerate.
925 2005-02-22 Alan Modra <amodra@bigpond.net.au>
927 * fr30-desc.c: Regenerate.
928 * fr30-desc.h: Regenerate.
929 * fr30-opc.c: Regenerate.
930 * fr30-opc.h: Regenerate.
931 * frv-desc.c: Regenerate.
932 * frv-desc.h: Regenerate.
933 * frv-opc.c: Regenerate.
934 * frv-opc.h: Regenerate.
935 * ip2k-desc.c: Regenerate.
936 * ip2k-desc.h: Regenerate.
937 * ip2k-opc.c: Regenerate.
938 * ip2k-opc.h: Regenerate.
939 * iq2000-desc.c: Regenerate.
940 * iq2000-desc.h: Regenerate.
941 * iq2000-opc.c: Regenerate.
942 * iq2000-opc.h: Regenerate.
943 * m32r-desc.c: Regenerate.
944 * m32r-desc.h: Regenerate.
945 * m32r-opc.c: Regenerate.
946 * m32r-opc.h: Regenerate.
947 * m32r-opinst.c: Regenerate.
948 * openrisc-desc.c: Regenerate.
949 * openrisc-desc.h: Regenerate.
950 * openrisc-opc.c: Regenerate.
951 * openrisc-opc.h: Regenerate.
952 * xstormy16-desc.c: Regenerate.
953 * xstormy16-desc.h: Regenerate.
954 * xstormy16-opc.c: Regenerate.
955 * xstormy16-opc.h: Regenerate.
957 2005-02-21 Alan Modra <amodra@bigpond.net.au>
959 * Makefile.am: Run "make dep-am"
960 * Makefile.in: Regenerate.
962 2005-02-15 Nick Clifton <nickc@redhat.com>
964 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
965 compile time warnings.
966 (print_keyword): Likewise.
967 (default_print_insn): Likewise.
969 * fr30-desc.c: Regenerated.
970 * fr30-desc.h: Regenerated.
971 * fr30-dis.c: Regenerated.
972 * fr30-opc.c: Regenerated.
973 * fr30-opc.h: Regenerated.
974 * frv-desc.c: Regenerated.
975 * frv-dis.c: Regenerated.
976 * frv-opc.c: Regenerated.
977 * ip2k-asm.c: Regenerated.
978 * ip2k-desc.c: Regenerated.
979 * ip2k-desc.h: Regenerated.
980 * ip2k-dis.c: Regenerated.
981 * ip2k-opc.c: Regenerated.
982 * ip2k-opc.h: Regenerated.
983 * iq2000-desc.c: Regenerated.
984 * iq2000-dis.c: Regenerated.
985 * iq2000-opc.c: Regenerated.
986 * m32r-asm.c: Regenerated.
987 * m32r-desc.c: Regenerated.
988 * m32r-desc.h: Regenerated.
989 * m32r-dis.c: Regenerated.
990 * m32r-opc.c: Regenerated.
991 * m32r-opc.h: Regenerated.
992 * m32r-opinst.c: Regenerated.
993 * openrisc-desc.c: Regenerated.
994 * openrisc-desc.h: Regenerated.
995 * openrisc-dis.c: Regenerated.
996 * openrisc-opc.c: Regenerated.
997 * openrisc-opc.h: Regenerated.
998 * xstormy16-desc.c: Regenerated.
999 * xstormy16-desc.h: Regenerated.
1000 * xstormy16-dis.c: Regenerated.
1001 * xstormy16-opc.c: Regenerated.
1002 * xstormy16-opc.h: Regenerated.
1004 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
1006 * dis-buf.c (perror_memory): Use sprintf_vma to print out
1009 2005-02-11 Nick Clifton <nickc@redhat.com>
1011 * iq2000-asm.c: Regenerate.
1013 * frv-dis.c: Regenerate.
1015 2005-02-07 Jim Blandy <jimb@redhat.com>
1017 * Makefile.am (CGEN): Load guile.scm before calling the main
1019 * Makefile.in: Regenerated.
1020 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
1021 Simply pass the cgen-opc.scm path to ${cgen} as its first
1022 argument; ${cgen} itself now contains the '-s', or whatever is
1023 appropriate for the Scheme being used.
1025 2005-01-31 Andrew Cagney <cagney@gnu.org>
1027 * configure: Regenerate to track ../gettext.m4.
1029 2005-01-31 Jan Beulich <jbeulich@novell.com>
1031 * ia64-gen.c (NELEMS): Define.
1032 (shrink): Generate alias with missing second predicate register when
1033 opcode has two outputs and these are both predicates.
1034 * ia64-opc-i.c (FULL17): Define.
1035 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1036 here to generate output template.
1037 (TBITCM, TNATCM): Undefine after use.
1038 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1039 first input. Add ld16 aliases without ar.csd as second output. Add
1040 st16 aliases without ar.csd as second input. Add cmpxchg aliases
1041 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1042 ar.ccv as third/fourth inputs. Consolidate through...
1043 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1044 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1045 * ia64-asmtab.c: Regenerate.
1047 2005-01-27 Andrew Cagney <cagney@gnu.org>
1049 * configure: Regenerate to track ../gettext.m4 change.
1051 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
1053 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
1054 * frv-asm.c: Rebuilt.
1055 * frv-desc.c: Rebuilt.
1056 * frv-desc.h: Rebuilt.
1057 * frv-dis.c: Rebuilt.
1058 * frv-ibld.c: Rebuilt.
1059 * frv-opc.c: Rebuilt.
1060 * frv-opc.h: Rebuilt.
1062 2005-01-24 Andrew Cagney <cagney@gnu.org>
1064 * configure: Regenerate, ../gettext.m4 was updated.
1066 2005-01-21 Fred Fish <fnf@specifixinc.com>
1068 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
1069 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1070 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1071 * mips-dis.c: Ditto.
1073 2005-01-20 Alan Modra <amodra@bigpond.net.au>
1075 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1077 2005-01-19 Fred Fish <fnf@specifixinc.com>
1079 * mips-dis.c (no_aliases): New disassembly option flag.
1080 (set_default_mips_dis_options): Init no_aliases to zero.
1081 (parse_mips_dis_option): Handle no-aliases option.
1082 (print_insn_mips): Ignore table entries that are aliases
1083 if no_aliases is set.
1084 (print_insn_mips16): Ditto.
1085 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1086 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
1087 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1088 * mips16-opc.c (mips16_opcodes): Ditto.
1090 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
1092 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1093 (inheritance diagram): Add missing edge.
1094 (arch_sh1_up): Rename arch_sh_up to match external name to make life
1095 easier for the testsuite.
1096 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1097 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
1098 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
1099 arch_sh2a_or_sh4_up child.
1100 (sh_table): Do renaming as above.
1101 Correct comment for ldc.l for gas testsuite to read.
1102 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1103 Correct comments for movy.w and movy.l for gas testsuite to read.
1104 Correct comments for fmov.d and fmov.s for gas testsuite to read.
1106 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1108 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1110 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1112 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1114 2005-01-10 Andreas Schwab <schwab@suse.de>
1116 * disassemble.c (disassemble_init_for_target) <case
1117 bfd_arch_ia64>: Set skip_zeroes to 16.
1118 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1120 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
1122 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1124 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
1126 * avr-dis.c: Prettyprint. Added printing of symbol names in all
1127 memory references. Convert avr_operand() to C90 formatting.
1129 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
1131 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1133 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
1135 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1136 (no_op_insn): Initialize array with instructions that have no
1138 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1140 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
1142 * arm-dis.c: Correct top-level comment.
1144 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
1146 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1147 architecuture defining the insn.
1148 (arm_opcodes, thumb_opcodes): Delete. Move to ...
1149 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
1151 Also include opcode/arm.h.
1152 * Makefile.am (arm-dis.lo): Update dependency list.
1153 * Makefile.in: Regenerate.
1155 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
1157 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1158 reflect the change to the short immediate syntax.
1160 2004-11-19 Alan Modra <amodra@bigpond.net.au>
1162 * or32-opc.c (debug): Warning fix.
1163 * po/POTFILES.in: Regenerate.
1165 * maxq-dis.c: Formatting.
1166 (print_insn): Warning fix.
1168 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
1170 * arm-dis.c (WORD_ADDRESS): Define.
1171 (print_insn): Use it. Correct big-endian end-of-section handling.
1173 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
1174 Vineet Sharma <vineets@noida.hcltech.com>
1176 * maxq-dis.c: New file.
1177 * disassemble.c (ARCH_maxq): Define.
1178 (disassembler): Add 'print_insn_maxq_little' for handling maxq
1180 * configure.in: Add case for bfd_maxq_arch.
1181 * configure: Regenerate.
1182 * Makefile.am: Add support for maxq-dis.c
1183 * Makefile.in: Regenerate.
1184 * aclocal.m4: Regenerate.
1186 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1188 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1190 * crx-dis.c: Likewise.
1192 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
1194 Generally, handle CRISv32.
1195 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1196 (struct cris_disasm_data): New type.
1197 (format_reg, format_hex, cris_constraint, print_flags)
1198 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1200 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1201 (print_insn_crisv32_without_register_prefix)
1202 (print_insn_crisv10_v32_with_register_prefix)
1203 (print_insn_crisv10_v32_without_register_prefix)
1204 (cris_parse_disassembler_options): New functions.
1205 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1206 parameter. All callers changed.
1207 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1209 (cris_constraint) <case 'Y', 'U'>: New cases.
1210 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1212 (print_with_operands) <case 'Y'>: New case.
1213 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1214 <case 'N', 'Y', 'Q'>: New cases.
1215 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1216 (print_insn_cris_with_register_prefix)
1217 (print_insn_cris_without_register_prefix): Call
1218 cris_parse_disassembler_options.
1219 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1220 for CRISv32 and the size of immediate operands. New v32-only
1221 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1222 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1223 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1224 Change brp to be v3..v10.
1225 (cris_support_regs): New vector.
1226 (cris_opcodes): Update head comment. New format characters '[',
1227 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1228 Add new opcodes for v32 and adjust existing opcodes to accommodate
1229 differences to earlier variants.
1230 (cris_cond15s): New vector.
1232 2004-11-04 Jan Beulich <jbeulich@novell.com>
1234 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1236 (Mp): Use f_mode rather than none at all.
1237 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1238 replaces what previously was x_mode; x_mode now means 128-bit SSE
1240 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1241 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1242 pinsrw's second operand is Edqw.
1243 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1244 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1245 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1246 mode when an operand size override is present or always suffixing.
1247 More instructions will need to be added to this group.
1248 (putop): Handle new macro chars 'C' (short/long suffix selector),
1249 'I' (Intel mode override for following macro char), and 'J' (for
1250 adding the 'l' prefix to far branches in AT&T mode). When an
1251 alternative was specified in the template, honor macro character when
1252 specified for Intel mode.
1253 (OP_E): Handle new *_mode values. Correct pointer specifications for
1254 memory operands. Consolidate output of index register.
1255 (OP_G): Handle new *_mode values.
1256 (OP_I): Handle const_1_mode.
1257 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1258 respective opcode prefix bits have been consumed.
1259 (OP_EM, OP_EX): Provide some default handling for generating pointer
1262 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1264 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1267 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1269 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1270 (getregliststring): Support HI/LO and user registers.
1271 * crx-opc.c (crx_instruction): Update data structure according to the
1272 rearrangement done in CRX opcode header file.
1273 (crx_regtab): Likewise.
1274 (crx_optab): Likewise.
1275 (crx_instruction): Reorder load/stor instructions, remove unsupported
1277 support new Co-Processor instruction 'cpi'.
1279 2004-10-27 Nick Clifton <nickc@redhat.com>
1281 * opcodes/iq2000-asm.c: Regenerate.
1282 * opcodes/iq2000-desc.c: Regenerate.
1283 * opcodes/iq2000-desc.h: Regenerate.
1284 * opcodes/iq2000-dis.c: Regenerate.
1285 * opcodes/iq2000-ibld.c: Regenerate.
1286 * opcodes/iq2000-opc.c: Regenerate.
1287 * opcodes/iq2000-opc.h: Regenerate.
1289 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1291 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1292 us4, us5 (respectively).
1293 Remove unsupported 'popa' instruction.
1294 Reverse operands order in store co-processor instructions.
1296 2004-10-15 Alan Modra <amodra@bigpond.net.au>
1298 * Makefile.am: Run "make dep-am"
1299 * Makefile.in: Regenerate.
1301 2004-10-12 Bob Wilson <bob.wilson@acm.org>
1303 * xtensa-dis.c: Use ISO C90 formatting.
1305 2004-10-09 Alan Modra <amodra@bigpond.net.au>
1307 * ppc-opc.c: Revert 2004-09-09 change.
1309 2004-10-07 Bob Wilson <bob.wilson@acm.org>
1311 * xtensa-dis.c (state_names): Delete.
1312 (fetch_data): Use xtensa_isa_maxlength.
1313 (print_xtensa_operand): Replace operand parameter with opcode/operand
1314 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1315 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1316 instruction bundles. Use xmalloc instead of malloc.
1318 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
1320 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1323 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1325 * crx-opc.c (crx_instruction): Support Co-processor insns.
1326 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1327 (getregliststring): Change function to use the above enum.
1328 (print_arg): Handle CO-Processor insns.
1329 (crx_cinvs): Add 'b' option to invalidate the branch-target
1332 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
1334 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1335 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1336 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1337 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1338 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1340 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1342 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1345 2004-09-30 Paul Brook <paul@codesourcery.com>
1347 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1348 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1350 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1352 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1353 (CONFIG_STATUS_DEPENDENCIES): New.
1354 (Makefile): Removed.
1355 (config.status): Likewise.
1356 * Makefile.in: Regenerated.
1358 2004-09-17 Alan Modra <amodra@bigpond.net.au>
1360 * Makefile.am: Run "make dep-am".
1361 * Makefile.in: Regenerate.
1362 * aclocal.m4: Regenerate.
1363 * configure: Regenerate.
1364 * po/POTFILES.in: Regenerate.
1365 * po/opcodes.pot: Regenerate.
1367 2004-09-11 Andreas Schwab <schwab@suse.de>
1369 * configure: Rebuild.
1371 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1373 * ppc-opc.c (L): Make this field not optional.
1375 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1377 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1378 Fix parameter to 'm[t|f]csr' insns.
1380 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1382 * configure.in: Autoupdate to autoconf 2.59.
1383 * aclocal.m4: Rebuild with aclocal 1.4p6.
1384 * configure: Rebuild with autoconf 2.59.
1385 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1386 bfd changes for autoconf 2.59 on the way).
1387 * config.in: Rebuild with autoheader 2.59.
1389 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1391 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1393 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1395 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1396 (GRPPADLCK2): New define.
1397 (twobyte_has_modrm): True for 0xA6.
1398 (grps): GRPPADLCK2 for opcode 0xA6.
1400 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1402 Introduce SH2a support.
1403 * sh-opc.h (arch_sh2a_base): Renumber.
1404 (arch_sh2a_nofpu_base): Remove.
1405 (arch_sh_base_mask): Adjust.
1406 (arch_opann_mask): New.
1407 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1408 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1409 (sh_table): Adjust whitespace.
1410 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1411 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1412 instruction list throughout.
1413 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1414 of arch_sh2a in instruction list throughout.
1415 (arch_sh2e_up): Accomodate above changes.
1416 (arch_sh2_up): Ditto.
1417 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1418 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1419 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1420 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1421 * sh-opc.h (arch_sh2a_nofpu): New.
1422 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1423 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1425 2004-01-20 DJ Delorie <dj@redhat.com>
1426 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1427 2003-12-29 DJ Delorie <dj@redhat.com>
1428 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1429 sh_opcode_info, sh_table): Add sh2a support.
1430 (arch_op32): New, to tag 32-bit opcodes.
1431 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1432 2003-12-02 Michael Snyder <msnyder@redhat.com>
1433 * sh-opc.h (arch_sh2a): Add.
1434 * sh-dis.c (arch_sh2a): Handle.
1435 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1437 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1439 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1441 2004-07-22 Nick Clifton <nickc@redhat.com>
1444 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1445 insns - this is done by objdump itself.
1446 * h8500-dis.c (print_insn_h8500): Likewise.
1448 2004-07-21 Jan Beulich <jbeulich@novell.com>
1450 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1451 regardless of address size prefix in effect.
1452 (ptr_reg): Size or address registers does not depend on rex64, but
1453 on the presence of an address size override.
1454 (OP_MMX): Use rex.x only for xmm registers.
1455 (OP_EM): Use rex.z only for xmm registers.
1457 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1459 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1460 move/branch operations to the bottom so that VR5400 multimedia
1461 instructions take precedence in disassembly.
1463 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1465 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1466 ISA-specific "break" encoding.
1468 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1470 * arm-opc.h: Fix typo in comment.
1472 2004-07-11 Andreas Schwab <schwab@suse.de>
1474 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1476 2004-07-09 Andreas Schwab <schwab@suse.de>
1478 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1480 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1482 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1483 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1484 (crx-dis.lo): New target.
1485 (crx-opc.lo): Likewise.
1486 * Makefile.in: Regenerate.
1487 * configure.in: Handle bfd_crx_arch.
1488 * configure: Regenerate.
1489 * crx-dis.c: New file.
1490 * crx-opc.c: New file.
1491 * disassemble.c (ARCH_crx): Define.
1492 (disassembler): Handle ARCH_crx.
1494 2004-06-29 James E Wilson <wilson@specifixinc.com>
1496 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1497 * ia64-asmtab.c: Regnerate.
1499 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1501 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1502 (extract_fxm): Don't test dialect.
1503 (XFXFXM_MASK): Include the power4 bit.
1504 (XFXM): Add p4 param.
1505 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1507 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1509 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1510 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1512 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1514 * ppc-opc.c (BH, XLBH_MASK): Define.
1515 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1517 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1519 * i386-dis.c (x_mode): Comment.
1520 (two_source_ops): File scope.
1521 (float_mem): Correct fisttpll and fistpll.
1522 (float_mem_mode): New table.
1524 (OP_E): Correct intel mode PTR output.
1525 (ptr_reg): Use open_char and close_char.
1526 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1527 operands. Set two_source_ops.
1529 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1531 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1532 instead of _raw_size.
1534 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1536 * ia64-gen.c (in_iclass): Handle more postinc st
1538 * ia64-asmtab.c: Rebuilt.
1540 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1542 * s390-opc.txt: Correct architecture mask for some opcodes.
1543 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1544 in the esa mode as well.
1546 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1548 * sh-dis.c (target_arch): Make unsigned.
1549 (print_insn_sh): Replace (most of) switch with a call to
1550 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1551 * sh-opc.h: Redefine architecture flags values.
1552 Add sh3-nommu architecture.
1553 Reorganise <arch>_up macros so they make more visual sense.
1554 (SH_MERGE_ARCH_SET): Define new macro.
1555 (SH_VALID_BASE_ARCH_SET): Likewise.
1556 (SH_VALID_MMU_ARCH_SET): Likewise.
1557 (SH_VALID_CO_ARCH_SET): Likewise.
1558 (SH_VALID_ARCH_SET): Likewise.
1559 (SH_MERGE_ARCH_SET_VALID): Likewise.
1560 (SH_ARCH_SET_HAS_FPU): Likewise.
1561 (SH_ARCH_SET_HAS_DSP): Likewise.
1562 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1563 (sh_get_arch_from_bfd_mach): Add prototype.
1564 (sh_get_arch_up_from_bfd_mach): Likewise.
1565 (sh_get_bfd_mach_from_arch_set): Likewise.
1566 (sh_merge_bfd_arc): Likewise.
1568 2004-05-24 Peter Barada <peter@the-baradas.com>
1570 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1571 into new match_insn_m68k function. Loop over canidate
1572 matches and select first that completely matches.
1573 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1574 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1575 to verify addressing for MAC/EMAC.
1576 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1577 reigster halves since 'fpu' and 'spl' look misleading.
1578 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1579 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1580 first, tighten up match masks.
1581 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1582 'size' from special case code in print_insn_m68k to
1583 determine decode size of insns.
1585 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1587 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1588 well as when -mpower4.
1590 2004-05-13 Nick Clifton <nickc@redhat.com>
1592 * po/fr.po: Updated French translation.
1594 2004-05-05 Peter Barada <peter@the-baradas.com>
1596 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1597 variants in arch_mask. Only set m68881/68851 for 68k chips.
1598 * m68k-op.c: Switch from ColdFire chips to core variants.
1600 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1603 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1605 2004-04-29 Ben Elliston <bje@au.ibm.com>
1607 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1608 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1610 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1612 * sh-dis.c (print_insn_sh): Print the value in constant pool
1613 as a symbol if it looks like a symbol.
1615 2004-04-22 Peter Barada <peter@the-baradas.com>
1617 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1618 appropriate ColdFire architectures.
1619 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1621 Add EMAC instructions, fix MAC instructions. Remove
1622 macmw/macml/msacmw/msacml instructions since mask addressing now
1625 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1627 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1628 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1629 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1630 macro. Adjust all users.
1632 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1634 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1637 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1639 * m32r-asm.c: Regenerate.
1641 2004-03-29 Stan Shebs <shebs@apple.com>
1643 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1646 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1648 * aclocal.m4: Regenerate.
1649 * config.in: Regenerate.
1650 * configure: Regenerate.
1651 * po/POTFILES.in: Regenerate.
1652 * po/opcodes.pot: Regenerate.
1654 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1656 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1658 * ppc-opc.c (RA0): Define.
1659 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1660 (RAOPT): Rename from RAO. Update all uses.
1661 (powerpc_opcodes): Use RA0 as appropriate.
1663 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1665 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1667 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1669 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1671 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1673 * i386-dis.c (GRPPLOCK): Delete.
1674 (grps): Delete GRPPLOCK entry.
1676 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1678 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1680 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1681 (GRPPADLCK): Define.
1682 (dis386): Use NOP_Fixup on "nop".
1683 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1684 (twobyte_has_modrm): Set for 0xa7.
1685 (padlock_table): Delete. Move to..
1686 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1688 (print_insn): Revert PADLOCK_SPECIAL code.
1689 (OP_E): Delete sfence, lfence, mfence checks.
1691 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1693 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1694 (INVLPG_Fixup): New function.
1695 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1697 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1699 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1700 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1701 (padlock_table): New struct with PadLock instructions.
1702 (print_insn): Handle PADLOCK_SPECIAL.
1704 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1706 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1707 (OP_E): Twiddle clflush to sfence here.
1709 2004-03-08 Nick Clifton <nickc@redhat.com>
1711 * po/de.po: Updated German translation.
1713 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1715 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1716 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1717 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1720 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1722 * frv-asm.c: Regenerate.
1723 * frv-desc.c: Regenerate.
1724 * frv-desc.h: Regenerate.
1725 * frv-dis.c: Regenerate.
1726 * frv-ibld.c: Regenerate.
1727 * frv-opc.c: Regenerate.
1728 * frv-opc.h: Regenerate.
1730 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1732 * frv-desc.c, frv-opc.c: Regenerate.
1734 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1736 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1738 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1740 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1741 Also correct mistake in the comment.
1743 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1745 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1746 ensure that double registers have even numbers.
1747 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1748 that reserved instruction 0xfffd does not decode the same
1750 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1751 REG_N refers to a double register.
1752 Add REG_N_B01 nibble type and use it instead of REG_NM
1754 Adjust the bit patterns in a few comments.
1756 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1758 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1760 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1762 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1764 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1766 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1768 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1770 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1771 mtivor32, mtivor33, mtivor34.
1773 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1775 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1777 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1779 * arm-opc.h Maverick accumulator register opcode fixes.
1781 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1783 * m32r-dis.c: Regenerate.
1785 2004-01-27 Michael Snyder <msnyder@redhat.com>
1787 * sh-opc.h (sh_table): "fsrra", not "fssra".
1789 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1791 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1794 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1796 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1798 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1800 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1801 1. Don't print scale factor on AT&T mode when index missing.
1803 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1805 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1806 when loaded into XR registers.
1808 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1810 * frv-desc.h: Regenerate.
1811 * frv-desc.c: Regenerate.
1812 * frv-opc.c: Regenerate.
1814 2004-01-13 Michael Snyder <msnyder@redhat.com>
1816 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1818 2004-01-09 Paul Brook <paul@codesourcery.com>
1820 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1823 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1825 * Makefile.am (libopcodes_la_DEPENDENCIES)
1826 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1827 comment about the problem.
1828 * Makefile.in: Regenerate.
1830 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1832 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1833 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1834 cut&paste errors in shifting/truncating numerical operands.
1835 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1836 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1837 (parse_uslo16): Likewise.
1838 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1839 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1840 (parse_s12): Likewise.
1841 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1842 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1843 (parse_uslo16): Likewise.
1844 (parse_uhi16): Parse gothi and gotfuncdeschi.
1845 (parse_d12): Parse got12 and gotfuncdesc12.
1846 (parse_s12): Likewise.
1848 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1850 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1851 instruction which looks similar to an 'rla' instruction.
1853 For older changes see ChangeLog-0203
1859 version-control: never