opcodes/ChangeLog

   1 2005-10-25  DJ Delorie  <dj@redhat.com>
   2
   3         * m32c-asm.c: Regenerate.
   4         * m32c-desc.c: Regenerate.
   5         * m32c-desc.h: Regenerate.
   6         * m32c-dis.c: Regenerate.
   7         * m32c-ibld.c: Regenerate.
   8         * m32c-opc.c: Regenerate.
   9         * m32c-opc.h: Regenerate.
  10
  11 2005-10-25  Arnold Metselaar  <arnold.metselaar@planet.nl>
  12
  13         * configure.in: Add target architecture bfd_arch_z80.
  14         * configure: Regenerated.
  15         * disassemble.c (disassembler)<ARCH_z80>: Add case
  16         bfd_arch_z80.
  17         * z80-dis.c: New file.
  18
  19 2005-10-25  Alan Modra  <amodra@bigpond.net.au>
  20
  21         * po/POTFILES.in: Regenerate.
  22         * po/opcodes.pot: Regenerate.
  23
  24 2005-10-24  Jan Beulich  <jbeulich@novell.com>
  25
  26         * ia64-asmtab.c: Regenerate.
  27
  28 2005-10-21  DJ Delorie  <dj@redhat.com>
  29
  30         * m32c-asm.c: Regenerate.
  31         * m32c-desc.c: Regenerate.
  32         * m32c-desc.h: Regenerate.
  33         * m32c-dis.c: Regenerate.
  34         * m32c-ibld.c: Regenerate.
  35         * m32c-opc.c: Regenerate.
  36         * m32c-opc.h: Regenerate.
  37
  38 2005-10-21  Nick Clifton  <nickc@redhat.com>
  39
  40         * bfin-dis.c: Tidy up code, removing redundant constructs.
  41
  42 2005-10-19  Martin Schwidefsky  <schwidefsky@de.ibm.com>
  43
  44         * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
  45         instructions.
  46
  47 2005-10-18  Nick Clifton  <nickc@redhat.com>
  48
  49         * m32r-asm.c: Regenerate after updating m32r.opc.
  50
  51 2005-10-18  Jie Zhang  <jie.zhang@analog.com>
  52
  53         * bfin-dis.c (print_insn_bfin): Do proper endian transform when
  54         reading instruction from memory.
  55
  56 2005-10-18  Nick Clifton  <nickc@redhat.com>
  57
  58         * m32r-asm.c: Regenerate after updating m32r.opc.
  59
  60 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
  61
  62         * m32r-asm.c: Regenerate after updating m32r.opc.
  63
  64 2005-10-08  James Lemke  <jim@wasabisystems.com>
  65
  66         * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
  67         operations.
  68
  69 2005-10-06  Daniel Jacobowitz  <dan@codesourcery.com>
  70
  71         * ppc-dis.c (struct dis_private): Remove.
  72         (powerpc_dialect): Avoid aliasing warnings.
  73         (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
  74
  75 2005-09-30  Nick Clifton  <nickc@redhat.com>
  76
  77         * po/ga.po: New Irish translation.
  78         * configure.in (ALL_LINGUAS): Add "ga".
  79         * configure: Regenerate.
  80
  81 2005-09-30  H.J. Lu  <hongjiu.lu@intel.com>
  82
  83         * Makefile.am: Run "make dep-am".
  84         * Makefile.in: Regenerated.
  85         * aclocal.m4: Likewise.
  86         * configure: Likewise.
  87
  88 2005-09-30  Catherine Moore  <clm@cm00re.com>
  89
  90         * Makefile.am: Bfin support.
  91         * Makefile.in: Regenerated.
  92         * aclocal.m4: Regenerated.
  93         * bfin-dis.c: New file.
  94         * configure.in: Bfin support.
  95         * configure: Regenerated.
  96         * disassemble.c (ARCH_bfin): Define.
  97         (disassembler): Add case for bfd_arch_bfin.
  98
  99 2005-09-28  Jan Beulich  <jbeulich@novell.com>
 100
 101         * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
 102         (indirEv): Use it.
 103         (stackEv): New.
 104         (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
 105         (dis386): Document and use new 'V' meta character. Use it for
 106         single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
 107         opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
 108         (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
 109         data prefix as used whenever DFLAG was examined. Handle 'V'.
 110         (intel_operand_size): Use stack_v_mode.
 111         (OP_E): Use stack_v_mode, but handle only the special case of
 112         64-bit mode without operand size override here; fall through to
 113         v_mode case otherwise.
 114         (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
 115         and no operand size override is present.
 116         (OP_J): Use get32s for obtaining the displacement also when rex64
 117         is present.
 118
 119 2005-09-08  Paul Brook  <paul@codesourcery.com>
 120
 121         * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
 122
 123 2005-09-06  Chao-ying Fu  <fu@mips.com>
 124
 125         * mips-opc.c (MT32): New define.
 126         (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
 127         bottom to avoid opcode collision with "mftr" and "mttr".
 128         Add MT instructions.
 129         * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
 130         (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
 131         formats.
 132
 133 2005-09-02  Paul Brook  <paul@codesourcery.com>
 134
 135         * arm-dis.c (coprocessor_opcodes): Add null terminator.
 136
 137 2005-09-02  Paul Brook  <paul@codesourcery.com>
 138
 139         * arm-dis.c (coprocessor_opcodes): New.
 140         (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
 141         (print_insn_coprocessor): New function.
 142         (print_insn_arm): Use print_insn_coprocessor.  Remove coprocessor
 143         format characters.
 144         (print_insn_thumb32): Use print_insn_coprocessor.
 145
 146 2005-08-30  Paul Brook  <paul@codesourcery.com>
 147
 148         * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
 149
 150 2005-08-26  Jan Beulich  <jbeulich@novell.com>
 151
 152         * i386-dis.c (intel_operand_size): New, broken out from OP_E for
 153         re-use.
 154         (OP_E): Call intel_operand_size, move call site out of mode
 155         dependent code.
 156         (OP_OFF): Call intel_operand_size if suffix_always. Remove
 157         ATTRIBUTE_UNUSED from parameters.
 158         (OP_OFF64): Likewise.
 159         (OP_ESreg): Call intel_operand_size.
 160         (OP_DSreg): Likewise.
 161         (OP_DIR): Use colon rather than semicolon as separator of far
 162         jump/call operands.
 163
 164 2005-08-25  Chao-ying Fu  <fu@mips.com>
 165
 166         * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
 167         (mips_builtin_opcodes): Add DSP instructions.
 168         * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
 169         mips64, mips64r2.
 170         (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
 171         operand formats.
 172
 173 2005-08-23  David Ung  <davidu@mips.com>
 174
 175         * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
 176         instructions to the table.
 177
 178 2005-08-18  Alan Modra  <amodra@bigpond.net.au>
 179
 180         * a29k-dis.c: Delete.
 181         * Makefile.am: Remove a29k support.
 182         * configure.in: Likewise.
 183         * disassemble.c: Likewise.
 184         * Makefile.in: Regenerate.
 185         * configure: Regenerate.
 186         * po/POTFILES.in: Regenerate.
 187
 188 2005-08-15  Daniel Jacobowitz  <dan@codesourcery.com>
 189
 190         * ppc-dis.c (powerpc_dialect): Handle e300.
 191         (print_ppc_disassembler_options): Likewise.
 192         * ppc-opc.c (PPCE300): Define.
 193         (powerpc_opcodes): Mark icbt as available for the e300.
 194
 195 2005-08-13  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 196
 197         * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
 198         Use "rp" instead of "%r2" in "b,l" insns.
 199
 200 2005-08-12 Martin Schwidefsky  <schwidefsky@de.ibm.com>
 201
 202         * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
 203         * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
 204         (main): Likewise.
 205         * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
 206         and 4 bit optional masks.
 207         (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
 208         INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
 209         (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
 210         MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
 211         (s390_opformats): Likewise.
 212         * s390-opc.txt: Add new instructions for cpu type z9-109.
 213
 214 2005-08-05  John David Anglin  <dave.anglin@nrc-crnc.gc.ca>
 215
 216         * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
 217
 218 2005-07-29  Paul Brook  <paul@codesourcery.com>
 219
 220         * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
 221
 222 2005-07-29  Paul Brook  <paul@codesourcery.com>
 223
 224         * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
 225         (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
 226
 227 2005-07-25  DJ Delorie  <dj@redhat.com>
 228
 229         * m32c-asm.c Regenerate.
 230         * m32c-dis.c Regenerate.
 231
 232 2005-07-20  DJ Delorie  <dj@redhat.com>
 233
 234         * disassemble.c (disassemble_init_for_target): M32C ISAs are
 235         enums, so convert them to bit masks, which attributes are.
 236
 237 2005-07-18  Nick Clifton  <nickc@redhat.com>
 238
 239         * configure.in: Restore alpha ordering to list of arches.
 240         * configure: Regenerate.
 241         * disassemble.c: Restore alpha ordering to list of arches.
 242
 243 2005-07-18  Nick Clifton  <nickc@redhat.com>
 244
 245         * m32c-asm.c: Regenerate.
 246         * m32c-desc.c: Regenerate.
 247         * m32c-desc.h: Regenerate.
 248         * m32c-dis.c: Regenerate.
 249         * m32c-ibld.h: Regenerate.
 250         * m32c-opc.c: Regenerate.
 251         * m32c-opc.h: Regenerate.
 252
 253 2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 254
 255         * i386-dis.c (PNI_Fixup): Update comment.
 256         (VMX_Fixup): Properly handle the suffix check.
 257
 258 2005-07-16  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 259
 260         * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
 261         mfctl disassembly.
 262
 263 2005-07-16  Alan Modra  <amodra@bigpond.net.au>
 264
 265         * Makefile.am: Run "make dep-am".
 266         (stamp-m32c): Fix cpu dependencies.
 267         * Makefile.in: Regenerate.
 268         * ip2k-dis.c: Regenerate.
 269
 270 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
 271
 272         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
 273         (VMX_Fixup): New. Fix up Intel VMX Instructions.
 274         (Em): New.
 275         (Gm): New.
 276         (VM): New.
 277         (dis386_twobyte): Updated entries 0x78 and 0x79.
 278         (twobyte_has_modrm): Likewise.
 279         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
 280         (OP_G): Handle m_mode.
 281
 282 2005-07-14  Jim Blandy  <jimb@redhat.com>
 283
 284         Add support for the Renesas M32C and M16C.
 285         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
 286         * m32c-desc.h, m32c-opc.h: New.
 287         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
 288         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
 289         m32c-opc.c.
 290         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
 291         m32c-ibld.lo, m32c-opc.lo.
 292         (CLEANFILES): List stamp-m32c.
 293         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
 294         (CGEN_CPUS): Add m32c.
 295         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
 296         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
 297         (m32c_opc_h): New variable.
 298         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
 299         (m32c-opc.lo): New rules.
 300         * Makefile.in: Regenerated.
 301         * configure.in: Add case for bfd_m32c_arch.
 302         * configure: Regenerated.
 303         * disassemble.c (ARCH_m32c): New.
 304         [ARCH_m32c]: #include "m32c-desc.h".
 305         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
 306         (disassemble_init_for_target) [ARCH_m32c]: Same.
 307
 308         * cgen-ops.h, cgen-types.h: New files.
 309         * Makefile.am (HFILES): List them.
 310         * Makefile.in: Regenerated.
 311
 312 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 313
 314         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
 315         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
 316         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
 317         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
 318         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
 319         v850-dis.c: Fix format bugs.
 320         * ia64-gen.c (fail, warn): Add format attribute.
 321         * or32-opc.c (debug): Likewise.
 322
 323 2005-07-07  Khem Raj  <kraj@mvista.com>
 324
 325         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
 326         disassembly pattern.
 327
 328 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 329
 330         * Makefile.am (stamp-m32r): Fix path to cpu files.
 331         (stamp-m32r, stamp-iq2000): Likewise.
 332         * Makefile.in: Regenerate.
 333         * m32r-asm.c: Regenerate.
 334         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
 335         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
 336
 337 2005-07-05  Nick Clifton  <nickc@redhat.com>
 338
 339         * iq2000-asm.c: Regenerate.
 340         * ms1-asm.c: Regenerate.
 341
 342 2005-07-05  Jan Beulich  <jbeulich@novell.com>
 343
 344         * i386-dis.c (SVME_Fixup): New.
 345         (grps): Use it for the lidt entry.
 346         (PNI_Fixup): Call OP_M rather than OP_E.
 347         (INVLPG_Fixup): Likewise.
 348
 349 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
 350
 351         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 352
 353 2005-07-01  Nick Clifton  <nickc@redhat.com>
 354
 355         * a29k-dis.c: Update to ISO C90 style function declarations and
 356         fix formatting.
 357         * alpha-opc.c: Likewise.
 358         * arc-dis.c: Likewise.
 359         * arc-opc.c: Likewise.
 360         * avr-dis.c: Likewise.
 361         * cgen-asm.in: Likewise.
 362         * cgen-dis.in: Likewise.
 363         * cgen-ibld.in: Likewise.
 364         * cgen-opc.c: Likewise.
 365         * cris-dis.c: Likewise.
 366         * d10v-dis.c: Likewise.
 367         * d30v-dis.c: Likewise.
 368         * d30v-opc.c: Likewise.
 369         * dis-buf.c: Likewise.
 370         * dlx-dis.c: Likewise.
 371         * h8300-dis.c: Likewise.
 372         * h8500-dis.c: Likewise.
 373         * hppa-dis.c: Likewise.
 374         * i370-dis.c: Likewise.
 375         * i370-opc.c: Likewise.
 376         * m10200-dis.c: Likewise.
 377         * m10300-dis.c: Likewise.
 378         * m68k-dis.c: Likewise.
 379         * m88k-dis.c: Likewise.
 380         * mips-dis.c: Likewise.
 381         * mmix-dis.c: Likewise.
 382         * msp430-dis.c: Likewise.
 383         * ns32k-dis.c: Likewise.
 384         * or32-dis.c: Likewise.
 385         * or32-opc.c: Likewise.
 386         * pdp11-dis.c: Likewise.
 387         * pj-dis.c: Likewise.
 388         * s390-dis.c: Likewise.
 389         * sh-dis.c: Likewise.
 390         * sh64-dis.c: Likewise.
 391         * sparc-dis.c: Likewise.
 392         * sparc-opc.c: Likewise.
 393         * sysdep.h: Likewise.
 394         * tic30-dis.c: Likewise.
 395         * tic4x-dis.c: Likewise.
 396         * tic80-dis.c: Likewise.
 397         * v850-dis.c: Likewise.
 398         * v850-opc.c: Likewise.
 399         * vax-dis.c: Likewise.
 400         * w65-dis.c: Likewise.
 401         * z8kgen.c: Likewise.
 402
 403         * fr30-*: Regenerate.
 404         * frv-*: Regenerate.
 405         * ip2k-*: Regenerate.
 406         * iq2000-*: Regenerate.
 407         * m32r-*: Regenerate.
 408         * ms1-*: Regenerate.
 409         * openrisc-*: Regenerate.
 410         * xstormy16-*: Regenerate.
 411
 412 2005-06-23  Ben Elliston  <bje@gnu.org>
 413
 414         * m68k-dis.c: Use ISC C90.
 415         * m68k-opc.c: Formatting fixes.
 416
 417 2005-06-16  David Ung  <davidu@mips.com>
 418
 419         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 420         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 421
 422 2005-06-15  Dave Brolley  <brolley@redhat.com>
 423
 424         Contribute Morpho ms1 on behalf of Red Hat
 425         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 426         ms1-opc.h: New files, Morpho ms1 target.
 427
 428         2004-05-14  Stan Cox  <scox@redhat.com>
 429
 430         * disassemble.c (ARCH_ms1): Define.
 431         (disassembler): Handle bfd_arch_ms1
 432
 433         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 434
 435         * Makefile.am, Makefile.in: Add ms1 target.
 436         * configure.in: Ditto.
 437
 438 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 439
 440         * arm-opc.h: Delete; fold contents into ...
 441         * arm-dis.c: ... here.  Move includes of internal COFF headers
 442         next to includes of internal ELF headers.
 443         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 444         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 445         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 446         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 447         (iwmmxt_wwnames, iwmmxt_wwssnames):
 448         Make const.
 449         (regnames): Remove iWMMXt coprocessor register sets.
 450         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 451         (get_arm_regnames): Adjust fourth argument to match above changes.
 452         (set_iwmmxt_regnames): Delete.
 453         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 454         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 455         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 456         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 457         ISO syntax for function pointer calls.
 458
 459 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 460
 461         * arm-dis.c: Split up the comments describing the format codes, so
 462         that the ARM and 16-bit Thumb opcode tables each have comments
 463         preceding them that describe all the codes, and only the codes,
 464         valid in those tables.  (32-bit Thumb table is already like this.)
 465         Reorder the lists in all three comments to match the order in
 466         which the codes are implemented.
 467         Remove all forward declarations of static functions.  Convert all
 468         function definitions to ISO C format.
 469         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 470         Return nothing.
 471         (print_insn_thumb16): Remove unused case 'I'.
 472         (print_insn): Update for changed calling convention of subroutines.
 473
 474 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 475
 476         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 477         hex (but retain it being displayed as signed). Remove redundant
 478         checks. Add handling of displacements for 16-bit addressing in Intel
 479         mode.
 480
 481 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 482
 483         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 484         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 485         masking of 'rm' in 16-bit memory address handling.
 486
 487 2005-05-19  Anton Blanchard  <anton@samba.org>
 488
 489         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 490         (print_ppc_disassembler_options): Document it.
 491         * ppc-opc.c (SVC_LEV): Define.
 492         (LEV): Allow optional operand.
 493         (POWER5): Define.
 494         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 495         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 496
 497 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 498
 499         * Makefile.in:  Regenerate.
 500
 501 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 502
 503         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 504         instructions.  Adjust disassembly of some opcodes to match
 505         unified syntax.
 506         (thumb32_opcodes): New table.
 507         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 508         two-halfword branches here.
 509         (print_insn_thumb32): New function.
 510         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 511         and print_insn_thumb32.  Be consistent about order of
 512         halfwords when printing 32-bit instructions.
 513
 514 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 515
 516         PR 843
 517         * i386-dis.c (branch_v_mode): New.
 518         (indirEv): Use branch_v_mode instead of v_mode.
 519         (OP_E): Handle branch_v_mode.
 520
 521 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 522
 523         * d10v-dis.c (dis_2_short): Support 64bit host.
 524
 525 2005-05-07  Nick Clifton  <nickc@redhat.com>
 526
 527         * po/nl.po: Updated translation.
 528
 529 2005-05-07  Nick Clifton  <nickc@redhat.com>
 530
 531         * Update the address and phone number of the FSF organization in
 532         the GPL notices in the following files:
 533         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 534         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 535         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 536         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 537         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 538         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 539         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 540         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 541         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 542         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 543         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 544         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 545         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 546         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 547         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 548         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 549         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 550         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 551         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 552         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 553         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 554         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 555         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 556         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 557         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 558         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 559         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 560         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 561         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 562         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 563         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 564         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 565         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 566
 567 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 568
 569         * ia64-opc.c: Include sysdep.h before libiberty.h.
 570
 571 2005-05-05  Nick Clifton  <nickc@redhat.com>
 572
 573         * configure.in (ALL_LINGUAS): Add vi.
 574         * configure: Regenerate.
 575         * po/vi.po: New.
 576
 577 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 578
 579         * configure.in: Fix the check for basename declaration.
 580         * configure: Regenerate.
 581
 582 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 583
 584         * ppc-opc.c (RTO): Define.
 585         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 586         entries to suit PPC440.
 587
 588 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 589
 590         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 591         Add xcrypt-ctr.
 592
 593 2005-04-14  Nick Clifton  <nickc@redhat.com>
 594
 595         * po/fi.po: New translation: Finnish.
 596         * configure.in (ALL_LINGUAS): Add fi.
 597         * configure: Regenerate.
 598
 599 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 600
 601         * Makefile.am (NO_WERROR): Define.
 602         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 603         * Makefile.in: Regenerate.
 604         * aclocal.m4: Regenerate.
 605         * configure: Regenerate.
 606
 607 2005-04-04  Nick Clifton  <nickc@redhat.com>
 608
 609         * fr30-asm.c: Regenerate.
 610         * frv-asm.c: Regenerate.
 611         * iq2000-asm.c: Regenerate.
 612         * m32r-asm.c: Regenerate.
 613         * openrisc-asm.c: Regenerate.
 614
 615 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 616
 617         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 618         visible operands in Intel mode. The first operand of monitor is
 619         %rax in 64-bit mode.
 620
 621 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 622
 623         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 624         easier future additions.
 625
 626 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 627
 628         * configure.in: Check for basename.
 629         * configure: Regenerate.
 630         * config.in: Ditto.
 631
 632 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 633
 634         * i386-dis.c (SEG_Fixup): New.
 635         (Sv): New.
 636         (dis386): Use "Sv" for 0x8c and 0x8e.
 637
 638 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 639             Nick Clifton  <nickc@redhat.com>
 640
 641         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 642         function entry mask addresses.
 643         (entry_addr_occupied_slots): New variable: The number of occupied
 644         elements in entry_addr.
 645         (entry_addr_total_slots): New variable: The total number of
 646         elements in entry_addr.
 647         (parse_disassembler_options): New function.  Fills in the entry_addr
 648         array.
 649         (free_entry_array): New function.  Release the memory used by the
 650         entry addr array.  Suppressed because there is no way to call it.
 651         (is_function_entry): Check if a given address is a function's
 652         start address by looking at supplied entry mask addresses and
 653         symbol information, if available.
 654         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 655
 656 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 657
 658         * cris-dis.c (print_with_operands): Use ~31L for long instead
 659         of ~31.
 660
 661 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 662
 663         * mmix-opc.c (O): Revert the last change.
 664         (Z): Likewise.
 665
 666 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 667
 668         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 669         (Z): Likewise.
 670
 671 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 672
 673         * mmix-opc.c (O, Z): Force expression as unsigned long.
 674
 675 2005-03-18  Nick Clifton  <nickc@redhat.com>
 676
 677         * ip2k-asm.c: Regenerate.
 678         * op/opcodes.pot: Regenerate.
 679
 680 2005-03-16  Nick Clifton  <nickc@redhat.com>
 681             Ben Elliston  <bje@au.ibm.com>
 682
 683         * configure.in (werror): New switch: Add -Werror to the
 684         compiler command line.  Enabled by default.  Disable via
 685         --disable-werror.
 686         * configure: Regenerate.
 687
 688 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 689
 690         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 691         BOOKE.
 692
 693 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 694
 695         * po/es.po: Commit new Spanish translation.
 696
 697         * po/fr.po: Commit new French translation.
 698
 699 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 700
 701         * vax-dis.c: Fix spelling error
 702         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 703         of just "Entry mask: < r1 ... >"
 704
 705 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 706
 707         * arm-dis.c (arm_opcodes): Document %E and %V.
 708         Add entries for v6T2 ARM instructions:
 709         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 710         (print_insn_arm): Add support for %E and %V.
 711         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 712
 713 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 714             Alan Modra  <amodra@bigpond.net.au>
 715
 716         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 717         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 718         (SPRG_MASK): Delete.
 719         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 720         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 721         mfsprg4..7 after msprg and consolidate.
 722
 723 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 724
 725         * vax-dis.c (entry_mask_bit): New array.
 726         (print_insn_vax): Decode function entry mask.
 727
 728 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 729
 730         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 731
 732 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 733
 734         * po/opcodes.pot: Regenerate.
 735
 736 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 737
 738         * arc-dis.c (a4_decoding_class): New enum.
 739         (dsmOneArcInst): Use the enum values for the decoding class.
 740         Remove redundant case in the switch for decodingClass value 11.
 741
 742 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 743
 744         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 745         accesses.
 746         (OP_C): Consider lock prefix in non-64-bit modes.
 747
 748 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 749
 750         * cris-dis.c (format_hex): Remove ineffective warning fix.
 751         * crx-dis.c (make_instruction): Warning fix.
 752         * frv-asm.c: Regenerate.
 753
 754 2005-02-23  Nick Clifton  <nickc@redhat.com>
 755
 756         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 757         read_memory.
 758
 759         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 760
 761         * crx-dis.c (make_instruction): Move argument structure into inner
 762         scope and ensure that all of its fields are initialised before
 763         they are used.
 764
 765         * fr30-asm.c: Regenerate.
 766         * fr30-dis.c: Regenerate.
 767         * frv-asm.c: Regenerate.
 768         * frv-dis.c: Regenerate.
 769         * ip2k-asm.c: Regenerate.
 770         * ip2k-dis.c: Regenerate.
 771         * iq2000-asm.c: Regenerate.
 772         * iq2000-dis.c: Regenerate.
 773         * m32r-asm.c: Regenerate.
 774         * m32r-dis.c: Regenerate.
 775         * openrisc-asm.c: Regenerate.
 776         * openrisc-dis.c: Regenerate.
 777         * xstormy16-asm.c: Regenerate.
 778         * xstormy16-dis.c: Regenerate.
 779
 780 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 781
 782         * arc-ext.c: Warning fixes.
 783         * arc-ext.h: Likewise.
 784         * cgen-opc.c: Likewise.
 785         * ia64-gen.c: Likewise.
 786         * maxq-dis.c: Likewise.
 787         * ns32k-dis.c: Likewise.
 788         * w65-dis.c: Likewise.
 789         * ia64-asmtab.c: Regenerate.
 790
 791 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 792
 793         * fr30-desc.c: Regenerate.
 794         * fr30-desc.h: Regenerate.
 795         * fr30-opc.c: Regenerate.
 796         * fr30-opc.h: Regenerate.
 797         * frv-desc.c: Regenerate.
 798         * frv-desc.h: Regenerate.
 799         * frv-opc.c: Regenerate.
 800         * frv-opc.h: Regenerate.
 801         * ip2k-desc.c: Regenerate.
 802         * ip2k-desc.h: Regenerate.
 803         * ip2k-opc.c: Regenerate.
 804         * ip2k-opc.h: Regenerate.
 805         * iq2000-desc.c: Regenerate.
 806         * iq2000-desc.h: Regenerate.
 807         * iq2000-opc.c: Regenerate.
 808         * iq2000-opc.h: Regenerate.
 809         * m32r-desc.c: Regenerate.
 810         * m32r-desc.h: Regenerate.
 811         * m32r-opc.c: Regenerate.
 812         * m32r-opc.h: Regenerate.
 813         * m32r-opinst.c: Regenerate.
 814         * openrisc-desc.c: Regenerate.
 815         * openrisc-desc.h: Regenerate.
 816         * openrisc-opc.c: Regenerate.
 817         * openrisc-opc.h: Regenerate.
 818         * xstormy16-desc.c: Regenerate.
 819         * xstormy16-desc.h: Regenerate.
 820         * xstormy16-opc.c: Regenerate.
 821         * xstormy16-opc.h: Regenerate.
 822
 823 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 824
 825         * Makefile.am: Run "make dep-am"
 826         * Makefile.in: Regenerate.
 827
 828 2005-02-15  Nick Clifton  <nickc@redhat.com>
 829
 830         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 831         compile time warnings.
 832         (print_keyword): Likewise.
 833         (default_print_insn): Likewise.
 834
 835         * fr30-desc.c: Regenerated.
 836         * fr30-desc.h: Regenerated.
 837         * fr30-dis.c: Regenerated.
 838         * fr30-opc.c: Regenerated.
 839         * fr30-opc.h: Regenerated.
 840         * frv-desc.c: Regenerated.
 841         * frv-dis.c: Regenerated.
 842         * frv-opc.c: Regenerated.
 843         * ip2k-asm.c: Regenerated.
 844         * ip2k-desc.c: Regenerated.
 845         * ip2k-desc.h: Regenerated.
 846         * ip2k-dis.c: Regenerated.
 847         * ip2k-opc.c: Regenerated.
 848         * ip2k-opc.h: Regenerated.
 849         * iq2000-desc.c: Regenerated.
 850         * iq2000-dis.c: Regenerated.
 851         * iq2000-opc.c: Regenerated.
 852         * m32r-asm.c: Regenerated.
 853         * m32r-desc.c: Regenerated.
 854         * m32r-desc.h: Regenerated.
 855         * m32r-dis.c: Regenerated.
 856         * m32r-opc.c: Regenerated.
 857         * m32r-opc.h: Regenerated.
 858         * m32r-opinst.c: Regenerated.
 859         * openrisc-desc.c: Regenerated.
 860         * openrisc-desc.h: Regenerated.
 861         * openrisc-dis.c: Regenerated.
 862         * openrisc-opc.c: Regenerated.
 863         * openrisc-opc.h: Regenerated.
 864         * xstormy16-desc.c: Regenerated.
 865         * xstormy16-desc.h: Regenerated.
 866         * xstormy16-dis.c: Regenerated.
 867         * xstormy16-opc.c: Regenerated.
 868         * xstormy16-opc.h: Regenerated.
 869
 870 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 871
 872         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 873         address.
 874
 875 2005-02-11  Nick Clifton  <nickc@redhat.com>
 876
 877         * iq2000-asm.c: Regenerate.
 878
 879         * frv-dis.c: Regenerate.
 880
 881 2005-02-07  Jim Blandy  <jimb@redhat.com>
 882
 883         * Makefile.am (CGEN): Load guile.scm before calling the main
 884         application script.
 885         * Makefile.in: Regenerated.
 886         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 887         Simply pass the cgen-opc.scm path to ${cgen} as its first
 888         argument; ${cgen} itself now contains the '-s', or whatever is
 889         appropriate for the Scheme being used.
 890
 891 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 892
 893         * configure: Regenerate to track ../gettext.m4.
 894
 895 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 896
 897         * ia64-gen.c (NELEMS): Define.
 898         (shrink): Generate alias with missing second predicate register when
 899         opcode has two outputs and these are both predicates.
 900         * ia64-opc-i.c (FULL17): Define.
 901         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 902         here to generate output template.
 903         (TBITCM, TNATCM): Undefine after use.
 904         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 905         first input. Add ld16 aliases without ar.csd as second output. Add
 906         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 907         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 908         ar.ccv as third/fourth inputs. Consolidate through...
 909         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 910         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 911         * ia64-asmtab.c: Regenerate.
 912
 913 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 914
 915         * configure: Regenerate to track ../gettext.m4 change.
 916
 917 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 918
 919         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 920         * frv-asm.c: Rebuilt.
 921         * frv-desc.c: Rebuilt.
 922         * frv-desc.h: Rebuilt.
 923         * frv-dis.c: Rebuilt.
 924         * frv-ibld.c: Rebuilt.
 925         * frv-opc.c: Rebuilt.
 926         * frv-opc.h: Rebuilt.
 927
 928 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 929
 930         * configure: Regenerate, ../gettext.m4 was updated.
 931
 932 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 933
 934         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 935         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 936         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 937         * mips-dis.c: Ditto.
 938
 939 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 940
 941         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 942
 943 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 944
 945         * mips-dis.c (no_aliases): New disassembly option flag.
 946         (set_default_mips_dis_options): Init no_aliases to zero.
 947         (parse_mips_dis_option): Handle no-aliases option.
 948         (print_insn_mips): Ignore table entries that are aliases
 949         if no_aliases is set.
 950         (print_insn_mips16): Ditto.
 951         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 952         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 953         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 954         * mips16-opc.c (mips16_opcodes): Ditto.
 955
 956 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 957
 958         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 959         (inheritance diagram): Add missing edge.
 960         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 961         easier for the testsuite.
 962         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 963         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 964         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 965         arch_sh2a_or_sh4_up child.
 966         (sh_table): Do renaming as above.
 967         Correct comment for ldc.l for gas testsuite to read.
 968         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 969         Correct comments for movy.w and movy.l for gas testsuite to read.
 970         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 971
 972 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 973
 974         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 975
 976 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 977
 978         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 979
 980 2005-01-10  Andreas Schwab  <schwab@suse.de>
 981
 982         * disassemble.c (disassemble_init_for_target) <case
 983         bfd_arch_ia64>: Set skip_zeroes to 16.
 984         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 985
 986 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 987
 988         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 989
 990 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 991
 992         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 993         memory references. Convert avr_operand() to C90 formatting.
 994
 995 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 996
 997         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 998
 999 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
1000
1001         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1002         (no_op_insn): Initialize array with instructions that have no
1003         operands.
1004         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1005
1006 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
1007
1008         * arm-dis.c: Correct top-level comment.
1009
1010 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
1011
1012         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1013         architecuture defining the insn.
1014         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
1015         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
1016         field.
1017         Also include opcode/arm.h.
1018         * Makefile.am (arm-dis.lo): Update dependency list.
1019         * Makefile.in: Regenerate.
1020
1021 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
1022
1023         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1024         reflect the change to the short immediate syntax.
1025
1026 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
1027
1028         * or32-opc.c (debug): Warning fix.
1029         * po/POTFILES.in: Regenerate.
1030
1031         * maxq-dis.c: Formatting.
1032         (print_insn): Warning fix.
1033
1034 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
1035
1036         * arm-dis.c (WORD_ADDRESS): Define.
1037         (print_insn): Use it.  Correct big-endian end-of-section handling.
1038
1039 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
1040             Vineet Sharma      <vineets@noida.hcltech.com>
1041
1042         * maxq-dis.c: New file.
1043         * disassemble.c (ARCH_maxq): Define.
1044         (disassembler): Add 'print_insn_maxq_little' for handling maxq
1045         instructions..
1046         * configure.in: Add case for bfd_maxq_arch.
1047         * configure: Regenerate.
1048         * Makefile.am: Add support for maxq-dis.c
1049         * Makefile.in: Regenerate.
1050         * aclocal.m4: Regenerate.
1051
1052 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
1053
1054         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1055         mode.
1056         * crx-dis.c: Likewise.
1057
1058 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
1059
1060         Generally, handle CRISv32.
1061         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1062         (struct cris_disasm_data): New type.
1063         (format_reg, format_hex, cris_constraint, print_flags)
1064         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
1065         callers changed.
1066         (format_sup_reg, print_insn_crisv32_with_register_prefix)
1067         (print_insn_crisv32_without_register_prefix)
1068         (print_insn_crisv10_v32_with_register_prefix)
1069         (print_insn_crisv10_v32_without_register_prefix)
1070         (cris_parse_disassembler_options): New functions.
1071         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1072         parameter.  All callers changed.
1073         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
1074         failure.
1075         (cris_constraint) <case 'Y', 'U'>: New cases.
1076         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
1077         for constraint 'n'.
1078         (print_with_operands) <case 'Y'>: New case.
1079         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1080         <case 'N', 'Y', 'Q'>: New cases.
1081         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1082         (print_insn_cris_with_register_prefix)
1083         (print_insn_cris_without_register_prefix): Call
1084         cris_parse_disassembler_options.
1085         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1086         for CRISv32 and the size of immediate operands.  New v32-only
1087         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1088         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
1089         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
1090         Change brp to be v3..v10.
1091         (cris_support_regs): New vector.
1092         (cris_opcodes): Update head comment.  New format characters '[',
1093         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1094         Add new opcodes for v32 and adjust existing opcodes to accommodate
1095         differences to earlier variants.
1096         (cris_cond15s): New vector.
1097
1098 2004-11-04 Jan Beulich <jbeulich@novell.com>
1099
1100         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1101         (indirEb): Remove.
1102         (Mp): Use f_mode rather than none at all.
1103         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1104         replaces what previously was x_mode; x_mode now means 128-bit SSE
1105         operands.
1106         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1107         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1108         pinsrw's second operand is Edqw.
1109         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1110         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1111         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1112         mode when an operand size override is present or always suffixing.
1113         More instructions will need to be added to this group.
1114         (putop): Handle new macro chars 'C' (short/long suffix selector),
1115         'I' (Intel mode override for following macro char), and 'J' (for
1116         adding the 'l' prefix to far branches in AT&T mode). When an
1117         alternative was specified in the template, honor macro character when
1118         specified for Intel mode.
1119         (OP_E): Handle new *_mode values. Correct pointer specifications for
1120         memory operands. Consolidate output of index register.
1121         (OP_G): Handle new *_mode values.
1122         (OP_I): Handle const_1_mode.
1123         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1124         respective opcode prefix bits have been consumed.
1125         (OP_EM, OP_EX): Provide some default handling for generating pointer
1126         specifications.
1127
1128 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
1129
1130         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1131         COP_INST macro.
1132
1133 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
1134
1135         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1136         (getregliststring): Support HI/LO and user registers.
1137         * crx-opc.c (crx_instruction): Update data structure according to the
1138         rearrangement done in CRX opcode header file.
1139         (crx_regtab):  Likewise.
1140         (crx_optab):  Likewise.
1141         (crx_instruction): Reorder load/stor instructions, remove unsupported
1142         formats.
1143         support new Co-Processor instruction 'cpi'.
1144
1145 2004-10-27  Nick Clifton  <nickc@redhat.com>
1146
1147         * opcodes/iq2000-asm.c: Regenerate.
1148         * opcodes/iq2000-desc.c: Regenerate.
1149         * opcodes/iq2000-desc.h: Regenerate.
1150         * opcodes/iq2000-dis.c: Regenerate.
1151         * opcodes/iq2000-ibld.c: Regenerate.
1152         * opcodes/iq2000-opc.c: Regenerate.
1153         * opcodes/iq2000-opc.h: Regenerate.
1154
1155 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
1156
1157         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1158         us4, us5 (respectively).
1159         Remove unsupported 'popa' instruction.
1160         Reverse operands order in store co-processor instructions.
1161
1162 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
1163
1164         * Makefile.am: Run "make dep-am"
1165         * Makefile.in: Regenerate.
1166
1167 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
1168
1169         * xtensa-dis.c: Use ISO C90 formatting.
1170
1171 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
1172
1173         * ppc-opc.c: Revert 2004-09-09 change.
1174
1175 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
1176
1177         * xtensa-dis.c (state_names): Delete.
1178         (fetch_data): Use xtensa_isa_maxlength.
1179         (print_xtensa_operand): Replace operand parameter with opcode/operand
1180         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
1181         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
1182         instruction bundles.  Use xmalloc instead of malloc.
1183
1184 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
1185
1186         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1187         initializers.
1188
1189 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
1190
1191         * crx-opc.c (crx_instruction): Support Co-processor insns.
1192         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1193         (getregliststring): Change function to use the above enum.
1194         (print_arg): Handle CO-Processor insns.
1195         (crx_cinvs): Add 'b' option to invalidate the branch-target
1196         cache.
1197
1198 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
1199
1200         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1201         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1202         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1203         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1204         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1205
1206 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
1207
1208         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1209         rather than add it.
1210
1211 2004-09-30  Paul Brook  <paul@codesourcery.com>
1212
1213         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1214         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
1215
1216 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
1217
1218         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1219         (CONFIG_STATUS_DEPENDENCIES): New.
1220         (Makefile): Removed.
1221         (config.status): Likewise.
1222         * Makefile.in: Regenerated.
1223
1224 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
1225
1226         * Makefile.am: Run "make dep-am".
1227         * Makefile.in: Regenerate.
1228         * aclocal.m4: Regenerate.
1229         * configure: Regenerate.
1230         * po/POTFILES.in: Regenerate.
1231         * po/opcodes.pot: Regenerate.
1232
1233 2004-09-11  Andreas Schwab  <schwab@suse.de>
1234
1235         * configure: Rebuild.
1236
1237 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
1238
1239         * ppc-opc.c (L): Make this field not optional.
1240
1241 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
1242
1243         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1244         Fix parameter to 'm[t|f]csr' insns.
1245
1246 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
1247
1248         * configure.in: Autoupdate to autoconf 2.59.
1249         * aclocal.m4: Rebuild with aclocal 1.4p6.
1250         * configure: Rebuild with autoconf 2.59.
1251         * Makefile.in: Rebuild with automake 1.4p6 (picking up
1252         bfd changes for autoconf 2.59 on the way).
1253         * config.in: Rebuild with autoheader 2.59.
1254
1255 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
1256
1257         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1258
1259 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
1260
1261         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1262         (GRPPADLCK2): New define.
1263         (twobyte_has_modrm): True for 0xA6.
1264         (grps): GRPPADLCK2 for opcode 0xA6.
1265
1266 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
1267
1268         Introduce SH2a support.
1269         * sh-opc.h (arch_sh2a_base): Renumber.
1270         (arch_sh2a_nofpu_base): Remove.
1271         (arch_sh_base_mask): Adjust.
1272         (arch_opann_mask): New.
1273         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1274         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1275         (sh_table): Adjust whitespace.
1276         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1277         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1278         instruction list throughout.
1279         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1280         of arch_sh2a in instruction list throughout.
1281         (arch_sh2e_up): Accomodate above changes.
1282         (arch_sh2_up): Ditto.
1283         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1284         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1285         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1286         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1287         * sh-opc.h (arch_sh2a_nofpu): New.
1288         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1289         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1290         instruction.
1291         2004-01-20  DJ Delorie  <dj@redhat.com>
1292         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1293         2003-12-29  DJ Delorie  <dj@redhat.com>
1294         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1295         sh_opcode_info, sh_table): Add sh2a support.
1296         (arch_op32): New, to tag 32-bit opcodes.
1297         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1298         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1299         * sh-opc.h (arch_sh2a): Add.
1300         * sh-dis.c (arch_sh2a): Handle.
1301         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1302
1303 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1304
1305         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1306
1307 2004-07-22  Nick Clifton  <nickc@redhat.com>
1308
1309         PR/280
1310         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1311         insns - this is done by objdump itself.
1312         * h8500-dis.c (print_insn_h8500): Likewise.
1313
1314 2004-07-21  Jan Beulich <jbeulich@novell.com>
1315
1316         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1317         regardless of address size prefix in effect.
1318         (ptr_reg): Size or address registers does not depend on rex64, but
1319         on the presence of an address size override.
1320         (OP_MMX): Use rex.x only for xmm registers.
1321         (OP_EM): Use rex.z only for xmm registers.
1322
1323 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1324
1325         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1326         move/branch operations to the bottom so that VR5400 multimedia
1327         instructions take precedence in disassembly.
1328
1329 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1330
1331         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1332         ISA-specific "break" encoding.
1333
1334 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1335
1336         * arm-opc.h: Fix typo in comment.
1337
1338 2004-07-11  Andreas Schwab  <schwab@suse.de>
1339
1340         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1341
1342 2004-07-09  Andreas Schwab  <schwab@suse.de>
1343
1344         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1345
1346 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1347
1348         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1349         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1350         (crx-dis.lo): New target.
1351         (crx-opc.lo): Likewise.
1352         * Makefile.in: Regenerate.
1353         * configure.in: Handle bfd_crx_arch.
1354         * configure: Regenerate.
1355         * crx-dis.c: New file.
1356         * crx-opc.c: New file.
1357         * disassemble.c (ARCH_crx): Define.
1358         (disassembler): Handle ARCH_crx.
1359
1360 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1361
1362         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1363         * ia64-asmtab.c: Regnerate.
1364
1365 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1366
1367         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1368         (extract_fxm): Don't test dialect.
1369         (XFXFXM_MASK): Include the power4 bit.
1370         (XFXM): Add p4 param.
1371         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1372
1373 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1374
1375         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1376         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1377
1378 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1379
1380         * ppc-opc.c (BH, XLBH_MASK): Define.
1381         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1382
1383 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1384
1385         * i386-dis.c (x_mode): Comment.
1386         (two_source_ops): File scope.
1387         (float_mem): Correct fisttpll and fistpll.
1388         (float_mem_mode): New table.
1389         (dofloat): Use it.
1390         (OP_E): Correct intel mode PTR output.
1391         (ptr_reg): Use open_char and close_char.
1392         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1393         operands.  Set two_source_ops.
1394
1395 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1396
1397         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1398         instead of _raw_size.
1399
1400 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1401
1402         * ia64-gen.c (in_iclass): Handle more postinc st
1403         and ld variants.
1404         * ia64-asmtab.c: Rebuilt.
1405
1406 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1407
1408         * s390-opc.txt: Correct architecture mask for some opcodes.
1409         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1410         in the esa mode as well.
1411
1412 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1413
1414         * sh-dis.c (target_arch): Make unsigned.
1415         (print_insn_sh): Replace (most of) switch with a call to
1416         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1417         * sh-opc.h: Redefine architecture flags values.
1418         Add sh3-nommu architecture.
1419         Reorganise <arch>_up macros so they make more visual sense.
1420         (SH_MERGE_ARCH_SET): Define new macro.
1421         (SH_VALID_BASE_ARCH_SET): Likewise.
1422         (SH_VALID_MMU_ARCH_SET): Likewise.
1423         (SH_VALID_CO_ARCH_SET): Likewise.
1424         (SH_VALID_ARCH_SET): Likewise.
1425         (SH_MERGE_ARCH_SET_VALID): Likewise.
1426         (SH_ARCH_SET_HAS_FPU): Likewise.
1427         (SH_ARCH_SET_HAS_DSP): Likewise.
1428         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1429         (sh_get_arch_from_bfd_mach): Add prototype.
1430         (sh_get_arch_up_from_bfd_mach): Likewise.
1431         (sh_get_bfd_mach_from_arch_set): Likewise.
1432         (sh_merge_bfd_arc): Likewise.
1433
1434 2004-05-24  Peter Barada  <peter@the-baradas.com>
1435
1436         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1437         into new match_insn_m68k function.  Loop over canidate
1438         matches and select first that completely matches.
1439         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1440         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1441         to verify addressing for MAC/EMAC.
1442         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1443         reigster halves since 'fpu' and 'spl' look misleading.
1444         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1445         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1446         first, tighten up match masks.
1447         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1448         'size' from special case code in print_insn_m68k to
1449         determine decode size of insns.
1450
1451 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1452
1453         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1454         well as when -mpower4.
1455
1456 2004-05-13  Nick Clifton  <nickc@redhat.com>
1457
1458         * po/fr.po: Updated French translation.
1459
1460 2004-05-05  Peter Barada  <peter@the-baradas.com>
1461
1462         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1463         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1464         * m68k-op.c: Switch from ColdFire chips to core variants.
1465
1466 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1467
1468         PR 147.
1469         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1470
1471 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1472
1473         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1474         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1475
1476 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1477
1478         * sh-dis.c (print_insn_sh): Print the value in constant pool
1479         as a symbol if it looks like a symbol.
1480
1481 2004-04-22  Peter Barada <peter@the-baradas.com>
1482
1483         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1484         appropriate ColdFire architectures.
1485         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1486         mask addressing.
1487         Add EMAC instructions, fix MAC instructions. Remove
1488         macmw/macml/msacmw/msacml instructions since mask addressing now
1489         supported.
1490
1491 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1492
1493         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1494         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1495         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1496         macro.  Adjust all users.
1497
1498 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1499
1500         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1501         separately.
1502
1503 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1504
1505         * m32r-asm.c: Regenerate.
1506
1507 2004-03-29  Stan Shebs  <shebs@apple.com>
1508
1509         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1510         used.
1511
1512 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1513
1514         * aclocal.m4: Regenerate.
1515         * config.in: Regenerate.
1516         * configure: Regenerate.
1517         * po/POTFILES.in: Regenerate.
1518         * po/opcodes.pot: Regenerate.
1519
1520 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1521
1522         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1523         PPC_OPERANDS_GPR_0.
1524         * ppc-opc.c (RA0): Define.
1525         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1526         (RAOPT): Rename from RAO.  Update all uses.
1527         (powerpc_opcodes): Use RA0 as appropriate.
1528
1529 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1530
1531         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1532
1533 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1534
1535         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1536
1537 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1538
1539         * i386-dis.c (GRPPLOCK): Delete.
1540         (grps): Delete GRPPLOCK entry.
1541
1542 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1543
1544         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1545         (M, Mp): Use OP_M.
1546         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1547         (GRPPADLCK): Define.
1548         (dis386): Use NOP_Fixup on "nop".
1549         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1550         (twobyte_has_modrm): Set for 0xa7.
1551         (padlock_table): Delete.  Move to..
1552         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1553         and clflush.
1554         (print_insn): Revert PADLOCK_SPECIAL code.
1555         (OP_E): Delete sfence, lfence, mfence checks.
1556
1557 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1558
1559         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1560         (INVLPG_Fixup): New function.
1561         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1562
1563 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1564
1565         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1566         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1567         (padlock_table): New struct with PadLock instructions.
1568         (print_insn): Handle PADLOCK_SPECIAL.
1569
1570 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1571
1572         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1573         (OP_E): Twiddle clflush to sfence here.
1574
1575 2004-03-08  Nick Clifton  <nickc@redhat.com>
1576
1577         * po/de.po: Updated German translation.
1578
1579 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1580
1581         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1582         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1583         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1584         accordingly.
1585
1586 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1587
1588         * frv-asm.c: Regenerate.
1589         * frv-desc.c: Regenerate.
1590         * frv-desc.h: Regenerate.
1591         * frv-dis.c: Regenerate.
1592         * frv-ibld.c: Regenerate.
1593         * frv-opc.c: Regenerate.
1594         * frv-opc.h: Regenerate.
1595
1596 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1597
1598         * frv-desc.c, frv-opc.c: Regenerate.
1599
1600 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1601
1602         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1603
1604 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1605
1606         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1607         Also correct mistake in the comment.
1608
1609 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1610
1611         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1612         ensure that double registers have even numbers.
1613         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1614         that reserved instruction 0xfffd does not decode the same
1615         as 0xfdfd (ftrv).
1616         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1617         REG_N refers to a double register.
1618         Add REG_N_B01 nibble type and use it instead of REG_NM
1619         in ftrv.
1620         Adjust the bit patterns in a few comments.
1621
1622 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1623
1624         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1625
1626 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1627
1628         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1629
1630 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1631
1632         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1633
1634 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1635
1636         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1637         mtivor32, mtivor33, mtivor34.
1638
1639 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1640
1641         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1642
1643 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1644
1645         * arm-opc.h Maverick accumulator register opcode fixes.
1646
1647 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1648
1649         * m32r-dis.c: Regenerate.
1650
1651 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1652
1653         * sh-opc.h (sh_table): "fsrra", not "fssra".
1654
1655 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1656
1657         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1658         contraints.
1659
1660 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1661
1662         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1663
1664 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1665
1666         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1667         1.  Don't print scale factor on AT&T mode when index missing.
1668
1669 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1670
1671         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1672         when loaded into XR registers.
1673
1674 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1675
1676         * frv-desc.h: Regenerate.
1677         * frv-desc.c: Regenerate.
1678         * frv-opc.c: Regenerate.
1679
1680 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1681
1682         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1683
1684 2004-01-09  Paul Brook  <paul@codesourcery.com>
1685
1686         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1687         specific opcodes.
1688
1689 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1690
1691         * Makefile.am (libopcodes_la_DEPENDENCIES)
1692         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1693         comment about the problem.
1694         * Makefile.in: Regenerate.
1695
1696 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1697
1698         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1699         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1700         cut&paste errors in shifting/truncating numerical operands.
1701         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1702         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1703         (parse_uslo16): Likewise.
1704         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1705         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1706         (parse_s12): Likewise.
1707         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1708         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1709         (parse_uslo16): Likewise.
1710         (parse_uhi16): Parse gothi and gotfuncdeschi.
1711         (parse_d12): Parse got12 and gotfuncdesc12.
1712         (parse_s12): Likewise.
1713
1714 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1715
1716         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1717         instruction which looks similar to an 'rla' instruction.
1718
1719 For older changes see ChangeLog-0203
1720 \f
1721 Local Variables:
1722 mode: change-log
1723 left-margin: 8
1724 fill-column: 74
1725 version-control: never
1726 End: