1 2020-07-15 H.J. Lu <hongjiu.lu@intel.com>
4 * i386-dis.c (OP_E_memory): Don't display eiz with no scale
5 without base nor index registers.
7 2020-07-15 Jan Beulich <jbeulich@suse.com>
9 * i386-dis.c (putop): Move 'V' and 'W' handling.
11 2020-07-15 Jan Beulich <jbeulich@suse.com>
13 * i386-dis.c (dis386): Adjust 'V' description. Use P-based
14 construct for push/pop of register.
15 (putop): Honor cond when handling 'P'. Drop handling of plain
18 2020-07-15 Jan Beulich <jbeulich@suse.com>
20 * i386-dis.c (dis386): Adjust 'P', 'T', 'U', and '@'
21 description. Drop '&' description. Use P for push of immediate,
22 pushf/popf, enter, and leave. Use %LP for lret/retf.
23 (dis386_twobyte): Use P for push/pop of fs/gs.
24 (reg_table): Use P for push/pop. Use @ for near call/jmp.
25 (x86_64_table): Use P for far call/jmp.
26 (putop): Drop handling of 'U' and '&'. Move and adjust handling
27 of '@'. Adjust handling of 'P' and 'T'. Drop case_P and case_Q
29 (OP_J): Drop marking of REX_W as used for v_mode (ISA-dependent)
30 and dqw_mode (unconditional).
32 2020-07-14 H.J. Lu <hongjiu.lu@intel.com>
35 * i386-dis.c (OP_E_memory): Without base nor index registers,
36 32-bit displacement to 64 bits.
38 2020-07-14 Claudiu Zissulescu <claziss@gmail.com>
40 * arc-dis.c (print_insn_arc): Detect and emit a warning when a
41 faulty double register pair is detected.
43 2020-07-14 Jan Beulich <jbeulich@suse.com>
45 * i386-dis.c (OP_D): Print dr<N> instead of db<N> in Intel mode.
47 2020-07-14 Jan Beulich <jbeulich@suse.com>
49 * i386-dis.c (OP_R, Rm): Delete.
50 (MOD_0F24, MOD_0F26): Rename to ...
51 (X86_64_0F24, X86_64_0F26): ... respectively.
52 (dis386): Update 'L' and 'Z' comments.
53 (dis386_twobyte): Replace Rm by Em. Change opcode 0F24 and 0F26
55 (mod_table): Move opcode 0F24 and 0F26 entries ...
56 (x86_64_table): ... here.
57 (putop): Drop handling of 'L'. Set modrm.mod to 3 for 'Z'. Move
60 2020-07-14 Jan Beulich <jbeulich@suse.com>
62 * i386-dis.c (Rd, Rdq, MaskR): Delete.
63 (MOD_EVEX_0F3828_P_1, MOD_EVEX_0F382A_P_1_W_1,
64 MOD_EVEX_0F3838_P_1, MOD_EVEX_0F383A_P_1_W_0,
65 MOD_EVEX_0F387A_W_0, MOD_EVEX_0F387B_W_0,
66 MOD_EVEX_0F387C): New enumerators.
67 (reg_table): Use Edq for rdssp.
68 (prefix_table): Use Edq for incssp.
69 (mod_table): Use Rm for move to/from %tr. Use MaskE for kand*,
70 kandn*, knot*, kor*, kxnor*, kxor*, kadd*, kunpck*, kortest*,
71 ktest*, and kshift*. Use Edq / MaskE for kmov*.
72 * i386-dis-evex.h: Reference mod_table[] for opcode 0F387C.
73 * i386-dis-evex-mod.h: New entries for opcodes 0F3828, 0F382A,
74 0F3838, 0F383A, 0F387A, 0F387B, and 0F387C.
75 * i386-dis-evex-prefix.h: Reference mod_table[] for opcodes
76 0F3828_P_1 and 0F3838_P_1.
77 * i386-dis-evex-w.h: Reference mod_table[] for opcodes
78 0F382A_P_1, 0F383A_P_1, 0F387A, and 0F387B.
80 2020-07-14 Jan Beulich <jbeulich@suse.com>
82 * i386-dis.c (PREFIX_0F01_REG_7_MOD_3_RM_3,
83 PREFIX_0FAE_REG_5_MOD_0, PREFIX_0FC3_MOD_0, PREFIX_0F38C8,
84 PREFIX_0F38C9, PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC,
85 PREFIX_0F38CD, PREFIX_0F38F9, PREFIX_0F3ACC, PREFIX_VEX_0F77,
86 PREFIX_VEX_0F38F2, PREFIX_VEX_0F38F3_REG_1,
87 PREFIX_VEX_0F38F3_REG_2, PREFIX_VEX_0F38F3_REG_3): Delete.
88 (MOD_0F38F9_PREFIX_0, VEX_LEN_0F77_P_0, VEX_LEN_0F38F2_P_0,
89 VEX_LEN_0F38F3_R_1_P_0, VEX_LEN_0F38F3_R_2_P_0,
90 VEX_LEN_0F38F3_R_3_P_0): Rename to ...
91 (MOD_0F38F9, VEX_LEN_0F77, VEX_LEN_0F38F2, VEX_LEN_0F38F3_R_1,
92 VEX_LEN_0F38F3_R_2, VEX_LEN_0F38F3_R_3): ... these respectively.
93 (reg_table, prefix_table, three_byte_table, vex_table,
94 vex_len_table, mod_table, rm_table): Replace / remove respective
96 (intel_operand_size, OP_E_register, OP_G): Avoid undue setting
97 of PREFIX_DATA in used_prefixes.
99 2020-07-14 Jan Beulich <jbeulich@suse.com>
101 * i386-dis.c (MOD_VEX_0F3A30_L_0_W_0, MOD_VEX_0F3A30_L_0_W_1,
102 MOD_VEX_0F3A31_L_0_W_0, MOD_VEX_0F3A31_L_0_W_1,
103 MOD_VEX_0F3A32_L_0_W_0, MOD_VEX_0F3A32_L_0_W_1,
104 MOD_VEX_0F3A33_L_0_W_0, MOD_VEX_0F3A33_L_0_W_1): Replace by ...
105 (MOD_VEX_0F3A30_L_0, MOD_VEX_0F3A31_L_0,
106 MOD_VEX_0F3A32_L_0, MOD_VEX_0F3A33_L_0): ... these.
107 (VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
108 VEX_W_0F3A33_L_0): Delete.
109 (dis386): Adjust "BW" description.
110 (vex_len_table): Refer to mod_table[] for opcodes 0F3A30,
111 0F3A31, 0F3A32, and 0F3A33.
112 (vex_w_table): Delete opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
114 (mod_table): Replace opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
117 2020-07-14 Jan Beulich <jbeulich@suse.com>
119 * i386-dis.c (PREFIX_0F6C, PREFIX_0F6D, PREFIX_0F73_REG_3,
120 PREFIX_0F73_REG_7, PREFIX_0F3810, PREFIX_0F3814, PREFIX_0F3815,
121 PREFIX_0F3817, PREFIX_0F3820, PREFIX_0F3821, PREFIX_0F3822,
122 PREFIX_0F3823, PREFIX_0F3824, PREFIX_0F3825, PREFIX_0F3828,
123 PREFIX_0F3829, PREFIX_0F382A, PREFIX_0F382B, PREFIX_0F3830,
124 PREFIX_0F3831, PREFIX_0F3832, PREFIX_0F3833, PREFIX_0F3834,
125 PREFIX_0F3835, PREFIX_0F3837, PREFIX_0F3838, PREFIX_0F3839,
126 PREFIX_0F383A, PREFIX_0F383B, PREFIX_0F383C, PREFIX_0F383D,
127 PREFIX_0F383E, PREFIX_0F383F, PREFIX_0F3840, PREFIX_0F3841,
128 PREFIX_0F3880, PREFIX_0F3881, PREFIX_0F3882, PREFIX_0F38CF,
129 PREFIX_0F38DB, PREFIX_0F38DC, PREFIX_0F38DD, PREFIX_0F38DE,
130 PREFIX_0F38DF, PREFIX_0F38F5, PREFIX_0F3A08, PREFIX_0F3A09,
131 PREFIX_0F3A0A, PREFIX_0F3A0B, PREFIX_0F3A0C, PREFIX_0F3A0D,
132 PREFIX_0F3A0E, PREFIX_0F3A14, PREFIX_0F3A15, PREFIX_0F3A16,
133 PREFIX_0F3A17, PREFIX_0F3A20, PREFIX_0F3A21, PREFIX_0F3A22,
134 PREFIX_0F3A40, PREFIX_0F3A41, PREFIX_0F3A42, PREFIX_0F3A44,
135 PREFIX_0F3A60, PREFIX_0F3A61, PREFIX_0F3A62, PREFIX_0F3A63,
136 PREFIX_0F3ACE, PREFIX_0F3ACF, PREFIX_0F3ADF, PREFIX_VEX_0F60,
137 PREFIX_VEX_0F61, PREFIX_VEX_0F62, PREFIX_VEX_0F63,
138 PREFIX_VEX_0F64, PREFIX_VEX_0F65, PREFIX_VEX_0F66,
139 PREFIX_VEX_0F67, PREFIX_VEX_0F68, PREFIX_VEX_0F69,
140 PREFIX_VEX_0F6A, PREFIX_VEX_0F6B, PREFIX_VEX_0F6C,
141 PREFIX_VEX_0F6D, PREFIX_VEX_0F6E, PREFIX_VEX_0F71_REG_2,
142 PREFIX_VEX_0F71_REG_4, PREFIX_VEX_0F71_REG_6,
143 PREFIX_VEX_0F72_REG_2, PREFIX_VEX_0F72_REG_4,
144 PREFIX_VEX_0F72_REG_6, PREFIX_VEX_0F73_REG_2,
145 PREFIX_VEX_0F73_REG_3, PREFIX_VEX_0F73_REG_6,
146 PREFIX_VEX_0F73_REG_7, PREFIX_VEX_0F74,
147 PREFIX_VEX_0F75, PREFIX_VEX_0F76, PREFIX_VEX_0FC4,
148 PREFIX_VEX_0FC5, PREFIX_VEX_0FD1, PREFIX_VEX_0FD2,
149 PREFIX_VEX_0FD3, PREFIX_VEX_0FD4, PREFIX_VEX_0FD5,
150 PREFIX_VEX_0FD6, PREFIX_VEX_0FD7, PREFIX_VEX_0FD8,
151 PREFIX_VEX_0FD9, PREFIX_VEX_0FDA, PREFIX_VEX_0FDB,
152 PREFIX_VEX_0FDC, PREFIX_VEX_0FDD, PREFIX_VEX_0FDE,
153 PREFIX_VEX_0FDF, PREFIX_VEX_0FE0, PREFIX_VEX_0FE1,
154 PREFIX_VEX_0FE2, PREFIX_VEX_0FE3, PREFIX_VEX_0FE4,
155 PREFIX_VEX_0FE5, PREFIX_VEX_0FE7, PREFIX_VEX_0FE8,
156 PREFIX_VEX_0FE9, PREFIX_VEX_0FEA, PREFIX_VEX_0FEB,
157 PREFIX_VEX_0FEC, PREFIX_VEX_0FED, PREFIX_VEX_0FEE,
158 PREFIX_VEX_0FEF, PREFIX_VEX_0FF1, PREFIX_VEX_0FF2,
159 PREFIX_VEX_0FF3, PREFIX_VEX_0FF4, PREFIX_VEX_0FF5,
160 PREFIX_VEX_0FF6, PREFIX_VEX_0FF7, PREFIX_VEX_0FF8,
161 PREFIX_VEX_0FF9, PREFIX_VEX_0FFA, PREFIX_VEX_0FFB,
162 PREFIX_VEX_0FFC, PREFIX_VEX_0FFD, PREFIX_VEX_0FFE,
163 PREFIX_VEX_0F3800, PREFIX_VEX_0F3801, PREFIX_VEX_0F3802,
164 PREFIX_VEX_0F3803, PREFIX_VEX_0F3804, PREFIX_VEX_0F3805,
165 PREFIX_VEX_0F3806, PREFIX_VEX_0F3807, PREFIX_VEX_0F3808,
166 PREFIX_VEX_0F3809, PREFIX_VEX_0F380A, PREFIX_VEX_0F380B,
167 PREFIX_VEX_0F380C, PREFIX_VEX_0F380D, PREFIX_VEX_0F380E,
168 PREFIX_VEX_0F380F, PREFIX_VEX_0F3813, PREFIX_VEX_0F3816,
169 PREFIX_VEX_0F3817, PREFIX_VEX_0F3818, PREFIX_VEX_0F3819,
170 PREFIX_VEX_0F381A, PREFIX_VEX_0F381C, PREFIX_VEX_0F381D,
171 PREFIX_VEX_0F381E, PREFIX_VEX_0F3820, PREFIX_VEX_0F3821,
172 PREFIX_VEX_0F3822, PREFIX_VEX_0F3823, PREFIX_VEX_0F3824,
173 PREFIX_VEX_0F3825, PREFIX_VEX_0F3828, PREFIX_VEX_0F3829,
174 PREFIX_VEX_0F382A, PREFIX_VEX_0F382B, PREFIX_VEX_0F382C,
175 PREFIX_VEX_0F382D, PREFIX_VEX_0F382E, PREFIX_VEX_0F382F,
176 PREFIX_VEX_0F3830, PREFIX_VEX_0F3831, PREFIX_VEX_0F3832,
177 PREFIX_VEX_0F3833, PREFIX_VEX_0F3834, PREFIX_VEX_0F3835,
178 PREFIX_VEX_0F3836, PREFIX_VEX_0F3837, PREFIX_VEX_0F3838,
179 PREFIX_VEX_0F3839, PREFIX_VEX_0F383A, PREFIX_VEX_0F383B,
180 PREFIX_VEX_0F383C, PREFIX_VEX_0F383D, PREFIX_VEX_0F383E,
181 PREFIX_VEX_0F383F, PREFIX_VEX_0F3840, PREFIX_VEX_0F3841,
182 PREFIX_VEX_0F3845, PREFIX_VEX_0F3846, PREFIX_VEX_0F3847,
183 PREFIX_VEX_0F3858, PREFIX_VEX_0F3859, PREFIX_VEX_0F385A,
184 PREFIX_VEX_0F3878, PREFIX_VEX_0F3879, PREFIX_VEX_0F388C,
185 PREFIX_VEX_0F388E, PREFIX_VEX_0F3890, PREFIX_VEX_0F3891,
186 PREFIX_VEX_0F3892, PREFIX_VEX_0F3893, PREFIX_VEX_0F3896,
187 PREFIX_VEX_0F3897, PREFIX_VEX_0F3898, PREFIX_VEX_0F3899,
188 PREFIX_VEX_0F389A, PREFIX_VEX_0F389B, PREFIX_VEX_0F389C,
189 PREFIX_VEX_0F389D, PREFIX_VEX_0F389E, PREFIX_VEX_0F389F,
190 PREFIX_VEX_0F38A6, PREFIX_VEX_0F38A7, PREFIX_VEX_0F38A8,
191 PREFIX_VEX_0F38A9, PREFIX_VEX_0F38AA, PREFIX_VEX_0F38AB,
192 PREFIX_VEX_0F38AC, PREFIX_VEX_0F38AD, PREFIX_VEX_0F38AE,
193 PREFIX_VEX_0F38AF, PREFIX_VEX_0F38B6, PREFIX_VEX_0F38B7,
194 PREFIX_VEX_0F38B8, PREFIX_VEX_0F38B9, PREFIX_VEX_0F38BA,
195 PREFIX_VEX_0F38BB, PREFIX_VEX_0F38BC, PREFIX_VEX_0F38BD,
196 PREFIX_VEX_0F38BE, PREFIX_VEX_0F38BF, PREFIX_VEX_0F38CF,
197 PREFIX_VEX_0F38DB, PREFIX_VEX_0F38DC, PREFIX_VEX_0F38DD,
198 PREFIX_VEX_0F38DE, PREFIX_VEX_0F38DF, PREFIX_VEX_0F3A00,
199 PREFIX_VEX_0F3A01, PREFIX_VEX_0F3A02, PREFIX_VEX_0F3A04,
200 PREFIX_VEX_0F3A05, PREFIX_VEX_0F3A06, PREFIX_VEX_0F3A08,
201 PREFIX_VEX_0F3A09, PREFIX_VEX_0F3A0A, PREFIX_VEX_0F3A0B,
202 PREFIX_VEX_0F3A0C, PREFIX_VEX_0F3A0D, PREFIX_VEX_0F3A0E,
203 PREFIX_VEX_0F3A0F, PREFIX_VEX_0F3A14, PREFIX_VEX_0F3A15,
204 PREFIX_VEX_0F3A16, PREFIX_VEX_0F3A17, PREFIX_VEX_0F3A18,
205 PREFIX_VEX_0F3A19, PREFIX_VEX_0F3A1D, PREFIX_VEX_0F3A20,
206 PREFIX_VEX_0F3A21, PREFIX_VEX_0F3A22, PREFIX_VEX_0F3A30,
207 PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A32, PREFIX_VEX_0F3A33,
208 PREFIX_VEX_0F3A38, PREFIX_VEX_0F3A39, PREFIX_VEX_0F3A40,
209 PREFIX_VEX_0F3A41, PREFIX_VEX_0F3A42, PREFIX_VEX_0F3A44,
210 PREFIX_VEX_0F3A46, PREFIX_VEX_0F3A48, PREFIX_VEX_0F3A49,
211 PREFIX_VEX_0F3A4A, PREFIX_VEX_0F3A4B, PREFIX_VEX_0F3A4C,
212 PREFIX_VEX_0F3A5C, PREFIX_VEX_0F3A5D, PREFIX_VEX_0F3A5E,
213 PREFIX_VEX_0F3A5F, PREFIX_VEX_0F3A60, PREFIX_VEX_0F3A61,
214 PREFIX_VEX_0F3A62, PREFIX_VEX_0F3A63, PREFIX_VEX_0F3A68,
215 PREFIX_VEX_0F3A69, PREFIX_VEX_0F3A6A, PREFIX_VEX_0F3A6B,
216 PREFIX_VEX_0F3A6C, PREFIX_VEX_0F3A6D, PREFIX_VEX_0F3A6E,
217 PREFIX_VEX_0F3A6F, PREFIX_VEX_0F3A78, PREFIX_VEX_0F3A79,
218 PREFIX_VEX_0F3A7A, PREFIX_VEX_0F3A7B, PREFIX_VEX_0F3A7C,
219 PREFIX_VEX_0F3A7D, PREFIX_VEX_0F3A7E, PREFIX_VEX_0F3A7F,
220 PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF, PREFIX_VEX_0F3ADF,
221 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F66,
222 PREFIX_EVEX_0F6E, PREFIX_EVEX_0F71_REG_2,
223 PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6,
224 PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1,
225 PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4,
226 PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2,
227 PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_6,
228 PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75,
229 PREFIX_EVEX_0F76, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
230 PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB, PREFIX_EVEX_0FDF,
231 PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE7, PREFIX_EVEX_0FEB,
232 PREFIX_EVEX_0FEF, PREFIX_EVEX_0F380D, PREFIX_EVEX_0F3816,
233 PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A, PREFIX_EVEX_0F381B,
234 PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F, PREFIX_EVEX_0F382C,
235 PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837,
236 PREFIX_EVEX_0F383B, PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F,
237 PREFIX_EVEX_0F3840, PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843,
238 PREFIX_EVEX_0F3844, PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846,
239 PREFIX_EVEX_0F3847, PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D,
240 PREFIX_EVEX_0F384E, PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3850,
241 PREFIX_EVEX_0F3851, PREFIX_EVEX_0F3854, PREFIX_EVEX_0F3855,
242 PREFIX_EVEX_0F3859, PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B,
243 PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863, PREFIX_EVEX_0F3864,
244 PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3870,
245 PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3875,
246 PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877, PREFIX_EVEX_0F387A,
247 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387D,
248 PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F, PREFIX_EVEX_0F3883,
249 PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A,
250 PREFIX_EVEX_0F388B, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F388F,
251 PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891, PREFIX_EVEX_0F3892,
252 PREFIX_EVEX_0F3893, PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1,
253 PREFIX_EVEX_0F38A2, PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38B4,
254 PREFIX_EVEX_0F38B5, PREFIX_EVEX_0F38C4,
255 PREFIX_EVEX_0F38C6_REG_1, PREFIX_EVEX_0F38C6_REG_2,
256 PREFIX_EVEX_0F38C6_REG_5, PREFIX_EVEX_0F38C6_REG_6,
257 PREFIX_EVEX_0F38C7_REG_1, PREFIX_EVEX_0F38C7_REG_2,
258 PREFIX_EVEX_0F38C7_REG_5, PREFIX_EVEX_0F38C7_REG_6,
259 PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA, PREFIX_EVEX_0F38CB,
260 PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD, PREFIX_EVEX_0F3A00,
261 PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03, PREFIX_EVEX_0F3A05,
262 PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A,
263 PREFIX_EVEX_0F3A0B, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15,
264 PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18,
265 PREFIX_EVEX_0F3A19, PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B,
266 PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A20,
267 PREFIX_EVEX_0F3A21, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A23,
268 PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27,
269 PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39, PREFIX_EVEX_0F3A3A,
270 PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F,
271 PREFIX_EVEX_0F3A42, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A50,
272 PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A54, PREFIX_EVEX_0F3A55,
273 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
274 PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71,
275 PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73): Delete.
276 (MOD_0F382A_PREFIX_2, MOD_0F38F5_PREFIX_2,
277 MOD_VEX_0FD7_PREFIX_2, MOD_VEX_0FE7_PREFIX_2,
278 MOD_VEX_0F381A_PREFIX_2, MOD_VEX_0F382A_PREFIX_2,
279 MOD_VEX_0F382C_PREFIX_2, MOD_VEX_0F382D_PREFIX_2,
280 MOD_VEX_0F382E_PREFIX_2, MOD_VEX_0F382F_PREFIX_2,
281 MOD_VEX_0F385A_PREFIX_2, MOD_VEX_0F388C_PREFIX_2,
282 MOD_VEX_0F388E_PREFIX_2, MOD_VEX_W_0_0F3A30_P_2_LEN_0,
283 MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0,
284 MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0,
285 MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0,
286 MOD_VEX_W_1_0F3A33_P_2_LEN_0, MOD_EVEX_0F381A_P_2_W_0,
287 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
288 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
289 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0,
290 MOD_EVEX_0F385B_P_2_W_1, VEX_LEN_0F6E_P_2,
291 VEX_LEN_0FC4_P_2, VEX_LEN_0FC5_P_2, VEX_LEN_0FD6_P_2,
292 VEX_LEN_0FF7_P_2, VEX_LEN_0F3816_P_2, VEX_LEN_0F3819_P_2,
293 VEX_LEN_0F381A_P_2_M_0, VEX_LEN_0F3836_P_2,
294 VEX_LEN_0F3841_P_2, VEX_LEN_0F385A_P_2_M_0,
295 VEX_LEN_0F38DB_P_2, VEX_LEN_0F3A00_P_2, VEX_LEN_0F3A01_P_2,
296 VEX_LEN_0F3A06_P_2, VEX_LEN_0F3A14_P_2, VEX_LEN_0F3A15_P_2,
297 VEX_LEN_0F3A16_P_2, VEX_LEN_0F3A17_P_2, VEX_LEN_0F3A18_P_2,
298 VEX_LEN_0F3A19_P_2, VEX_LEN_0F3A20_P_2, VEX_LEN_0F3A21_P_2,
299 VEX_LEN_0F3A22_P_2, VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A31_P_2,
300 VEX_LEN_0F3A32_P_2, VEX_LEN_0F3A33_P_2, VEX_LEN_0F3A38_P_2,
301 VEX_LEN_0F3A39_P_2, VEX_LEN_0F3A41_P_2, VEX_LEN_0F3A46_P_2,
302 VEX_LEN_0F3A60_P_2, VEX_LEN_0F3A61_P_2, VEX_LEN_0F3A62_P_2,
303 VEX_LEN_0F3A63_P_2, VEX_LEN_0F3ADF_P_2, EVEX_LEN_0F6E_P_2,
304 EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, EVEX_LEN_0FD6_P_2,
305 EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3819_P_2_W_0,
306 EVEX_LEN_0F3819_P_2_W_1, EVEX_LEN_0F381A_P_2_W_0_M_0,
307 EVEX_LEN_0F381A_P_2_W_1_M_0, EVEX_LEN_0F381B_P_2_W_0_M_0,
308 EVEX_LEN_0F381B_P_2_W_1_M_0, EVEX_LEN_0F3836_P_2,
309 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
310 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0,
311 EVEX_LEN_0F38C6_REG_1_PREFIX_2, EVEX_LEN_0F38C6_REG_2_PREFIX_2,
312 EVEX_LEN_0F38C6_REG_5_PREFIX_2, EVEX_LEN_0F38C6_REG_6_PREFIX_2,
313 EVEX_LEN_0F38C7_R_1_P_2_W_0, EVEX_LEN_0F38C7_R_1_P_2_W_1,
314 EVEX_LEN_0F38C7_R_2_P_2_W_0, EVEX_LEN_0F38C7_R_2_P_2_W_1,
315 EVEX_LEN_0F38C7_R_5_P_2_W_0, EVEX_LEN_0F38C7_R_5_P_2_W_1,
316 EVEX_LEN_0F38C7_R_6_P_2_W_0, EVEX_LEN_0F38C7_R_6_P_2_W_1,
317 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1,
318 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
319 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A18_P_2_W_0,
320 EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
321 EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
322 EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
323 EVEX_LEN_0F3A1B_P_2_W_1, EVEX_LEN_0F3A20_P_2,
324 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2,
325 EVEX_LEN_0F3A23_P_2_W_0, EVEX_LEN_0F3A23_P_2_W_1,
326 EVEX_LEN_0F3A38_P_2_W_0, EVEX_LEN_0F3A38_P_2_W_1,
327 EVEX_LEN_0F3A39_P_2_W_0, EVEX_LEN_0F3A39_P_2_W_1,
328 EVEX_LEN_0F3A3A_P_2_W_0, EVEX_LEN_0F3A3A_P_2_W_1,
329 EVEX_LEN_0F3A3B_P_2_W_0, EVEX_LEN_0F3A3B_P_2_W_1,
330 EVEX_LEN_0F3A43_P_2_W_0, EVEX_LEN_0F3A43_P_2_W_1
331 VEX_W_0F380C_P_2, VEX_W_0F380D_P_2, VEX_W_0F380E_P_2,
332 VEX_W_0F380F_P_2, VEX_W_0F3813_P_2, VEX_W_0F3816_P_2,
333 VEX_W_0F3818_P_2, VEX_W_0F3819_P_2,
334 VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F382C_P_2_M_0,
335 VEX_W_0F382D_P_2_M_0, VEX_W_0F382E_P_2_M_0,
336 VEX_W_0F382F_P_2_M_0, VEX_W_0F3836_P_2,
337 VEX_W_0F3846_P_2, VEX_W_0F3858_P_2, VEX_W_0F3859_P_2,
338 VEX_W_0F385A_P_2_M_0_L_0, VEX_W_0F3878_P_2,
339 VEX_W_0F3879_P_2, VEX_W_0F38CF_P_2, VEX_W_0F3A00_P_2,
340 VEX_W_0F3A01_P_2, VEX_W_0F3A02_P_2, VEX_W_0F3A04_P_2,
341 VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2_L_0,
342 VEX_W_0F3A18_P_2_L_0, VEX_W_0F3A19_P_2_L_0,
343 VEX_W_0F3A1D_P_2, VEX_W_0F3A30_P_2_LEN_0,
344 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0,
345 VEX_W_0F3A33_P_2_LEN_0, VEX_W_0F3A38_P_2_L_0,
346 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0,
347 VEX_W_0F3A4A_P_2, VEX_W_0F3A4B_P_2, VEX_W_0F3A4C_P_2,
348 VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2, EVEX_W_0F66_P_2,
349 EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2,
350 EVEX_W_0F73_R_2_P_2, EVEX_W_0F73_R_6_P_2,
351 EVEX_W_0F76_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE7_P_2,
352 EVEX_W_0F380D_P_2, EVEX_W_0F3819_P_2,
353 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2,
354 EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2,
355 EVEX_W_0F3837_P_2, EVEX_W_0F3859_P_2,
356 EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2,
357 EVEX_W_0F3870_P_2, EVEX_W_0F387A_P_2,
358 EVEX_W_0F387B_P_2, EVEX_W_0F3883_P_2,
359 EVEX_W_0F3891_P_2, EVEX_W_0F3893_P_2,
360 EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2,
361 EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2,
362 EVEX_W_0F38C7_R_5_P_2, EVEX_W_0F38C7_R_6_P_2,
363 EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2,
364 EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2,
365 EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2,
366 EVEX_W_0F3A0B_P_2, EVEX_W_0F3A18_P_2,
367 EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2,
368 EVEX_W_0F3A1B_P_2, EVEX_W_0F3A21_P_2,
369 EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2,
370 EVEX_W_0F3A39_P_2, EVEX_W_0F3A3A_P_2,
371 EVEX_W_0F3A3B_P_2, EVEX_W_0F3A42_P_2,
372 EVEX_W_0F3A43_P_2, EVEX_W_0F3A70_P_2,
373 EVEX_W_0F3A72_P_2): Rename to ...
374 (MOD_0F382A, MOD_0F38F5, MOD_VEX_0FD7, MOD_VEX_0FE7,
375 MOD_VEX_0F381A, MOD_VEX_0F382A, MOD_VEX_0F382C, MOD_VEX_0F382D,
376 MOD_VEX_0F382E, MOD_VEX_0F382F, MOD_VEX_0F385A, MOD_VEX_0F388C,
377 MOD_VEX_0F388E, MOD_VEX_0F3A30_L_0_W_0,
378 MOD_VEX_0F3A30_L_0_W_1, MOD_VEX_0F3A31_L_0_W_0,
379 MOD_VEX_0F3A31_L_0_W_1, MOD_VEX_0F3A32_L_0_W_0,
380 MOD_VEX_0F3A32_L_0_W_1, MOD_VEX_0F3A33_L_0_W_0,
381 MOD_VEX_0F3A33_L_0_W_1, MOD_EVEX_0F381A_W_0,
382 MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, MOD_EVEX_0F381B_W_1,
383 MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, MOD_EVEX_0F385B_W_0,
384 MOD_EVEX_0F385B_W_1, VEX_LEN_0F6E, VEX_LEN_0FC4, VEX_LEN_0FC5,
385 VEX_LEN_0FD6, VEX_LEN_0FF7, VEX_LEN_0F3816, VEX_LEN_0F3819,
386 VEX_LEN_0F381A_M_0, VEX_LEN_0F3836, VEX_LEN_0F3841,
387 VEX_LEN_0F385A_M_0, VEX_LEN_0F38DB, VEX_LEN_0F3A00,
388 VEX_LEN_0F3A01, VEX_LEN_0F3A06, VEX_LEN_0F3A14, VEX_LEN_0F3A15,
389 VEX_LEN_0F3A16, VEX_LEN_0F3A17, VEX_LEN_0F3A18, VEX_LEN_0F3A19,
390 VEX_LEN_0F3A20, VEX_LEN_0F3A21, VEX_LEN_0F3A22, VEX_LEN_0F3A30,
391 VEX_LEN_0F3A31, VEX_LEN_0F3A32, VEX_LEN_0F3A33, VEX_LEN_0F3A38,
392 VEX_LEN_0F3A39, VEX_LEN_0F3A41, VEX_LEN_0F3A46, VEX_LEN_0F3A60,
393 VEX_LEN_0F3A61, VEX_LEN_0F3A62, VEX_LEN_0F3A63, VEX_LEN_0F3ADF,
394 EVEX_LEN_0F6E, EVEX_LEN_0FC4, EVEX_LEN_0FC5, EVEX_LEN_0FD6,
395 EVEX_LEN_0F3816, EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1,
396 EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0,
397 EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0,
398 EVEX_LEN_0F3836, EVEX_LEN_0F385A_W_0_M_0,
399 EVEX_LEN_0F385A_W_1_M_0, EVEX_LEN_0F385B_W_0_M_0,
400 EVEX_LEN_0F385B_W_1_M_0, EVEX_LEN_0F38C6_R_1_M_0,
401 EVEX_LEN_0F38C6_R_2_M_0, EVEX_LEN_0F38C6_R_5_M_0,
402 EVEX_LEN_0F38C6_R_6_M_0, EVEX_LEN_0F38C7_R_1_M_0_W_0,
403 EVEX_LEN_0F38C7_R_1_M_0_W_1, EVEX_LEN_0F38C7_R_2_M_0_W_0,
404 EVEX_LEN_0F38C7_R_2_M_0_W_1, EVEX_LEN_0F38C7_R_5_M_0_W_0,
405 EVEX_LEN_0F38C7_R_5_M_0_W_1, EVEX_LEN_0F38C7_R_6_M_0_W_0,
406 EVEX_LEN_0F38C7_R_6_M_0_W_1, EVEX_LEN_0F3A00_W_1,
407 EVEX_LEN_0F3A01_W_1, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15,
408 EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, EVEX_LEN_0F3A18_W_0,
409 EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0,
410 EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0,
411 EVEX_LEN_0F3A1A_W_1, EVEX_LEN_0F3A1B_W_0,
412 EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A20, EVEX_LEN_0F3A21_W_0,
413 EVEX_LEN_0F3A22, EVEX_LEN_0F3A23_W_0, EVEX_LEN_0F3A23_W_1,
414 EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1,
415 EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1,
416 EVEX_LEN_0F3A3A_W_0, EVEX_LEN_0F3A3A_W_1,
417 EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1,
418 EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1
419 VEX_W_0F380C, VEX_W_0F380D, VEX_W_0F380E, VEX_W_0F380F,
420 VEX_W_0F3813, VEX_W_0F3816_L_1, VEX_W_0F3818,
421 VEX_W_0F3819_L_1, VEX_W_0F381A_M_0_L_1, VEX_W_0F382C_M_0,
422 VEX_W_0F382D_M_0, VEX_W_0F382E_M_0, VEX_W_0F382F_M_0,
423 VEX_W_0F3836, VEX_W_0F3846, VEX_W_0F3858, VEX_W_0F3859,
424 VEX_W_0F385A_M_0_L_0, VEX_W_0F3878, VEX_W_0F3879,
425 VEX_W_0F38CF, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1,
426 VEX_W_0F3A02, VEX_W_0F3A04, VEX_W_0F3A05, VEX_W_0F3A06_L_1,
427 VEX_W_0F3A18_L_1, VEX_W_0F3A19_L_1, VEX_W_0F3A1D,
428 VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
429 VEX_W_0F3A33_L_0, VEX_W_0F3A38_L_1, VEX_W_0F3A39_L_1,
430 VEX_W_0F3A46_L_1, VEX_W_0F3A4A, VEX_W_0F3A4B, VEX_W_0F3A4C,
431 VEX_W_0F3ACE, VEX_W_0F3ACF, EVEX_W_0F66, EVEX_W_0F72_R_2,
432 EVEX_W_0F72_R_6, EVEX_W_0F73_R_2, EVEX_W_0F73_R_6,
433 EVEX_W_0F76, EVEX_W_0FD6_L_0, EVEX_W_0FE7, EVEX_W_0F380D,
434 EVEX_W_0F3819, EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F381E,
435 EVEX_W_0F381F, EVEX_W_0F3837, EVEX_W_0F3859, EVEX_W_0F385A,
436 EVEX_W_0F385B, EVEX_W_0F3870, EVEX_W_0F387A, EVEX_W_0F387B,
437 EVEX_W_0F3883, EVEX_W_0F3891, EVEX_W_0F3893, EVEX_W_0F38A1,
438 EVEX_W_0F38A3, EVEX_W_0F38C7_R_1_M_0,
439 EVEX_W_0F38C7_R_2_M_0, EVEX_W_0F38C7_R_5_M_0,
440 EVEX_W_0F38C7_R_6_M_0, EVEX_W_0F3A00, EVEX_W_0F3A01,
441 EVEX_W_0F3A05, EVEX_W_0F3A08, EVEX_W_0F3A09, EVEX_W_0F3A0A,
442 EVEX_W_0F3A0B, EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A,
443 EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38,
444 EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42,
445 EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these
447 (dis386_twobyte, three_byte_table, vex_table, vex_len_table,
448 vex_w_table, mod_table): Replace / remove respective entries.
449 (print_insn): Move up dp->prefix_requirement handling. Handle
451 * i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-mod.h,
452 i386-dis-evex-prefix.h, i386-dis-evex-reg.h, i386-dis-evex-w.h:
453 Replace / remove respective entries.
455 2020-07-14 Jan Beulich <jbeulich@suse.com>
457 * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
458 PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete.
459 (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si,
460 vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries.
461 Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for
463 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
464 0F2C, 0F2D, 0F2E, and 0F2F.
465 * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and
468 2020-07-14 Jan Beulich <jbeulich@suse.com>
470 * i386-dis.c (OP_VexR, VexScalarR): New.
471 (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS,
472 XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode,
473 need_vex_reg): Delete.
474 (prefix_table): Replace VexScalar by VexScalarR and
475 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
476 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
477 (vex_len_table): Replace EXqVexScalarS by EXqS.
478 (get_valid_dis386): Don't set need_vex_reg.
479 (print_insn): Don't initialize need_vex_reg.
480 (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and
481 q_scalar_swap_mode cases.
482 (OP_EX): Don't check for d_scalar_swap_mode and
484 (OP_VEX): Done check need_vex_reg.
485 * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and
486 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
487 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
489 2020-07-14 Jan Beulich <jbeulich@suse.com>
491 * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete.
492 (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2,
493 VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2,
494 VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ...
495 (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0,
496 VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0,
497 VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0,
498 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively.
499 (vex_table): Replace Vex128 by Vex.
500 (vex_len_table): Likewise. Adjust referenced enum names.
501 (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust
502 referenced enum names.
503 (OP_VEX): Drop vex128_mode and vex256_mode cases.
504 * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex.
506 2020-07-14 Jan Beulich <jbeulich@suse.com>
508 * i386-dis.c (dis386): "LW" description now applies to "DQ".
509 (putop): Handle "DQ". Don't handle "LW" anymore.
510 (prefix_table, mod_table): Replace %LW by %DQ.
511 * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise.
513 2020-07-14 Jan Beulich <jbeulich@suse.com>
515 * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode,
516 dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and
517 d_scalar_swap_mode case handling. Move shift adjsutment into
518 the case its applicable to.
520 2020-07-14 Jan Beulich <jbeulich@suse.com>
522 * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete.
523 (EXbScalar, EXwScalar): Fold to ...
524 (EXbwUnit): ... this.
525 (b_scalar_mode, w_scalar_mode): Fold to ...
526 (bw_unit_mode): ... this.
527 (intel_operand_size, OP_E_memory): Replace b_scalar_mode /
528 w_scalar_mode handling by bw_unit_mode one.
529 * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863
531 * i386-dis-evex-prefix.h: ... here.
533 2020-07-14 Jan Beulich <jbeulich@suse.com>
535 * i386-dis.c (PCMPESTR_Fixup): Delete.
536 (dis386): Adjust "LQ" description.
537 (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss,
538 cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of
539 PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri,
540 vpcmpestrm, and vpcmpestri.
541 (putop): Honor "cond" when handling LQ.
542 * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for
543 vcvtsi2ss and vcvtusi2ss.
544 * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for
545 vcvtsi2sd and vcvtusi2sd.
547 2020-07-14 Jan Beulich <jbeulich@suse.com>
549 * i386-dis.c (VCMP_Fixup, VCMP): Delete.
550 (simd_cmp_op): Add const.
551 (vex_cmp_op): Move up and drop initial 8 entries. Add const.
552 (CMP_Fixup): Handle VEX case.
553 (prefix_table): Replace VCMP by CMP.
554 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise.
556 2020-07-14 Jan Beulich <jbeulich@suse.com>
558 * i386-dis.c (MOVBE_Fixup): Delete.
560 (prefix_table): Use Mv for movbe entries.
562 2020-07-14 Jan Beulich <jbeulich@suse.com>
564 * i386-dis.c (CRC32_Fixup): Delete.
565 (prefix_table): Use Eb/Ev for crc32 entries.
567 2020-07-14 Jan Beulich <jbeulich@suse.com>
569 * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
570 Conditionalize invocations of "USED_REX (0)".
572 2020-07-14 Jan Beulich <jbeulich@suse.com>
574 * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,
575 CH, DH, BH, AX, DX): Delete.
576 (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg,
577 eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg,
578 dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left.
580 2020-07-10 Lili Cui <lili.cui@intel.com>
582 * i386-dis.c (TMM): New.
585 (MVexSIBMEM): Likewise.
586 (tmm_mode): Likewise.
587 (vex_sibmem_mode): Likewise.
588 (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise.
589 (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise.
590 (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise.
591 (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise.
592 (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise.
593 (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise.
594 (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise.
595 (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise.
596 (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise.
597 (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise.
598 (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise.
599 (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise.
600 (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise.
601 (PREFIX_VEX_0F3849_X86_64): Likewise.
602 (PREFIX_VEX_0F384B_X86_64): Likewise.
603 (PREFIX_VEX_0F385C_X86_64): Likewise.
604 (PREFIX_VEX_0F385E_X86_64): Likewise.
605 (X86_64_VEX_0F3849): Likewise.
606 (X86_64_VEX_0F384B): Likewise.
607 (X86_64_VEX_0F385C): Likewise.
608 (X86_64_VEX_0F385E): Likewise.
609 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise.
610 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise.
611 (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise.
612 (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise.
613 (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise.
614 (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise.
615 (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise.
616 (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise.
617 (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise.
618 (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise.
619 (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise.
620 (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise.
621 (VEX_W_0F3849_X86_64_P_0): Likewise.
622 (VEX_W_0F3849_X86_64_P_2): Likewise.
623 (VEX_W_0F3849_X86_64_P_3): Likewise.
624 (VEX_W_0F384B_X86_64_P_1): Likewise.
625 (VEX_W_0F384B_X86_64_P_2): Likewise.
626 (VEX_W_0F384B_X86_64_P_3): Likewise.
627 (VEX_W_0F385C_X86_64_P_1): Likewise.
628 (VEX_W_0F385E_X86_64_P_0): Likewise.
629 (VEX_W_0F385E_X86_64_P_1): Likewise.
630 (VEX_W_0F385E_X86_64_P_2): Likewise.
631 (VEX_W_0F385E_X86_64_P_3): Likewise.
632 (names_tmm): Likewise.
633 (att_names_tmm): Likewise.
634 (intel_operand_size): Handle void_mode.
635 (OP_XMM): Handle tmm_mode.
638 * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8,
639 CpuAMX_BF16 and CpuAMX_TILE.
640 (operand_type_shorthands): Add RegTMM.
641 (operand_type_init): Likewise.
642 (operand_types): Add Tmmword.
643 (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
644 (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
645 * i386-opc.h (CpuAMX_INT8): New.
646 (CpuAMX_BF16): Likewise.
647 (CpuAMX_TILE): Likewise.
650 (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile.
651 (i386_opcode_modifier): Extend width of fields vexvvvv and sib.
652 (i386_operand_type): Add tmmword.
653 * i386-opc.tbl: Add AMX instructions.
654 * i386-reg.tbl: Add AMX registers.
655 * i386-init.h: Regenerated.
656 * i386-tbl.h: Likewise.
658 2020-07-08 Jan Beulich <jbeulich@suse.com>
660 * i386-dis.c (OP_LWPCB_E, OP_LWP_E): Delete.
661 (REG_XOP_LWPCB, REG_XOP_LWP, REG_XOP_TBM_01, REG_XOP_TBM_02):
663 (REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0,
664 REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0): ... these
666 (MOD_VEX_0FXOP_09_12, VEX_LEN_0FXOP_08_85, VEX_LEN_0FXOP_08_86,
667 VEX_LEN_0FXOP_08_87, VEX_LEN_0FXOP_08_8E, VEX_LEN_0FXOP_08_8F,
668 VEX_LEN_0FXOP_08_95, VEX_LEN_0FXOP_08_96, VEX_LEN_0FXOP_08_97,
669 VEX_LEN_0FXOP_08_9E, VEX_LEN_0FXOP_08_9F, VEX_LEN_0FXOP_08_A3,
670 VEX_LEN_0FXOP_08_A6, VEX_LEN_0FXOP_08_B6, VEX_LEN_0FXOP_08_C0,
671 VEX_LEN_0FXOP_08_C1, VEX_LEN_0FXOP_08_C2, VEX_LEN_0FXOP_08_C3,
672 VEX_LEN_0FXOP_09_01, VEX_LEN_0FXOP_09_02, VEX_LEN_0FXOP_09_12_M_1,
673 VEX_LEN_0FXOP_09_90, VEX_LEN_0FXOP_09_91, VEX_LEN_0FXOP_09_92,
674 VEX_LEN_0FXOP_09_93, VEX_LEN_0FXOP_09_94, VEX_LEN_0FXOP_09_95,
675 VEX_LEN_0FXOP_09_96, VEX_LEN_0FXOP_09_97, VEX_LEN_0FXOP_09_98,
676 VEX_LEN_0FXOP_09_99, VEX_LEN_0FXOP_09_9A, VEX_LEN_0FXOP_09_9B,
677 VEX_LEN_0FXOP_09_C1, VEX_LEN_0FXOP_09_C2, VEX_LEN_0FXOP_09_C3,
678 VEX_LEN_0FXOP_09_C6, VEX_LEN_0FXOP_09_C7, VEX_LEN_0FXOP_09_CB,
679 VEX_LEN_0FXOP_09_D1, VEX_LEN_0FXOP_09_D2, VEX_LEN_0FXOP_09_D3,
680 VEX_LEN_0FXOP_09_D6, VEX_LEN_0FXOP_09_D7, VEX_LEN_0FXOP_09_DB,
681 VEX_LEN_0FXOP_09_E1, VEX_LEN_0FXOP_09_E2, VEX_LEN_0FXOP_09_E3,
682 VEX_LEN_0FXOP_0A_12, VEX_W_0FXOP_08_85_L_0,
683 VEX_W_0FXOP_08_86_L_0, VEX_W_0FXOP_08_87_L_0,
684 VEX_W_0FXOP_08_8E_L_0, VEX_W_0FXOP_08_8F_L_0,
685 VEX_W_0FXOP_08_95_L_0, VEX_W_0FXOP_08_96_L_0,
686 VEX_W_0FXOP_08_97_L_0, VEX_W_0FXOP_08_9E_L_0,
687 VEX_W_0FXOP_08_9F_L_0, VEX_W_0FXOP_08_A6_L_0,
688 VEX_W_0FXOP_08_B6_L_0, VEX_W_0FXOP_08_C0_L_0,
689 VEX_W_0FXOP_08_C1_L_0, VEX_W_0FXOP_08_C2_L_0,
690 VEX_W_0FXOP_08_C3_L_0, VEX_W_0FXOP_08_CC_L_0,
691 VEX_W_0FXOP_08_CD_L_0, VEX_W_0FXOP_08_CE_L_0,
692 VEX_W_0FXOP_08_CF_L_0, VEX_W_0FXOP_08_EC_L_0,
693 VEX_W_0FXOP_08_ED_L_0, VEX_W_0FXOP_08_EE_L_0,
694 VEX_W_0FXOP_08_EF_L_0, VEX_W_0FXOP_09_C1_L_0,
695 VEX_W_0FXOP_09_C2_L_0, VEX_W_0FXOP_09_C3_L_0,
696 VEX_W_0FXOP_09_C6_L_0, VEX_W_0FXOP_09_C7_L_0,
697 VEX_W_0FXOP_09_CB_L_0, VEX_W_0FXOP_09_D1_L_0,
698 VEX_W_0FXOP_09_D2_L_0, VEX_W_0FXOP_09_D3_L_0,
699 VEX_W_0FXOP_09_D6_L_0, VEX_W_0FXOP_09_D7_L_0,
700 VEX_W_0FXOP_09_DB_L_0, VEX_W_0FXOP_09_E1_L_0,
701 VEX_W_0FXOP_09_E2_L_0, VEX_W_0FXOP_09_E3_L_0): New enumerators.
702 (reg_table): Re-order XOP entries. Adjust their operands.
703 (xop_table): Replace 08_85, 08_86, 08_87, 08_8E, 08_8F, 08_95,
704 08_96, 08_97, 08_9E, 08_9F, 08_A3, 08_A6, 08_B6, 08_C0, 08_C1,
705 08_C2, 08_C3, 09_01, 09_02, 09_12, 09_90, 09_91, 09_92, 09_93,
706 09_94, 09_95, 09_96, 09_97, 09_98, 09_99, 09_9A, 09_9B, 09_C1,
707 09_C2, 09_C3, 09_C6, 09_C7, 09_CB, 09_D1, 09_D2, 09_D3, 09_D6,
708 09_D7, 09_DB, 09_E1, 09_E2, 09_E3, and VEX_LEN_0FXOP_0A_12
709 entries by references ...
710 (vex_len_table): ... to resepctive new entries here. For several
711 new and existing entries reference ...
712 (vex_w_table): ... new entries here.
713 (mod_table): New MOD_VEX_0FXOP_09_12 entry.
715 2020-07-08 Jan Beulich <jbeulich@suse.com>
717 * i386-dis.c (XMVexScalarI4): Define.
718 (VEX_LEN_0F3A6A_P_2, VEX_LEN_0F3A6B_P_2, VEX_LEN_0F3A6E_P_2,
719 VEX_LEN_0F3A6F_P_2, VEX_LEN_0F3A7A_P_2, VEX_LEN_0F3A7B_P_2,
720 VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2): Delete.
721 (vex_len_table): Move scalar FMA4 entries ...
722 (prefix_table): ... here.
723 (OP_REG_VexI4): Handle scalar_mode.
724 * i386-opc.tbl: Use VexLIG for scalar FMA4 insns.
725 * i386-tbl.h: Re-generate.
727 2020-07-08 Jan Beulich <jbeulich@suse.com>
729 * i386-dis.c (OP_Vex_2src_1, OP_Vex_2src_2, Vex_2src_1,
731 (OP_VexW, VexW): New.
732 (xop_table): Use EXx for rotates by immediate. Use EXx and VexW
733 for shifts and rotates by register.
735 2020-07-08 Jan Beulich <jbeulich@suse.com>
737 * i386-dis.c (OP_EX_VexImmW, OP_XMM_VexW, EXVexImmW, XMVexW,
738 VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, vex_w_done, get_vex_imm8,
739 OP_EX_VexReg): Delete.
740 (OP_VexI4, VexI4): New.
741 (vex_w_table): Move vpermil2ps and vpermil2pd entries ...
742 (prefix_table): ... here.
743 (print_insn): Drop setting of vex_w_done.
745 2020-07-08 Jan Beulich <jbeulich@suse.com>
747 * i386-dis.c (OP_EX_VexW, EXVexW, EXdVexW, EXqVexW): Delete.
748 (prefix_table, vex_len_table): Replace operands for FMA4 insns.
749 (xop_table): Replace operands of 4-operand insns.
750 (OP_REG_VexI4): Move VEX.W based operand swaping here.
752 2020-07-07 Claudiu Zissulescu <claziss@synopsys.com>
754 * arc-opc.c (insert_rbd): New function.
757 * arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update
760 2020-07-07 Jan Beulich <jbeulich@suse.com>
762 * i386-dis.c (EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2,
763 EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F3854_P_2,
764 EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F387D_P_2,
765 EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2):
767 (putop): Handle "BW".
768 * i386-dis-evex-w.h: Move entries for opcodes 0F3826, 0F3826,
769 0F3828, 0F3829, 0F3854, 0F3866, 0F3875, 0F387D, 0F388D, 0F3A3E,
771 * i386-dis-evex-prefix.h: ... here.
773 2020-07-06 Jan Beulich <jbeulich@suse.com>
775 * i386-dis.c (VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81): Delete.
776 (VEX_LEN_0FXOP_09_82_W_0, VEX_LEN_0FXOP_09_83_W_0,
777 VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, VEX_W_0FXOP_09_82,
778 VEX_W_0FXOP_09_83): New enumerators.
779 (xop_table): Reference the above.
780 (vex_len_table): Replace vfrczp* entries by vfrczs* ones.
781 (vex_w_table): New VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81,
782 VEX_W_0FXOP_09_82, and VEX_W_0FXOP_09_83 entries.
783 (get_valid_dis386): Return bad_opcode for XOP.PP != 0.
785 2020-07-06 Jan Beulich <jbeulich@suse.com>
787 * i386-dis.c (EVEX_W_0F3838_P_1,
788 EVEX_W_0F3839_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3855_P_2,
789 EVEX_W_0F3868_P_3, EVEX_W_0F3871_P_2, EVEX_W_0F3873_P_2,
790 EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2,
791 EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2,
792 EVEX_W_0F3A71_P_2, EVEX_W_0F3A73_P_2): Delete.
793 (putop): Centralize management of last[]. Delete SAVE_LAST.
794 * i386-dis-evex-w.h: Move entries for opcodes 0F3838, 0F3839,
795 0F3840, 0F3855, 0F3868, 0F3871, 0F3873, 0F3A50, 0F3A51, 0F3A56,
796 0F3A57, 0F3A66, 0F3A67, 0F3A71, and 0F3A73 ...
797 * i386-dis-evex-prefix.h: here.
799 2020-07-06 Jan Beulich <jbeulich@suse.com>
801 * i386-dis.c (MOD_EVEX_0F381A_P_2_W_0, MOD_EVEX_0F381A_P_2_W_1,
802 MOD_EVEX_0F381B_P_2_W_0, MOD_EVEX_0F381B_P_2_W_1,
803 MOD_EVEX_0F385A_P_2_W_0, MOD_EVEX_0F385A_P_2_W_1,
804 MOD_EVEX_0F385B_P_2_W_0, MOD_EVEX_0F385B_P_2_W_1): New
806 (EVEX_LEN_0F381A_P_2_W_0, EVEX_LEN_0F381A_P_2_W_1,
807 EVEX_LEN_0F381B_P_2_W_0, EVEX_LEN_0F381B_P_2_W_1,
808 EVEX_LEN_0F385A_P_2_W_0, EVEX_LEN_0F385A_P_2_W_1,
809 EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1): Rename to ...
810 (EVEX_LEN_0F381A_P_2_W_0_M_0, EVEX_LEN_0F381A_P_2_W_1_M_0,
811 EVEX_LEN_0F381B_P_2_W_0_M_0, EVEX_LEN_0F381B_P_2_W_1_M_0,
812 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
813 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0): ...
815 * i386-dis-evex-len.h: Adjust comments.
816 * i386-dis-evex-mod.h: New MOD_EVEX_0F381A_P_2_W_0,
817 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
818 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
819 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, and
820 MOD_EVEX_0F385B_P_2_W_1 table entries.
821 * i386-dis-evex-w.h: Reference mod_table[] for
822 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F385A_P_2, and
825 2020-07-06 Jan Beulich <jbeulich@suse.com>
827 * i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8,
828 vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use
830 (vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4):
831 Likewise. Mark 256-bit entries invalid.
833 2020-07-06 Jan Beulich <jbeulich@suse.com>
835 * i386-dis.c (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
836 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
837 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
838 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
839 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
840 PREFIX_EVEX_0F382B): Delete.
841 (EVEX_W_0F62_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6B_P_2,
842 EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0FD2_P_2,
843 EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FF2_P_2,
844 EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2,
845 EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F382B_P_2): Rename
847 (EVEX_W_0F62, EVEX_W_0F6A, EVEX_W_0F6B, EVEX_W_0F6C,
848 EVEX_W_0F6D, EVEX_W_0FD2, EVEX_W_0FD3, EVEX_W_0FD4,
849 EVEX_W_0FF2, EVEX_W_0FF3, EVEX_W_0FF4, EVEX_W_0FFA,
850 EVEX_W_0FFB, EVEX_W_0FFE, EVEX_W_0F382B): ... these
852 * i386-dis-evex.h (evex_table): Reference VEX_W table entries
853 for opcodes 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4,
854 0FF2, 0FF3, 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
855 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
856 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
857 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
858 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
859 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
860 PREFIX_EVEX_0F382B): Remove table entries.
861 * i386-dis-evex-w.h: Reference VEX table entries for opcodes
862 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, 0FF2, 0FF3,
863 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
865 2020-07-06 Jan Beulich <jbeulich@suse.com>
867 * i386-dis.c (EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3836_P_2,
868 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1): New
870 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0F3816_P_2,
871 EVEX_LEN_0F3836_P_2, EVEX_LEN_0F3A00_P_2_W_1, and
872 EVEX_LEN_0F3A01_P_2_W_1 table entries.
873 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
876 2020-07-06 Jan Beulich <jbeulich@suse.com>
878 * i386-dis.c (EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2,
879 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
880 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
881 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2): New enumerators.
882 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0FC4_P_2,
883 EVEX_LEN_0FC5_P_2, EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2,
884 EVEX_LEN_0F3A16_P_2, EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
885 EVEX_LEN_0F3A21_P_2_W_0, and EVEX_LEN_0F3A22_P_2 table entries.
886 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
889 2020-07-06 Jan Beulich <jbeulich@suse.com>
891 * i386-dis.c (PREFIX_EVEX_0F3A1D, EVEX_W_0F3A1D_P_2): Delete.
892 (VEX_W_0F3813_P_2, VEX_W_0F3A1D_P_2): New enumerators.
893 (prefix_table): Reference VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2
895 (vex_w_table): New VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 table
897 * i386-dis-evex.h (evex_table): Reference VEX table entry for
899 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F3A1D): Delete table
901 * i386-dis-evex-w.h (EVEX_W_0F3A1D_P_2): Likewise.
903 2020-07-06 Jan Beulich <jbeulich@suse.com>
905 * i386-dis.c (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
906 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
907 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
908 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
909 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
910 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
911 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
912 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
913 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
914 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
915 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
916 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
917 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
918 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
919 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
920 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
921 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
922 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
923 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
924 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
925 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
926 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
927 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
928 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
929 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
930 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
931 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF,
932 EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, EVEX_W_0F3858_P_2,
933 EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F3A04_P_2,
934 EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): Delete.
935 (prefix_table): Add EXxEVexR to FMA table entries.
936 (OP_Rounding): Move abort() invocation.
937 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
938 0F60, 0F61, 0F63, 0F67, 0F68, 0F69, 0FD1, 0FD5, 0FD8, 0FD9,
939 0FDA, 0FDC, 0FDD, 0FDE, 0FE0, 0FE1, 0FE3, 0FE4, 0FE5, 0FE8,
940 0FE9, 0FEA, 0FEC, 0FED, 0FEE, 0FF1, 0FF5, 0FF6, 0FF8, 0FF9,
941 0FFC, 0FFD, 0F3800, 0F3804, 0F380B, 0F380C, 0F3818, 0F381C,
942 0F381D, 0F383C, 0F383E, 0F3858, 0F3878, 0F3879, 0F3896, 0F3897,
943 0F3898, 0F3899, 0F389C, 0F389D, 0F389E, 0F389F, 0F38A6, 0F38A7,
944 0F38A8, 0F38A9, 0F38AC, 0F38AD, 0F38AE, 0F38AF, 0F38B6, 0F38B7,
945 0F38B8, 0F38B9, 0F38BA, 0F38BB, 0F38BC, 0F38BD, 0F38BE, 0F38BF,
946 0F38CF, 0F38DC, 0F38DD, 0F38DE, 0F38DF, 0F3A04, 0F3A0F, 0F3A44,
948 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
949 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
950 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
951 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
952 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
953 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
954 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
955 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
956 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
957 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
958 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
959 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
960 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
961 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
962 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
963 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
964 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
965 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
966 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
967 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
968 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
969 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
970 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
971 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
972 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
973 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
974 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF):
975 Delete table entries.
976 * i386-dis-evex-w.h (EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2,
977 EVEX_W_0F3858_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2,
978 EVEX_W_0F3A04_P_2, EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2):
981 2020-07-06 Jan Beulich <jbeulich@suse.com>
983 * i386-dis.c (EXqScalarS): Delete.
984 (vex_len_table): Replace EXqScalarS by EXqVexScalarS.
985 * i386-dis-evex-w.h (vmovq): Use EXqVexScalarS.
987 2020-07-06 Jan Beulich <jbeulich@suse.com>
989 * i386-dis.c (safe-ctype.h): Include.
990 (EXdScalar, EXqScalar): Delete.
991 (d_scalar_mode, q_scalar_mode): Delete.
992 (prefix_table, vex_len_table): Use EXxmm_md in place of
993 EXdScalar and EXxmm_mq in place of EXqScalar.
994 (intel_operand_size, OP_E_memory, OP_EX): Remove uses of
995 d_scalar_mode and q_scalar_mode.
996 * i386-dis-evex-w.h (vmovss): Use EXxmm_md.
997 (vmovsd): Use EXxmm_mq.
999 2020-07-06 Yuri Chornoivan <yurchor@ukr.net>
1002 * arc-dis.c: Fix spelling mistake.
1003 * po/opcodes.pot: Regenerate.
1005 2020-07-06 Nick Clifton <nickc@redhat.com>
1007 * po/pt_BR.po: Updated Brazilian Portugugese translation.
1008 * po/uk.po: Updated Ukranian translation.
1010 2020-07-04 Nick Clifton <nickc@redhat.com>
1012 * configure: Regenerate.
1013 * po/opcodes.pot: Regenerate.
1015 2020-07-04 Nick Clifton <nickc@redhat.com>
1017 Binutils 2.35 branch created.
1019 2020-07-02 H.J. Lu <hongjiu.lu@intel.com>
1021 * i386-gen.c (opcode_modifiers): Add VexSwapSources.
1022 * i386-opc.h (VexSwapSources): New.
1023 (i386_opcode_modifier): Add vexswapsources.
1024 * i386-opc.tbl: Add VexSwapSources to BMI2 and BMI instructions
1025 with two source operands swapped.
1026 * i386-tbl.h: Regenerated.
1028 2020-06-30 Nelson Chu <nelson.chu@sifive.com>
1030 * riscv-dis.c (print_insn_args, case 'E'): Updated. Let the
1031 unprivileged CSR can also be initialized.
1033 2020-06-29 Alan Modra <amodra@gmail.com>
1035 * arm-dis.c: Use C style comments.
1036 * cr16-opc.c: Likewise.
1037 * ft32-dis.c: Likewise.
1038 * moxie-opc.c: Likewise.
1039 * tic54x-dis.c: Likewise.
1040 * s12z-opc.c: Remove useless comment.
1041 * xgate-dis.c: Likewise.
1043 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1045 * i386-opc.tbl: Add a blank line.
1047 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1049 * i386-gen.c (opcode_modifiers): Replace VecSIB with SIB.
1050 (VecSIB128): Renamed to ...
1052 (VecSIB256): Renamed to ...
1054 (VecSIB512): Renamed to ...
1056 (VecSIB): Renamed to ...
1058 (i386_opcode_modifier): Replace vecsib with sib.
1059 * i386-opc.tbl (VecSIB128): New.
1060 (VecSIB256): Likewise.
1061 (VecSIB512): Likewise.
1062 Replace VecSIB=1, VecSIB=2 and VecSIB=3 with VecSIB128, VecSIB256
1063 and VecSIB512, respectively.
1065 2020-06-26 Jan Beulich <jbeulich@suse.com>
1067 * i386-dis.c: Adjust description of I macro.
1068 (x86_64_table): Drop use of I.
1069 (float_mem): Replace use of I.
1070 (putop): Remove handling of I. Adjust setting/clearing of "alt".
1072 2020-06-26 Jan Beulich <jbeulich@suse.com>
1074 * i386-dis.c: (print_insn): Avoid straight assignment to
1075 priv.orig_sizeflag when processing -M sub-options.
1077 2020-06-25 Jan Beulich <jbeulich@suse.com>
1079 * i386-dis.c: Adjust description of J macro.
1080 (dis386, x86_64_table, mod_table): Replace J.
1081 (putop): Remove handling of J.
1083 2020-06-25 Jan Beulich <jbeulich@suse.com>
1085 * i386-dis.c: (float_mem): Reduce alternatives for fstpt and fldpt.
1087 2020-06-25 Jan Beulich <jbeulich@suse.com>
1089 * i386-dis.c: Adjust description of "LQ" macro.
1090 (dis386_twobyte): Use LQ for sysret.
1091 (putop): Adjust handling of LQ.
1093 2020-06-22 Nelson Chu <nelson.chu@sifive.com>
1095 * riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c.
1096 * riscv-dis.c: Include elfxx-riscv.h.
1098 2020-06-18 H.J. Lu <hongjiu.lu@intel.com>
1100 * i386-dis.c (prefix_table): Revert the last vmgexit change.
1102 2020-06-17 Lili Cui <lili.cui@intel.com>
1104 * i386-dis.c (prefix_table): Delete the incorrect vmgexit.
1106 2020-06-14 H.J. Lu <hongjiu.lu@intel.com>
1109 * i386-dis.c (prefix_table): Replace xsuspldtrk with xsusldtrk.
1110 * i386-opc.tbl: Likewise.
1111 * i386-tbl.h: Regenerated.
1113 2020-06-12 Nelson Chu <nelson.chu@sifive.com>
1115 * riscv-opc.c (priv_specs): Remove v1.9 and PRIV_SPEC_CLASS_1P9.
1117 2020-06-11 Alex Coplan <alex.coplan@arm.com>
1119 * aarch64-opc.c (SYSREG): New macro for describing system registers.
1120 (SR_CORE): Likewise.
1121 (SR_FEAT): Likewise.
1123 (SR_V8_1): Likewise.
1124 (SR_V8_2): Likewise.
1125 (SR_V8_3): Likewise.
1126 (SR_V8_4): Likewise.
1129 (SR_SSBS): Likewise.
1131 (SR_ID_PFR2): Likewise.
1132 (SR_PROFILE): Likewise.
1133 (SR_MEMTAG): Likewise.
1134 (SR_SCXTNUM): Likewise.
1135 (aarch64_sys_regs): Refactor to store feature information in the table.
1136 (aarch64_sys_reg_supported_p): Collapse logic for system registers
1137 that now describe their own features.
1138 (aarch64_pstatefield_supported_p): Likewise.
1140 2020-06-09 H.J. Lu <hongjiu.lu@intel.com>
1142 * i386-dis.c (prefix_table): Fix a typo in comments.
1144 2020-06-09 Jan Beulich <jbeulich@suse.com>
1146 * i386-dis.c (rex_ignored): Delete.
1147 (ckprefix): Drop rex_ignored initialization.
1148 (get_valid_dis386): Drop setting of rex_ignored.
1149 (print_insn): Drop checking of rex_ignored. Don't record data
1150 size prefix as used with VEX-and-alike encodings.
1152 2020-06-09 Jan Beulich <jbeulich@suse.com>
1154 * i386-dis.c (MOD_0F12_PREFIX_2, MOD_0F16_PREFIX_2,
1155 MOD_VEX_0F12_PREFIX_2, MOD_VEX_0F16_PREFIX_2): New enumerators.
1156 (VEX_LEN_0F12_P_2, VEX_LEN_0F16_P_2): Delete.
1157 (VEX_LEN_0F12_P_2_M_0, VEX_LEN_0F16_P_2_M_0): Define.
1158 (prefix_table): Decode MOD for cases 2 of opcodes 0F12, 0F16,
1159 VEX_0F12, and VEX_0F16.
1160 (vex_len_table): Use X for vmovlp* and vmovh*s. Drop
1161 VEX_LEN_0F12_P_2 and VEX_LEN_0F16_P_2 entries.
1162 (mod_table): Use X for movlpX and movhpX. Drop PREFIX_OPCODE
1163 from movlps and movhlps. New MOD_0F12_PREFIX_2,
1164 MOD_0F16_PREFIX_2, MOD_VEX_0F12_PREFIX_2, and
1165 MOD_VEX_0F16_PREFIX_2 entries.
1167 2020-06-09 Jan Beulich <jbeulich@suse.com>
1169 * i386-dis.c (MOD_EVEX_0F12_PREFIX_2, MOD_EVEX_0F13,
1170 MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B): New enumerators.
1171 (PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1172 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29,
1173 PREFIX_EVEX_0F2B, PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
1174 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0FC6,
1175 EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, EVEX_W_0F11_P_0,
1176 EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_2,
1177 EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0,
1178 EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2,
1179 EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0,
1180 EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2,
1181 EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0,
1182 EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2,
1183 EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0,
1184 EVEX_W_0F51_P_2, EVEX_W_0F54_P_0, EVEX_W_0F54_P_2,
1185 EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0,
1186 EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2,
1187 EVEX_W_0F58_P_0, EVEX_W_0F58_P_2, EVEX_W_0F59_P_0,
1188 EVEX_W_0F59_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2,
1189 EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0,
1190 EVEX_W_0F5E_P_2, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2,
1191 EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0,
1192 EVEX_W_0FC6_P_2): Delete.
1193 (print_insn): Add EVEX.W vs embedded prefix consistency check
1194 to prefix validation.
1195 * i386-dis-evex.h (evex_table): Don't further descend for
1196 vunpcklpX, vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX,
1197 and vshufpX. Continue with MOD decoding for opcodes 0F13, 0F17,
1199 * i386-dis-evex-mod.h: Add/adjust vmovlpX/vmovhpX entries.
1200 * i386-dis-evex-prefix.h: Don't further descend for vmovupX,
1201 vucomisX, vcomisX, vsqrtpX, vaddpX, vmulpX, vsubpX, vminpX,
1202 vdivpX, vmaxpX, and vcmppX. Continue with MOD decoding for cases
1203 2 of PREFIX_EVEX_0F12, PREFIX_EVEX_0F16, and PREFIX_EVEX_0F29.
1204 Drop PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1205 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F2B,
1206 PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56,
1207 PREFIX_EVEX_0F57, and PREFIX_EVEX_0FC6 entries.
1208 * i386-dis-evex-w.h: Drop EVEX_W_0F10_P_0, EVEX_W_0F10_P_2,
1209 EVEX_W_0F11_P_0, EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0,
1210 EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0,
1211 EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2,
1212 EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0,
1213 EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2,
1214 EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0,
1215 EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2,
1216 EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0,
1217 EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_2,
1218 EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
1219 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2,
1220 EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F58_P_0,
1221 EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, EVEX_W_0F59_P_2,
1222 EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, EVEX_W_0F5D_P_0,
1223 EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_2,
1224 EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, EVEX_W_0FC2_P_0,
1225 EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, and EVEX_W_0FC6_P_2 entries.
1227 2020-06-09 Jan Beulich <jbeulich@suse.com>
1229 * i386-dis.c (vex_table): Use PREFIX_OPCODE for vunpcklpX,
1230 vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX and vshufpX.
1231 (vex_len_table) : Likewise for vmovlpX, vmovhpX, vmovntpX, and
1233 (print_insn): Drop pointless check against bad_opcode. Split
1234 prefix validation into legacy and VEX-and-alike parts.
1235 (putop): Re-work 'X' macro handling.
1237 2020-06-09 Jan Beulich <jbeulich@suse.com>
1239 * i386-dis.c (MOD_0F51): Rename to ...
1240 (MOD_0F50): ... this.
1242 2020-06-08 Alex Coplan <alex.coplan@arm.com>
1244 * arm-dis.c (arm_opcodes): Add dfb.
1245 (thumb32_opcodes): Add dfb.
1247 2020-06-08 Jan Beulich <jbeulich@suse.com>
1249 * i386-opc.h (reg_entry): Const-qualify reg_name field.
1251 2020-06-06 Alan Modra <amodra@gmail.com>
1253 * ppc-dis.c (ppc_opts): Accept -mpwr10/-Mpwr10.
1255 2020-06-05 Alan Modra <amodra@gmail.com>
1257 * cgen-dis.c (hash_insn_array): Increase size of buf. Assert
1258 size is large enough.
1260 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
1262 * disassemble.c (disassemble_init_for_target): Set endian_code for
1264 * bpf-desc.c: Regenerate.
1265 * bpf-opc.c: Likewise.
1266 * bpf-dis.c: Likewise.
1268 2020-06-03 Jose E. Marchesi <jose.marchesi@oracle.com>
1270 * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
1271 (cgen_put_insn_value): Likewise.
1272 (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
1273 * cgen-dis.in (print_insn): Likewise.
1274 * cgen-ibld.in (insert_1): Likewise.
1275 (insert_1): Likewise.
1276 (insert_insn_normal): Likewise.
1277 (extract_1): Likewise.
1278 * bpf-dis.c: Regenerate.
1279 * bpf-ibld.c: Likewise.
1280 * bpf-ibld.c: Likewise.
1281 * cgen-dis.in: Likewise.
1282 * cgen-ibld.in: Likewise.
1283 * cgen-opc.c: Likewise.
1284 * epiphany-dis.c: Likewise.
1285 * epiphany-ibld.c: Likewise.
1286 * fr30-dis.c: Likewise.
1287 * fr30-ibld.c: Likewise.
1288 * frv-dis.c: Likewise.
1289 * frv-ibld.c: Likewise.
1290 * ip2k-dis.c: Likewise.
1291 * ip2k-ibld.c: Likewise.
1292 * iq2000-dis.c: Likewise.
1293 * iq2000-ibld.c: Likewise.
1294 * lm32-dis.c: Likewise.
1295 * lm32-ibld.c: Likewise.
1296 * m32c-dis.c: Likewise.
1297 * m32c-ibld.c: Likewise.
1298 * m32r-dis.c: Likewise.
1299 * m32r-ibld.c: Likewise.
1300 * mep-dis.c: Likewise.
1301 * mep-ibld.c: Likewise.
1302 * mt-dis.c: Likewise.
1303 * mt-ibld.c: Likewise.
1304 * or1k-dis.c: Likewise.
1305 * or1k-ibld.c: Likewise.
1306 * xc16x-dis.c: Likewise.
1307 * xc16x-ibld.c: Likewise.
1308 * xstormy16-dis.c: Likewise.
1309 * xstormy16-ibld.c: Likewise.
1311 2020-06-04 Jose E. Marchesi <jemarch@gnu.org>
1313 * cgen-dis.in (cpu_desc_list): New field `insn_endian'.
1314 (print_insn_): Handle instruction endian.
1315 * bpf-dis.c: Regenerate.
1316 * bpf-desc.c: Regenerate.
1317 * epiphany-dis.c: Likewise.
1318 * epiphany-desc.c: Likewise.
1319 * fr30-dis.c: Likewise.
1320 * fr30-desc.c: Likewise.
1321 * frv-dis.c: Likewise.
1322 * frv-desc.c: Likewise.
1323 * ip2k-dis.c: Likewise.
1324 * ip2k-desc.c: Likewise.
1325 * iq2000-dis.c: Likewise.
1326 * iq2000-desc.c: Likewise.
1327 * lm32-dis.c: Likewise.
1328 * lm32-desc.c: Likewise.
1329 * m32c-dis.c: Likewise.
1330 * m32c-desc.c: Likewise.
1331 * m32r-dis.c: Likewise.
1332 * m32r-desc.c: Likewise.
1333 * mep-dis.c: Likewise.
1334 * mep-desc.c: Likewise.
1335 * mt-dis.c: Likewise.
1336 * mt-desc.c: Likewise.
1337 * or1k-dis.c: Likewise.
1338 * or1k-desc.c: Likewise.
1339 * xc16x-dis.c: Likewise.
1340 * xc16x-desc.c: Likewise.
1341 * xstormy16-dis.c: Likewise.
1342 * xstormy16-desc.c: Likewise.
1344 2020-06-03 Nick Clifton <nickc@redhat.com>
1346 * po/sr.po: Updated Serbian translation.
1348 2020-06-03 Nelson Chu <nelson.chu@sifive.com>
1350 * riscv-opc.c (riscv_get_isa_spec_class): Change bfd_boolean to int.
1351 (riscv_get_priv_spec_class): Likewise.
1353 2020-06-01 Alan Modra <amodra@gmail.com>
1355 * bpf-desc.c: Regenerate.
1357 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
1358 David Faust <david.faust@oracle.com>
1360 * bpf-desc.c: Regenerate.
1361 * bpf-opc.h: Likewise.
1362 * bpf-opc.c: Likewise.
1363 * bpf-dis.c: Likewise.
1365 2020-05-28 Alan Modra <amodra@gmail.com>
1367 * nios2-dis.c (nios2_print_insn_arg): Avoid shift left of negative
1370 2020-05-28 Alan Modra <amodra@gmail.com>
1372 * ns32k-dis.c (print_insn_arg): Handle d value of 'f' for
1374 (print_insn_ns32k): Revert last change.
1376 2020-05-28 Nick Clifton <nickc@redhat.com>
1378 * ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
1381 2020-05-26 Sandra Loosemore <sandra@codesourcery.com>
1383 Fix extraction of signed constants in nios2 disassembler (again).
1385 * nios2-dis.c (nios2_print_insn_arg): Add explicit casts to
1386 extractions of signed fields.
1388 2020-05-26 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1390 * s390-opc.txt: Relocate vector load/store instructions with
1391 additional alignment parameter and change architecture level
1392 constraint from z14 to z13.
1394 2020-05-21 Alan Modra <amodra@gmail.com>
1396 * arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout.
1397 * sparc-dis.c: Likewise.
1398 * tic4x-dis.c: Likewise.
1399 * xtensa-dis.c: Likewise.
1400 * bpf-desc.c: Regenerate.
1401 * epiphany-desc.c: Regenerate.
1402 * fr30-desc.c: Regenerate.
1403 * frv-desc.c: Regenerate.
1404 * ip2k-desc.c: Regenerate.
1405 * iq2000-desc.c: Regenerate.
1406 * lm32-desc.c: Regenerate.
1407 * m32c-desc.c: Regenerate.
1408 * m32r-desc.c: Regenerate.
1409 * mep-asm.c: Regenerate.
1410 * mep-desc.c: Regenerate.
1411 * mt-desc.c: Regenerate.
1412 * or1k-desc.c: Regenerate.
1413 * xc16x-desc.c: Regenerate.
1414 * xstormy16-desc.c: Regenerate.
1416 2020-05-20 Nelson Chu <nelson.chu@sifive.com>
1418 * riscv-opc.c (riscv_ext_version_table): The table used to store
1419 all information about the supported spec and the corresponding ISA
1420 versions. Currently, only Zicsr is supported to verify the
1421 correctness of Z sub extension settings. Others will be supported
1422 in the future patches.
1423 (struct isa_spec_t, isa_specs): List for all supported ISA spec
1424 classes and the corresponding strings.
1425 (riscv_get_isa_spec_class): New function. Get the corresponding ISA
1426 spec class by giving a ISA spec string.
1427 * riscv-opc.c (struct priv_spec_t): New structure.
1428 (struct priv_spec_t priv_specs): List for all supported privilege spec
1429 classes and the corresponding strings.
1430 (riscv_get_priv_spec_class): New function. Get the corresponding
1431 privilege spec class by giving a spec string.
1432 (riscv_get_priv_spec_name): New function. Get the corresponding
1433 privilege spec string by giving a CSR version class.
1434 * riscv-dis.c: Updated since DECLARE_CSR is changed.
1435 * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
1436 according to the chosen version. Build a hash table riscv_csr_hash to
1437 store the valid CSR for the chosen pirv verison. Dump the direct
1438 CSR address rather than it's name if it is invalid.
1439 (parse_riscv_dis_option_without_args): New function. Parse the options
1441 (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
1442 parse the options without arguments first, and then handle the options
1443 with arguments. Add the new option -Mpriv-spec, which has argument.
1444 * riscv-dis.c (print_riscv_disassembler_options): Add description
1445 about the new OBJDUMP option.
1447 2020-05-19 Peter Bergner <bergner@linux.ibm.com>
1449 * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new
1450 WC values on POWER10 sync, dcbf and wait instructions.
1451 (insert_pl, extract_pl): New functions.
1452 (L2OPT, LS, WC): Use insert_ls and extract_ls.
1453 (LS3): New , 3-bit L for sync.
1454 (LS3, L3OPT): New, 3-bit L for sync and dcbf.
1455 (SC2, PL): New, 2-bit SC and PL for sync and wait.
1456 (XWCPL_MASK, XL3RT_MASK, XSYNCLS_MASK): New instruction masks.
1457 (XOPL3, XWCPL, XSYNCLS): New opcode macros.
1458 (powerpc_opcodes) <dcbflp, dcbfps, dcbstps pause_short, phwsync,
1459 plwsync, stcisync, stncisync, stsync, waitrsv>: New extended mnemonics.
1460 <wait>: Enable PL operand on POWER10.
1461 <dcbf>: Enable L3OPT operand on POWER10.
1462 <sync>: Enable SC2 operand on POWER10.
1464 2020-05-19 Stafford Horne <shorne@gmail.com>
1467 * or1k-asm.c: Regenerate.
1468 * or1k-desc.c: Regenerate.
1469 * or1k-desc.h: Regenerate.
1470 * or1k-dis.c: Regenerate.
1471 * or1k-ibld.c: Regenerate.
1472 * or1k-opc.c: Regenerate.
1473 * or1k-opc.h: Regenerate.
1474 * or1k-opinst.c: Regenerate.
1476 2020-05-11 Alan Modra <amodra@gmail.com>
1478 * ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp,
1481 2020-05-11 Alan Modra <amodra@gmail.com>
1483 * ppc-opc.c (powerpc_opcodes): Add lxvrbx, lxvrhx, lxvrwx, lxvrdx,
1484 stxvrbx, stxvrhx, stxvrwx, stxvrdx.
1486 2020-05-11 Alan Modra <amodra@gmail.com>
1488 * ppc-opc.c (powerpc_opcodes): Add xvtlsbb.
1490 2020-05-11 Alan Modra <amodra@gmail.com>
1492 * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr,
1493 vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr..
1495 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1497 * ppc-opc.c (powerpc_opcodes) <setbc, setbcr, setnbc, setnbcr>: New
1500 2020-05-11 Alan Modra <amodra@gmail.com>
1502 * ppc-opc.c (UIM8, P_U8XX4_MASK): Define.
1503 (powerpc_opcodes): Add vgnb, vcfuged, vpextd, vpdepd, vclzdm,
1504 vctzdm, cntlzdm, pdepd, pextd, cfuged, cnttzdm.
1505 (prefix_opcodes): Add xxeval.
1507 2020-05-11 Alan Modra <amodra@gmail.com>
1509 * ppc-opc.c (powerpc_opcodes): Add xxgenpcvbm, xxgenpcvhm,
1510 xxgenpcvwm, xxgenpcvdm.
1512 2020-05-11 Alan Modra <amodra@gmail.com>
1514 * ppc-opc.c (MP, VXVAM_MASK): Define.
1515 (VXVAPS_MASK): Use VXVA_MASK.
1516 (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm,
1517 vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm,
1518 vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm,
1519 vcntmbb, vcntmbh, vcntmbw, vcntmbd.
1521 2020-05-11 Alan Modra <amodra@gmail.com>
1522 Peter Bergner <bergner@linux.ibm.com>
1524 * ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a):
1526 (powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK,
1527 YMSK2, XA6a, XA6ap, XB6a entries.
1528 (PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define
1529 (P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define.
1531 (powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz,
1532 xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger,
1533 xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp,
1534 xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np,
1535 xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp,
1536 xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn,
1537 xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16.
1538 (prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp,
1539 pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8,
1540 pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2,
1541 pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp,
1542 pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp,
1543 pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn,
1544 pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn.
1546 2020-05-11 Alan Modra <amodra@gmail.com>
1548 * ppc-opc.c (insert_imm32, extract_imm32): New functions.
1549 (insert_xts, extract_xts): New functions.
1550 (IMM32, UIM3, IX, UIM5, SH3, XTS, P8RR): Define.
1551 (P_XX4_MASK, P_UXX4_MASK, VSOP, P_VS_MASK, P_VSI_MASK): Define.
1552 (VXRC_MASK, VXSH_MASK): Define.
1553 (powerpc_opcodes): Add vinsbvlx, vsldbi, vextdubvlx, vextdubvrx,
1554 vextduhvlx, vextduhvrx, vextduwvlx, vextduwvrx, vextddvlx,
1555 vextddvrx, vinshvlx, vinswvlx, vinsw, vinsbvrx, vinshvrx,
1556 vinswvrx, vinsd, vinsblx, vsrdbi, vinshlx, vinswlx, vinsdlx,
1557 vinsbrx, vinshrx, vinswrx, vinsdrx, lxvkq.
1558 (prefix_opcodes): Add xxsplti32dx, xxspltidp, xxspltiw, xxblendvb,
1559 xxblendvh, xxblendvw, xxblendvd, xxpermx.
1561 2020-05-11 Alan Modra <amodra@gmail.com>
1563 * ppc-opc.c (powerpc_opcodes): Add vrlq, vdivuq, vmsumcud, vrlqmi,
1564 vmuloud, vcmpuq, vslq, vdivsq, vcmpsq, vrlqnm, vcmpequq, vmulosd,
1565 vsrq, vdiveuq, vcmpgtuq, vmuleud, vsraq, vdivesq, vcmpgtsq, vmulesd,
1566 vcmpequq., vextsd2q, vmoduq, vcmpgtuq., vmodsq, vcmpgtsq., xscvqpuqz,
1567 xscvuqqp, xscvqpsqz, xscvsqqp, dcffixqq, dctfixqq.
1569 2020-05-11 Alan Modra <amodra@gmail.com>
1571 * ppc-opc.c (insert_xtp, extract_xtp): New functions.
1572 (XTP, DQXP, DQXP_MASK): Define.
1573 (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx.
1574 (prefix_opcodes): Add plxvp and pstxvp.
1576 2020-05-11 Alan Modra <amodra@gmail.com>
1578 * ppc-opc.c (powerpc_opcodes): Add vdivuw, vdivud, vdivsw, vmulld,
1579 vdivsd, vmulhuw, vdiveuw, vmulhud, vdiveud, vmulhsw, vdivesw,
1580 vmulhsd, vdivesd, vmoduw, vmodud, vmodsw, vmodsd.
1582 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1584 * ppc-opc.c (powerpc_opcodes) <brd, brh, brw>: New mnemonics.
1586 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1588 * ppc-opc.c (insert_l1opt, extract_l1opt): New functions.
1590 (powerpc_opcodes) <paste.>: Add L operand for cpu POWER10.
1592 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1594 * ppc-opc.c (powerpc_opcodes) <slbiag>: Add variant with L operand.
1596 2020-05-11 Alan Modra <amodra@gmail.com>
1598 * ppc-dis.c (powerpc_init_dialect): Default to "power10".
1600 2020-05-11 Alan Modra <amodra@gmail.com>
1602 * ppc-dis.c (ppc_opts): Add "power10" entry.
1603 (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
1604 * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
1606 2020-05-11 Nick Clifton <nickc@redhat.com>
1608 * po/fr.po: Updated French translation.
1610 2020-04-30 Alex Coplan <alex.coplan@arm.com>
1612 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
1613 * aarch64-opc.c (fields): Add entry for FLD_imm16_2.
1614 (operand_general_constraint_met_p): validate
1615 AARCH64_OPND_UNDEFINED.
1616 * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
1618 * aarch64-asm-2.c: Regenerated.
1619 * aarch64-dis-2.c: Regenerated.
1620 * aarch64-opc-2.c: Regenerated.
1622 2020-04-29 Nick Clifton <nickc@redhat.com>
1625 * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC
1628 2020-04-29 Nick Clifton <nickc@redhat.com>
1630 * po/sv.po: Updated Swedish translation.
1632 2020-04-29 Nick Clifton <nickc@redhat.com>
1635 * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U. Use
1636 IMM0_8S for arithmetic insns and IMM0_8U for logical insns.
1637 * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add
1640 2020-04-21 Andreas Schwab <schwab@linux-m68k.org>
1643 * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of
1644 cmpi only on m68020up and cpu32.
1646 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1648 * aarch64-asm.c (aarch64_ins_none): New.
1649 * aarch64-asm.h (ins_none): New declaration.
1650 * aarch64-dis.c (aarch64_ext_none): New.
1651 * aarch64-dis.h (ext_none): New declaration.
1652 * aarch64-opc.c (aarch64_print_operand): Update case for
1653 AARCH64_OPND_BARRIER_PSB.
1654 * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
1655 (AARCH64_OPERANDS): Update inserter/extracter for
1656 AARCH64_OPND_BARRIER_PSB to use new dummy functions.
1657 * aarch64-asm-2.c: Regenerated.
1658 * aarch64-dis-2.c: Regenerated.
1659 * aarch64-opc-2.c: Regenerated.
1661 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1663 * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove.
1664 (aarch64_feature_ras, RAS): Likewise.
1665 (aarch64_feature_stat_profile, STAT_PROFILE): Likewise.
1666 (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716,
1667 autia1716, autib1716, esb, psb, dgh, paciaz, paciasp, pacibz, pacibsp,
1668 autiaz, autiasp, autibz, autibsp to be CORE_INSN.
1669 * aarch64-asm-2.c: Regenerated.
1670 * aarch64-dis-2.c: Regenerated.
1671 * aarch64-opc-2.c: Regenerated.
1673 2020-04-17 Fredrik Strupe <fredrik@strupe.net>
1675 * arm-dis.c (neon_opcodes): Fix VDUP instruction masks.
1676 (print_insn_neon): Support disassembly of conditional
1679 2020-02-16 David Faust <david.faust@oracle.com>
1681 * bpf-desc.c: Regenerate.
1682 * bpf-desc.h: Likewise.
1683 * bpf-opc.c: Regenerate.
1684 * bpf-opc.h: Likewise.
1686 2020-04-07 Lili Cui <lili.cui@intel.com>
1688 * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1,
1689 (prefix_table): New instructions (see prefixes above).
1690 (rm_table): Likewise
1691 * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS,
1692 CPU_ANY_TSXLDTRK_FLAGS.
1693 (cpu_flags): Add CpuTSXLDTRK.
1694 * i386-opc.h (enum): Add CpuTSXLDTRK.
1695 (i386_cpu_flags): Add cputsxldtrk.
1696 * i386-opc.tbl: Add XSUSPLDTRK insns.
1697 * i386-init.h: Regenerate.
1698 * i386-tbl.h: Likewise.
1700 2020-04-02 Lili Cui <lili.cui@intel.com>
1702 * i386-dis.c (prefix_table): New instructions serialize.
1703 * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS,
1704 CPU_ANY_SERIALIZE_FLAGS.
1705 (cpu_flags): Add CpuSERIALIZE.
1706 * i386-opc.h (enum): Add CpuSERIALIZE.
1707 (i386_cpu_flags): Add cpuserialize.
1708 * i386-opc.tbl: Add SERIALIZE insns.
1709 * i386-init.h: Regenerate.
1710 * i386-tbl.h: Likewise.
1712 2020-03-26 Alan Modra <amodra@gmail.com>
1714 * disassemble.h (opcodes_assert): Declare.
1715 (OPCODES_ASSERT): Define.
1716 * disassemble.c: Don't include assert.h. Include opintl.h.
1717 (opcodes_assert): New function.
1718 * h8300-dis.c (bfd_h8_disassemble_init): Use OPCODES_ASSERT.
1719 (bfd_h8_disassemble): Reduce size of data array. Correctly
1720 calculate maxlen. Omit insn decoding when insn length exceeds
1721 maxlen. Exit from nibble loop when looking for E, before
1722 accessing next data byte. Move processing of E outside loop.
1723 Replace tests of maxlen in loop with assertions.
1725 2020-03-26 Alan Modra <amodra@gmail.com>
1727 * arc-dis.c (find_format): Init needs_limm. Simplify use of limm.
1729 2020-03-25 Alan Modra <amodra@gmail.com>
1731 * z80-dis.c (suffix): Init mybuf.
1733 2020-03-22 Alan Modra <amodra@gmail.com>
1735 * h8300-dis.c (bfd_h8_disassemble): Limit data[] access to that
1736 successflly read from section.
1738 2020-03-22 Alan Modra <amodra@gmail.com>
1740 * arc-dis.c (find_format): Use ISO C string concatenation rather
1741 than line continuation within a string. Don't access needs_limm
1742 before testing opcode != NULL.
1744 2020-03-22 Alan Modra <amodra@gmail.com>
1746 * ns32k-dis.c (print_insn_arg): Update comment.
1747 (print_insn_ns32k): Reduce size of index_offset array, and
1748 initialize, passing -1 to print_insn_arg for args that are not
1749 an index. Don't exit arg loop early. Abort on bad arg number.
1751 2020-03-22 Alan Modra <amodra@gmail.com>
1753 * s12z-dis.c (abstract_read_memory): Don't print error on EOI.
1754 * s12z-opc.c: Formatting.
1755 (operands_f): Return an int.
1756 (opr_n_bytes_p1): Return -1 on reaching buffer memory limit.
1757 (opr_n_bytes2, bfextins_n_bytes, mul_n_bytes, bm_n_bytes),
1758 (shift_n_bytes, mov_imm_opr_n_bytes, loop_prim_n_bytes),
1759 (exg_sex_discrim): Likewise.
1760 (create_immediate_operand, create_bitfield_operand),
1761 (create_register_operand_with_size, create_register_all_operand),
1762 (create_register_all16_operand, create_simple_memory_operand),
1763 (create_memory_operand, create_memory_auto_operand): Don't
1764 segfault on malloc failure.
1765 (z_ext24_decode): Return an int status, negative on fail, zero
1767 (x_imm1, imm1_decode, trap_decode, z_opr_decode, z_opr_decode2),
1768 (imm1234, reg_s_imm, reg_s_opr, z_imm1234_8base, z_imm1234_0base),
1769 (z_tfr, z_reg, reg_xy, lea_reg_xys_opr, lea_reg_xys, rel_15_7),
1770 (decode_rel_15_7, cmp_xy, sub_d6_x_y, sub_d6_y_x),
1771 (ld_18bit_decode, mul_decode, bm_decode, bm_rel_decode),
1772 (mov_imm_opr, ld_18bit_decode, exg_sex_decode),
1773 (loop_primitive_decode, shift_decode, psh_pul_decode),
1774 (bit_field_decode): Similarly.
1775 (z_decode_signed_value, decode_signed_value): Similarly. Add arg
1776 to return value, update callers.
1777 (x_opr_decode_with_size): Check all reads, returning NULL on fail.
1778 Don't segfault on NULL operand.
1779 (decode_operation): Return OP_INVALID on first fail.
1780 (decode_s12z): Check all reads, returning -1 on fail.
1782 2020-03-20 Alan Modra <amodra@gmail.com>
1784 * metag-dis.c (print_insn_metag): Don't ignore status from
1787 2020-03-20 Alan Modra <amodra@gmail.com>
1789 * nds32-dis.c (print_insn_nds32): Remove unnecessary casts.
1790 Initialize parts of buffer not written when handling a possible
1791 2-byte insn at end of section. Don't attempt decoding of such
1792 an insn by the 4-byte machinery.
1794 2020-03-20 Alan Modra <amodra@gmail.com>
1796 * ppc-dis.c (print_insn_powerpc): Only clear needed bytes of
1797 partially filled buffer. Prevent lookup of 4-byte insns when
1798 only VLE 2-byte insns are possible due to section size. Print
1799 ".word" rather than ".long" for 2-byte leftovers.
1801 2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
1804 * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes.
1806 2020-03-13 Jan Beulich <jbeulich@suse.com>
1808 * i386-dis.c (X86_64_0D): Rename to ...
1809 (X86_64_0E): ... this.
1811 2020-03-09 H.J. Lu <hongjiu.lu@intel.com>
1813 * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP).
1814 * Makefile.in: Regenerated.
1816 2020-03-09 Jan Beulich <jbeulich@suse.com>
1818 * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp*
1820 * i386-tbl.h: Re-generate.
1822 2020-03-09 Jan Beulich <jbeulich@suse.com>
1824 * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*,
1825 vprot*, vpsha*, and vpshl*.
1826 * i386-tbl.h: Re-generate.
1828 2020-03-09 Jan Beulich <jbeulich@suse.com>
1830 * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps,
1831 vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops.
1832 * i386-tbl.h: Re-generate.
1834 2020-03-09 Jan Beulich <jbeulich@suse.com>
1836 * i386-gen.c (set_bitfield): Ignore zero-length field names.
1837 * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps,
1838 cmpss, cmppd, and cmpsd 2-operand pseudo-ops.
1839 * i386-tbl.h: Re-generate.
1841 2020-03-09 Jan Beulich <jbeulich@suse.com>
1843 * i386-gen.c (struct template_arg, struct template_instance,
1844 struct template_param, struct template, templates,
1845 parse_template, expand_templates): New.
1846 (process_i386_opcodes): Various local variables moved to
1847 expand_templates. Call parse_template and expand_templates.
1848 * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
1849 * i386-tbl.h: Re-generate.
1851 2020-03-06 Jan Beulich <jbeulich@suse.com>
1853 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph,
1854 vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate
1855 register and memory source templates. Replace VexW= by VexW*
1857 * i386-tbl.h: Re-generate.
1859 2020-03-06 Jan Beulich <jbeulich@suse.com>
1861 * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
1862 VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
1863 * i386-tbl.h: Re-generate.
1865 2020-03-06 Jan Beulich <jbeulich@suse.com>
1867 * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax.
1868 * i386-tbl.h: Re-generate.
1870 2020-03-06 Jan Beulich <jbeulich@suse.com>
1872 * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants.
1873 (movmskps, pextrw, pinsrw, pmovmskb, movmskpd, extractps,
1874 pextrb, pinsrb, roundsd): Drop NoRex64 and where applicable use
1875 VexW0 on SSE2AVX variants.
1876 (vmovq): Drop NoRex64 from XMM/XMM variants.
1877 (vextractps, vmovmskpd, vmovmskps, vpextrb, vpextrw, vpinsrb,
1878 vpinsrw, vpmovmskb, vroundsd, vpmovmskb): Drop NoRex64 and where
1879 applicable use VexW0.
1880 * i386-tbl.h: Re-generate.
1882 2020-03-06 Jan Beulich <jbeulich@suse.com>
1884 * i386-gen.c (opcode_modifiers): Remove Rex64 field.
1885 * i386-opc.h (Rex64): Delete.
1886 (struct i386_opcode_modifier): Remove rex64 field.
1887 * i386-opc.tbl (crc32): Drop Rex64.
1888 Replace Rex64 with Size64 everywhere else.
1889 * i386-tbl.h: Re-generate.
1891 2020-03-06 Jan Beulich <jbeulich@suse.com>
1893 * i386-dis.c (OP_E_memory): Exclude recording of used address
1894 prefix for "bnd" modes only in 64-bit mode. Don't decode 16-bit
1895 addressed memory operands for MPX insns.
1897 2020-03-06 Jan Beulich <jbeulich@suse.com>
1899 * i386-opc.tbl (movmskps, mwait, vmread, vmwrite, invept,
1900 invvpid, invpcid, rdfsbase, rdgsbase, wrfsbase, wrgsbase, adcx,
1901 adox, mwaitx, rdpid, movdiri): Add IgnoreSize.
1902 (ptwrite): Split into non-64-bit and 64-bit forms.
1903 * i386-tbl.h: Re-generate.
1905 2020-03-06 Jan Beulich <jbeulich@suse.com>
1907 * i386-opc.tbl (tpause, umwait): Add IgnoreSize. Add 3-operand
1909 * i386-tbl.h: Re-generate.
1911 2020-03-04 Jan Beulich <jbeulich@suse.com>
1913 * i386-dis.c (PREFIX_0F01_REG_3_RM_1): New.
1914 (prefix_table): Move vmmcall here. Add vmgexit.
1915 (rm_table): Replace vmmcall entry by prefix_table[] escape.
1916 * i386-gen.c (cpu_flag_init): Add CPU_SEV_ES_FLAGS entry.
1917 (cpu_flags): Add CpuSEV_ES entry.
1918 * i386-opc.h (CpuSEV_ES): New.
1919 (union i386_cpu_flags): Add cpusev_es field.
1920 * i386-opc.tbl (vmgexit): New.
1921 * i386-init.h, i386-tbl.h: Re-generate.
1923 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
1925 * i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize
1927 * i386-opc.h (IGNORESIZE): New.
1928 (DEFAULTSIZE): Likewise.
1929 (IgnoreSize): Removed.
1930 (DefaultSize): Likewise.
1931 (MnemonicSize): New.
1932 (i386_opcode_modifier): Replace ignoresize/defaultsize with
1934 * i386-opc.tbl (IgnoreSize): New.
1935 (DefaultSize): Likewise.
1936 * i386-tbl.h: Regenerated.
1938 2020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
1941 * z80-dis.c: Fix disassembly of LD IY,(HL) and D (HL),IX
1944 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
1947 * i386-opc.tbl: Add IgnoreSize to cvtsi2sd, cvtsi2ss, vcvtsi2sd,
1948 vcvtsi2ss, vcvtusi2sd and vcvtusi2ss for AT&T syntax.
1949 * i386-tbl.h: Regenerated.
1951 2020-02-26 Alan Modra <amodra@gmail.com>
1953 * aarch64-asm.c: Indent labels correctly.
1954 * aarch64-dis.c: Likewise.
1955 * aarch64-gen.c: Likewise.
1956 * aarch64-opc.c: Likewise.
1957 * alpha-dis.c: Likewise.
1958 * i386-dis.c: Likewise.
1959 * nds32-asm.c: Likewise.
1960 * nfp-dis.c: Likewise.
1961 * visium-dis.c: Likewise.
1963 2020-02-25 Claudiu Zissulescu <claziss@gmail.com>
1965 * arc-regs.h (int_vector_base): Make it available for all ARC
1968 2020-02-20 Nelson Chu <nelson.chu@sifive.com>
1970 * riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is
1973 2020-02-19 Nelson Chu <nelson.chu@sifive.com>
1975 * riscv-opc.c (riscv_opcodes): Convert add/addi to the compressed
1976 c.mv/c.li if rs1 is zero.
1978 2020-02-17 H.J. Lu <hongjiu.lu@intel.com>
1980 * i386-gen.c (cpu_flag_init): Replace CpuABM with
1981 CpuLZCNT|CpuPOPCNT. Add CpuPOPCNT to CPU_SSE4_2_FLAGS. Add
1983 (cpu_flags): Remove CpuABM. Add CpuPOPCNT.
1984 * i386-opc.h (CpuABM): Removed.
1986 (i386_cpu_flags): Remove cpuabm. Add cpupopcnt.
1987 * i386-opc.tbl: Replace CpuABM|CpuSSE4_2 with CpuPOPCNT on
1988 popcnt. Remove CpuABM from lzcnt.
1989 * i386-init.h: Regenerated.
1990 * i386-tbl.h: Likewise.
1992 2020-02-17 Jan Beulich <jbeulich@suse.com>
1994 * i386-opc.tbl (vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss):
1995 Fold CpuNo64 and Cpu64 templates. Use VexLIG/EVexLIG and VexW0/
1996 VexW1 instead of open-coding them.
1997 * i386-tbl.h: Re-generate.
1999 2020-02-17 Jan Beulich <jbeulich@suse.com>
2001 * i386-opc.tbl (AddrPrefixOpReg): Define.
2002 (monitor, invlpga, vmload, vmrun, vmsave, clzero, monitorx,
2003 umonitor, movdir64b, enqcmd, enqcmds): Fold Cpu64 and CpuNo64
2004 templates. Drop NoRex64.
2005 * i386-tbl.h: Re-generate.
2007 2020-02-17 Jan Beulich <jbeulich@suse.com>
2010 * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq,
2011 vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms
2012 into Intel syntax instance (with Unpsecified) and AT&T one
2014 (vcvtneps2bf16): Likewise, along with folding the two so far
2016 * i386-tbl.h: Re-generate.
2018 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2020 * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from
2021 CPU_ANY_SSE4A_FLAGS.
2023 2020-02-17 Alan Modra <amodra@gmail.com>
2025 * i386-gen.c (cpu_flag_init): Correct last change.
2027 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2029 * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS. Remove
2032 2020-02-14 H.J. Lu <hongjiu.lu@intel.com>
2034 * i386-opc.tbl (movsx): Remove Intel syntax comments.
2037 2020-02-14 Jan Beulich <jbeulich@suse.com>
2040 * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as
2041 destination for Cpu64-only variant.
2042 (movzx): Fold patterns.
2043 * i386-tbl.h: Re-generate.
2045 2020-02-13 Jan Beulich <jbeulich@suse.com>
2047 * i386-gen.c (cpu_flag_init): Move CpuSSE4a from
2048 CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add
2049 CPU_ANY_SSE4_FLAGS entry.
2050 * i386-init.h: Re-generate.
2052 2020-02-12 Jan Beulich <jbeulich@suse.com>
2054 * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form
2055 with Unspecified, making the present one AT&T syntax only.
2056 * i386-tbl.h: Re-generate.
2058 2020-02-12 Jan Beulich <jbeulich@suse.com>
2060 * i386-opc.tbl (jmp): Fold CpuNo64 and Amd64 direct variants.
2061 * i386-tbl.h: Re-generate.
2063 2020-02-12 Jan Beulich <jbeulich@suse.com>
2066 * i386-dis.c (putop): Handle REX.W in '^' case for Intel64 mode.
2067 * i386-opc.tbl (lfs, lgs, lss, lcall, ljmp): Split into
2068 Amd64 and Intel64 templates.
2069 (call, jmp): Likewise for far indirect variants. Dro
2071 * i386-tbl.h: Re-generate.
2073 2020-02-11 Jan Beulich <jbeulich@suse.com>
2075 * i386-gen.c (opcode_modifiers): Remove ShortForm entry.
2076 * i386-opc.h (ShortForm): Delete.
2077 (struct i386_opcode_modifier): Remove shortform field.
2078 * i386-opc.tbl (mov, movabs, push, pop, xchg, inc, dec, fld,
2079 fst, fstp, fxch, fcom, fcomp, fucom, fucomp, fadd, faddp, fsub,
2080 fsubp, fsubr, fsubrp, fmul, fmulp, fdiv, fdivp, fdivr, fdivrp,
2081 ffreep, bswap, fcmov*, fcomi, fcomip, fucomi, fucomip, movq):
2083 * i386-tbl.h: Re-generate.
2085 2020-02-11 Jan Beulich <jbeulich@suse.com>
2087 * i386-opc.tbl (fcomi, fucomi, fcomip, fcompi, fucomip,
2088 fucompi): Drop ShortForm from operand-less templates.
2089 * i386-tbl.h: Re-generate.
2091 2020-02-11 Alan Modra <amodra@gmail.com>
2093 * cgen-ibld.in (extract_normal): Set *valuep on all return paths.
2094 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
2095 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
2096 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
2097 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2099 2020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
2101 * arm-dis.c (print_insn_cde): Define 'V' parse character.
2102 (cde_opcodes): Add VCX* instructions.
2104 2020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
2105 Matthew Malcomson <matthew.malcomson@arm.com>
2107 * arm-dis.c (struct cdeopcode32): New.
2108 (CDE_OPCODE): New macro.
2109 (cde_opcodes): New disassembly table.
2110 (regnames): New option to table.
2111 (cde_coprocs): New global variable.
2112 (print_insn_cde): New
2113 (print_insn_thumb32): Use print_insn_cde.
2114 (parse_arm_disassembler_options): Parse coprocN args.
2116 2020-02-10 H.J. Lu <hongjiu.lu@intel.com>
2119 * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
2121 * i386-opc.h (AMD64): Removed.
2122 (Intel64): Likewose.
2124 (INTEL64): Likewise.
2125 (INTEL64ONLY): Likewise.
2126 (i386_opcode_modifier): Replace amd64 and intel64 with isa64.
2127 * i386-opc.tbl (Amd64): New.
2128 (Intel64): Likewise.
2129 (Intel64Only): Likewise.
2130 Replace AMD64 with Amd64. Update sysenter/sysenter with
2131 Cpu64 and Intel64Only. Remove AMD64 from sysenter/sysenter.
2132 * i386-tbl.h: Regenerated.
2134 2020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
2137 * z80-dis.c: Add support for GBZ80 opcodes.
2139 2020-02-04 Alan Modra <amodra@gmail.com>
2141 * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
2143 2020-02-03 Alan Modra <amodra@gmail.com>
2145 * m32c-ibld.c: Regenerate.
2147 2020-02-01 Alan Modra <amodra@gmail.com>
2149 * frv-ibld.c: Regenerate.
2151 2020-01-31 Jan Beulich <jbeulich@suse.com>
2153 * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
2154 (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
2155 (OP_E_memory): Replace xmm_mdq_mode case label by
2156 vex_scalar_w_dq_mode one.
2157 * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
2159 2020-01-31 Jan Beulich <jbeulich@suse.com>
2161 * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
2162 (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
2163 vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
2164 (intel_operand_size): Drop vex_w_dq_mode case label.
2166 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
2168 * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
2169 Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
2171 2020-01-30 Alan Modra <amodra@gmail.com>
2173 * m32c-ibld.c: Regenerate.
2175 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
2177 * bpf-opc.c: Regenerate.
2179 2020-01-30 Jan Beulich <jbeulich@suse.com>
2181 * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
2182 (dis386): Use them to replace C2/C3 table entries.
2183 (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
2184 * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
2185 ones. Use Size64 instead of DefaultSize on Intel64 ones.
2186 * i386-tbl.h: Re-generate.
2188 2020-01-30 Jan Beulich <jbeulich@suse.com>
2190 * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
2192 (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
2194 * i386-tbl.h: Re-generate.
2196 2020-01-30 Alan Modra <amodra@gmail.com>
2198 * tic4x-dis.c (tic4x_dp): Make unsigned.
2200 2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
2201 Jan Beulich <jbeulich@suse.com>
2204 * i386-dis.c (MOVSXD_Fixup): New function.
2205 (movsxd_mode): New enum.
2206 (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
2207 (intel_operand_size): Handle movsxd_mode.
2208 (OP_E_register): Likewise.
2210 * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
2211 register on movsxd. Add movsxd with 16-bit destination register
2212 for AMD64 and Intel64 ISAs.
2213 * i386-tbl.h: Regenerated.
2215 2020-01-27 Tamar Christina <tamar.christina@arm.com>
2218 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
2219 * aarch64-asm-2.c: Regenerate
2220 * aarch64-dis-2.c: Likewise.
2221 * aarch64-opc-2.c: Likewise.
2223 2020-01-21 Jan Beulich <jbeulich@suse.com>
2225 * i386-opc.tbl (sysret): Drop DefaultSize.
2226 * i386-tbl.h: Re-generate.
2228 2020-01-21 Jan Beulich <jbeulich@suse.com>
2230 * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
2232 (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
2233 * i386-tbl.h: Re-generate.
2235 2020-01-20 Nick Clifton <nickc@redhat.com>
2237 * po/de.po: Updated German translation.
2238 * po/pt_BR.po: Updated Brazilian Portuguese translation.
2239 * po/uk.po: Updated Ukranian translation.
2241 2020-01-20 Alan Modra <amodra@gmail.com>
2243 * hppa-dis.c (fput_const): Remove useless cast.
2245 2020-01-20 Alan Modra <amodra@gmail.com>
2247 * arm-dis.c (print_insn_arm): Wrap 'T' value.
2249 2020-01-18 Nick Clifton <nickc@redhat.com>
2251 * configure: Regenerate.
2252 * po/opcodes.pot: Regenerate.
2254 2020-01-18 Nick Clifton <nickc@redhat.com>
2256 Binutils 2.34 branch created.
2258 2020-01-17 Christian Biesinger <cbiesinger@google.com>
2260 * opintl.h: Fix spelling error (seperate).
2262 2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
2264 * i386-opc.tbl: Add {vex} pseudo prefix.
2265 * i386-tbl.h: Regenerated.
2267 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
2270 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
2271 (neon_opcodes): Likewise.
2272 (select_arm_features): Make sure we enable MVE bits when selecting
2273 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
2276 2020-01-16 Jan Beulich <jbeulich@suse.com>
2278 * i386-opc.tbl: Drop stale comment from XOP section.
2280 2020-01-16 Jan Beulich <jbeulich@suse.com>
2282 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
2283 (extractps): Add VexWIG to SSE2AVX forms.
2284 * i386-tbl.h: Re-generate.
2286 2020-01-16 Jan Beulich <jbeulich@suse.com>
2288 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
2289 Size64 from and use VexW1 on SSE2AVX forms.
2290 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
2291 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
2292 * i386-tbl.h: Re-generate.
2294 2020-01-15 Alan Modra <amodra@gmail.com>
2296 * tic4x-dis.c (tic4x_version): Make unsigned long.
2297 (optab, optab_special, registernames): New file scope vars.
2298 (tic4x_print_register): Set up registernames rather than
2299 malloc'd registertable.
2300 (tic4x_disassemble): Delete optable and optable_special. Use
2301 optab and optab_special instead. Throw away old optab,
2302 optab_special and registernames when info->mach changes.
2304 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
2307 * z80-dis.c (suffix): Use .db instruction to generate double
2310 2020-01-14 Alan Modra <amodra@gmail.com>
2312 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
2313 values to unsigned before shifting.
2315 2020-01-13 Thomas Troeger <tstroege@gmx.de>
2317 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
2319 (print_insn_thumb16, print_insn_thumb32): Likewise.
2320 (print_insn): Initialize the insn info.
2321 * i386-dis.c (print_insn): Initialize the insn info fields, and
2324 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2326 * arc-opc.c (C_NE): Make it required.
2328 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2330 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
2331 reserved register name.
2333 2020-01-13 Alan Modra <amodra@gmail.com>
2335 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
2336 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
2338 2020-01-13 Alan Modra <amodra@gmail.com>
2340 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
2341 result of wasm_read_leb128 in a uint64_t and check that bits
2342 are not lost when copying to other locals. Use uint32_t for
2343 most locals. Use PRId64 when printing int64_t.
2345 2020-01-13 Alan Modra <amodra@gmail.com>
2347 * score-dis.c: Formatting.
2348 * score7-dis.c: Formatting.
2350 2020-01-13 Alan Modra <amodra@gmail.com>
2352 * score-dis.c (print_insn_score48): Use unsigned variables for
2353 unsigned values. Don't left shift negative values.
2354 (print_insn_score32): Likewise.
2355 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
2357 2020-01-13 Alan Modra <amodra@gmail.com>
2359 * tic4x-dis.c (tic4x_print_register): Remove dead code.
2361 2020-01-13 Alan Modra <amodra@gmail.com>
2363 * fr30-ibld.c: Regenerate.
2365 2020-01-13 Alan Modra <amodra@gmail.com>
2367 * xgate-dis.c (print_insn): Don't left shift signed value.
2368 (ripBits): Formatting, use 1u.
2370 2020-01-10 Alan Modra <amodra@gmail.com>
2372 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
2373 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
2375 2020-01-10 Alan Modra <amodra@gmail.com>
2377 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
2378 and XRREG value earlier to avoid a shift with negative exponent.
2379 * m10200-dis.c (disassemble): Similarly.
2381 2020-01-09 Nick Clifton <nickc@redhat.com>
2384 * z80-dis.c (ld_ii_ii): Use correct cast.
2386 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2389 * z80-dis.c (ld_ii_ii): Use character constant when checking
2392 2020-01-09 Jan Beulich <jbeulich@suse.com>
2394 * i386-dis.c (SEP_Fixup): New.
2396 (dis386_twobyte): Use it for sysenter/sysexit.
2397 (enum x86_64_isa): Change amd64 enumerator to value 1.
2398 (OP_J): Compare isa64 against intel64 instead of amd64.
2399 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
2401 * i386-tbl.h: Re-generate.
2403 2020-01-08 Alan Modra <amodra@gmail.com>
2405 * z8k-dis.c: Include libiberty.h
2406 (instr_data_s): Make max_fetched unsigned.
2407 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
2408 Don't exceed byte_info bounds.
2409 (output_instr): Make num_bytes unsigned.
2410 (unpack_instr): Likewise for nibl_count and loop.
2411 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
2413 * z8k-opc.h: Regenerate.
2415 2020-01-07 Shahab Vahedi <shahab@synopsys.com>
2417 * arc-tbl.h (llock): Use 'LLOCK' as class.
2419 (scond): Use 'SCOND' as class.
2421 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
2424 2020-01-06 Alan Modra <amodra@gmail.com>
2426 * m32c-ibld.c: Regenerate.
2428 2020-01-06 Alan Modra <amodra@gmail.com>
2431 * z80-dis.c (suffix): Don't use a local struct buffer copy.
2432 Peek at next byte to prevent recursion on repeated prefix bytes.
2433 Ensure uninitialised "mybuf" is not accessed.
2434 (print_insn_z80): Don't zero n_fetch and n_used here,..
2435 (print_insn_z80_buf): ..do it here instead.
2437 2020-01-04 Alan Modra <amodra@gmail.com>
2439 * m32r-ibld.c: Regenerate.
2441 2020-01-04 Alan Modra <amodra@gmail.com>
2443 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
2445 2020-01-04 Alan Modra <amodra@gmail.com>
2447 * crx-dis.c (match_opcode): Avoid shift left of signed value.
2449 2020-01-04 Alan Modra <amodra@gmail.com>
2451 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
2453 2020-01-03 Jan Beulich <jbeulich@suse.com>
2455 * aarch64-tbl.h (aarch64_opcode_table): Use
2456 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
2458 2020-01-03 Jan Beulich <jbeulich@suse.com>
2460 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
2461 forms of SUDOT and USDOT.
2463 2020-01-03 Jan Beulich <jbeulich@suse.com>
2465 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
2467 * opcodes/aarch64-dis-2.c: Re-generate.
2469 2020-01-03 Jan Beulich <jbeulich@suse.com>
2471 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
2473 * opcodes/aarch64-dis-2.c: Re-generate.
2475 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
2477 * z80-dis.c: Add support for eZ80 and Z80 instructions.
2479 2020-01-01 Alan Modra <amodra@gmail.com>
2481 Update year range in copyright notice of all files.
2483 For older changes see ChangeLog-2019
2485 Copyright (C) 2020 Free Software Foundation, Inc.
2487 Copying and distribution of this file, with or without modification,
2488 are permitted in any medium without royalty provided the copyright
2489 notice and this notice are preserved.
2495 version-control: never
projects / deliverable / binutils-gdb.git / blob