opcodes/ChangeLog

   1 2005-08-15  Daniel Jacobowitz  <dan@codesourcery.com>
   2
   3         * ppc-dis.c (powerpc_dialect): Handle e300.
   4         (print_ppc_disassembler_options): Likewise.
   5         * ppc-opc.c (PPCE300): Define.
   6         (powerpc_opcodes): Mark icbt as available for the e300.
   7
   8 2005-08-13  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
   9
  10         * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
  11         Use "rp" instead of "%r2" in "b,l" insns.
  12
  13 2005-08-12 Martin Schwidefsky  <schwidefsky@de.ibm.com>
  14
  15         * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
  16         * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
  17         (main): Likewise.
  18         * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
  19         and 4 bit optional masks.
  20         (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
  21         INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
  22         (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
  23         MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
  24         (s390_opformats): Likewise.
  25         * s390-opc.txt: Add new instructions for cpu type z9-109.
  26
  27 2005-08-05  John David Anglin  <dave.anglin@nrc-crnc.gc.ca>
  28
  29         * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
  30
  31 2005-07-29  Paul Brook  <paul@codesourcery.com>
  32
  33         * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
  34
  35 2005-07-29  Paul Brook  <paul@codesourcery.com>
  36
  37         * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
  38         (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
  39
  40 2005-07-25  DJ Delorie  <dj@redhat.com>
  41
  42         * m32c-asm.c Regenerate.
  43         * m32c-dis.c Regenerate.
  44
  45 2005-07-20  DJ Delorie  <dj@redhat.com>
  46
  47         * disassemble.c (disassemble_init_for_target): M32C ISAs are
  48         enums, so convert them to bit masks, which attributes are.
  49
  50 2005-07-18  Nick Clifton  <nickc@redhat.com>
  51
  52         * configure.in: Restore alpha ordering to list of arches.
  53         * configure: Regenerate.
  54         * disassemble.c: Restore alpha ordering to list of arches.
  55
  56 2005-07-18  Nick Clifton  <nickc@redhat.com>
  57
  58         * m32c-asm.c: Regenerate.
  59         * m32c-desc.c: Regenerate.
  60         * m32c-desc.h: Regenerate.
  61         * m32c-dis.c: Regenerate.
  62         * m32c-ibld.h: Regenerate.
  63         * m32c-opc.c: Regenerate.
  64         * m32c-opc.h: Regenerate.
  65
  66 2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>
  67
  68         * i386-dis.c (PNI_Fixup): Update comment.
  69         (VMX_Fixup): Properly handle the suffix check.
  70
  71 2005-07-16  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
  72
  73         * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
  74         mfctl disassembly.
  75
  76 2005-07-16  Alan Modra  <amodra@bigpond.net.au>
  77
  78         * Makefile.am: Run "make dep-am".
  79         (stamp-m32c): Fix cpu dependencies.
  80         * Makefile.in: Regenerate.
  81         * ip2k-dis.c: Regenerate.
  82
  83 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
  84
  85         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
  86         (VMX_Fixup): New. Fix up Intel VMX Instructions.
  87         (Em): New.
  88         (Gm): New.
  89         (VM): New.
  90         (dis386_twobyte): Updated entries 0x78 and 0x79.
  91         (twobyte_has_modrm): Likewise.
  92         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
  93         (OP_G): Handle m_mode.
  94
  95 2005-07-14  Jim Blandy  <jimb@redhat.com>
  96
  97         Add support for the Renesas M32C and M16C.
  98         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
  99         * m32c-desc.h, m32c-opc.h: New.
 100         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
 101         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
 102         m32c-opc.c.
 103         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
 104         m32c-ibld.lo, m32c-opc.lo.
 105         (CLEANFILES): List stamp-m32c.
 106         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
 107         (CGEN_CPUS): Add m32c.
 108         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
 109         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
 110         (m32c_opc_h): New variable.
 111         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
 112         (m32c-opc.lo): New rules.
 113         * Makefile.in: Regenerated.
 114         * configure.in: Add case for bfd_m32c_arch.
 115         * configure: Regenerated.
 116         * disassemble.c (ARCH_m32c): New.
 117         [ARCH_m32c]: #include "m32c-desc.h".
 118         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
 119         (disassemble_init_for_target) [ARCH_m32c]: Same.
 120
 121         * cgen-ops.h, cgen-types.h: New files.
 122         * Makefile.am (HFILES): List them.
 123         * Makefile.in: Regenerated.
 124
 125 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 126
 127         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
 128         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
 129         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
 130         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
 131         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
 132         v850-dis.c: Fix format bugs.
 133         * ia64-gen.c (fail, warn): Add format attribute.
 134         * or32-opc.c (debug): Likewise.
 135
 136 2005-07-07  Khem Raj  <kraj@mvista.com>
 137
 138         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
 139         disassembly pattern.
 140
 141 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 142
 143         * Makefile.am (stamp-m32r): Fix path to cpu files.
 144         (stamp-m32r, stamp-iq2000): Likewise.
 145         * Makefile.in: Regenerate.
 146         * m32r-asm.c: Regenerate.
 147         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
 148         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
 149
 150 2005-07-05  Nick Clifton  <nickc@redhat.com>
 151
 152         * iq2000-asm.c: Regenerate.
 153         * ms1-asm.c: Regenerate.
 154
 155 2005-07-05  Jan Beulich  <jbeulich@novell.com>
 156
 157         * i386-dis.c (SVME_Fixup): New.
 158         (grps): Use it for the lidt entry.
 159         (PNI_Fixup): Call OP_M rather than OP_E.
 160         (INVLPG_Fixup): Likewise.
 161
 162 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
 163
 164         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 165
 166 2005-07-01  Nick Clifton  <nickc@redhat.com>
 167
 168         * a29k-dis.c: Update to ISO C90 style function declarations and
 169         fix formatting.
 170         * alpha-opc.c: Likewise.
 171         * arc-dis.c: Likewise.
 172         * arc-opc.c: Likewise.
 173         * avr-dis.c: Likewise.
 174         * cgen-asm.in: Likewise.
 175         * cgen-dis.in: Likewise.
 176         * cgen-ibld.in: Likewise.
 177         * cgen-opc.c: Likewise.
 178         * cris-dis.c: Likewise.
 179         * d10v-dis.c: Likewise.
 180         * d30v-dis.c: Likewise.
 181         * d30v-opc.c: Likewise.
 182         * dis-buf.c: Likewise.
 183         * dlx-dis.c: Likewise.
 184         * h8300-dis.c: Likewise.
 185         * h8500-dis.c: Likewise.
 186         * hppa-dis.c: Likewise.
 187         * i370-dis.c: Likewise.
 188         * i370-opc.c: Likewise.
 189         * m10200-dis.c: Likewise.
 190         * m10300-dis.c: Likewise.
 191         * m68k-dis.c: Likewise.
 192         * m88k-dis.c: Likewise.
 193         * mips-dis.c: Likewise.
 194         * mmix-dis.c: Likewise.
 195         * msp430-dis.c: Likewise.
 196         * ns32k-dis.c: Likewise.
 197         * or32-dis.c: Likewise.
 198         * or32-opc.c: Likewise.
 199         * pdp11-dis.c: Likewise.
 200         * pj-dis.c: Likewise.
 201         * s390-dis.c: Likewise.
 202         * sh-dis.c: Likewise.
 203         * sh64-dis.c: Likewise.
 204         * sparc-dis.c: Likewise.
 205         * sparc-opc.c: Likewise.
 206         * sysdep.h: Likewise.
 207         * tic30-dis.c: Likewise.
 208         * tic4x-dis.c: Likewise.
 209         * tic80-dis.c: Likewise.
 210         * v850-dis.c: Likewise.
 211         * v850-opc.c: Likewise.
 212         * vax-dis.c: Likewise.
 213         * w65-dis.c: Likewise.
 214         * z8kgen.c: Likewise.
 215
 216         * fr30-*: Regenerate.
 217         * frv-*: Regenerate.
 218         * ip2k-*: Regenerate.
 219         * iq2000-*: Regenerate.
 220         * m32r-*: Regenerate.
 221         * ms1-*: Regenerate.
 222         * openrisc-*: Regenerate.
 223         * xstormy16-*: Regenerate.
 224
 225 2005-06-23  Ben Elliston  <bje@gnu.org>
 226
 227         * m68k-dis.c: Use ISC C90.
 228         * m68k-opc.c: Formatting fixes.
 229
 230 2005-06-16  David Ung  <davidu@mips.com>
 231
 232         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 233         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 234
 235 2005-06-15  Dave Brolley  <brolley@redhat.com>
 236
 237         Contribute Morpho ms1 on behalf of Red Hat
 238         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 239         ms1-opc.h: New files, Morpho ms1 target.
 240
 241         2004-05-14  Stan Cox  <scox@redhat.com>
 242
 243         * disassemble.c (ARCH_ms1): Define.
 244         (disassembler): Handle bfd_arch_ms1
 245
 246         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 247
 248         * Makefile.am, Makefile.in: Add ms1 target.
 249         * configure.in: Ditto.
 250
 251 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 252
 253         * arm-opc.h: Delete; fold contents into ...
 254         * arm-dis.c: ... here.  Move includes of internal COFF headers
 255         next to includes of internal ELF headers.
 256         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 257         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 258         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 259         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 260         (iwmmxt_wwnames, iwmmxt_wwssnames):
 261         Make const.
 262         (regnames): Remove iWMMXt coprocessor register sets.
 263         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 264         (get_arm_regnames): Adjust fourth argument to match above changes.
 265         (set_iwmmxt_regnames): Delete.
 266         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 267         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 268         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 269         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 270         ISO syntax for function pointer calls.
 271
 272 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 273
 274         * arm-dis.c: Split up the comments describing the format codes, so
 275         that the ARM and 16-bit Thumb opcode tables each have comments
 276         preceding them that describe all the codes, and only the codes,
 277         valid in those tables.  (32-bit Thumb table is already like this.)
 278         Reorder the lists in all three comments to match the order in
 279         which the codes are implemented.
 280         Remove all forward declarations of static functions.  Convert all
 281         function definitions to ISO C format.
 282         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 283         Return nothing.
 284         (print_insn_thumb16): Remove unused case 'I'.
 285         (print_insn): Update for changed calling convention of subroutines.
 286
 287 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 288
 289         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 290         hex (but retain it being displayed as signed). Remove redundant
 291         checks. Add handling of displacements for 16-bit addressing in Intel
 292         mode.
 293
 294 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 295
 296         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 297         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 298         masking of 'rm' in 16-bit memory address handling.
 299
 300 2005-05-19  Anton Blanchard  <anton@samba.org>
 301
 302         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 303         (print_ppc_disassembler_options): Document it.
 304         * ppc-opc.c (SVC_LEV): Define.
 305         (LEV): Allow optional operand.
 306         (POWER5): Define.
 307         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 308         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 309
 310 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 311
 312         * Makefile.in:  Regenerate.
 313
 314 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 315
 316         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 317         instructions.  Adjust disassembly of some opcodes to match
 318         unified syntax.
 319         (thumb32_opcodes): New table.
 320         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 321         two-halfword branches here.
 322         (print_insn_thumb32): New function.
 323         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 324         and print_insn_thumb32.  Be consistent about order of
 325         halfwords when printing 32-bit instructions.
 326
 327 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 328
 329         PR 843
 330         * i386-dis.c (branch_v_mode): New.
 331         (indirEv): Use branch_v_mode instead of v_mode.
 332         (OP_E): Handle branch_v_mode.
 333
 334 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 335
 336         * d10v-dis.c (dis_2_short): Support 64bit host.
 337
 338 2005-05-07  Nick Clifton  <nickc@redhat.com>
 339
 340         * po/nl.po: Updated translation.
 341
 342 2005-05-07  Nick Clifton  <nickc@redhat.com>
 343
 344         * Update the address and phone number of the FSF organization in
 345         the GPL notices in the following files:
 346         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 347         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 348         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 349         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 350         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 351         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 352         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 353         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 354         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 355         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 356         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 357         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 358         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 359         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 360         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 361         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 362         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 363         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 364         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 365         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 366         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 367         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 368         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 369         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 370         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 371         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 372         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 373         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 374         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 375         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 376         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 377         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 378         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 379
 380 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 381
 382         * ia64-opc.c: Include sysdep.h before libiberty.h.
 383
 384 2005-05-05  Nick Clifton  <nickc@redhat.com>
 385
 386         * configure.in (ALL_LINGUAS): Add vi.
 387         * configure: Regenerate.
 388         * po/vi.po: New.
 389
 390 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 391
 392         * configure.in: Fix the check for basename declaration.
 393         * configure: Regenerate.
 394
 395 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 396
 397         * ppc-opc.c (RTO): Define.
 398         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 399         entries to suit PPC440.
 400
 401 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 402
 403         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 404         Add xcrypt-ctr.
 405
 406 2005-04-14  Nick Clifton  <nickc@redhat.com>
 407
 408         * po/fi.po: New translation: Finnish.
 409         * configure.in (ALL_LINGUAS): Add fi.
 410         * configure: Regenerate.
 411
 412 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 413
 414         * Makefile.am (NO_WERROR): Define.
 415         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 416         * Makefile.in: Regenerate.
 417         * aclocal.m4: Regenerate.
 418         * configure: Regenerate.
 419
 420 2005-04-04  Nick Clifton  <nickc@redhat.com>
 421
 422         * fr30-asm.c: Regenerate.
 423         * frv-asm.c: Regenerate.
 424         * iq2000-asm.c: Regenerate.
 425         * m32r-asm.c: Regenerate.
 426         * openrisc-asm.c: Regenerate.
 427
 428 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 429
 430         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 431         visible operands in Intel mode. The first operand of monitor is
 432         %rax in 64-bit mode.
 433
 434 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 435
 436         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 437         easier future additions.
 438
 439 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 440
 441         * configure.in: Check for basename.
 442         * configure: Regenerate.
 443         * config.in: Ditto.
 444
 445 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 446
 447         * i386-dis.c (SEG_Fixup): New.
 448         (Sv): New.
 449         (dis386): Use "Sv" for 0x8c and 0x8e.
 450
 451 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 452             Nick Clifton  <nickc@redhat.com>
 453
 454         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 455         function entry mask addresses.
 456         (entry_addr_occupied_slots): New variable: The number of occupied
 457         elements in entry_addr.
 458         (entry_addr_total_slots): New variable: The total number of
 459         elements in entry_addr.
 460         (parse_disassembler_options): New function.  Fills in the entry_addr
 461         array.
 462         (free_entry_array): New function.  Release the memory used by the
 463         entry addr array.  Suppressed because there is no way to call it.
 464         (is_function_entry): Check if a given address is a function's
 465         start address by looking at supplied entry mask addresses and
 466         symbol information, if available.
 467         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 468
 469 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 470
 471         * cris-dis.c (print_with_operands): Use ~31L for long instead
 472         of ~31.
 473
 474 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 475
 476         * mmix-opc.c (O): Revert the last change.
 477         (Z): Likewise.
 478
 479 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 480
 481         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 482         (Z): Likewise.
 483
 484 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 485
 486         * mmix-opc.c (O, Z): Force expression as unsigned long.
 487
 488 2005-03-18  Nick Clifton  <nickc@redhat.com>
 489
 490         * ip2k-asm.c: Regenerate.
 491         * op/opcodes.pot: Regenerate.
 492
 493 2005-03-16  Nick Clifton  <nickc@redhat.com>
 494             Ben Elliston  <bje@au.ibm.com>
 495
 496         * configure.in (werror): New switch: Add -Werror to the
 497         compiler command line.  Enabled by default.  Disable via
 498         --disable-werror.
 499         * configure: Regenerate.
 500
 501 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 502
 503         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 504         BOOKE.
 505
 506 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 507
 508         * po/es.po: Commit new Spanish translation.
 509
 510         * po/fr.po: Commit new French translation.
 511
 512 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 513
 514         * vax-dis.c: Fix spelling error
 515         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 516         of just "Entry mask: < r1 ... >"
 517
 518 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 519
 520         * arm-dis.c (arm_opcodes): Document %E and %V.
 521         Add entries for v6T2 ARM instructions:
 522         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 523         (print_insn_arm): Add support for %E and %V.
 524         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 525
 526 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 527             Alan Modra  <amodra@bigpond.net.au>
 528
 529         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 530         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 531         (SPRG_MASK): Delete.
 532         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 533         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 534         mfsprg4..7 after msprg and consolidate.
 535
 536 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 537
 538         * vax-dis.c (entry_mask_bit): New array.
 539         (print_insn_vax): Decode function entry mask.
 540
 541 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 542
 543         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 544
 545 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 546
 547         * po/opcodes.pot: Regenerate.
 548
 549 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 550
 551         * arc-dis.c (a4_decoding_class): New enum.
 552         (dsmOneArcInst): Use the enum values for the decoding class.
 553         Remove redundant case in the switch for decodingClass value 11.
 554
 555 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 556
 557         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 558         accesses.
 559         (OP_C): Consider lock prefix in non-64-bit modes.
 560
 561 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 562
 563         * cris-dis.c (format_hex): Remove ineffective warning fix.
 564         * crx-dis.c (make_instruction): Warning fix.
 565         * frv-asm.c: Regenerate.
 566
 567 2005-02-23  Nick Clifton  <nickc@redhat.com>
 568
 569         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 570         read_memory.
 571
 572         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 573
 574         * crx-dis.c (make_instruction): Move argument structure into inner
 575         scope and ensure that all of its fields are initialised before
 576         they are used.
 577
 578         * fr30-asm.c: Regenerate.
 579         * fr30-dis.c: Regenerate.
 580         * frv-asm.c: Regenerate.
 581         * frv-dis.c: Regenerate.
 582         * ip2k-asm.c: Regenerate.
 583         * ip2k-dis.c: Regenerate.
 584         * iq2000-asm.c: Regenerate.
 585         * iq2000-dis.c: Regenerate.
 586         * m32r-asm.c: Regenerate.
 587         * m32r-dis.c: Regenerate.
 588         * openrisc-asm.c: Regenerate.
 589         * openrisc-dis.c: Regenerate.
 590         * xstormy16-asm.c: Regenerate.
 591         * xstormy16-dis.c: Regenerate.
 592
 593 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 594
 595         * arc-ext.c: Warning fixes.
 596         * arc-ext.h: Likewise.
 597         * cgen-opc.c: Likewise.
 598         * ia64-gen.c: Likewise.
 599         * maxq-dis.c: Likewise.
 600         * ns32k-dis.c: Likewise.
 601         * w65-dis.c: Likewise.
 602         * ia64-asmtab.c: Regenerate.
 603
 604 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 605
 606         * fr30-desc.c: Regenerate.
 607         * fr30-desc.h: Regenerate.
 608         * fr30-opc.c: Regenerate.
 609         * fr30-opc.h: Regenerate.
 610         * frv-desc.c: Regenerate.
 611         * frv-desc.h: Regenerate.
 612         * frv-opc.c: Regenerate.
 613         * frv-opc.h: Regenerate.
 614         * ip2k-desc.c: Regenerate.
 615         * ip2k-desc.h: Regenerate.
 616         * ip2k-opc.c: Regenerate.
 617         * ip2k-opc.h: Regenerate.
 618         * iq2000-desc.c: Regenerate.
 619         * iq2000-desc.h: Regenerate.
 620         * iq2000-opc.c: Regenerate.
 621         * iq2000-opc.h: Regenerate.
 622         * m32r-desc.c: Regenerate.
 623         * m32r-desc.h: Regenerate.
 624         * m32r-opc.c: Regenerate.
 625         * m32r-opc.h: Regenerate.
 626         * m32r-opinst.c: Regenerate.
 627         * openrisc-desc.c: Regenerate.
 628         * openrisc-desc.h: Regenerate.
 629         * openrisc-opc.c: Regenerate.
 630         * openrisc-opc.h: Regenerate.
 631         * xstormy16-desc.c: Regenerate.
 632         * xstormy16-desc.h: Regenerate.
 633         * xstormy16-opc.c: Regenerate.
 634         * xstormy16-opc.h: Regenerate.
 635
 636 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 637
 638         * Makefile.am: Run "make dep-am"
 639         * Makefile.in: Regenerate.
 640
 641 2005-02-15  Nick Clifton  <nickc@redhat.com>
 642
 643         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 644         compile time warnings.
 645         (print_keyword): Likewise.
 646         (default_print_insn): Likewise.
 647
 648         * fr30-desc.c: Regenerated.
 649         * fr30-desc.h: Regenerated.
 650         * fr30-dis.c: Regenerated.
 651         * fr30-opc.c: Regenerated.
 652         * fr30-opc.h: Regenerated.
 653         * frv-desc.c: Regenerated.
 654         * frv-dis.c: Regenerated.
 655         * frv-opc.c: Regenerated.
 656         * ip2k-asm.c: Regenerated.
 657         * ip2k-desc.c: Regenerated.
 658         * ip2k-desc.h: Regenerated.
 659         * ip2k-dis.c: Regenerated.
 660         * ip2k-opc.c: Regenerated.
 661         * ip2k-opc.h: Regenerated.
 662         * iq2000-desc.c: Regenerated.
 663         * iq2000-dis.c: Regenerated.
 664         * iq2000-opc.c: Regenerated.
 665         * m32r-asm.c: Regenerated.
 666         * m32r-desc.c: Regenerated.
 667         * m32r-desc.h: Regenerated.
 668         * m32r-dis.c: Regenerated.
 669         * m32r-opc.c: Regenerated.
 670         * m32r-opc.h: Regenerated.
 671         * m32r-opinst.c: Regenerated.
 672         * openrisc-desc.c: Regenerated.
 673         * openrisc-desc.h: Regenerated.
 674         * openrisc-dis.c: Regenerated.
 675         * openrisc-opc.c: Regenerated.
 676         * openrisc-opc.h: Regenerated.
 677         * xstormy16-desc.c: Regenerated.
 678         * xstormy16-desc.h: Regenerated.
 679         * xstormy16-dis.c: Regenerated.
 680         * xstormy16-opc.c: Regenerated.
 681         * xstormy16-opc.h: Regenerated.
 682
 683 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 684
 685         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 686         address.
 687
 688 2005-02-11  Nick Clifton  <nickc@redhat.com>
 689
 690         * iq2000-asm.c: Regenerate.
 691
 692         * frv-dis.c: Regenerate.
 693
 694 2005-02-07  Jim Blandy  <jimb@redhat.com>
 695
 696         * Makefile.am (CGEN): Load guile.scm before calling the main
 697         application script.
 698         * Makefile.in: Regenerated.
 699         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 700         Simply pass the cgen-opc.scm path to ${cgen} as its first
 701         argument; ${cgen} itself now contains the '-s', or whatever is
 702         appropriate for the Scheme being used.
 703
 704 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 705
 706         * configure: Regenerate to track ../gettext.m4.
 707
 708 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 709
 710         * ia64-gen.c (NELEMS): Define.
 711         (shrink): Generate alias with missing second predicate register when
 712         opcode has two outputs and these are both predicates.
 713         * ia64-opc-i.c (FULL17): Define.
 714         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 715         here to generate output template.
 716         (TBITCM, TNATCM): Undefine after use.
 717         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 718         first input. Add ld16 aliases without ar.csd as second output. Add
 719         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 720         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 721         ar.ccv as third/fourth inputs. Consolidate through...
 722         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 723         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 724         * ia64-asmtab.c: Regenerate.
 725
 726 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 727
 728         * configure: Regenerate to track ../gettext.m4 change.
 729
 730 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 731
 732         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 733         * frv-asm.c: Rebuilt.
 734         * frv-desc.c: Rebuilt.
 735         * frv-desc.h: Rebuilt.
 736         * frv-dis.c: Rebuilt.
 737         * frv-ibld.c: Rebuilt.
 738         * frv-opc.c: Rebuilt.
 739         * frv-opc.h: Rebuilt.
 740
 741 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 742
 743         * configure: Regenerate, ../gettext.m4 was updated.
 744
 745 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 746
 747         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 748         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 749         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 750         * mips-dis.c: Ditto.
 751
 752 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 753
 754         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 755
 756 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 757
 758         * mips-dis.c (no_aliases): New disassembly option flag.
 759         (set_default_mips_dis_options): Init no_aliases to zero.
 760         (parse_mips_dis_option): Handle no-aliases option.
 761         (print_insn_mips): Ignore table entries that are aliases
 762         if no_aliases is set.
 763         (print_insn_mips16): Ditto.
 764         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 765         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 766         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 767         * mips16-opc.c (mips16_opcodes): Ditto.
 768
 769 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 770
 771         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 772         (inheritance diagram): Add missing edge.
 773         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 774         easier for the testsuite.
 775         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 776         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 777         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 778         arch_sh2a_or_sh4_up child.
 779         (sh_table): Do renaming as above.
 780         Correct comment for ldc.l for gas testsuite to read.
 781         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 782         Correct comments for movy.w and movy.l for gas testsuite to read.
 783         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 784
 785 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 786
 787         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 788
 789 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 790
 791         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 792
 793 2005-01-10  Andreas Schwab  <schwab@suse.de>
 794
 795         * disassemble.c (disassemble_init_for_target) <case
 796         bfd_arch_ia64>: Set skip_zeroes to 16.
 797         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 798
 799 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 800
 801         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 802
 803 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 804
 805         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 806         memory references. Convert avr_operand() to C90 formatting.
 807
 808 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 809
 810         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 811
 812 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 813
 814         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 815         (no_op_insn): Initialize array with instructions that have no
 816         operands.
 817         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 818
 819 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 820
 821         * arm-dis.c: Correct top-level comment.
 822
 823 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 824
 825         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 826         architecuture defining the insn.
 827         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 828         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 829         field.
 830         Also include opcode/arm.h.
 831         * Makefile.am (arm-dis.lo): Update dependency list.
 832         * Makefile.in: Regenerate.
 833
 834 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 835
 836         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 837         reflect the change to the short immediate syntax.
 838
 839 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 840
 841         * or32-opc.c (debug): Warning fix.
 842         * po/POTFILES.in: Regenerate.
 843
 844         * maxq-dis.c: Formatting.
 845         (print_insn): Warning fix.
 846
 847 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 848
 849         * arm-dis.c (WORD_ADDRESS): Define.
 850         (print_insn): Use it.  Correct big-endian end-of-section handling.
 851
 852 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 853             Vineet Sharma      <vineets@noida.hcltech.com>
 854
 855         * maxq-dis.c: New file.
 856         * disassemble.c (ARCH_maxq): Define.
 857         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 858         instructions..
 859         * configure.in: Add case for bfd_maxq_arch.
 860         * configure: Regenerate.
 861         * Makefile.am: Add support for maxq-dis.c
 862         * Makefile.in: Regenerate.
 863         * aclocal.m4: Regenerate.
 864
 865 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 866
 867         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 868         mode.
 869         * crx-dis.c: Likewise.
 870
 871 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 872
 873         Generally, handle CRISv32.
 874         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 875         (struct cris_disasm_data): New type.
 876         (format_reg, format_hex, cris_constraint, print_flags)
 877         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 878         callers changed.
 879         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 880         (print_insn_crisv32_without_register_prefix)
 881         (print_insn_crisv10_v32_with_register_prefix)
 882         (print_insn_crisv10_v32_without_register_prefix)
 883         (cris_parse_disassembler_options): New functions.
 884         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 885         parameter.  All callers changed.
 886         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 887         failure.
 888         (cris_constraint) <case 'Y', 'U'>: New cases.
 889         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 890         for constraint 'n'.
 891         (print_with_operands) <case 'Y'>: New case.
 892         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 893         <case 'N', 'Y', 'Q'>: New cases.
 894         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 895         (print_insn_cris_with_register_prefix)
 896         (print_insn_cris_without_register_prefix): Call
 897         cris_parse_disassembler_options.
 898         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 899         for CRISv32 and the size of immediate operands.  New v32-only
 900         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 901         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 902         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 903         Change brp to be v3..v10.
 904         (cris_support_regs): New vector.
 905         (cris_opcodes): Update head comment.  New format characters '[',
 906         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 907         Add new opcodes for v32 and adjust existing opcodes to accommodate
 908         differences to earlier variants.
 909         (cris_cond15s): New vector.
 910
 911 2004-11-04 Jan Beulich <jbeulich@novell.com>
 912
 913         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 914         (indirEb): Remove.
 915         (Mp): Use f_mode rather than none at all.
 916         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 917         replaces what previously was x_mode; x_mode now means 128-bit SSE
 918         operands.
 919         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 920         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 921         pinsrw's second operand is Edqw.
 922         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 923         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 924         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 925         mode when an operand size override is present or always suffixing.
 926         More instructions will need to be added to this group.
 927         (putop): Handle new macro chars 'C' (short/long suffix selector),
 928         'I' (Intel mode override for following macro char), and 'J' (for
 929         adding the 'l' prefix to far branches in AT&T mode). When an
 930         alternative was specified in the template, honor macro character when
 931         specified for Intel mode.
 932         (OP_E): Handle new *_mode values. Correct pointer specifications for
 933         memory operands. Consolidate output of index register.
 934         (OP_G): Handle new *_mode values.
 935         (OP_I): Handle const_1_mode.
 936         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 937         respective opcode prefix bits have been consumed.
 938         (OP_EM, OP_EX): Provide some default handling for generating pointer
 939         specifications.
 940
 941 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 942
 943         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 944         COP_INST macro.
 945
 946 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 947
 948         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 949         (getregliststring): Support HI/LO and user registers.
 950         * crx-opc.c (crx_instruction): Update data structure according to the
 951         rearrangement done in CRX opcode header file.
 952         (crx_regtab):  Likewise.
 953         (crx_optab):  Likewise.
 954         (crx_instruction): Reorder load/stor instructions, remove unsupported
 955         formats.
 956         support new Co-Processor instruction 'cpi'.
 957
 958 2004-10-27  Nick Clifton  <nickc@redhat.com>
 959
 960         * opcodes/iq2000-asm.c: Regenerate.
 961         * opcodes/iq2000-desc.c: Regenerate.
 962         * opcodes/iq2000-desc.h: Regenerate.
 963         * opcodes/iq2000-dis.c: Regenerate.
 964         * opcodes/iq2000-ibld.c: Regenerate.
 965         * opcodes/iq2000-opc.c: Regenerate.
 966         * opcodes/iq2000-opc.h: Regenerate.
 967
 968 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 969
 970         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 971         us4, us5 (respectively).
 972         Remove unsupported 'popa' instruction.
 973         Reverse operands order in store co-processor instructions.
 974
 975 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 976
 977         * Makefile.am: Run "make dep-am"
 978         * Makefile.in: Regenerate.
 979
 980 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 981
 982         * xtensa-dis.c: Use ISO C90 formatting.
 983
 984 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 985
 986         * ppc-opc.c: Revert 2004-09-09 change.
 987
 988 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 989
 990         * xtensa-dis.c (state_names): Delete.
 991         (fetch_data): Use xtensa_isa_maxlength.
 992         (print_xtensa_operand): Replace operand parameter with opcode/operand
 993         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 994         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 995         instruction bundles.  Use xmalloc instead of malloc.
 996
 997 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 998
 999         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1000         initializers.
1001
1002 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
1003
1004         * crx-opc.c (crx_instruction): Support Co-processor insns.
1005         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1006         (getregliststring): Change function to use the above enum.
1007         (print_arg): Handle CO-Processor insns.
1008         (crx_cinvs): Add 'b' option to invalidate the branch-target
1009         cache.
1010
1011 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
1012
1013         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1014         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1015         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1016         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1017         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1018
1019 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
1020
1021         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1022         rather than add it.
1023
1024 2004-09-30  Paul Brook  <paul@codesourcery.com>
1025
1026         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1027         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
1028
1029 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
1030
1031         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1032         (CONFIG_STATUS_DEPENDENCIES): New.
1033         (Makefile): Removed.
1034         (config.status): Likewise.
1035         * Makefile.in: Regenerated.
1036
1037 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
1038
1039         * Makefile.am: Run "make dep-am".
1040         * Makefile.in: Regenerate.
1041         * aclocal.m4: Regenerate.
1042         * configure: Regenerate.
1043         * po/POTFILES.in: Regenerate.
1044         * po/opcodes.pot: Regenerate.
1045
1046 2004-09-11  Andreas Schwab  <schwab@suse.de>
1047
1048         * configure: Rebuild.
1049
1050 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
1051
1052         * ppc-opc.c (L): Make this field not optional.
1053
1054 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
1055
1056         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1057         Fix parameter to 'm[t|f]csr' insns.
1058
1059 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
1060
1061         * configure.in: Autoupdate to autoconf 2.59.
1062         * aclocal.m4: Rebuild with aclocal 1.4p6.
1063         * configure: Rebuild with autoconf 2.59.
1064         * Makefile.in: Rebuild with automake 1.4p6 (picking up
1065         bfd changes for autoconf 2.59 on the way).
1066         * config.in: Rebuild with autoheader 2.59.
1067
1068 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
1069
1070         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1071
1072 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
1073
1074         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1075         (GRPPADLCK2): New define.
1076         (twobyte_has_modrm): True for 0xA6.
1077         (grps): GRPPADLCK2 for opcode 0xA6.
1078
1079 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
1080
1081         Introduce SH2a support.
1082         * sh-opc.h (arch_sh2a_base): Renumber.
1083         (arch_sh2a_nofpu_base): Remove.
1084         (arch_sh_base_mask): Adjust.
1085         (arch_opann_mask): New.
1086         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1087         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1088         (sh_table): Adjust whitespace.
1089         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1090         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1091         instruction list throughout.
1092         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1093         of arch_sh2a in instruction list throughout.
1094         (arch_sh2e_up): Accomodate above changes.
1095         (arch_sh2_up): Ditto.
1096         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1097         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1098         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1099         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1100         * sh-opc.h (arch_sh2a_nofpu): New.
1101         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1102         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1103         instruction.
1104         2004-01-20  DJ Delorie  <dj@redhat.com>
1105         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1106         2003-12-29  DJ Delorie  <dj@redhat.com>
1107         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1108         sh_opcode_info, sh_table): Add sh2a support.
1109         (arch_op32): New, to tag 32-bit opcodes.
1110         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1111         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1112         * sh-opc.h (arch_sh2a): Add.
1113         * sh-dis.c (arch_sh2a): Handle.
1114         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1115
1116 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1117
1118         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1119
1120 2004-07-22  Nick Clifton  <nickc@redhat.com>
1121
1122         PR/280
1123         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1124         insns - this is done by objdump itself.
1125         * h8500-dis.c (print_insn_h8500): Likewise.
1126
1127 2004-07-21  Jan Beulich <jbeulich@novell.com>
1128
1129         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1130         regardless of address size prefix in effect.
1131         (ptr_reg): Size or address registers does not depend on rex64, but
1132         on the presence of an address size override.
1133         (OP_MMX): Use rex.x only for xmm registers.
1134         (OP_EM): Use rex.z only for xmm registers.
1135
1136 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1137
1138         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1139         move/branch operations to the bottom so that VR5400 multimedia
1140         instructions take precedence in disassembly.
1141
1142 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1143
1144         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1145         ISA-specific "break" encoding.
1146
1147 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1148
1149         * arm-opc.h: Fix typo in comment.
1150
1151 2004-07-11  Andreas Schwab  <schwab@suse.de>
1152
1153         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1154
1155 2004-07-09  Andreas Schwab  <schwab@suse.de>
1156
1157         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1158
1159 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1160
1161         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1162         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1163         (crx-dis.lo): New target.
1164         (crx-opc.lo): Likewise.
1165         * Makefile.in: Regenerate.
1166         * configure.in: Handle bfd_crx_arch.
1167         * configure: Regenerate.
1168         * crx-dis.c: New file.
1169         * crx-opc.c: New file.
1170         * disassemble.c (ARCH_crx): Define.
1171         (disassembler): Handle ARCH_crx.
1172
1173 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1174
1175         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1176         * ia64-asmtab.c: Regnerate.
1177
1178 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1179
1180         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1181         (extract_fxm): Don't test dialect.
1182         (XFXFXM_MASK): Include the power4 bit.
1183         (XFXM): Add p4 param.
1184         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1185
1186 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1187
1188         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1189         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1190
1191 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1192
1193         * ppc-opc.c (BH, XLBH_MASK): Define.
1194         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1195
1196 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1197
1198         * i386-dis.c (x_mode): Comment.
1199         (two_source_ops): File scope.
1200         (float_mem): Correct fisttpll and fistpll.
1201         (float_mem_mode): New table.
1202         (dofloat): Use it.
1203         (OP_E): Correct intel mode PTR output.
1204         (ptr_reg): Use open_char and close_char.
1205         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1206         operands.  Set two_source_ops.
1207
1208 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1209
1210         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1211         instead of _raw_size.
1212
1213 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1214
1215         * ia64-gen.c (in_iclass): Handle more postinc st
1216         and ld variants.
1217         * ia64-asmtab.c: Rebuilt.
1218
1219 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1220
1221         * s390-opc.txt: Correct architecture mask for some opcodes.
1222         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1223         in the esa mode as well.
1224
1225 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1226
1227         * sh-dis.c (target_arch): Make unsigned.
1228         (print_insn_sh): Replace (most of) switch with a call to
1229         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1230         * sh-opc.h: Redefine architecture flags values.
1231         Add sh3-nommu architecture.
1232         Reorganise <arch>_up macros so they make more visual sense.
1233         (SH_MERGE_ARCH_SET): Define new macro.
1234         (SH_VALID_BASE_ARCH_SET): Likewise.
1235         (SH_VALID_MMU_ARCH_SET): Likewise.
1236         (SH_VALID_CO_ARCH_SET): Likewise.
1237         (SH_VALID_ARCH_SET): Likewise.
1238         (SH_MERGE_ARCH_SET_VALID): Likewise.
1239         (SH_ARCH_SET_HAS_FPU): Likewise.
1240         (SH_ARCH_SET_HAS_DSP): Likewise.
1241         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1242         (sh_get_arch_from_bfd_mach): Add prototype.
1243         (sh_get_arch_up_from_bfd_mach): Likewise.
1244         (sh_get_bfd_mach_from_arch_set): Likewise.
1245         (sh_merge_bfd_arc): Likewise.
1246
1247 2004-05-24  Peter Barada  <peter@the-baradas.com>
1248
1249         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1250         into new match_insn_m68k function.  Loop over canidate
1251         matches and select first that completely matches.
1252         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1253         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1254         to verify addressing for MAC/EMAC.
1255         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1256         reigster halves since 'fpu' and 'spl' look misleading.
1257         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1258         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1259         first, tighten up match masks.
1260         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1261         'size' from special case code in print_insn_m68k to
1262         determine decode size of insns.
1263
1264 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1265
1266         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1267         well as when -mpower4.
1268
1269 2004-05-13  Nick Clifton  <nickc@redhat.com>
1270
1271         * po/fr.po: Updated French translation.
1272
1273 2004-05-05  Peter Barada  <peter@the-baradas.com>
1274
1275         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1276         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1277         * m68k-op.c: Switch from ColdFire chips to core variants.
1278
1279 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1280
1281         PR 147.
1282         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1283
1284 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1285
1286         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1287         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1288
1289 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1290
1291         * sh-dis.c (print_insn_sh): Print the value in constant pool
1292         as a symbol if it looks like a symbol.
1293
1294 2004-04-22  Peter Barada <peter@the-baradas.com>
1295
1296         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1297         appropriate ColdFire architectures.
1298         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1299         mask addressing.
1300         Add EMAC instructions, fix MAC instructions. Remove
1301         macmw/macml/msacmw/msacml instructions since mask addressing now
1302         supported.
1303
1304 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1305
1306         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1307         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1308         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1309         macro.  Adjust all users.
1310
1311 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1312
1313         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1314         separately.
1315
1316 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1317
1318         * m32r-asm.c: Regenerate.
1319
1320 2004-03-29  Stan Shebs  <shebs@apple.com>
1321
1322         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1323         used.
1324
1325 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1326
1327         * aclocal.m4: Regenerate.
1328         * config.in: Regenerate.
1329         * configure: Regenerate.
1330         * po/POTFILES.in: Regenerate.
1331         * po/opcodes.pot: Regenerate.
1332
1333 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1334
1335         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1336         PPC_OPERANDS_GPR_0.
1337         * ppc-opc.c (RA0): Define.
1338         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1339         (RAOPT): Rename from RAO.  Update all uses.
1340         (powerpc_opcodes): Use RA0 as appropriate.
1341
1342 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1343
1344         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1345
1346 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1347
1348         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1349
1350 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1351
1352         * i386-dis.c (GRPPLOCK): Delete.
1353         (grps): Delete GRPPLOCK entry.
1354
1355 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1356
1357         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1358         (M, Mp): Use OP_M.
1359         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1360         (GRPPADLCK): Define.
1361         (dis386): Use NOP_Fixup on "nop".
1362         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1363         (twobyte_has_modrm): Set for 0xa7.
1364         (padlock_table): Delete.  Move to..
1365         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1366         and clflush.
1367         (print_insn): Revert PADLOCK_SPECIAL code.
1368         (OP_E): Delete sfence, lfence, mfence checks.
1369
1370 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1371
1372         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1373         (INVLPG_Fixup): New function.
1374         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1375
1376 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1377
1378         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1379         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1380         (padlock_table): New struct with PadLock instructions.
1381         (print_insn): Handle PADLOCK_SPECIAL.
1382
1383 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1384
1385         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1386         (OP_E): Twiddle clflush to sfence here.
1387
1388 2004-03-08  Nick Clifton  <nickc@redhat.com>
1389
1390         * po/de.po: Updated German translation.
1391
1392 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1393
1394         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1395         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1396         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1397         accordingly.
1398
1399 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1400
1401         * frv-asm.c: Regenerate.
1402         * frv-desc.c: Regenerate.
1403         * frv-desc.h: Regenerate.
1404         * frv-dis.c: Regenerate.
1405         * frv-ibld.c: Regenerate.
1406         * frv-opc.c: Regenerate.
1407         * frv-opc.h: Regenerate.
1408
1409 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1410
1411         * frv-desc.c, frv-opc.c: Regenerate.
1412
1413 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1414
1415         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1416
1417 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1418
1419         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1420         Also correct mistake in the comment.
1421
1422 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1423
1424         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1425         ensure that double registers have even numbers.
1426         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1427         that reserved instruction 0xfffd does not decode the same
1428         as 0xfdfd (ftrv).
1429         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1430         REG_N refers to a double register.
1431         Add REG_N_B01 nibble type and use it instead of REG_NM
1432         in ftrv.
1433         Adjust the bit patterns in a few comments.
1434
1435 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1436
1437         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1438
1439 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1440
1441         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1442
1443 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1444
1445         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1446
1447 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1448
1449         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1450         mtivor32, mtivor33, mtivor34.
1451
1452 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1453
1454         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1455
1456 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1457
1458         * arm-opc.h Maverick accumulator register opcode fixes.
1459
1460 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1461
1462         * m32r-dis.c: Regenerate.
1463
1464 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1465
1466         * sh-opc.h (sh_table): "fsrra", not "fssra".
1467
1468 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1469
1470         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1471         contraints.
1472
1473 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1474
1475         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1476
1477 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1478
1479         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1480         1.  Don't print scale factor on AT&T mode when index missing.
1481
1482 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1483
1484         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1485         when loaded into XR registers.
1486
1487 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1488
1489         * frv-desc.h: Regenerate.
1490         * frv-desc.c: Regenerate.
1491         * frv-opc.c: Regenerate.
1492
1493 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1494
1495         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1496
1497 2004-01-09  Paul Brook  <paul@codesourcery.com>
1498
1499         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1500         specific opcodes.
1501
1502 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1503
1504         * Makefile.am (libopcodes_la_DEPENDENCIES)
1505         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1506         comment about the problem.
1507         * Makefile.in: Regenerate.
1508
1509 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1510
1511         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1512         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1513         cut&paste errors in shifting/truncating numerical operands.
1514         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1515         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1516         (parse_uslo16): Likewise.
1517         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1518         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1519         (parse_s12): Likewise.
1520         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1521         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1522         (parse_uslo16): Likewise.
1523         (parse_uhi16): Parse gothi and gotfuncdeschi.
1524         (parse_d12): Parse got12 and gotfuncdesc12.
1525         (parse_s12): Likewise.
1526
1527 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1528
1529         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1530         instruction which looks similar to an 'rla' instruction.
1531
1532 For older changes see ChangeLog-0203
1533 \f
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1535 mode: change-log
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1537 fill-column: 74
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