Fix unmatched @end table in gdb.texinfo.
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2010-06-29 Alan Modra <amodra@gmail.com>
2
3 * maxq-dis.c: Delete file.
4 * Makefile.am: Remove references to maxq.
5 * configure.in: Likewise.
6 * disassemble.c: Likewise.
7 * Makefile.in: Regenerate.
8 * configure: Regenerate.
9 * po/POTFILES.in: Regenerate.
10
11 2010-06-29 Alan Modra <amodra@gmail.com>
12
13 * mep-dis.c: Regenerate.
14
15 2010-06-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
16
17 * arm-disc.c (parse_insn_neon): Fix Neon alignment syntax.
18
19 2010-06-27 Alan Modra <amodra@gmail.com>
20
21 * arc-dis.c (arc_sprintf): Delete set but unused variables.
22 (decodeInstr): Likewise.
23 * dlx-dis.c (print_insn_dlx): Likewise.
24 * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
25 * maxq-dis.c (check_move, print_insn): Likewise.
26 * mep-dis.c (mep_examine_ivc2_insns): Likewise.
27 * msp430-dis.c (msp430_branchinstr): Likewise.
28 * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
29 * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
30 * sparc-dis.c (print_insn_sparc): Likewise.
31 * fr30-asm.c: Regenerate.
32 * frv-asm.c: Regenerate.
33 * ip2k-asm.c: Regenerate.
34 * iq2000-asm.c: Regenerate.
35 * lm32-asm.c: Regenerate.
36 * m32c-asm.c: Regenerate.
37 * m32r-asm.c: Regenerate.
38 * mep-asm.c: Regenerate.
39 * mt-asm.c: Regenerate.
40 * openrisc-asm.c: Regenerate.
41 * xc16x-asm.c: Regenerate.
42 * xstormy16-asm.c: Regenerate.
43
44 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
45
46 PR gas/11673
47 * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
48
49 2010-06-16 Vincent Rivière <vincent.riviere@freesbee.fr>
50
51 PR binutils/11676
52 * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
53
54 2010-06-14 Sebastian Andrzej Siewior <bigeasy@linutronix.de>
55
56 * ppc-dis.c (ppc_opts): Remove PPC_OPCODE_E500MC from e500 and
57 e500x2. Add PPC_OPCODE_E500 to e500 and e500x2
58 * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
59 touch floating point regs and are enabled by COM, PPC or PPCCOM.
60 Treat sync as msync on e500. Treat eieio as mbar 1 on e500.
61 Treat lwsync as msync on e500.
62
63 2010-06-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
64
65 * arm-dis.c (thumb-opcodes): Add disassembly for movs.
66
67 2010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
68
69 * arm-dis.c (print_insn_neon): Ensure disassembly of Neon
70 constants is the same on 32-bit and 64-bit hosts.
71
72 2010-05-27 Jason Duerstock <jason.duerstock+binutils@gmail.com>
73
74 * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
75 .short directives so that they can be reassembled.
76
77 2010-05-26 Catherine Moore <clm@codesourcery.com>
78 David Ung <davidu@mips.com>
79
80 * mips-opc.c: Change membership to I1 for instructions ssnop and
81 ehb.
82
83 2010-05-26 H.J. Lu <hongjiu.lu@intel.com>
84
85 * i386-dis.c (sib): New.
86 (get_sib): Likewise.
87 (print_insn): Call get_sib.
88 OP_E_memory): Use sib.
89
90 2010-05-26 Catherine Moore <clm@codesoourcery.com>
91
92 * mips-dis.c (mips_arch): Remove INSN_MIPS16.
93 * mips-opc.c (I16): Remove.
94 (mips_builtin_op): Reclassify jalx.
95
96 2010-05-19 Alan Modra <amodra@gmail.com>
97
98 * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
99 divwe, divdeuo, divweuo, divdeo, divweo for A2. Add icswepx.
100
101 2010-05-13 Alan Modra <amodra@gmail.com>
102
103 * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
104
105 2010-05-11 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
106
107 * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
108 format.
109 (print_insn_thumb16): Add support for new %W format.
110
111 2010-05-07 Tristan Gingold <gingold@adacore.com>
112
113 * Makefile.in: Regenerate with automake 1.11.1.
114 * aclocal.m4: Ditto.
115
116 2010-05-05 Nick Clifton <nickc@redhat.com>
117
118 * po/es.po: Updated Spanish translation.
119
120 2010-04-22 Nick Clifton <nickc@redhat.com>
121
122 * po/opcodes.pot: Updated by the Translation project.
123 * po/vi.po: Updated Vietnamese translation.
124
125 2010-04-16 H.J. Lu <hongjiu.lu@intel.com>
126
127 * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
128 bits in opcode.
129
130 2010-04-09 Nick Clifton <nickc@redhat.com>
131
132 * i386-dis.c (print_insn): Remove unused variable op.
133 (OP_sI): Remove unused variable mask.
134
135 2010-04-07 Alan Modra <amodra@gmail.com>
136
137 * configure: Regenerate.
138
139 2010-04-06 Peter Bergner <bergner@vnet.ibm.com>
140
141 * ppc-opc.c (RBOPT): New define.
142 ("dccci"): Enable for PPCA2. Make operands optional.
143 ("iccci"): Likewise. Do not deprecate for PPC476.
144
145 2010-04-02 Masaki Muranaka <monaka@monami-software.com>
146
147 * cr16-opc.c (cr16_instruction): Fix typo in comment.
148
149 2010-03-25 Joseph Myers <joseph@codesourcery.com>
150
151 * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
152 * Makefile.in: Regenerate.
153 * configure.in (bfd_tic6x_arch): New.
154 * configure: Regenerate.
155 * disassemble.c (ARCH_tic6x): Define if ARCH_all.
156 (disassembler): Handle TI C6X.
157 * tic6x-dis.c: New.
158
159 2010-03-24 Mike Frysinger <vapier@gentoo.org>
160
161 * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
162
163 2010-03-23 Joseph Myers <joseph@codesourcery.com>
164
165 * dis-buf.c (buffer_read_memory): Give error for reading just
166 before the start of memory.
167
168 2010-03-22 Sebastian Pop <sebastian.pop@amd.com>
169 Quentin Neill <quentin.neill@amd.com>
170
171 * i386-dis.c (OP_LWP_I): Removed.
172 (reg_table): Do not use OP_LWP_I, use Iq.
173 (OP_LWPCB_E): Remove use of names16.
174 (OP_LWP_E): Same.
175 * i386-opc.tbl: Removed 16bit LWP insns. 32bit LWP insns
176 should not set the Vex.length bit.
177 * i386-tbl.h: Regenerated.
178
179 2010-02-25 Edmar Wienskoski <edmar@freescale.com>
180
181 * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
182
183 2010-02-24 Nick Clifton <nickc@redhat.com>
184
185 PR binutils/6773
186 * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
187 <prefix>asx. Replace <prefix>subaddx with <prefix>sax.
188 (thumb32_opcodes): Likewise.
189
190 2010-02-15 Nick Clifton <nickc@redhat.com>
191
192 * po/vi.po: Updated Vietnamese translation.
193
194 2010-02-12 Doug Evans <dje@sebabeach.org>
195
196 * lm32-opinst.c: Regenerate.
197
198 2010-02-11 Doug Evans <dje@sebabeach.org>
199
200 * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
201 (print_address): Delete CGEN_PRINT_ADDRESS.
202 * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
203 * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
204 * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
205 * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
206
207 * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
208 * frv-desc.c, * frv-desc.h, * frv-opc.c,
209 * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
210 * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
211 * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
212 * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
213 * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
214 * mep-desc.c, * mep-desc.h, * mep-opc.c,
215 * mt-desc.c, * mt-desc.h, * mt-opc.c,
216 * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
217 * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
218 * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
219
220 2010-02-11 H.J. Lu <hongjiu.lu@intel.com>
221
222 * i386-dis.c: Update copyright.
223 * i386-gen.c: Likewise.
224 * i386-opc.h: Likewise.
225 * i386-opc.tbl: Likewise.
226
227 2010-02-10 Quentin Neill <quentin.neill@amd.com>
228 Sebastian Pop <sebastian.pop@amd.com>
229
230 * i386-dis.c (OP_EX_VexImmW): Reintroduced
231 function to handle 5th imm8 operand.
232 (PREFIX_VEX_3A48): Added.
233 (PREFIX_VEX_3A49): Added.
234 (VEX_W_3A48_P_2): Added.
235 (VEX_W_3A49_P_2): Added.
236 (prefix table): Added entries for PREFIX_VEX_3A48
237 and PREFIX_VEX_3A49.
238 (vex table): Added entries for VEX_W_3A48_P_2 and
239 and VEX_W_3A49_P_2.
240 * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
241 for Vec_Imm4 operands.
242 * i386-opc.h (enum): Added Vec_Imm4.
243 (i386_operand_type): Added vec_imm4.
244 * i386-opc.tbl: Add entries for vpermilp[ds].
245 * i386-init.h: Regenerated.
246 * i386-tbl.h: Regenerated.
247
248 2010-02-10 Richard Sandiford <r.sandiford@uk.ibm.com>
249
250 * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
251 and "pwr7". Move "a2" into alphabetical order.
252
253 2010-02-08 Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
254
255 * ppc-dis.c (ppc_opts): Add titan entry.
256 * ppc-opc.c (TITAN, MULHW): Define.
257 (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
258
259 2010-02-03 Quentin Neill <quentin.neill@amd.com>
260
261 * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
262 to CPU_BDVER1_FLAGS
263 * i386-init.h: Regenerated.
264
265 2010-02-03 Anthony Green <green@moxielogic.com>
266
267 * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
268 0x0f, and make 0x00 an illegal instruction.
269
270 2010-01-29 Daniel Jacobowitz <dan@codesourcery.com>
271
272 * opcodes/arm-dis.c (struct arm_private_data): New.
273 (print_insn_coprocessor, print_insn_arm): Update to use struct
274 arm_private_data.
275 (is_mapping_symbol, get_map_sym_type): New functions.
276 (get_sym_code_type): Check the symbol's section. Do not check
277 mapping symbols.
278 (print_insn): Default to disassembling ARM mode code. Check
279 for mapping symbols separately from other symbols. Use
280 struct arm_private_data.
281
282 2010-01-28 H.J. Lu <hongjiu.lu@intel.com>
283
284 * i386-dis.c (EXVexWdqScalar): New.
285 (vex_scalar_w_dq_mode): Likewise.
286 (prefix_table): Update entries for PREFIX_VEX_3899,
287 PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
288 PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
289 PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
290 PREFIX_VEX_38BD and PREFIX_VEX_38BF.
291 (intel_operand_size): Handle vex_scalar_w_dq_mode.
292 (OP_EX): Likewise.
293
294 2010-01-27 H.J. Lu <hongjiu.lu@intel.com>
295
296 * i386-dis.c (XMScalar): New.
297 (EXdScalar): Likewise.
298 (EXqScalar): Likewise.
299 (EXqScalarS): Likewise.
300 (VexScalar): Likewise.
301 (EXdVexScalarS): Likewise.
302 (EXqVexScalarS): Likewise.
303 (XMVexScalar): Likewise.
304 (scalar_mode): Likewise.
305 (d_scalar_mode): Likewise.
306 (d_scalar_swap_mode): Likewise.
307 (q_scalar_mode): Likewise.
308 (q_scalar_swap_mode): Likewise.
309 (vex_scalar_mode): Likewise.
310 (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
311 VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
312 VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
313 VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
314 VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
315 VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
316 VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
317 VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
318 VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
319 VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
320 (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
321 VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
322 VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
323 VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
324 VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
325 VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
326 VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
327 VEX_W_7E_P_1, VEX_W_D6_P_2 VEX_W_C2_P_1, VEX_W_C2_P_3,
328 VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
329 (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
330 q_scalar_mode, q_scalar_swap_mode.
331 (OP_XMM): Handle scalar_mode.
332 (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
333 and q_scalar_swap_mode.
334 (OP_VEX): Handle vex_scalar_mode.
335
336 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
337
338 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
339
340 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
341
342 * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
343
344 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
345
346 * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
347
348 2010-01-24 H.J. Lu <hongjiu.lu@intel.com>
349
350 * i386-dis.c (Bad_Opcode): New.
351 (bad_opcode): Likewise.
352 (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
353 (dis386_twobyte): Likewise.
354 (reg_table): Likewise.
355 (prefix_table): Likewise.
356 (x86_64_table): Likewise.
357 (vex_len_table): Likewise.
358 (vex_w_table): Likewise.
359 (mod_table): Likewise.
360 (rm_table): Likewise.
361 (float_reg): Likewise.
362 (reg_table): Remove trailing "(bad)" entries.
363 (prefix_table): Likewise.
364 (x86_64_table): Likewise.
365 (vex_len_table): Likewise.
366 (vex_w_table): Likewise.
367 (mod_table): Likewise.
368 (rm_table): Likewise.
369 (get_valid_dis386): Handle bytemode 0.
370
371 2010-01-23 H.J. Lu <hongjiu.lu@intel.com>
372
373 * i386-opc.h (VEXScalar): New.
374
375 * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
376 instructions.
377 * i386-tbl.h: Regenerated.
378
379 2010-01-21 H.J. Lu <hongjiu.lu@intel.com>
380
381 * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
382
383 * i386-opc.tbl: Add xsave64 and xrstor64.
384 * i386-tbl.h: Regenerated.
385
386 2010-01-20 Nick Clifton <nickc@redhat.com>
387
388 PR 11170
389 * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
390 based post-indexed addressing.
391
392 2010-01-15 Sebastian Pop <sebastian.pop@amd.com>
393
394 * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
395 * i386-tbl.h: Regenerated.
396
397 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
398
399 * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
400 comments.
401
402 2010-01-14 H.J. Lu <hongjiu.lu@intel.com>
403
404 * i386-dis.c (names_mm): New.
405 (intel_names_mm): Likewise.
406 (att_names_mm): Likewise.
407 (names_xmm): Likewise.
408 (intel_names_xmm): Likewise.
409 (att_names_xmm): Likewise.
410 (names_ymm): Likewise.
411 (intel_names_ymm): Likewise.
412 (att_names_ymm): Likewise.
413 (print_insn): Set names_mm, names_xmm and names_ymm.
414 (OP_MMX): Use names_mm, names_xmm and names_ymm.
415 (OP_XMM): Likewise.
416 (OP_EM): Likewise.
417 (OP_EMC): Likewise.
418 (OP_MXC): Likewise.
419 (OP_EX): Likewise.
420 (XMM_Fixup): Likewise.
421 (OP_VEX): Likewise.
422 (OP_EX_VexReg): Likewise.
423 (OP_Vex_2src): Likewise.
424 (OP_Vex_2src_1): Likewise.
425 (OP_Vex_2src_2): Likewise.
426 (OP_REG_VexI4): Likewise.
427
428 2010-01-13 H.J. Lu <hongjiu.lu@intel.com>
429
430 * i386-dis.c (print_insn): Update comments.
431
432 2010-01-12 H.J. Lu <hongjiu.lu@intel.com>
433
434 * i386-dis.c (rex_original): Removed.
435 (ckprefix): Remove rex_original.
436 (print_insn): Update comments.
437
438 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
439
440 * Makefile.in: Regenerate.
441 * configure: Regenerate.
442
443 2010-01-07 Doug Evans <dje@sebabeach.org>
444
445 * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
446 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
447 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
448 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
449 * xstormy16-ibld.c: Regenerate.
450
451 2010-01-06 Quentin Neill <quentin.neill@amd.com>
452
453 * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
454 * i386-init.h: Regenerated.
455
456 2010-01-06 Daniel Gutson <dgutson@codesourcery.com>
457
458 * arm-dis.c (print_insn): Fixed search for next symbol and data
459 dumping condition, and the initial mapping symbol state.
460
461 2010-01-05 Doug Evans <dje@sebabeach.org>
462
463 * cgen-ibld.in: #include "cgen/basic-modes.h".
464 * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
465 * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
466 * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
467 * xstormy16-ibld.c: Regenerate.
468
469 2010-01-04 Nick Clifton <nickc@redhat.com>
470
471 PR 11123
472 * arm-dis.c (print_insn_coprocessor): Initialise value.
473
474 2010-01-04 Edmar Wienskoski <edmar@freescale.com>
475
476 * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
477
478 2010-01-02 Doug Evans <dje@sebabeach.org>
479
480 * cgen-asm.in: Update copyright year.
481 * cgen-dis.in: Update copyright year.
482 * cgen-ibld.in: Update copyright year.
483 * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
484 * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
485 * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
486 * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
487 * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
488 * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
489 * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
490 * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
491 * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
492 * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
493 * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
494 * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
495 * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
496 * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
497 * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
498 * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
499 * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
500 * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
501 * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
502 * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
503 * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
504
505 For older changes see ChangeLog-2009
506 \f
507 Local Variables:
508 mode: change-log
509 left-margin: 8
510 fill-column: 74
511 version-control: never
512 End:
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