opcodes/ChangeLog

   1 2010-09-22  Robin Getz  <robin.getz@analog.com>
   2
   3         * bfin-dis.c (decode_dsp32shift_0): Decode sub opcodes 2/2 as
   4         LSHIFT instead of SHIFT.
   5
   6 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
   7
   8         * bfin-dis.c (constant_formats): Constify the whole structure.
   9         (fmtconst): Add const to return value.
  10         (reg_names): Mark const.
  11         (decode_multfunc): Mark s0/s1 as const.
  12         (decode_macfunc): Mark a/sop as const.
  13
  14 2010-09-17  Tejas Belagod  <tejas.belagod@arm.com>
  15
  16         * arm_dis.c (coprocessor_opcodes): Add MRC entry for APSR_nzcv.
  17
  18 2010-09-14  Maciej W. Rozycki  <macro@codesourcery.com>
  19
  20         * mips-opc.c (mips_builtin_opcodes): Add "sync_acquire",
  21         "sync_mb", "sync_release", "sync_rmb" and "sync_wmb".
  22
  23 2010-09-10  Pierre Muller  <muller@ics.u-strasbg.fr>
  24
  25         * src/opcodes/dlx-dis.c (print_insn_dlx): Use dlx_insn type for
  26         dlx_insn_type array.
  27
  28 2010-08-31  H.J. Lu  <hongjiu.lu@intel.com>
  29
  30         PR binutils/11960
  31         * i386-dis.c (sIv): New.
  32         (dis386): Replace Iq with sIv on "pushT".
  33         (reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT.
  34         (x86_64_table): Replace {T|}/{P|} with P.
  35         (putop): Add 'w' to 'T'/'P' if needed for Intel syntax.
  36         (OP_sI): Update v_mode.  Remove w_mode.
  37
  38 2010-08-27  Nathan Froyd  <froydnj@codesourcery.com>
  39
  40         * ppc-opc.c (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate
  41         on E500 and E500MC.
  42
  43 2010-08-17  H.J. Lu  <hongjiu.lu@intel.com>
  44
  45         * i386-dis.c (reg_table): Replace Eb with Mb on prefetch and
  46         prefetchw.
  47
  48 2010-08-06  Quentin Neill <quentin.neill@amd.com>
  49
  50         * i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
  51         to processor flags for PENTIUMPRO processors and later.
  52         * i386-opc.h (enum): Add CpuNop.
  53         (i386_cpu_flags): Add cpunop bit.
  54         * i386-opc.tbl: Change nop cpu_flags.
  55         * i386-init.h: Regenerated.
  56         * i386-tbl.h: Likewise.
  57
  58 2010-08-06  Quentin Neill <quentin.neill@amd.com>
  59
  60         * i386-opc.h (enum): Fix typos in comments.
  61
  62 2010-08-06  Alan Modra  <amodra@gmail.com>
  63
  64         * disassemble.c: Formatting.
  65         (disassemble_init_for_target <ARCH_m32c>): Comment on endian.
  66
  67 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
  68
  69         * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
  70         * i386-tbl.h: Regenerated.
  71
  72 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
  73
  74         * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
  75
  76         * i386-opc.tbl: Add ud1.  Remove Cpu686 from ud2/ud2a/ud2b.
  77         * i386-tbl.h: Regenerated.
  78
  79 2010-07-29  DJ Delorie  <dj@redhat.com>
  80
  81         * rx-decode.opc (SRR): New.
  82         (rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
  83         r0,r0) and NOP3 (max r0,r0) special cases.
  84         * rx-decode.c: Regenerate.
  85
  86 2010-07-28  H.J. Lu  <hongjiu.lu@intel.com>
  87
  88         * i386-dis.c: Add 0F to VEX opcode enums.
  89
  90 2010-07-27  DJ Delorie  <dj@redhat.com>
  91
  92         * rx-decode.opc (store_flags): Remove, replace with F_* macros.
  93         (rx_decode_opcode): Likewise.
  94         * rx-decode.c: Regenerate.
  95
  96 2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
  97             Ina Pandit  <ina.pandit@kpitcummins.com>
  98
  99         * v850-dis.c (v850_sreg_names): Updated structure for system
 100         registers.
 101         (float_cc_names): new structure for condition codes.
 102         (print_value): Update the function that prints value.
 103         (get_operand_value): New function to get the operand value.
 104         (disassemble): Updated to handle the disassembly of instructions.
 105         (print_insn_v850): Updated function to print instruction for different
 106         families.
 107         * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
 108         extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
 109         extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
 110         insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
 111         extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
 112         extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
 113         extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
 114         insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
 115         (insert_d8_7, insert_d5_4, insert_i5div): Remove.
 116         (v850_operands): Update with the relocation name. Also update
 117         the instructions with specific set of processors.
 118
 119 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
 120
 121         * arm-dis.c (print_insn_arm): Add cases for printing more
 122         symbolic operands.
 123         (print_insn_thumb32): Likewise.
 124
 125 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 126
 127         * mips-dis.c (print_insn_mips): Correct branch instruction type
 128         determination.
 129
 130 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 131
 132         * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
 133         type and delay slot determination.
 134         (print_insn_mips16): Extend branch instruction type and delay
 135         slot determination to cover all instructions.
 136         * mips16-opc.c (BR): Remove macro.
 137         (UBR, CBR): New macros.
 138         (mips16_opcodes): Update branch annotation for "b", "beqz",
 139         "bnez", "bteqz" and "btnez".  Add branch annotation for "jalrc"
 140         and "jrc".
 141
 142 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 143
 144         AVX Programming Reference (June, 2010)
 145         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
 146         * i386-opc.tbl: Likewise.
 147         * i386-tbl.h: Regenerated.
 148
 149 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 150
 151         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
 152
 153 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
 154
 155         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
 156         ppc_cpu_t before inverting.
 157         (ppc_parse_cpu): Likewise.
 158         (print_insn_powerpc): Likewise.
 159
 160 2010-07-03  Alan Modra  <amodra@gmail.com>
 161
 162         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
 163         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
 164         (PPC64, MFDEC2): Update.
 165         (NON32, NO371): Define.
 166         (powerpc_opcode): Update to not use old opcode flags, and avoid
 167         -m601 duplicates.
 168
 169 2010-07-03  DJ Delorie  <dj@delorie.com>
 170
 171         * m32c-ibld.c: Regenerate.
 172
 173 2010-07-03  Alan Modra  <amodra@gmail.com>
 174
 175         * ppc-opc.c (PWR2COM): Define.
 176         (PPCPWR2): Add PPC_OPCODE_COMMON.
 177         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
 178         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
 179         "rac" from -mcom.
 180
 181 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
 182
 183         AVX Programming Reference (June, 2010)
 184         * i386-dis.c (PREFIX_0FAE_REG_0): New.
 185         (PREFIX_0FAE_REG_1): Likewise.
 186         (PREFIX_0FAE_REG_2): Likewise.
 187         (PREFIX_0FAE_REG_3): Likewise.
 188         (PREFIX_VEX_3813): Likewise.
 189         (PREFIX_VEX_3A1D): Likewise.
 190         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 191         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
 192         PREFIX_VEX_3A1D.
 193         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
 194         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 195         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
 196
 197         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
 198         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
 199         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
 200
 201         * i386-opc.h (CpuXsaveopt): New.
 202         (CpuFSGSBase): Likewise.
 203         (CpuRdRnd): Likewise.
 204         (CpuF16C): Likewise.
 205         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
 206         cpuf16c.
 207
 208         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
 209         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
 210         * i386-init.h: Regenerated.
 211         * i386-tbl.h: Likewise.
 212
 213 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 214
 215         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
 216         and mtocrf on EFS.
 217
 218 2010-06-29  Alan Modra  <amodra@gmail.com>
 219
 220         * maxq-dis.c: Delete file.
 221         * Makefile.am: Remove references to maxq.
 222         * configure.in: Likewise.
 223         * disassemble.c: Likewise.
 224         * Makefile.in: Regenerate.
 225         * configure: Regenerate.
 226         * po/POTFILES.in: Regenerate.
 227
 228 2010-06-29  Alan Modra  <amodra@gmail.com>
 229
 230         * mep-dis.c: Regenerate.
 231
 232 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 233
 234         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
 235
 236 2010-06-27  Alan Modra  <amodra@gmail.com>
 237
 238         * arc-dis.c (arc_sprintf): Delete set but unused variables.
 239         (decodeInstr): Likewise.
 240         * dlx-dis.c (print_insn_dlx): Likewise.
 241         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 242         * maxq-dis.c (check_move, print_insn): Likewise.
 243         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 244         * msp430-dis.c (msp430_branchinstr): Likewise.
 245         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 246         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 247         * sparc-dis.c (print_insn_sparc): Likewise.
 248         * fr30-asm.c: Regenerate.
 249         * frv-asm.c: Regenerate.
 250         * ip2k-asm.c: Regenerate.
 251         * iq2000-asm.c: Regenerate.
 252         * lm32-asm.c: Regenerate.
 253         * m32c-asm.c: Regenerate.
 254         * m32r-asm.c: Regenerate.
 255         * mep-asm.c: Regenerate.
 256         * mt-asm.c: Regenerate.
 257         * openrisc-asm.c: Regenerate.
 258         * xc16x-asm.c: Regenerate.
 259         * xstormy16-asm.c: Regenerate.
 260
 261 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 262
 263         PR gas/11673
 264         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 265
 266 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 267
 268         PR binutils/11676
 269         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 270
 271 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 272
 273         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 274         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 275         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 276         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 277         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 278         Treat lwsync as msync on e500.
 279
 280 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 281
 282         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 283
 284 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 285
 286         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 287         constants is the same on 32-bit and 64-bit hosts.
 288
 289 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 290
 291         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 292         .short directives so that they can be reassembled.
 293
 294 2010-05-26  Catherine Moore <clm@codesourcery.com>
 295             David Ung  <davidu@mips.com>
 296
 297         * mips-opc.c: Change membership to I1 for instructions ssnop and
 298         ehb.
 299
 300 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 301
 302         * i386-dis.c (sib): New.
 303         (get_sib): Likewise.
 304         (print_insn): Call get_sib.
 305         OP_E_memory): Use sib.
 306
 307 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 308
 309         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 310         * mips-opc.c (I16): Remove.
 311         (mips_builtin_op): Reclassify jalx.
 312
 313 2010-05-19  Alan Modra  <amodra@gmail.com>
 314
 315         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 316         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 317
 318 2010-05-13  Alan Modra  <amodra@gmail.com>
 319
 320         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 321
 322 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 323
 324         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 325         format.
 326         (print_insn_thumb16): Add support for new %W format.
 327
 328 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 329
 330         * Makefile.in: Regenerate with automake 1.11.1.
 331         * aclocal.m4: Ditto.
 332
 333 2010-05-05  Nick Clifton  <nickc@redhat.com>
 334
 335         * po/es.po: Updated Spanish translation.
 336
 337 2010-04-22  Nick Clifton  <nickc@redhat.com>
 338
 339         * po/opcodes.pot: Updated by the Translation project.
 340         * po/vi.po: Updated Vietnamese translation.
 341
 342 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 343
 344         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 345         bits in opcode.
 346
 347 2010-04-09  Nick Clifton  <nickc@redhat.com>
 348
 349         * i386-dis.c (print_insn): Remove unused variable op.
 350         (OP_sI): Remove unused variable mask.
 351
 352 2010-04-07  Alan Modra  <amodra@gmail.com>
 353
 354         * configure: Regenerate.
 355
 356 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 357
 358         * ppc-opc.c (RBOPT): New define.
 359         ("dccci"): Enable for PPCA2.  Make operands optional.
 360         ("iccci"): Likewise.  Do not deprecate for PPC476.
 361
 362 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 363
 364         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 365
 366 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 367
 368         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 369         * Makefile.in: Regenerate.
 370         * configure.in (bfd_tic6x_arch): New.
 371         * configure: Regenerate.
 372         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 373         (disassembler): Handle TI C6X.
 374         * tic6x-dis.c: New.
 375
 376 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 377
 378         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 379
 380 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 381
 382         * dis-buf.c (buffer_read_memory): Give error for reading just
 383         before the start of memory.
 384
 385 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 386             Quentin Neill <quentin.neill@amd.com>
 387
 388         * i386-dis.c (OP_LWP_I): Removed.
 389         (reg_table): Do not use OP_LWP_I, use Iq.
 390         (OP_LWPCB_E): Remove use of names16.
 391         (OP_LWP_E): Same.
 392         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 393         should not set the Vex.length bit.
 394         * i386-tbl.h: Regenerated.
 395
 396 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 397
 398         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 399
 400 2010-02-24  Nick Clifton  <nickc@redhat.com>
 401
 402         PR binutils/6773
 403         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 404         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 405         (thumb32_opcodes): Likewise.
 406
 407 2010-02-15  Nick Clifton  <nickc@redhat.com>
 408
 409         * po/vi.po: Updated Vietnamese translation.
 410
 411 2010-02-12  Doug Evans  <dje@sebabeach.org>
 412
 413         * lm32-opinst.c: Regenerate.
 414
 415 2010-02-11  Doug Evans  <dje@sebabeach.org>
 416
 417         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 418         (print_address): Delete CGEN_PRINT_ADDRESS.
 419         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 420         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 421         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 422         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 423
 424         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 425         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 426         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 427         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 428         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 429         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 430         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 431         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 432         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 433         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 434         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 435         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 436
 437 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 438
 439         * i386-dis.c: Update copyright.
 440         * i386-gen.c: Likewise.
 441         * i386-opc.h: Likewise.
 442         * i386-opc.tbl: Likewise.
 443
 444 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 445             Sebastian Pop  <sebastian.pop@amd.com>
 446
 447         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 448         function to handle 5th imm8 operand.
 449         (PREFIX_VEX_3A48): Added.
 450         (PREFIX_VEX_3A49): Added.
 451         (VEX_W_3A48_P_2): Added.
 452         (VEX_W_3A49_P_2): Added.
 453         (prefix table): Added entries for PREFIX_VEX_3A48
 454         and PREFIX_VEX_3A49.
 455         (vex table): Added entries for VEX_W_3A48_P_2 and
 456         and VEX_W_3A49_P_2.
 457         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 458         for Vec_Imm4 operands.
 459         * i386-opc.h (enum): Added Vec_Imm4.
 460         (i386_operand_type): Added vec_imm4.
 461         * i386-opc.tbl: Add entries for vpermilp[ds].
 462         * i386-init.h: Regenerated.
 463         * i386-tbl.h: Regenerated.
 464
 465 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 466
 467         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 468         and "pwr7".  Move "a2" into alphabetical order.
 469
 470 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 471
 472         * ppc-dis.c (ppc_opts): Add titan entry.
 473         * ppc-opc.c (TITAN, MULHW): Define.
 474         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 475
 476 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 477
 478         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 479         to CPU_BDVER1_FLAGS
 480         * i386-init.h: Regenerated.
 481
 482 2010-02-03  Anthony Green  <green@moxielogic.com>
 483
 484         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 485         0x0f, and make 0x00 an illegal instruction.
 486
 487 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 488
 489         * opcodes/arm-dis.c (struct arm_private_data): New.
 490         (print_insn_coprocessor, print_insn_arm): Update to use struct
 491         arm_private_data.
 492         (is_mapping_symbol, get_map_sym_type): New functions.
 493         (get_sym_code_type): Check the symbol's section.  Do not check
 494         mapping symbols.
 495         (print_insn): Default to disassembling ARM mode code.  Check
 496         for mapping symbols separately from other symbols.  Use
 497         struct arm_private_data.
 498
 499 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 500
 501         * i386-dis.c (EXVexWdqScalar): New.
 502         (vex_scalar_w_dq_mode): Likewise.
 503         (prefix_table): Update entries for PREFIX_VEX_3899,
 504         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 505         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 506         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 507         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 508         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 509         (OP_EX): Likewise.
 510
 511 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 512
 513         * i386-dis.c (XMScalar): New.
 514         (EXdScalar): Likewise.
 515         (EXqScalar): Likewise.
 516         (EXqScalarS): Likewise.
 517         (VexScalar): Likewise.
 518         (EXdVexScalarS): Likewise.
 519         (EXqVexScalarS): Likewise.
 520         (XMVexScalar): Likewise.
 521         (scalar_mode): Likewise.
 522         (d_scalar_mode): Likewise.
 523         (d_scalar_swap_mode): Likewise.
 524         (q_scalar_mode): Likewise.
 525         (q_scalar_swap_mode): Likewise.
 526         (vex_scalar_mode): Likewise.
 527         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 528         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 529         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 530         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 531         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 532         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 533         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 534         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 535         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 536         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 537         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 538         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 539         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 540         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 541         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 542         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 543         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 544         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 545         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 546         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 547         q_scalar_mode, q_scalar_swap_mode.
 548         (OP_XMM): Handle scalar_mode.
 549         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 550         and q_scalar_swap_mode.
 551         (OP_VEX): Handle vex_scalar_mode.
 552
 553 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 554
 555         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 556
 557 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 558
 559         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 560
 561 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 562
 563         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 564
 565 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 566
 567         * i386-dis.c (Bad_Opcode): New.
 568         (bad_opcode): Likewise.
 569         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 570         (dis386_twobyte): Likewise.
 571         (reg_table): Likewise.
 572         (prefix_table): Likewise.
 573         (x86_64_table): Likewise.
 574         (vex_len_table): Likewise.
 575         (vex_w_table): Likewise.
 576         (mod_table): Likewise.
 577         (rm_table): Likewise.
 578         (float_reg): Likewise.
 579         (reg_table): Remove trailing "(bad)" entries.
 580         (prefix_table): Likewise.
 581         (x86_64_table): Likewise.
 582         (vex_len_table): Likewise.
 583         (vex_w_table): Likewise.
 584         (mod_table): Likewise.
 585         (rm_table): Likewise.
 586         (get_valid_dis386): Handle bytemode 0.
 587
 588 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 589
 590         * i386-opc.h (VEXScalar): New.
 591
 592         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 593         instructions.
 594         * i386-tbl.h: Regenerated.
 595
 596 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 597
 598         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 599
 600         * i386-opc.tbl: Add xsave64 and xrstor64.
 601         * i386-tbl.h: Regenerated.
 602
 603 2010-01-20  Nick Clifton  <nickc@redhat.com>
 604
 605         PR 11170
 606         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 607         based post-indexed addressing.
 608
 609 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 610
 611         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 612         * i386-tbl.h: Regenerated.
 613
 614 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 615
 616         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 617         comments.
 618
 619 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 620
 621         * i386-dis.c (names_mm): New.
 622         (intel_names_mm): Likewise.
 623         (att_names_mm): Likewise.
 624         (names_xmm): Likewise.
 625         (intel_names_xmm): Likewise.
 626         (att_names_xmm): Likewise.
 627         (names_ymm): Likewise.
 628         (intel_names_ymm): Likewise.
 629         (att_names_ymm): Likewise.
 630         (print_insn): Set names_mm, names_xmm and names_ymm.
 631         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 632         (OP_XMM): Likewise.
 633         (OP_EM): Likewise.
 634         (OP_EMC): Likewise.
 635         (OP_MXC): Likewise.
 636         (OP_EX): Likewise.
 637         (XMM_Fixup): Likewise.
 638         (OP_VEX): Likewise.
 639         (OP_EX_VexReg): Likewise.
 640         (OP_Vex_2src): Likewise.
 641         (OP_Vex_2src_1): Likewise.
 642         (OP_Vex_2src_2): Likewise.
 643         (OP_REG_VexI4): Likewise.
 644
 645 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 646
 647         * i386-dis.c (print_insn): Update comments.
 648
 649 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 650
 651         * i386-dis.c (rex_original): Removed.
 652         (ckprefix): Remove rex_original.
 653         (print_insn): Update comments.
 654
 655 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 656
 657         * Makefile.in: Regenerate.
 658         * configure: Regenerate.
 659
 660 2010-01-07  Doug Evans  <dje@sebabeach.org>
 661
 662         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 663         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 664         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 665         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 666         * xstormy16-ibld.c: Regenerate.
 667
 668 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 669
 670         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 671         * i386-init.h: Regenerated.
 672
 673 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 674
 675         * arm-dis.c (print_insn): Fixed search for next symbol and data
 676         dumping condition, and the initial mapping symbol state.
 677
 678 2010-01-05  Doug Evans  <dje@sebabeach.org>
 679
 680         * cgen-ibld.in: #include "cgen/basic-modes.h".
 681         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 682         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 683         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 684         * xstormy16-ibld.c: Regenerate.
 685
 686 2010-01-04  Nick Clifton  <nickc@redhat.com>
 687
 688         PR 11123
 689         * arm-dis.c (print_insn_coprocessor): Initialise value.
 690
 691 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 692
 693         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 694
 695 2010-01-02  Doug Evans  <dje@sebabeach.org>
 696
 697         * cgen-asm.in: Update copyright year.
 698         * cgen-dis.in: Update copyright year.
 699         * cgen-ibld.in: Update copyright year.
 700         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 701         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 702         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 703         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 704         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 705         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 706         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 707         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 708         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 709         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 710         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 711         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 712         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 713         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 714         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 715         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 716         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 717         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 718         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 719         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 720         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 721
 722 For older changes see ChangeLog-2009
 723 \f
 724 Local Variables:
 725 mode: change-log
 726 left-margin: 8
 727 fill-column: 74
 728 version-control: never
 729 End: