opcodes/ChangeLog

   1 2005-09-02  Paul Brook  <paul@codesourcery.com>
   2
   3         * arm-dis.c (coprocessor_opcodes): Add null terminator.
   4
   5 2005-09-02  Paul Brook  <paul@codesourcery.com>
   6
   7         * arm-dis.c (coprocessor_opcodes): New.
   8         (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
   9         (print_insn_coprocessor): New function.
  10         (print_insn_arm): Use print_insn_coprocessor.  Remove coprocessor
  11         format characters.
  12         (print_insn_thumb32): Use print_insn_coprocessor.
  13
  14 2005-08-30  Paul Brook  <paul@codesourcery.com>
  15
  16         * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
  17
  18 2005-08-26  Jan Beulich  <jbeulich@novell.com>
  19
  20         * i386-dis.c (intel_operand_size): New, broken out from OP_E for
  21         re-use.
  22         (OP_E): Call intel_operand_size, move call site out of mode
  23         dependent code.
  24         (OP_OFF): Call intel_operand_size if suffix_always. Remove
  25         ATTRIBUTE_UNUSED from parameters.
  26         (OP_OFF64): Likewise.
  27         (OP_ESreg): Call intel_operand_size.
  28         (OP_DSreg): Likewise.
  29         (OP_DIR): Use colon rather than semicolon as separator of far
  30         jump/call operands.
  31
  32 2005-08-25  Chao-ying Fu  <fu@mips.com>
  33
  34         * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
  35         (mips_builtin_opcodes): Add DSP instructions.
  36         * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
  37         mips64, mips64r2.
  38         (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
  39         operand formats.
  40
  41 2005-08-23  David Ung  <davidu@mips.com>
  42
  43         * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
  44         instructions to the table.
  45
  46 2005-08-18  Alan Modra  <amodra@bigpond.net.au>
  47
  48         * a29k-dis.c: Delete.
  49         * Makefile.am: Remove a29k support.
  50         * configure.in: Likewise.
  51         * disassemble.c: Likewise.
  52         * Makefile.in: Regenerate.
  53         * configure: Regenerate.
  54         * po/POTFILES.in: Regenerate.
  55
  56 2005-08-15  Daniel Jacobowitz  <dan@codesourcery.com>
  57
  58         * ppc-dis.c (powerpc_dialect): Handle e300.
  59         (print_ppc_disassembler_options): Likewise.
  60         * ppc-opc.c (PPCE300): Define.
  61         (powerpc_opcodes): Mark icbt as available for the e300.
  62
  63 2005-08-13  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
  64
  65         * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
  66         Use "rp" instead of "%r2" in "b,l" insns.
  67
  68 2005-08-12 Martin Schwidefsky  <schwidefsky@de.ibm.com>
  69
  70         * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
  71         * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
  72         (main): Likewise.
  73         * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
  74         and 4 bit optional masks.
  75         (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
  76         INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
  77         (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
  78         MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
  79         (s390_opformats): Likewise.
  80         * s390-opc.txt: Add new instructions for cpu type z9-109.
  81
  82 2005-08-05  John David Anglin  <dave.anglin@nrc-crnc.gc.ca>
  83
  84         * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
  85
  86 2005-07-29  Paul Brook  <paul@codesourcery.com>
  87
  88         * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
  89
  90 2005-07-29  Paul Brook  <paul@codesourcery.com>
  91
  92         * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
  93         (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
  94
  95 2005-07-25  DJ Delorie  <dj@redhat.com>
  96
  97         * m32c-asm.c Regenerate.
  98         * m32c-dis.c Regenerate.
  99
 100 2005-07-20  DJ Delorie  <dj@redhat.com>
 101
 102         * disassemble.c (disassemble_init_for_target): M32C ISAs are
 103         enums, so convert them to bit masks, which attributes are.
 104
 105 2005-07-18  Nick Clifton  <nickc@redhat.com>
 106
 107         * configure.in: Restore alpha ordering to list of arches.
 108         * configure: Regenerate.
 109         * disassemble.c: Restore alpha ordering to list of arches.
 110
 111 2005-07-18  Nick Clifton  <nickc@redhat.com>
 112
 113         * m32c-asm.c: Regenerate.
 114         * m32c-desc.c: Regenerate.
 115         * m32c-desc.h: Regenerate.
 116         * m32c-dis.c: Regenerate.
 117         * m32c-ibld.h: Regenerate.
 118         * m32c-opc.c: Regenerate.
 119         * m32c-opc.h: Regenerate.
 120
 121 2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 122
 123         * i386-dis.c (PNI_Fixup): Update comment.
 124         (VMX_Fixup): Properly handle the suffix check.
 125
 126 2005-07-16  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 127
 128         * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
 129         mfctl disassembly.
 130
 131 2005-07-16  Alan Modra  <amodra@bigpond.net.au>
 132
 133         * Makefile.am: Run "make dep-am".
 134         (stamp-m32c): Fix cpu dependencies.
 135         * Makefile.in: Regenerate.
 136         * ip2k-dis.c: Regenerate.
 137
 138 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
 139
 140         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
 141         (VMX_Fixup): New. Fix up Intel VMX Instructions.
 142         (Em): New.
 143         (Gm): New.
 144         (VM): New.
 145         (dis386_twobyte): Updated entries 0x78 and 0x79.
 146         (twobyte_has_modrm): Likewise.
 147         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
 148         (OP_G): Handle m_mode.
 149
 150 2005-07-14  Jim Blandy  <jimb@redhat.com>
 151
 152         Add support for the Renesas M32C and M16C.
 153         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
 154         * m32c-desc.h, m32c-opc.h: New.
 155         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
 156         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
 157         m32c-opc.c.
 158         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
 159         m32c-ibld.lo, m32c-opc.lo.
 160         (CLEANFILES): List stamp-m32c.
 161         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
 162         (CGEN_CPUS): Add m32c.
 163         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
 164         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
 165         (m32c_opc_h): New variable.
 166         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
 167         (m32c-opc.lo): New rules.
 168         * Makefile.in: Regenerated.
 169         * configure.in: Add case for bfd_m32c_arch.
 170         * configure: Regenerated.
 171         * disassemble.c (ARCH_m32c): New.
 172         [ARCH_m32c]: #include "m32c-desc.h".
 173         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
 174         (disassemble_init_for_target) [ARCH_m32c]: Same.
 175
 176         * cgen-ops.h, cgen-types.h: New files.
 177         * Makefile.am (HFILES): List them.
 178         * Makefile.in: Regenerated.
 179
 180 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 181
 182         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
 183         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
 184         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
 185         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
 186         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
 187         v850-dis.c: Fix format bugs.
 188         * ia64-gen.c (fail, warn): Add format attribute.
 189         * or32-opc.c (debug): Likewise.
 190
 191 2005-07-07  Khem Raj  <kraj@mvista.com>
 192
 193         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
 194         disassembly pattern.
 195
 196 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 197
 198         * Makefile.am (stamp-m32r): Fix path to cpu files.
 199         (stamp-m32r, stamp-iq2000): Likewise.
 200         * Makefile.in: Regenerate.
 201         * m32r-asm.c: Regenerate.
 202         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
 203         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
 204
 205 2005-07-05  Nick Clifton  <nickc@redhat.com>
 206
 207         * iq2000-asm.c: Regenerate.
 208         * ms1-asm.c: Regenerate.
 209
 210 2005-07-05  Jan Beulich  <jbeulich@novell.com>
 211
 212         * i386-dis.c (SVME_Fixup): New.
 213         (grps): Use it for the lidt entry.
 214         (PNI_Fixup): Call OP_M rather than OP_E.
 215         (INVLPG_Fixup): Likewise.
 216
 217 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
 218
 219         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 220
 221 2005-07-01  Nick Clifton  <nickc@redhat.com>
 222
 223         * a29k-dis.c: Update to ISO C90 style function declarations and
 224         fix formatting.
 225         * alpha-opc.c: Likewise.
 226         * arc-dis.c: Likewise.
 227         * arc-opc.c: Likewise.
 228         * avr-dis.c: Likewise.
 229         * cgen-asm.in: Likewise.
 230         * cgen-dis.in: Likewise.
 231         * cgen-ibld.in: Likewise.
 232         * cgen-opc.c: Likewise.
 233         * cris-dis.c: Likewise.
 234         * d10v-dis.c: Likewise.
 235         * d30v-dis.c: Likewise.
 236         * d30v-opc.c: Likewise.
 237         * dis-buf.c: Likewise.
 238         * dlx-dis.c: Likewise.
 239         * h8300-dis.c: Likewise.
 240         * h8500-dis.c: Likewise.
 241         * hppa-dis.c: Likewise.
 242         * i370-dis.c: Likewise.
 243         * i370-opc.c: Likewise.
 244         * m10200-dis.c: Likewise.
 245         * m10300-dis.c: Likewise.
 246         * m68k-dis.c: Likewise.
 247         * m88k-dis.c: Likewise.
 248         * mips-dis.c: Likewise.
 249         * mmix-dis.c: Likewise.
 250         * msp430-dis.c: Likewise.
 251         * ns32k-dis.c: Likewise.
 252         * or32-dis.c: Likewise.
 253         * or32-opc.c: Likewise.
 254         * pdp11-dis.c: Likewise.
 255         * pj-dis.c: Likewise.
 256         * s390-dis.c: Likewise.
 257         * sh-dis.c: Likewise.
 258         * sh64-dis.c: Likewise.
 259         * sparc-dis.c: Likewise.
 260         * sparc-opc.c: Likewise.
 261         * sysdep.h: Likewise.
 262         * tic30-dis.c: Likewise.
 263         * tic4x-dis.c: Likewise.
 264         * tic80-dis.c: Likewise.
 265         * v850-dis.c: Likewise.
 266         * v850-opc.c: Likewise.
 267         * vax-dis.c: Likewise.
 268         * w65-dis.c: Likewise.
 269         * z8kgen.c: Likewise.
 270
 271         * fr30-*: Regenerate.
 272         * frv-*: Regenerate.
 273         * ip2k-*: Regenerate.
 274         * iq2000-*: Regenerate.
 275         * m32r-*: Regenerate.
 276         * ms1-*: Regenerate.
 277         * openrisc-*: Regenerate.
 278         * xstormy16-*: Regenerate.
 279
 280 2005-06-23  Ben Elliston  <bje@gnu.org>
 281
 282         * m68k-dis.c: Use ISC C90.
 283         * m68k-opc.c: Formatting fixes.
 284
 285 2005-06-16  David Ung  <davidu@mips.com>
 286
 287         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 288         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 289
 290 2005-06-15  Dave Brolley  <brolley@redhat.com>
 291
 292         Contribute Morpho ms1 on behalf of Red Hat
 293         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 294         ms1-opc.h: New files, Morpho ms1 target.
 295
 296         2004-05-14  Stan Cox  <scox@redhat.com>
 297
 298         * disassemble.c (ARCH_ms1): Define.
 299         (disassembler): Handle bfd_arch_ms1
 300
 301         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 302
 303         * Makefile.am, Makefile.in: Add ms1 target.
 304         * configure.in: Ditto.
 305
 306 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 307
 308         * arm-opc.h: Delete; fold contents into ...
 309         * arm-dis.c: ... here.  Move includes of internal COFF headers
 310         next to includes of internal ELF headers.
 311         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 312         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 313         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 314         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 315         (iwmmxt_wwnames, iwmmxt_wwssnames):
 316         Make const.
 317         (regnames): Remove iWMMXt coprocessor register sets.
 318         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 319         (get_arm_regnames): Adjust fourth argument to match above changes.
 320         (set_iwmmxt_regnames): Delete.
 321         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 322         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 323         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 324         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 325         ISO syntax for function pointer calls.
 326
 327 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 328
 329         * arm-dis.c: Split up the comments describing the format codes, so
 330         that the ARM and 16-bit Thumb opcode tables each have comments
 331         preceding them that describe all the codes, and only the codes,
 332         valid in those tables.  (32-bit Thumb table is already like this.)
 333         Reorder the lists in all three comments to match the order in
 334         which the codes are implemented.
 335         Remove all forward declarations of static functions.  Convert all
 336         function definitions to ISO C format.
 337         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 338         Return nothing.
 339         (print_insn_thumb16): Remove unused case 'I'.
 340         (print_insn): Update for changed calling convention of subroutines.
 341
 342 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 343
 344         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 345         hex (but retain it being displayed as signed). Remove redundant
 346         checks. Add handling of displacements for 16-bit addressing in Intel
 347         mode.
 348
 349 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 350
 351         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 352         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 353         masking of 'rm' in 16-bit memory address handling.
 354
 355 2005-05-19  Anton Blanchard  <anton@samba.org>
 356
 357         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 358         (print_ppc_disassembler_options): Document it.
 359         * ppc-opc.c (SVC_LEV): Define.
 360         (LEV): Allow optional operand.
 361         (POWER5): Define.
 362         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 363         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 364
 365 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 366
 367         * Makefile.in:  Regenerate.
 368
 369 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 370
 371         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 372         instructions.  Adjust disassembly of some opcodes to match
 373         unified syntax.
 374         (thumb32_opcodes): New table.
 375         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 376         two-halfword branches here.
 377         (print_insn_thumb32): New function.
 378         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 379         and print_insn_thumb32.  Be consistent about order of
 380         halfwords when printing 32-bit instructions.
 381
 382 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 383
 384         PR 843
 385         * i386-dis.c (branch_v_mode): New.
 386         (indirEv): Use branch_v_mode instead of v_mode.
 387         (OP_E): Handle branch_v_mode.
 388
 389 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 390
 391         * d10v-dis.c (dis_2_short): Support 64bit host.
 392
 393 2005-05-07  Nick Clifton  <nickc@redhat.com>
 394
 395         * po/nl.po: Updated translation.
 396
 397 2005-05-07  Nick Clifton  <nickc@redhat.com>
 398
 399         * Update the address and phone number of the FSF organization in
 400         the GPL notices in the following files:
 401         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 402         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 403         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 404         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 405         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 406         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 407         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 408         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 409         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 410         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 411         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 412         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 413         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 414         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 415         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 416         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 417         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 418         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 419         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 420         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 421         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 422         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 423         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 424         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 425         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 426         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 427         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 428         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 429         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 430         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 431         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 432         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 433         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 434
 435 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 436
 437         * ia64-opc.c: Include sysdep.h before libiberty.h.
 438
 439 2005-05-05  Nick Clifton  <nickc@redhat.com>
 440
 441         * configure.in (ALL_LINGUAS): Add vi.
 442         * configure: Regenerate.
 443         * po/vi.po: New.
 444
 445 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 446
 447         * configure.in: Fix the check for basename declaration.
 448         * configure: Regenerate.
 449
 450 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 451
 452         * ppc-opc.c (RTO): Define.
 453         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 454         entries to suit PPC440.
 455
 456 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 457
 458         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 459         Add xcrypt-ctr.
 460
 461 2005-04-14  Nick Clifton  <nickc@redhat.com>
 462
 463         * po/fi.po: New translation: Finnish.
 464         * configure.in (ALL_LINGUAS): Add fi.
 465         * configure: Regenerate.
 466
 467 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 468
 469         * Makefile.am (NO_WERROR): Define.
 470         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 471         * Makefile.in: Regenerate.
 472         * aclocal.m4: Regenerate.
 473         * configure: Regenerate.
 474
 475 2005-04-04  Nick Clifton  <nickc@redhat.com>
 476
 477         * fr30-asm.c: Regenerate.
 478         * frv-asm.c: Regenerate.
 479         * iq2000-asm.c: Regenerate.
 480         * m32r-asm.c: Regenerate.
 481         * openrisc-asm.c: Regenerate.
 482
 483 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 484
 485         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 486         visible operands in Intel mode. The first operand of monitor is
 487         %rax in 64-bit mode.
 488
 489 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 490
 491         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 492         easier future additions.
 493
 494 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 495
 496         * configure.in: Check for basename.
 497         * configure: Regenerate.
 498         * config.in: Ditto.
 499
 500 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 501
 502         * i386-dis.c (SEG_Fixup): New.
 503         (Sv): New.
 504         (dis386): Use "Sv" for 0x8c and 0x8e.
 505
 506 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 507             Nick Clifton  <nickc@redhat.com>
 508
 509         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 510         function entry mask addresses.
 511         (entry_addr_occupied_slots): New variable: The number of occupied
 512         elements in entry_addr.
 513         (entry_addr_total_slots): New variable: The total number of
 514         elements in entry_addr.
 515         (parse_disassembler_options): New function.  Fills in the entry_addr
 516         array.
 517         (free_entry_array): New function.  Release the memory used by the
 518         entry addr array.  Suppressed because there is no way to call it.
 519         (is_function_entry): Check if a given address is a function's
 520         start address by looking at supplied entry mask addresses and
 521         symbol information, if available.
 522         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 523
 524 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 525
 526         * cris-dis.c (print_with_operands): Use ~31L for long instead
 527         of ~31.
 528
 529 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 530
 531         * mmix-opc.c (O): Revert the last change.
 532         (Z): Likewise.
 533
 534 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 535
 536         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 537         (Z): Likewise.
 538
 539 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 540
 541         * mmix-opc.c (O, Z): Force expression as unsigned long.
 542
 543 2005-03-18  Nick Clifton  <nickc@redhat.com>
 544
 545         * ip2k-asm.c: Regenerate.
 546         * op/opcodes.pot: Regenerate.
 547
 548 2005-03-16  Nick Clifton  <nickc@redhat.com>
 549             Ben Elliston  <bje@au.ibm.com>
 550
 551         * configure.in (werror): New switch: Add -Werror to the
 552         compiler command line.  Enabled by default.  Disable via
 553         --disable-werror.
 554         * configure: Regenerate.
 555
 556 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 557
 558         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 559         BOOKE.
 560
 561 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 562
 563         * po/es.po: Commit new Spanish translation.
 564
 565         * po/fr.po: Commit new French translation.
 566
 567 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 568
 569         * vax-dis.c: Fix spelling error
 570         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 571         of just "Entry mask: < r1 ... >"
 572
 573 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 574
 575         * arm-dis.c (arm_opcodes): Document %E and %V.
 576         Add entries for v6T2 ARM instructions:
 577         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 578         (print_insn_arm): Add support for %E and %V.
 579         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 580
 581 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 582             Alan Modra  <amodra@bigpond.net.au>
 583
 584         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 585         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 586         (SPRG_MASK): Delete.
 587         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 588         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 589         mfsprg4..7 after msprg and consolidate.
 590
 591 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 592
 593         * vax-dis.c (entry_mask_bit): New array.
 594         (print_insn_vax): Decode function entry mask.
 595
 596 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 597
 598         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 599
 600 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 601
 602         * po/opcodes.pot: Regenerate.
 603
 604 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 605
 606         * arc-dis.c (a4_decoding_class): New enum.
 607         (dsmOneArcInst): Use the enum values for the decoding class.
 608         Remove redundant case in the switch for decodingClass value 11.
 609
 610 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 611
 612         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 613         accesses.
 614         (OP_C): Consider lock prefix in non-64-bit modes.
 615
 616 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 617
 618         * cris-dis.c (format_hex): Remove ineffective warning fix.
 619         * crx-dis.c (make_instruction): Warning fix.
 620         * frv-asm.c: Regenerate.
 621
 622 2005-02-23  Nick Clifton  <nickc@redhat.com>
 623
 624         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 625         read_memory.
 626
 627         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 628
 629         * crx-dis.c (make_instruction): Move argument structure into inner
 630         scope and ensure that all of its fields are initialised before
 631         they are used.
 632
 633         * fr30-asm.c: Regenerate.
 634         * fr30-dis.c: Regenerate.
 635         * frv-asm.c: Regenerate.
 636         * frv-dis.c: Regenerate.
 637         * ip2k-asm.c: Regenerate.
 638         * ip2k-dis.c: Regenerate.
 639         * iq2000-asm.c: Regenerate.
 640         * iq2000-dis.c: Regenerate.
 641         * m32r-asm.c: Regenerate.
 642         * m32r-dis.c: Regenerate.
 643         * openrisc-asm.c: Regenerate.
 644         * openrisc-dis.c: Regenerate.
 645         * xstormy16-asm.c: Regenerate.
 646         * xstormy16-dis.c: Regenerate.
 647
 648 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 649
 650         * arc-ext.c: Warning fixes.
 651         * arc-ext.h: Likewise.
 652         * cgen-opc.c: Likewise.
 653         * ia64-gen.c: Likewise.
 654         * maxq-dis.c: Likewise.
 655         * ns32k-dis.c: Likewise.
 656         * w65-dis.c: Likewise.
 657         * ia64-asmtab.c: Regenerate.
 658
 659 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 660
 661         * fr30-desc.c: Regenerate.
 662         * fr30-desc.h: Regenerate.
 663         * fr30-opc.c: Regenerate.
 664         * fr30-opc.h: Regenerate.
 665         * frv-desc.c: Regenerate.
 666         * frv-desc.h: Regenerate.
 667         * frv-opc.c: Regenerate.
 668         * frv-opc.h: Regenerate.
 669         * ip2k-desc.c: Regenerate.
 670         * ip2k-desc.h: Regenerate.
 671         * ip2k-opc.c: Regenerate.
 672         * ip2k-opc.h: Regenerate.
 673         * iq2000-desc.c: Regenerate.
 674         * iq2000-desc.h: Regenerate.
 675         * iq2000-opc.c: Regenerate.
 676         * iq2000-opc.h: Regenerate.
 677         * m32r-desc.c: Regenerate.
 678         * m32r-desc.h: Regenerate.
 679         * m32r-opc.c: Regenerate.
 680         * m32r-opc.h: Regenerate.
 681         * m32r-opinst.c: Regenerate.
 682         * openrisc-desc.c: Regenerate.
 683         * openrisc-desc.h: Regenerate.
 684         * openrisc-opc.c: Regenerate.
 685         * openrisc-opc.h: Regenerate.
 686         * xstormy16-desc.c: Regenerate.
 687         * xstormy16-desc.h: Regenerate.
 688         * xstormy16-opc.c: Regenerate.
 689         * xstormy16-opc.h: Regenerate.
 690
 691 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 692
 693         * Makefile.am: Run "make dep-am"
 694         * Makefile.in: Regenerate.
 695
 696 2005-02-15  Nick Clifton  <nickc@redhat.com>
 697
 698         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 699         compile time warnings.
 700         (print_keyword): Likewise.
 701         (default_print_insn): Likewise.
 702
 703         * fr30-desc.c: Regenerated.
 704         * fr30-desc.h: Regenerated.
 705         * fr30-dis.c: Regenerated.
 706         * fr30-opc.c: Regenerated.
 707         * fr30-opc.h: Regenerated.
 708         * frv-desc.c: Regenerated.
 709         * frv-dis.c: Regenerated.
 710         * frv-opc.c: Regenerated.
 711         * ip2k-asm.c: Regenerated.
 712         * ip2k-desc.c: Regenerated.
 713         * ip2k-desc.h: Regenerated.
 714         * ip2k-dis.c: Regenerated.
 715         * ip2k-opc.c: Regenerated.
 716         * ip2k-opc.h: Regenerated.
 717         * iq2000-desc.c: Regenerated.
 718         * iq2000-dis.c: Regenerated.
 719         * iq2000-opc.c: Regenerated.
 720         * m32r-asm.c: Regenerated.
 721         * m32r-desc.c: Regenerated.
 722         * m32r-desc.h: Regenerated.
 723         * m32r-dis.c: Regenerated.
 724         * m32r-opc.c: Regenerated.
 725         * m32r-opc.h: Regenerated.
 726         * m32r-opinst.c: Regenerated.
 727         * openrisc-desc.c: Regenerated.
 728         * openrisc-desc.h: Regenerated.
 729         * openrisc-dis.c: Regenerated.
 730         * openrisc-opc.c: Regenerated.
 731         * openrisc-opc.h: Regenerated.
 732         * xstormy16-desc.c: Regenerated.
 733         * xstormy16-desc.h: Regenerated.
 734         * xstormy16-dis.c: Regenerated.
 735         * xstormy16-opc.c: Regenerated.
 736         * xstormy16-opc.h: Regenerated.
 737
 738 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 739
 740         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 741         address.
 742
 743 2005-02-11  Nick Clifton  <nickc@redhat.com>
 744
 745         * iq2000-asm.c: Regenerate.
 746
 747         * frv-dis.c: Regenerate.
 748
 749 2005-02-07  Jim Blandy  <jimb@redhat.com>
 750
 751         * Makefile.am (CGEN): Load guile.scm before calling the main
 752         application script.
 753         * Makefile.in: Regenerated.
 754         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 755         Simply pass the cgen-opc.scm path to ${cgen} as its first
 756         argument; ${cgen} itself now contains the '-s', or whatever is
 757         appropriate for the Scheme being used.
 758
 759 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 760
 761         * configure: Regenerate to track ../gettext.m4.
 762
 763 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 764
 765         * ia64-gen.c (NELEMS): Define.
 766         (shrink): Generate alias with missing second predicate register when
 767         opcode has two outputs and these are both predicates.
 768         * ia64-opc-i.c (FULL17): Define.
 769         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 770         here to generate output template.
 771         (TBITCM, TNATCM): Undefine after use.
 772         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 773         first input. Add ld16 aliases without ar.csd as second output. Add
 774         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 775         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 776         ar.ccv as third/fourth inputs. Consolidate through...
 777         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 778         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 779         * ia64-asmtab.c: Regenerate.
 780
 781 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 782
 783         * configure: Regenerate to track ../gettext.m4 change.
 784
 785 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 786
 787         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 788         * frv-asm.c: Rebuilt.
 789         * frv-desc.c: Rebuilt.
 790         * frv-desc.h: Rebuilt.
 791         * frv-dis.c: Rebuilt.
 792         * frv-ibld.c: Rebuilt.
 793         * frv-opc.c: Rebuilt.
 794         * frv-opc.h: Rebuilt.
 795
 796 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 797
 798         * configure: Regenerate, ../gettext.m4 was updated.
 799
 800 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 801
 802         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 803         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 804         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 805         * mips-dis.c: Ditto.
 806
 807 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 808
 809         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 810
 811 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 812
 813         * mips-dis.c (no_aliases): New disassembly option flag.
 814         (set_default_mips_dis_options): Init no_aliases to zero.
 815         (parse_mips_dis_option): Handle no-aliases option.
 816         (print_insn_mips): Ignore table entries that are aliases
 817         if no_aliases is set.
 818         (print_insn_mips16): Ditto.
 819         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 820         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 821         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 822         * mips16-opc.c (mips16_opcodes): Ditto.
 823
 824 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 825
 826         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 827         (inheritance diagram): Add missing edge.
 828         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 829         easier for the testsuite.
 830         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 831         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 832         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 833         arch_sh2a_or_sh4_up child.
 834         (sh_table): Do renaming as above.
 835         Correct comment for ldc.l for gas testsuite to read.
 836         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 837         Correct comments for movy.w and movy.l for gas testsuite to read.
 838         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 839
 840 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 841
 842         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 843
 844 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 845
 846         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 847
 848 2005-01-10  Andreas Schwab  <schwab@suse.de>
 849
 850         * disassemble.c (disassemble_init_for_target) <case
 851         bfd_arch_ia64>: Set skip_zeroes to 16.
 852         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 853
 854 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 855
 856         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 857
 858 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 859
 860         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 861         memory references. Convert avr_operand() to C90 formatting.
 862
 863 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 864
 865         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 866
 867 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 868
 869         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 870         (no_op_insn): Initialize array with instructions that have no
 871         operands.
 872         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 873
 874 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 875
 876         * arm-dis.c: Correct top-level comment.
 877
 878 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 879
 880         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 881         architecuture defining the insn.
 882         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 883         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 884         field.
 885         Also include opcode/arm.h.
 886         * Makefile.am (arm-dis.lo): Update dependency list.
 887         * Makefile.in: Regenerate.
 888
 889 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 890
 891         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 892         reflect the change to the short immediate syntax.
 893
 894 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 895
 896         * or32-opc.c (debug): Warning fix.
 897         * po/POTFILES.in: Regenerate.
 898
 899         * maxq-dis.c: Formatting.
 900         (print_insn): Warning fix.
 901
 902 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 903
 904         * arm-dis.c (WORD_ADDRESS): Define.
 905         (print_insn): Use it.  Correct big-endian end-of-section handling.
 906
 907 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 908             Vineet Sharma      <vineets@noida.hcltech.com>
 909
 910         * maxq-dis.c: New file.
 911         * disassemble.c (ARCH_maxq): Define.
 912         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 913         instructions..
 914         * configure.in: Add case for bfd_maxq_arch.
 915         * configure: Regenerate.
 916         * Makefile.am: Add support for maxq-dis.c
 917         * Makefile.in: Regenerate.
 918         * aclocal.m4: Regenerate.
 919
 920 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 921
 922         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 923         mode.
 924         * crx-dis.c: Likewise.
 925
 926 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 927
 928         Generally, handle CRISv32.
 929         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 930         (struct cris_disasm_data): New type.
 931         (format_reg, format_hex, cris_constraint, print_flags)
 932         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 933         callers changed.
 934         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 935         (print_insn_crisv32_without_register_prefix)
 936         (print_insn_crisv10_v32_with_register_prefix)
 937         (print_insn_crisv10_v32_without_register_prefix)
 938         (cris_parse_disassembler_options): New functions.
 939         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 940         parameter.  All callers changed.
 941         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 942         failure.
 943         (cris_constraint) <case 'Y', 'U'>: New cases.
 944         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 945         for constraint 'n'.
 946         (print_with_operands) <case 'Y'>: New case.
 947         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 948         <case 'N', 'Y', 'Q'>: New cases.
 949         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 950         (print_insn_cris_with_register_prefix)
 951         (print_insn_cris_without_register_prefix): Call
 952         cris_parse_disassembler_options.
 953         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 954         for CRISv32 and the size of immediate operands.  New v32-only
 955         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 956         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 957         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 958         Change brp to be v3..v10.
 959         (cris_support_regs): New vector.
 960         (cris_opcodes): Update head comment.  New format characters '[',
 961         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 962         Add new opcodes for v32 and adjust existing opcodes to accommodate
 963         differences to earlier variants.
 964         (cris_cond15s): New vector.
 965
 966 2004-11-04 Jan Beulich <jbeulich@novell.com>
 967
 968         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 969         (indirEb): Remove.
 970         (Mp): Use f_mode rather than none at all.
 971         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 972         replaces what previously was x_mode; x_mode now means 128-bit SSE
 973         operands.
 974         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 975         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 976         pinsrw's second operand is Edqw.
 977         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 978         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 979         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 980         mode when an operand size override is present or always suffixing.
 981         More instructions will need to be added to this group.
 982         (putop): Handle new macro chars 'C' (short/long suffix selector),
 983         'I' (Intel mode override for following macro char), and 'J' (for
 984         adding the 'l' prefix to far branches in AT&T mode). When an
 985         alternative was specified in the template, honor macro character when
 986         specified for Intel mode.
 987         (OP_E): Handle new *_mode values. Correct pointer specifications for
 988         memory operands. Consolidate output of index register.
 989         (OP_G): Handle new *_mode values.
 990         (OP_I): Handle const_1_mode.
 991         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 992         respective opcode prefix bits have been consumed.
 993         (OP_EM, OP_EX): Provide some default handling for generating pointer
 994         specifications.
 995
 996 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 997
 998         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 999         COP_INST macro.
1000
1001 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
1002
1003         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1004         (getregliststring): Support HI/LO and user registers.
1005         * crx-opc.c (crx_instruction): Update data structure according to the
1006         rearrangement done in CRX opcode header file.
1007         (crx_regtab):  Likewise.
1008         (crx_optab):  Likewise.
1009         (crx_instruction): Reorder load/stor instructions, remove unsupported
1010         formats.
1011         support new Co-Processor instruction 'cpi'.
1012
1013 2004-10-27  Nick Clifton  <nickc@redhat.com>
1014
1015         * opcodes/iq2000-asm.c: Regenerate.
1016         * opcodes/iq2000-desc.c: Regenerate.
1017         * opcodes/iq2000-desc.h: Regenerate.
1018         * opcodes/iq2000-dis.c: Regenerate.
1019         * opcodes/iq2000-ibld.c: Regenerate.
1020         * opcodes/iq2000-opc.c: Regenerate.
1021         * opcodes/iq2000-opc.h: Regenerate.
1022
1023 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
1024
1025         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1026         us4, us5 (respectively).
1027         Remove unsupported 'popa' instruction.
1028         Reverse operands order in store co-processor instructions.
1029
1030 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
1031
1032         * Makefile.am: Run "make dep-am"
1033         * Makefile.in: Regenerate.
1034
1035 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
1036
1037         * xtensa-dis.c: Use ISO C90 formatting.
1038
1039 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
1040
1041         * ppc-opc.c: Revert 2004-09-09 change.
1042
1043 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
1044
1045         * xtensa-dis.c (state_names): Delete.
1046         (fetch_data): Use xtensa_isa_maxlength.
1047         (print_xtensa_operand): Replace operand parameter with opcode/operand
1048         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
1049         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
1050         instruction bundles.  Use xmalloc instead of malloc.
1051
1052 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
1053
1054         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1055         initializers.
1056
1057 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
1058
1059         * crx-opc.c (crx_instruction): Support Co-processor insns.
1060         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1061         (getregliststring): Change function to use the above enum.
1062         (print_arg): Handle CO-Processor insns.
1063         (crx_cinvs): Add 'b' option to invalidate the branch-target
1064         cache.
1065
1066 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
1067
1068         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1069         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1070         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1071         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1072         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1073
1074 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
1075
1076         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1077         rather than add it.
1078
1079 2004-09-30  Paul Brook  <paul@codesourcery.com>
1080
1081         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1082         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
1083
1084 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
1085
1086         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1087         (CONFIG_STATUS_DEPENDENCIES): New.
1088         (Makefile): Removed.
1089         (config.status): Likewise.
1090         * Makefile.in: Regenerated.
1091
1092 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
1093
1094         * Makefile.am: Run "make dep-am".
1095         * Makefile.in: Regenerate.
1096         * aclocal.m4: Regenerate.
1097         * configure: Regenerate.
1098         * po/POTFILES.in: Regenerate.
1099         * po/opcodes.pot: Regenerate.
1100
1101 2004-09-11  Andreas Schwab  <schwab@suse.de>
1102
1103         * configure: Rebuild.
1104
1105 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
1106
1107         * ppc-opc.c (L): Make this field not optional.
1108
1109 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
1110
1111         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1112         Fix parameter to 'm[t|f]csr' insns.
1113
1114 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
1115
1116         * configure.in: Autoupdate to autoconf 2.59.
1117         * aclocal.m4: Rebuild with aclocal 1.4p6.
1118         * configure: Rebuild with autoconf 2.59.
1119         * Makefile.in: Rebuild with automake 1.4p6 (picking up
1120         bfd changes for autoconf 2.59 on the way).
1121         * config.in: Rebuild with autoheader 2.59.
1122
1123 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
1124
1125         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1126
1127 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
1128
1129         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1130         (GRPPADLCK2): New define.
1131         (twobyte_has_modrm): True for 0xA6.
1132         (grps): GRPPADLCK2 for opcode 0xA6.
1133
1134 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
1135
1136         Introduce SH2a support.
1137         * sh-opc.h (arch_sh2a_base): Renumber.
1138         (arch_sh2a_nofpu_base): Remove.
1139         (arch_sh_base_mask): Adjust.
1140         (arch_opann_mask): New.
1141         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1142         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1143         (sh_table): Adjust whitespace.
1144         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1145         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1146         instruction list throughout.
1147         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1148         of arch_sh2a in instruction list throughout.
1149         (arch_sh2e_up): Accomodate above changes.
1150         (arch_sh2_up): Ditto.
1151         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1152         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1153         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1154         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1155         * sh-opc.h (arch_sh2a_nofpu): New.
1156         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1157         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1158         instruction.
1159         2004-01-20  DJ Delorie  <dj@redhat.com>
1160         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1161         2003-12-29  DJ Delorie  <dj@redhat.com>
1162         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1163         sh_opcode_info, sh_table): Add sh2a support.
1164         (arch_op32): New, to tag 32-bit opcodes.
1165         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1166         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1167         * sh-opc.h (arch_sh2a): Add.
1168         * sh-dis.c (arch_sh2a): Handle.
1169         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1170
1171 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1172
1173         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1174
1175 2004-07-22  Nick Clifton  <nickc@redhat.com>
1176
1177         PR/280
1178         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1179         insns - this is done by objdump itself.
1180         * h8500-dis.c (print_insn_h8500): Likewise.
1181
1182 2004-07-21  Jan Beulich <jbeulich@novell.com>
1183
1184         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1185         regardless of address size prefix in effect.
1186         (ptr_reg): Size or address registers does not depend on rex64, but
1187         on the presence of an address size override.
1188         (OP_MMX): Use rex.x only for xmm registers.
1189         (OP_EM): Use rex.z only for xmm registers.
1190
1191 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1192
1193         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1194         move/branch operations to the bottom so that VR5400 multimedia
1195         instructions take precedence in disassembly.
1196
1197 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1198
1199         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1200         ISA-specific "break" encoding.
1201
1202 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1203
1204         * arm-opc.h: Fix typo in comment.
1205
1206 2004-07-11  Andreas Schwab  <schwab@suse.de>
1207
1208         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1209
1210 2004-07-09  Andreas Schwab  <schwab@suse.de>
1211
1212         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1213
1214 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1215
1216         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1217         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1218         (crx-dis.lo): New target.
1219         (crx-opc.lo): Likewise.
1220         * Makefile.in: Regenerate.
1221         * configure.in: Handle bfd_crx_arch.
1222         * configure: Regenerate.
1223         * crx-dis.c: New file.
1224         * crx-opc.c: New file.
1225         * disassemble.c (ARCH_crx): Define.
1226         (disassembler): Handle ARCH_crx.
1227
1228 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1229
1230         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1231         * ia64-asmtab.c: Regnerate.
1232
1233 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1234
1235         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1236         (extract_fxm): Don't test dialect.
1237         (XFXFXM_MASK): Include the power4 bit.
1238         (XFXM): Add p4 param.
1239         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1240
1241 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1242
1243         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1244         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1245
1246 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1247
1248         * ppc-opc.c (BH, XLBH_MASK): Define.
1249         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1250
1251 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1252
1253         * i386-dis.c (x_mode): Comment.
1254         (two_source_ops): File scope.
1255         (float_mem): Correct fisttpll and fistpll.
1256         (float_mem_mode): New table.
1257         (dofloat): Use it.
1258         (OP_E): Correct intel mode PTR output.
1259         (ptr_reg): Use open_char and close_char.
1260         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1261         operands.  Set two_source_ops.
1262
1263 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1264
1265         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1266         instead of _raw_size.
1267
1268 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1269
1270         * ia64-gen.c (in_iclass): Handle more postinc st
1271         and ld variants.
1272         * ia64-asmtab.c: Rebuilt.
1273
1274 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1275
1276         * s390-opc.txt: Correct architecture mask for some opcodes.
1277         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1278         in the esa mode as well.
1279
1280 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1281
1282         * sh-dis.c (target_arch): Make unsigned.
1283         (print_insn_sh): Replace (most of) switch with a call to
1284         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1285         * sh-opc.h: Redefine architecture flags values.
1286         Add sh3-nommu architecture.
1287         Reorganise <arch>_up macros so they make more visual sense.
1288         (SH_MERGE_ARCH_SET): Define new macro.
1289         (SH_VALID_BASE_ARCH_SET): Likewise.
1290         (SH_VALID_MMU_ARCH_SET): Likewise.
1291         (SH_VALID_CO_ARCH_SET): Likewise.
1292         (SH_VALID_ARCH_SET): Likewise.
1293         (SH_MERGE_ARCH_SET_VALID): Likewise.
1294         (SH_ARCH_SET_HAS_FPU): Likewise.
1295         (SH_ARCH_SET_HAS_DSP): Likewise.
1296         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1297         (sh_get_arch_from_bfd_mach): Add prototype.
1298         (sh_get_arch_up_from_bfd_mach): Likewise.
1299         (sh_get_bfd_mach_from_arch_set): Likewise.
1300         (sh_merge_bfd_arc): Likewise.
1301
1302 2004-05-24  Peter Barada  <peter@the-baradas.com>
1303
1304         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1305         into new match_insn_m68k function.  Loop over canidate
1306         matches and select first that completely matches.
1307         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1308         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1309         to verify addressing for MAC/EMAC.
1310         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1311         reigster halves since 'fpu' and 'spl' look misleading.
1312         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1313         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1314         first, tighten up match masks.
1315         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1316         'size' from special case code in print_insn_m68k to
1317         determine decode size of insns.
1318
1319 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1320
1321         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1322         well as when -mpower4.
1323
1324 2004-05-13  Nick Clifton  <nickc@redhat.com>
1325
1326         * po/fr.po: Updated French translation.
1327
1328 2004-05-05  Peter Barada  <peter@the-baradas.com>
1329
1330         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1331         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1332         * m68k-op.c: Switch from ColdFire chips to core variants.
1333
1334 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1335
1336         PR 147.
1337         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1338
1339 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1340
1341         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1342         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1343
1344 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1345
1346         * sh-dis.c (print_insn_sh): Print the value in constant pool
1347         as a symbol if it looks like a symbol.
1348
1349 2004-04-22  Peter Barada <peter@the-baradas.com>
1350
1351         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1352         appropriate ColdFire architectures.
1353         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1354         mask addressing.
1355         Add EMAC instructions, fix MAC instructions. Remove
1356         macmw/macml/msacmw/msacml instructions since mask addressing now
1357         supported.
1358
1359 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1360
1361         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1362         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1363         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1364         macro.  Adjust all users.
1365
1366 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1367
1368         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1369         separately.
1370
1371 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1372
1373         * m32r-asm.c: Regenerate.
1374
1375 2004-03-29  Stan Shebs  <shebs@apple.com>
1376
1377         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1378         used.
1379
1380 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1381
1382         * aclocal.m4: Regenerate.
1383         * config.in: Regenerate.
1384         * configure: Regenerate.
1385         * po/POTFILES.in: Regenerate.
1386         * po/opcodes.pot: Regenerate.
1387
1388 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1389
1390         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1391         PPC_OPERANDS_GPR_0.
1392         * ppc-opc.c (RA0): Define.
1393         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1394         (RAOPT): Rename from RAO.  Update all uses.
1395         (powerpc_opcodes): Use RA0 as appropriate.
1396
1397 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1398
1399         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1400
1401 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1402
1403         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1404
1405 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1406
1407         * i386-dis.c (GRPPLOCK): Delete.
1408         (grps): Delete GRPPLOCK entry.
1409
1410 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1411
1412         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1413         (M, Mp): Use OP_M.
1414         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1415         (GRPPADLCK): Define.
1416         (dis386): Use NOP_Fixup on "nop".
1417         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1418         (twobyte_has_modrm): Set for 0xa7.
1419         (padlock_table): Delete.  Move to..
1420         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1421         and clflush.
1422         (print_insn): Revert PADLOCK_SPECIAL code.
1423         (OP_E): Delete sfence, lfence, mfence checks.
1424
1425 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1426
1427         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1428         (INVLPG_Fixup): New function.
1429         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1430
1431 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1432
1433         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1434         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1435         (padlock_table): New struct with PadLock instructions.
1436         (print_insn): Handle PADLOCK_SPECIAL.
1437
1438 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1439
1440         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1441         (OP_E): Twiddle clflush to sfence here.
1442
1443 2004-03-08  Nick Clifton  <nickc@redhat.com>
1444
1445         * po/de.po: Updated German translation.
1446
1447 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1448
1449         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1450         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1451         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1452         accordingly.
1453
1454 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1455
1456         * frv-asm.c: Regenerate.
1457         * frv-desc.c: Regenerate.
1458         * frv-desc.h: Regenerate.
1459         * frv-dis.c: Regenerate.
1460         * frv-ibld.c: Regenerate.
1461         * frv-opc.c: Regenerate.
1462         * frv-opc.h: Regenerate.
1463
1464 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1465
1466         * frv-desc.c, frv-opc.c: Regenerate.
1467
1468 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1469
1470         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1471
1472 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1473
1474         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1475         Also correct mistake in the comment.
1476
1477 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1478
1479         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1480         ensure that double registers have even numbers.
1481         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1482         that reserved instruction 0xfffd does not decode the same
1483         as 0xfdfd (ftrv).
1484         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1485         REG_N refers to a double register.
1486         Add REG_N_B01 nibble type and use it instead of REG_NM
1487         in ftrv.
1488         Adjust the bit patterns in a few comments.
1489
1490 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1491
1492         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1493
1494 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1495
1496         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1497
1498 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1499
1500         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1501
1502 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1503
1504         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1505         mtivor32, mtivor33, mtivor34.
1506
1507 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1508
1509         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1510
1511 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1512
1513         * arm-opc.h Maverick accumulator register opcode fixes.
1514
1515 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1516
1517         * m32r-dis.c: Regenerate.
1518
1519 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1520
1521         * sh-opc.h (sh_table): "fsrra", not "fssra".
1522
1523 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1524
1525         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1526         contraints.
1527
1528 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1529
1530         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1531
1532 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1533
1534         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1535         1.  Don't print scale factor on AT&T mode when index missing.
1536
1537 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1538
1539         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1540         when loaded into XR registers.
1541
1542 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1543
1544         * frv-desc.h: Regenerate.
1545         * frv-desc.c: Regenerate.
1546         * frv-opc.c: Regenerate.
1547
1548 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1549
1550         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1551
1552 2004-01-09  Paul Brook  <paul@codesourcery.com>
1553
1554         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1555         specific opcodes.
1556
1557 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1558
1559         * Makefile.am (libopcodes_la_DEPENDENCIES)
1560         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1561         comment about the problem.
1562         * Makefile.in: Regenerate.
1563
1564 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1565
1566         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1567         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1568         cut&paste errors in shifting/truncating numerical operands.
1569         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1570         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1571         (parse_uslo16): Likewise.
1572         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1573         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1574         (parse_s12): Likewise.
1575         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1576         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1577         (parse_uslo16): Likewise.
1578         (parse_uhi16): Parse gothi and gotfuncdeschi.
1579         (parse_d12): Parse got12 and gotfuncdesc12.
1580         (parse_s12): Likewise.
1581
1582 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1583
1584         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1585         instruction which looks similar to an 'rla' instruction.
1586
1587 For older changes see ChangeLog-0203
1588 \f
1589 Local Variables:
1590 mode: change-log
1591 left-margin: 8
1592 fill-column: 74
1593 version-control: never
1594 End: