opcodes/ChangeLog

   1 2008-11-06  Chao-ying Fu  <fu@mips.com>
   2
   3         * mips-opc.c (synciobdma, syncs, syncw, syncws): Move these
   4         before sync.
   5         (sync): New instruction with 5-bit sync type.
   6         * mips-dis.c (print_insn_args: Add case '1' to print 5-bit values.
   7
   8 2008-11-06  Nick Clifton  <nickc@redhat.com>
   9
  10         * avr-dis.c: Replace uses of sprintf without a format string with
  11         calls to strcpy.
  12
  13 2008-11-03  H.J. Lu  <hongjiu.lu@intel.com>
  14
  15         * i386-opc.tbl: Add cmovpe and cmovpo.
  16         * i386-tbl.h: Regenerated.
  17
  18 2008-10-22  Nick Clifton  <nickc@redhat.com>
  19
  20         PR 6937
  21         * configure.in (SHARED_LIBADD): Revert previous change.
  22         Add a comment explaining why.
  23         (SHARED_DEPENDENCIES): Revert previous change.
  24         * configure: Regenerate.
  25
  26 2008-10-10  Nick Clifton  <nickc@redhat.com>
  27
  28         PR 6937
  29         * configure.in (SHARED_LIBADD): Add libiberty.a.
  30         (SHARED_DEPENDENCIES): Add libiberty.a.
  31
  32 2008-09-30  H.J. Lu  <hongjiu.lu@intel.com>
  33
  34         * i386-gen.c: Include "hashtab.h".
  35         (next_field): Take a new argument, last.  Check last.
  36         (process_i386_cpu_flag): Updated.
  37         (process_i386_opcode_modifier): Likewise.
  38         (process_i386_operand_type): Likewise.
  39         (process_i386_registers): Likewise.
  40         (output_i386_opcode): New.
  41         (opcode_hash_entry): Likewise.
  42         (opcode_hash_table): Likewise.
  43         (opcode_hash_hash): Likewise.
  44         (opcode_hash_eq): Likewise.
  45         (process_i386_opcodes): Use opcode hash table and opcode array.
  46
  47 2008-09-30  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  48
  49         * s390-opc.txt (stdy, stey): Fix description
  50
  51 2008-09-30  Alan Modra  <amodra@bigpond.net.au>
  52
  53         * Makefile.am: Run "make dep-am".
  54         * Makefile.in: Regenerate.
  55
  56 2008-09-29  H.J. Lu  <hongjiu.lu@intel.com>
  57
  58         * aclocal.m4: Regenerated.
  59         * configure: Likewise.
  60         * Makefile.in: Likewise.
  61
  62 2008-09-29  Nick Clifton  <nickc@redhat.com>
  63
  64         * po/vi.po: Updated Vietnamese translation.
  65         * po/fr.po: Updated French translation.
  66
  67 2008-09-26  Florian Krohm  <fkrohm@us.ibm.com>
  68
  69         * s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
  70         (cfxr, cfdr, cfer, clclu): Add esa flag.
  71         (sqd): Instruction added.
  72         (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
  73         * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
  74
  75 2008-09-14  Arnold Metselaar  <arnold.metselaar@planet.nl>
  76
  77         * z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
  78         (tab_elt opc_ed): Add "ld r,a" and "ld r,a" instructions.
  79
  80 2008-09-11  H.J. Lu  <hongjiu.lu@intel.com>
  81
  82         * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
  83         * i386-tbl.h: Regenerated.
  84
  85 2008-08-28  Jan Beulich  <jbeulich@novell.com>
  86
  87         * i386-dis.c (dis386): Adjust far return mnemonics.
  88         * i386-opc.tbl: Add retf.
  89         * i386-tbl.h: Re-generate.
  90
  91 2008-08-28  Jan Beulich  <jbeulich@novell.com>
  92
  93         * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
  94
  95 2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>
  96
  97         * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
  98         * ia64-gen.c (lookup_specifier): Likewise.
  99
 100         * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
 101         * ia64-raw.tbl: Likewise.
 102         * ia64-waw.tbl: Likewise.
 103         * ia64-asmtab.c: Regenerated.
 104
 105 2008-08-27  H.J. Lu  <hongjiu.lu@intel.com>
 106
 107         * i386-opc.tbl: Correct fidivr operand size.
 108
 109         * i386-tbl.h: Regenerated.
 110
 111 2008-08-24  Alan Modra  <amodra@bigpond.net.au>
 112
 113         * configure.in: Update a number of obsolete autoconf macros.
 114         * aclocal.m4: Regenerate.
 115
 116 2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>
 117
 118         AVX Programming Reference (August, 2008)
 119         * i386-dis.c (PREFIX_VEX_38DB): New.
 120         (PREFIX_VEX_38DC): Likewise.
 121         (PREFIX_VEX_38DD): Likewise.
 122         (PREFIX_VEX_38DE): Likewise.
 123         (PREFIX_VEX_38DF): Likewise.
 124         (PREFIX_VEX_3ADF): Likewise.
 125         (VEX_LEN_38DB_P_2): Likewise.
 126         (VEX_LEN_38DC_P_2): Likewise.
 127         (VEX_LEN_38DD_P_2): Likewise.
 128         (VEX_LEN_38DE_P_2): Likewise.
 129         (VEX_LEN_38DF_P_2): Likewise.
 130         (VEX_LEN_3ADF_P_2): Likewise.
 131         (PREFIX_VEX_3A04): Updated.
 132         (VEX_LEN_3A06_P_2): Likewise.
 133         (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
 134         PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
 135         (x86_64_table): Likewise.
 136         (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
 137         VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
 138         VEX_LEN_3ADF_P_2.
 139
 140         * i386-opc.tbl: Add AES + AVX instructions.
 141         * i386-init.h: Regenerated.
 142         * i386-tbl.h: Likewise.
 143
 144 2008-08-15  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 145
 146         * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
 147         * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
 148
 149 2008-08-15  Alan Modra  <amodra@bigpond.net.au>
 150
 151         PR 6526
 152         * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
 153         * Makefile.in: Regenerate.
 154         * aclocal.m4: Regenerate.
 155         * config.in: Regenerate.
 156         * configure: Regenerate.
 157
 158 2008-08-14  Sebastian Huber  <sebastian.huber@embedded-brains.de>
 159
 160         PR 6825
 161         * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
 162
 163 2008-08-12  H.J. Lu  <hongjiu.lu@intel.com>
 164
 165         * i386-opc.tbl: Add syscall and sysret for Cpu64.
 166
 167         * i386-tbl.h: Regenerated.
 168
 169 2008-08-04  Alan Modra  <amodra@bigpond.net.au>
 170
 171         * Makefile.am (POTFILES.in): Set LC_ALL=C.
 172         * Makefile.in: Regenerate.
 173         * po/POTFILES.in: Regenerate.
 174
 175 2008-08-01  Peter Bergner  <bergner@vnet.ibm.com>
 176
 177         * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
 178         (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
 179         (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
 180         * ppc-opc.c (insert_xt6): New static function.
 181         (extract_xt6): Likewise.
 182         (insert_xa6): Likewise.
 183         (extract_xa6: Likewise.
 184         (insert_xb6): Likewise.
 185         (extract_xb6): Likewise.
 186         (insert_xb6s): Likewise.
 187         (extract_xb6s): Likewise.
 188         (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
 189         XX3DM_MASK, PPCVSX): New.
 190         (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
 191         "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
 192
 193 2008-08-01  Pedro Alves  <pedro@codesourcery.com>
 194
 195         * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
 196         * Makefile.in: Regenerate.
 197
 198 2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>
 199
 200         * i386-reg.tbl: Use Dw2Inval on AVX registers.
 201         * i386-tbl.h: Regenerated.
 202
 203 2008-07-30  Michael J. Eager  <eager@eagercon.com>
 204
 205         * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
 206         * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
 207         (insert_sprg, PPC405): Use PPC_OPCODE_405.
 208         (powerpc_opcodes): Add Xilinx APU related opcodes.
 209
 210 2008-07-30  Alan Modra  <amodra@bigpond.net.au>
 211
 212         * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
 213
 214 2008-07-10  Richard Sandiford  <rdsandiford@googlemail.com>
 215
 216         * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
 217
 218 2008-07-07  Adam Nemet  <anemet@caviumnetworks.com>
 219
 220         * mips-opc.c (CP): New macro.
 221         (mips_builtin_opcodes): Mark c0, c2 and c3 as CP.  Add Octeon to the
 222         membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0.  Add dmfc2 and
 223         dmtc2 Octeon instructions.
 224
 225 2008-07-07  Stan Shebs  <stan@codesourcery.com>
 226
 227         * dis-init.c (init_disassemble_info): Init endian_code field.
 228         * arm-dis.c (print_insn): Disassemble code according to
 229         setting of endian_code.
 230         (print_insn_big_arm): Detect when BE8 extension flag has been set.
 231
 232 2008-06-30  Richard Sandiford  <rdsandiford@googlemail.com>
 233
 234         * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
 235         for ELF symbols.
 236
 237 2008-06-25  Peter Bergner  <bergner@vnet.ibm.com>
 238
 239         * ppc-dis.c (powerpc_init_dialect): Handle -M464.
 240         (print_ppc_disassembler_options): Likewise.
 241         * ppc-opc.c (PPC464): Define.
 242         (powerpc_opcodes): Add mfdcrux and mtdcrux.
 243
 244 2008-06-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 245
 246         * configure: Regenerate.
 247
 248 2008-06-13  Peter Bergner  <bergner@vnet.ibm.com>
 249
 250         * ppc-dis.c (print_insn_powerpc): Update prototye to use new
 251         ppc_cpu_t typedef.
 252         (struct dis_private): New.
 253         (POWERPC_DIALECT): New define.
 254         (powerpc_dialect): Renamed to...
 255         (powerpc_init_dialect): This.  Update to use ppc_cpu_t and
 256         struct dis_private.
 257         (print_insn_big_powerpc): Update for using structure in
 258         info->private_data.
 259         (print_insn_little_powerpc): Likewise.
 260         (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
 261         (skip_optional_operands): Likewise.
 262         (print_insn_powerpc): Likewise.  Remove initialization of dialect.
 263         * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
 264         extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
 265         extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
 266         extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
 267         insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
 268         insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
 269         insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
 270         param to be of type ppc_cpu_t.  Update prototype.
 271
 272 2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
 273
 274         * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
 275         +s, +S.
 276         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
 277         baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
 278         syncw, syncws, vm3mulu, vm0 and vmulu.
 279
 280         * mips-dis.c (print_insn_args): Handle field descriptor +Q.
 281         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
 282         seqi, sne and snei.
 283
 284 2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>
 285
 286         * i386-opc.tbl: Add vmovd with 64bit operand.
 287         * i386-tbl.h: Regenerated.
 288
 289 2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 290
 291         * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
 292
 293 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 294
 295         * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
 296         * i386-tbl.h: Regenerated.
 297
 298 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 299
 300         PR gas/6517
 301         * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
 302         into 32bit and 64bit.  Remove Reg64|Qword and add
 303         IgnoreSize|No_qSuf on 32bit version.
 304         * i386-tbl.h: Regenerated.
 305
 306 2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
 307
 308         * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
 309         * i386-tbl.h: Regenerated.
 310
 311 2008-05-21  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 312
 313         * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
 314
 315 2008-05-14  Alan Modra  <amodra@bigpond.net.au>
 316
 317         * Makefile.am: Run "make dep-am".
 318         * Makefile.in: Regenerate.
 319
 320 2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 321
 322         * i386-dis.c (MOVBE_Fixup): New.
 323         (Mo): Likewise.
 324         (PREFIX_0F3880): Likewise.
 325         (PREFIX_0F3881): Likewise.
 326         (PREFIX_0F38F0): Updated.
 327         (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
 328         PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
 329         (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
 330
 331         * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
 332         CPU_EPT_FLAGS.
 333         (cpu_flags): Add CpuMovbe and CpuEPT.
 334
 335         * i386-opc.h (CpuMovbe): New.
 336         (CpuEPT): Likewise.
 337         (CpuLM): Updated.
 338         (i386_cpu_flags): Add cpumovbe and cpuept.
 339
 340         * i386-opc.tbl: Add entries for movbe and EPT instructions.
 341         * i386-init.h: Regenerated.
 342         * i386-tbl.h: Likewise.
 343
 344 2008-04-29  Adam Nemet  <anemet@caviumnetworks.com>
 345
 346         * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
 347         the two drem and the two dremu macros.
 348
 349 2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
 350
 351         * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
 352         instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
 353         cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
 354         INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
 355
 356 2008-04-25  David S. Miller  <davem@davemloft.net>
 357
 358         * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
 359         instead of %sys_tick_cmpr, as suggested in architecture manuals.
 360
 361 2008-04-23  Paolo Bonzini  <bonzini@gnu.org>
 362
 363         * aclocal.m4: Regenerate.
 364         * configure: Regenerate.
 365
 366 2008-04-23  David S. Miller  <davem@davemloft.net>
 367
 368         * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
 369         extended values.
 370         (prefetch_table): Add missing values.
 371
 372 2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>
 373
 374         * i386-gen.c (opcode_modifiers): Add NoAVX.
 375
 376         * i386-opc.h (NoAVX): New.
 377         (OldGcc): Updated.
 378         (i386_opcode_modifier): Add noavx.
 379
 380         * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
 381         instructions which don't have AVX equivalent.
 382         * i386-tbl.h: Regenerated.
 383
 384 2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 385
 386         * i386-dis.c (OP_VEX_FMA): New.
 387         (OP_EX_VexImmW): Likewise.
 388         (VexFMA): Likewise.
 389         (Vex128FMA): Likewise.
 390         (EXVexImmW): Likewise.
 391         (get_vex_imm8): Likewise.
 392         (OP_EX_VexReg): Likewise.
 393         (vex_i4_done): Renamed to ...
 394         (vex_w_done): This.
 395         (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
 396         and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
 397         FMA instructions.
 398         (print_insn): Updated.
 399         (OP_EX_VexW): Rewrite to swap register in VEX with EX.
 400         (OP_REG_VexI4): Check invalid high registers.
 401
 402 2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 403             Michael Meissner  <michael.meissner@amd.com>
 404
 405         * i386-opc.tbl: Fix protX to allow memory in the middle operand.
 406         * i386-tbl.h: Regenerate from i386-opc.tbl.
 407
 408 2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
 409
 410         * ppc-dis.c (powerpc_dialect): Handle "e500mc".  Extend "e500" to
 411         accept Power E500MC instructions.
 412         (print_ppc_disassembler_options): Document -Me500mc.
 413         * ppc-opc.c (DUIS, DUI, T): New.
 414         (XRT, XRTRA): Likewise.
 415         (E500MC): Likewise.
 416         (powerpc_opcodes): Add new Power E500MC instructions.
 417
 418 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 419
 420         * s390-dis.c (init_disasm): Evaluate disassembler_options.
 421         (print_s390_disassembler_options): New function.
 422         * disassemble.c (disassembler_usage): Invoke
 423         print_s390_disassembler_options.
 424
 425 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 426
 427         * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
 428         of local variables used for mnemonic parsing: prefix, suffix and
 429         number.
 430
 431 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 432
 433         * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
 434         extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
 435         (s390_crb_extensions): New extensions table.
 436         (insertExpandedMnemonic): Handle '$' tag.
 437         * s390-opc.txt: Remove conditional jump variants which can now
 438         be expanded automatically.
 439         Replace '*' tag with '$' in the compare and branch instructions.
 440
 441 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 442
 443         * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
 444         (PREFIX_VEX_3AXX): Likewis.
 445
 446 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 447
 448         * i386-opc.tbl: Remove 4 extra blank lines.
 449
 450 2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 451
 452         * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
 453         with CPU_PCLMUL_FLAGS/CpuPCLMUL.
 454         (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
 455         * i386-opc.tbl: Likewise.
 456
 457         * i386-opc.h (CpuCLMUL): Renamed to ...
 458         (CpuPCLMUL): This.
 459         (CpuFMA): Updated.
 460         (i386_cpu_flags): Replace cpuclmul with cpupclmul.
 461
 462         * i386-init.h: Regenerated.
 463
 464 2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
 465
 466         * i386-dis.c (OP_E_register): New.
 467         (OP_E_memory): Likewise.
 468         (OP_VEX): Likewise.
 469         (OP_EX_Vex): Likewise.
 470         (OP_EX_VexW): Likewise.
 471         (OP_XMM_Vex): Likewise.
 472         (OP_XMM_VexW): Likewise.
 473         (OP_REG_VexI4): Likewise.
 474         (PCLMUL_Fixup): Likewise.
 475         (VEXI4_Fixup): Likewise.
 476         (VZERO_Fixup): Likewise.
 477         (VCMP_Fixup): Likewise.
 478         (VPERMIL2_Fixup): Likewise.
 479         (rex_original): Likewise.
 480         (rex_ignored): Likewise.
 481         (Mxmm): Likewise.
 482         (XMM): Likewise.
 483         (EXxmm): Likewise.
 484         (EXxmmq): Likewise.
 485         (EXymmq): Likewise.
 486         (Vex): Likewise.
 487         (Vex128): Likewise.
 488         (Vex256): Likewise.
 489         (VexI4): Likewise.
 490         (EXdVex): Likewise.
 491         (EXqVex): Likewise.
 492         (EXVexW): Likewise.
 493         (EXdVexW): Likewise.
 494         (EXqVexW): Likewise.
 495         (XMVex): Likewise.
 496         (XMVexW): Likewise.
 497         (XMVexI4): Likewise.
 498         (PCLMUL): Likewise.
 499         (VZERO): Likewise.
 500         (VCMP): Likewise.
 501         (VPERMIL2): Likewise.
 502         (xmm_mode): Likewise.
 503         (xmmq_mode): Likewise.
 504         (ymmq_mode): Likewise.
 505         (vex_mode): Likewise.
 506         (vex128_mode): Likewise.
 507         (vex256_mode): Likewise.
 508         (USE_VEX_C4_TABLE): Likewise.
 509         (USE_VEX_C5_TABLE): Likewise.
 510         (USE_VEX_LEN_TABLE): Likewise.
 511         (VEX_C4_TABLE): Likewise.
 512         (VEX_C5_TABLE): Likewise.
 513         (VEX_LEN_TABLE): Likewise.
 514         (REG_VEX_XX): Likewise.
 515         (MOD_VEX_XXX): Likewise.
 516         (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
 517         (PREFIX_0F3A44): Likewise.
 518         (PREFIX_0F3ADF): Likewise.
 519         (PREFIX_VEX_XXX): Likewise.
 520         (VEX_OF): Likewise.
 521         (VEX_OF38): Likewise.
 522         (VEX_OF3A): Likewise.
 523         (VEX_LEN_XXX): Likewise.
 524         (vex): Likewise.
 525         (need_vex): Likewise.
 526         (need_vex_reg): Likewise.
 527         (vex_i4_done): Likewise.
 528         (vex_table): Likewise.
 529         (vex_len_table): Likewise.
 530         (OP_REG_VexI4): Likewise.
 531         (vex_cmp_op): Likewise.
 532         (pclmul_op): Likewise.
 533         (vpermil2_op): Likewise.
 534         (m_mode): Updated.
 535         (es_reg): Likewise.
 536         (PREFIX_0F38F0): Likewise.
 537         (PREFIX_0F3A60): Likewise.
 538         (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
 539         (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
 540         and PREFIX_VEX_XXX entries.
 541         (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
 542         (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
 543         PREFIX_0F3ADF.
 544         (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
 545         Add MOD_VEX_XXX entries.
 546         (ckprefix): Initialize rex_original and rex_ignored.  Store the
 547         REX byte in rex_original.
 548         (get_valid_dis386): Handle the implicit prefix in VEX prefix
 549         bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
 550         (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
 551         calling get_valid_dis386.  Use rex_original and rex_ignored when
 552         printing out REX.
 553         (putop): Handle "XY".
 554         (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
 555         ymmq_mode.
 556         (OP_E_extended): Updated to use OP_E_register and
 557         OP_E_memory.
 558         (OP_XMM): Handle VEX.
 559         (OP_EX): Likewise.
 560         (XMM_Fixup): Likewise.
 561         (CMP_Fixup): Use ARRAY_SIZE.
 562
 563         * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
 564         CPU_FMA_FLAGS and CPU_AVX_FLAGS.
 565         (operand_type_init): Add OPERAND_TYPE_REGYMM and
 566         OPERAND_TYPE_VEX_IMM4.
 567         (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
 568         (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
 569         VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
 570         VexImmExt and SSE2AVX.
 571         (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
 572
 573         * i386-opc.h (CpuAVX): New.
 574         (CpuAES): Likewise.
 575         (CpuCLMUL): Likewise.
 576         (CpuFMA): Likewise.
 577         (Vex): Likewise.
 578         (Vex256): Likewise.
 579         (VexNDS): Likewise.
 580         (VexNDD): Likewise.
 581         (VexW0): Likewise.
 582         (VexW1): Likewise.
 583         (Vex0F): Likewise.
 584         (Vex0F38): Likewise.
 585         (Vex0F3A): Likewise.
 586         (Vex3Sources): Likewise.
 587         (VexImmExt): Likewise.
 588         (SSE2AVX): Likewise.
 589         (RegYMM): Likewise.
 590         (Ymmword): Likewise.
 591         (Vex_Imm4): Likewise.
 592         (Implicit1stXmm0): Likewise.
 593         (CpuXsave): Updated.
 594         (CpuLM): Likewise.
 595         (ByteOkIntel): Likewise.
 596         (OldGcc): Likewise.
 597         (Control): Likewise.
 598         (Unspecified): Likewise.
 599         (OTMax): Likewise.
 600         (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
 601         (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
 602         vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
 603         vex3sources, veximmext and sse2avx.
 604         (i386_operand_type): Add regymm, ymmword and vex_imm4.
 605
 606         * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
 607
 608         * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
 609
 610         * i386-init.h: Regenerated.
 611         * i386-tbl.h: Likewise.
 612
 613 2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
 614
 615         From  Robin Getz  <robin.getz@analog.com>
 616         * bfin-dis.c (bu32): Typedef.
 617         (enum const_forms_t): Add c_uimm32 and c_huimm32.
 618         (constant_formats[]): Add uimm32 and huimm16.
 619         (fmtconst_val): New.
 620         (uimm32): Define.
 621         (huimm32): Define.
 622         (imm16_val): Define.
 623         (luimm16_val): Define.
 624         (struct saved_state): Define.
 625         (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
 626         A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
 627         LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
 628         (get_allreg): New.
 629         (decode_LDIMMhalf_0): Print out the whole register value.
 630
 631         From Jie Zhang  <jie.zhang@analog.com>
 632         * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
 633         multiply and multiply-accumulate to data register instruction.
 634
 635         * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
 636         c_imm32, c_huimm32e): Define.
 637         (constant_formats): Add flags for printing decimal, leading spaces, and
 638         exact symbols.
 639         (comment, parallel): Add global flags in all disassembly.
 640         (fmtconst): Take advantage of new flags, and print default in hex.
 641         (fmtconst_val): Likewise.
 642         (decode_macfunc): Be consistant with spaces, tabs, comments,
 643         capitalization in disassembly, fix minor coding style issues.
 644         (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
 645         (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
 646         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 647         decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
 648         decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 649         decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
 650         decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
 651         decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
 652         decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
 653         decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
 654         _print_insn_bfin, print_insn_bfin): Likewise.
 655
 656 2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 657
 658         * aclocal.m4: Regenerate.
 659         * configure: Likewise.
 660         * Makefile.in: Likewise.
 661
 662 2008-03-13  Alan Modra  <amodra@bigpond.net.au>
 663
 664         * Makefile.am: Run "make dep-am".
 665         * Makefile.in: Regenerate.
 666         * configure: Regenerate.
 667
 668 2008-03-07  Alan Modra  <amodra@bigpond.net.au>
 669
 670         * ppc-opc.c (powerpc_opcodes): Order and format.
 671
 672 2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 673
 674         * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
 675         * i386-tbl.h: Regenerated.
 676
 677 2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 678
 679         * i386-opc.tbl: Disallow 16-bit near indirect branches for
 680         x86-64.
 681         * i386-tbl.h: Regenerated.
 682
 683 2008-02-21  Jan Beulich  <jbeulich@novell.com>
 684
 685         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
 686         and Fword for far indirect jmp. Allow Reg16 and Word for near
 687         indirect jmp on x86-64. Disallow Fword for lcall.
 688         * i386-tbl.h: Re-generate.
 689
 690 2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 691
 692         * cr16-opc.c  (cr16_num_optab): Defined
 693
 694 2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>
 695
 696         * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
 697         * i386-init.h: Regenerated.
 698
 699 2008-02-14  Nick Clifton  <nickc@redhat.com>
 700
 701         PR binutils/5524
 702         * configure.in (SHARED_LIBADD): Select the correct host specific
 703         file extension for shared libraries.
 704         * configure: Regenerate.
 705
 706 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 707
 708         * i386-opc.h (RegFlat): New.
 709         * i386-reg.tbl (flat): Add.
 710         * i386-tbl.h: Re-generate.
 711
 712 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 713
 714         * i386-dis.c (a_mode): New.
 715         (cond_jump_mode): Adjust.
 716         (Ma): Change to a_mode.
 717         (intel_operand_size): Handle a_mode.
 718         * i386-opc.tbl: Allow Dword and Qword for bound.
 719         * i386-tbl.h: Re-generate.
 720
 721 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 722
 723         * i386-gen.c (process_i386_registers): Process new fields.
 724         * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
 725         unsigned char. Add dw2_regnum and Dw2Inval.
 726         * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
 727         register names.
 728         * i386-tbl.h: Re-generate.
 729
 730 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 731
 732         * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
 733         * i386-init.h: Updated.
 734
 735 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 736
 737         * i386-gen.c (cpu_flags): Add CpuXsave.
 738
 739         * i386-opc.h (CpuXsave): New.
 740         (CpuLM): Updated.
 741         (i386_cpu_flags): Add cpuxsave.
 742
 743         * i386-dis.c (MOD_0FAE_REG_4): New.
 744         (RM_0F01_REG_2): Likewise.
 745         (MOD_0FAE_REG_5): Updated.
 746         (RM_0F01_REG_3): Likewise.
 747         (reg_table): Use MOD_0FAE_REG_4.
 748         (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
 749         for xrstor.
 750         (rm_table): Add RM_0F01_REG_2.
 751
 752         * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
 753         * i386-init.h: Regenerated.
 754         * i386-tbl.h: Likewise.
 755
 756 2008-02-11  Jan Beulich  <jbeulich@novell.com>
 757
 758         * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
 759         Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
 760         * i386-tbl.h: Re-generate.
 761
 762 2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
 763
 764         PR 5715
 765         * configure: Regenerated.
 766
 767 2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
 768
 769         * mips-dis.c: Update copyright.
 770         (mips_arch_choices): Add Octeon.
 771         * mips-opc.c: Update copyright.
 772         (IOCT): New macro.
 773         (mips_builtin_opcodes): Add Octeon instruction synciobdma.
 774
 775 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 776
 777         * ppc-opc.c: Support optional L form mtmsr.
 778
 779 2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 780
 781         * i386-dis.c (OP_E_extended): Handle r12 like rsp.
 782
 783 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 784
 785         * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
 786         * i386-init.h: Regenerated.
 787
 788 2008-01-23  Tristan Gingold  <gingold@adacore.com>
 789
 790         * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
 791         ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 792
 793 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 794
 795         * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
 796         (cpu_flags): Likewise.
 797
 798         * i386-opc.h (CpuMMX2): Removed.
 799         (CpuSSE): Updated.
 800
 801         * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
 802         * i386-init.h: Regenerated.
 803         * i386-tbl.h: Likewise.
 804
 805 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 806
 807         * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
 808         CPU_SMX_FLAGS.
 809         * i386-init.h: Regenerated.
 810
 811 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 812
 813         * i386-opc.tbl: Use Qword on movddup.
 814         * i386-tbl.h: Regenerated.
 815
 816 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 817
 818         * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
 819         * i386-tbl.h: Regenerated.
 820
 821 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 822
 823         * i386-dis.c (Mx): New.
 824         (PREFIX_0FC3): Likewise.
 825         (PREFIX_0FC7_REG_6): Updated.
 826         (dis386_twobyte): Use PREFIX_0FC3.
 827         (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
 828         Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
 829         movntss.
 830
 831 2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 832
 833         * i386-gen.c (opcode_modifiers): Add IntelSyntax.
 834         (operand_types): Add Mem.
 835
 836         * i386-opc.h (IntelSyntax): New.
 837         * i386-opc.h (Mem): New.
 838         (Byte): Updated.
 839         (Opcode_Modifier_Max): Updated.
 840         (i386_opcode_modifier): Add intelsyntax.
 841         (i386_operand_type): Add mem.
 842
 843         * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
 844         instructions.
 845
 846         * i386-reg.tbl: Add size for accumulator.
 847
 848         * i386-init.h: Regenerated.
 849         * i386-tbl.h: Likewise.
 850
 851 2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 852
 853         * i386-opc.h (Byte): Fix a typo.
 854
 855 2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 856
 857         PR gas/5534
 858         * i386-gen.c (operand_type_init): Add Dword to
 859         OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
 860         (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
 861         Qword and Xmmword.
 862         (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
 863         Xmmword, Unspecified and Anysize.
 864         (set_bitfield): Make Mmword an alias of Qword.  Make Oword
 865         an alias of Xmmword.
 866
 867         * i386-opc.h (CheckSize): Removed.
 868         (Byte): Updated.
 869         (Word): Likewise.
 870         (Dword): Likewise.
 871         (Qword): Likewise.
 872         (Xmmword): Likewise.
 873         (FWait): Updated.
 874         (OTMax): Likewise.
 875         (i386_opcode_modifier): Remove checksize, byte, word, dword,
 876         qword and xmmword.
 877         (Fword): New.
 878         (TBYTE): Likewise.
 879         (Unspecified): Likewise.
 880         (Anysize): Likewise.
 881         (i386_operand_type): Add byte, word, dword, fword, qword,
 882         tbyte xmmword, unspecified and anysize.
 883
 884         * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
 885         Tbyte, Xmmword, Unspecified and Anysize.
 886
 887         * i386-reg.tbl: Add size for accumulator.
 888
 889         * i386-init.h: Regenerated.
 890         * i386-tbl.h: Likewise.
 891
 892 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
 893
 894         * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
 895         (REG_0F18): Updated.
 896         (reg_table): Updated.
 897         (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
 898         (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
 899
 900 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 901
 902         * i386-gen.c (set_bitfield): Use fail () on error.
 903
 904 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 905
 906         * i386-gen.c (lineno): New.
 907         (filename): Likewise.
 908         (set_bitfield): Report filename and line numer on error.
 909         (process_i386_opcodes): Set filename and update lineno.
 910         (process_i386_registers): Likewise.
 911
 912 2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
 913
 914         * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
 915         ATTSyntax.
 916
 917         * i386-opc.h (IntelMnemonic): Renamed to ..
 918         (ATTSyntax): This
 919         (Opcode_Modifier_Max): Updated.
 920         (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
 921         and intelsyntax.
 922
 923         * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
 924         on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
 925         * i386-tbl.h: Regenerated.
 926
 927 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 928
 929         * i386-gen.c: Update copyright to 2008.
 930         * i386-opc.h: Likewise.
 931         * i386-opc.tbl: Likewise.
 932
 933         * i386-init.h: Regenerated.
 934         * i386-tbl.h: Likewise.
 935
 936 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 937
 938         * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
 939         pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
 940         * i386-tbl.h: Regenerated.
 941
 942 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 943
 944         * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
 945         CpuSSE4_2_Or_ABM.
 946         (cpu_flags): Likewise.
 947
 948         * i386-opc.h (CpuSSE4_1_Or_5): Removed.
 949         (CpuSSE4_2_Or_ABM): Likewise.
 950         (CpuLM): Updated.
 951         (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
 952
 953         * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
 954         Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
 955         and CpuPadLock, respectively.
 956         * i386-init.h: Regenerated.
 957         * i386-tbl.h: Likewise.
 958
 959 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 960
 961         * i386-gen.c (opcode_modifiers): Remove No_xSuf.
 962
 963         * i386-opc.h (No_xSuf): Removed.
 964         (CheckSize): Updated.
 965
 966         * i386-tbl.h: Regenerated.
 967
 968 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 969
 970         * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
 971         CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
 972         CPU_SSE5_FLAGS.
 973         (cpu_flags): Add CpuSSE4_2_Or_ABM.
 974
 975         * i386-opc.h (CpuSSE4_2_Or_ABM): New.
 976         (CpuLM): Updated.
 977         (i386_cpu_flags): Add cpusse4_2_or_abm.
 978
 979         * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
 980         CpuABM|CpuSSE4_2 on popcnt.
 981         * i386-init.h: Regenerated.
 982         * i386-tbl.h: Likewise.
 983
 984 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 985
 986         * i386-opc.h: Update comments.
 987
 988 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 989
 990         * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
 991         * i386-opc.h: Likewise.
 992         * i386-opc.tbl: Likewise.
 993
 994 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 995
 996         PR gas/5534
 997         * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
 998         Byte, Word, Dword, QWord and Xmmword.
 999
1000         * i386-opc.h (No_xSuf): New.
1001         (CheckSize): Likewise.
1002         (Byte): Likewise.
1003         (Word): Likewise.
1004         (Dword): Likewise.
1005         (QWord): Likewise.
1006         (Xmmword): Likewise.
1007         (FWait): Updated.
1008         (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
1009         Dword, QWord and Xmmword.
1010
1011         * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
1012         used.
1013         * i386-tbl.h: Regenerated.
1014
1015 2008-01-02  Mark Kettenis  <kettenis@gnu.org>
1016
1017         * m88k-dis.c (instructions): Fix fcvt.* instructions.
1018         From Miod Vallat.
1019
1020 For older changes see ChangeLog-2007
1021 \f
1022 Local Variables:
1023 mode: change-log
1024 left-margin: 8
1025 fill-column: 74
1026 version-control: never
1027 End: