1 2005-03-16 Nick Clifton <nickc@redhat.com>
2 Ben Elliston <bje@au.ibm.com>
4 * configure.in (werror): New switch: Add -Werror to the
5 compiler command line. Enabled by default. Disable via
7 * configure: Regenerate.
9 2005-03-16 Alan Modra <amodra@bigpond.net.au>
11 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
14 2005-03-15 Alan Modra <amodra@bigpond.net.au>
16 * po/es.po: Commit new Spanish translation.
18 * po/fr.po: Commit new French translation.
20 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
22 * vax-dis.c: Fix spelling error
23 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
24 of just "Entry mask: < r1 ... >"
26 2005-03-12 Zack Weinberg <zack@codesourcery.com>
28 * arm-dis.c (arm_opcodes): Document %E and %V.
29 Add entries for v6T2 ARM instructions:
30 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
31 (print_insn_arm): Add support for %E and %V.
32 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
34 2005-03-10 Jeff Baker <jbaker@qnx.com>
35 Alan Modra <amodra@bigpond.net.au>
37 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
38 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
40 (XSPRG_MASK): Mask off extra bits now part of sprg field.
41 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
42 mfsprg4..7 after msprg and consolidate.
44 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
46 * vax-dis.c (entry_mask_bit): New array.
47 (print_insn_vax): Decode function entry mask.
49 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
51 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
53 2005-03-05 Alan Modra <amodra@bigpond.net.au>
55 * po/opcodes.pot: Regenerate.
57 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
59 * arc-dis.c (a4_decoding_class): New enum.
60 (dsmOneArcInst): Use the enum values for the decoding class.
61 Remove redundant case in the switch for decodingClass value 11.
63 2005-03-02 Jan Beulich <jbeulich@novell.com>
65 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
67 (OP_C): Consider lock prefix in non-64-bit modes.
69 2005-02-24 Alan Modra <amodra@bigpond.net.au>
71 * cris-dis.c (format_hex): Remove ineffective warning fix.
72 * crx-dis.c (make_instruction): Warning fix.
73 * frv-asm.c: Regenerate.
75 2005-02-23 Nick Clifton <nickc@redhat.com>
77 * cgen-dis.in: Use bfd_byte for buffers that are passed to
80 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
82 * crx-dis.c (make_instruction): Move argument structure into inner
83 scope and ensure that all of its fields are initialised before
86 * fr30-asm.c: Regenerate.
87 * fr30-dis.c: Regenerate.
88 * frv-asm.c: Regenerate.
89 * frv-dis.c: Regenerate.
90 * ip2k-asm.c: Regenerate.
91 * ip2k-dis.c: Regenerate.
92 * iq2000-asm.c: Regenerate.
93 * iq2000-dis.c: Regenerate.
94 * m32r-asm.c: Regenerate.
95 * m32r-dis.c: Regenerate.
96 * openrisc-asm.c: Regenerate.
97 * openrisc-dis.c: Regenerate.
98 * xstormy16-asm.c: Regenerate.
99 * xstormy16-dis.c: Regenerate.
101 2005-02-22 Alan Modra <amodra@bigpond.net.au>
103 * arc-ext.c: Warning fixes.
104 * arc-ext.h: Likewise.
105 * cgen-opc.c: Likewise.
106 * ia64-gen.c: Likewise.
107 * maxq-dis.c: Likewise.
108 * ns32k-dis.c: Likewise.
109 * w65-dis.c: Likewise.
110 * ia64-asmtab.c: Regenerate.
112 2005-02-22 Alan Modra <amodra@bigpond.net.au>
114 * fr30-desc.c: Regenerate.
115 * fr30-desc.h: Regenerate.
116 * fr30-opc.c: Regenerate.
117 * fr30-opc.h: Regenerate.
118 * frv-desc.c: Regenerate.
119 * frv-desc.h: Regenerate.
120 * frv-opc.c: Regenerate.
121 * frv-opc.h: Regenerate.
122 * ip2k-desc.c: Regenerate.
123 * ip2k-desc.h: Regenerate.
124 * ip2k-opc.c: Regenerate.
125 * ip2k-opc.h: Regenerate.
126 * iq2000-desc.c: Regenerate.
127 * iq2000-desc.h: Regenerate.
128 * iq2000-opc.c: Regenerate.
129 * iq2000-opc.h: Regenerate.
130 * m32r-desc.c: Regenerate.
131 * m32r-desc.h: Regenerate.
132 * m32r-opc.c: Regenerate.
133 * m32r-opc.h: Regenerate.
134 * m32r-opinst.c: Regenerate.
135 * openrisc-desc.c: Regenerate.
136 * openrisc-desc.h: Regenerate.
137 * openrisc-opc.c: Regenerate.
138 * openrisc-opc.h: Regenerate.
139 * xstormy16-desc.c: Regenerate.
140 * xstormy16-desc.h: Regenerate.
141 * xstormy16-opc.c: Regenerate.
142 * xstormy16-opc.h: Regenerate.
144 2005-02-21 Alan Modra <amodra@bigpond.net.au>
146 * Makefile.am: Run "make dep-am"
147 * Makefile.in: Regenerate.
149 2005-02-15 Nick Clifton <nickc@redhat.com>
151 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
152 compile time warnings.
153 (print_keyword): Likewise.
154 (default_print_insn): Likewise.
156 * fr30-desc.c: Regenerated.
157 * fr30-desc.h: Regenerated.
158 * fr30-dis.c: Regenerated.
159 * fr30-opc.c: Regenerated.
160 * fr30-opc.h: Regenerated.
161 * frv-desc.c: Regenerated.
162 * frv-dis.c: Regenerated.
163 * frv-opc.c: Regenerated.
164 * ip2k-asm.c: Regenerated.
165 * ip2k-desc.c: Regenerated.
166 * ip2k-desc.h: Regenerated.
167 * ip2k-dis.c: Regenerated.
168 * ip2k-opc.c: Regenerated.
169 * ip2k-opc.h: Regenerated.
170 * iq2000-desc.c: Regenerated.
171 * iq2000-dis.c: Regenerated.
172 * iq2000-opc.c: Regenerated.
173 * m32r-asm.c: Regenerated.
174 * m32r-desc.c: Regenerated.
175 * m32r-desc.h: Regenerated.
176 * m32r-dis.c: Regenerated.
177 * m32r-opc.c: Regenerated.
178 * m32r-opc.h: Regenerated.
179 * m32r-opinst.c: Regenerated.
180 * openrisc-desc.c: Regenerated.
181 * openrisc-desc.h: Regenerated.
182 * openrisc-dis.c: Regenerated.
183 * openrisc-opc.c: Regenerated.
184 * openrisc-opc.h: Regenerated.
185 * xstormy16-desc.c: Regenerated.
186 * xstormy16-desc.h: Regenerated.
187 * xstormy16-dis.c: Regenerated.
188 * xstormy16-opc.c: Regenerated.
189 * xstormy16-opc.h: Regenerated.
191 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
193 * dis-buf.c (perror_memory): Use sprintf_vma to print out
196 2005-02-11 Nick Clifton <nickc@redhat.com>
198 * iq2000-asm.c: Regenerate.
200 * frv-dis.c: Regenerate.
202 2005-02-07 Jim Blandy <jimb@redhat.com>
204 * Makefile.am (CGEN): Load guile.scm before calling the main
206 * Makefile.in: Regenerated.
207 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
208 Simply pass the cgen-opc.scm path to ${cgen} as its first
209 argument; ${cgen} itself now contains the '-s', or whatever is
210 appropriate for the Scheme being used.
212 2005-01-31 Andrew Cagney <cagney@gnu.org>
214 * configure: Regenerate to track ../gettext.m4.
216 2005-01-31 Jan Beulich <jbeulich@novell.com>
218 * ia64-gen.c (NELEMS): Define.
219 (shrink): Generate alias with missing second predicate register when
220 opcode has two outputs and these are both predicates.
221 * ia64-opc-i.c (FULL17): Define.
222 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
223 here to generate output template.
224 (TBITCM, TNATCM): Undefine after use.
225 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
226 first input. Add ld16 aliases without ar.csd as second output. Add
227 st16 aliases without ar.csd as second input. Add cmpxchg aliases
228 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
229 ar.ccv as third/fourth inputs. Consolidate through...
230 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
231 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
232 * ia64-asmtab.c: Regenerate.
234 2005-01-27 Andrew Cagney <cagney@gnu.org>
236 * configure: Regenerate to track ../gettext.m4 change.
238 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
240 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
241 * frv-asm.c: Rebuilt.
242 * frv-desc.c: Rebuilt.
243 * frv-desc.h: Rebuilt.
244 * frv-dis.c: Rebuilt.
245 * frv-ibld.c: Rebuilt.
246 * frv-opc.c: Rebuilt.
247 * frv-opc.h: Rebuilt.
249 2005-01-24 Andrew Cagney <cagney@gnu.org>
251 * configure: Regenerate, ../gettext.m4 was updated.
253 2005-01-21 Fred Fish <fnf@specifixinc.com>
255 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
256 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
257 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
260 2005-01-20 Alan Modra <amodra@bigpond.net.au>
262 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
264 2005-01-19 Fred Fish <fnf@specifixinc.com>
266 * mips-dis.c (no_aliases): New disassembly option flag.
267 (set_default_mips_dis_options): Init no_aliases to zero.
268 (parse_mips_dis_option): Handle no-aliases option.
269 (print_insn_mips): Ignore table entries that are aliases
270 if no_aliases is set.
271 (print_insn_mips16): Ditto.
272 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
273 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
274 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
275 * mips16-opc.c (mips16_opcodes): Ditto.
277 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
279 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
280 (inheritance diagram): Add missing edge.
281 (arch_sh1_up): Rename arch_sh_up to match external name to make life
282 easier for the testsuite.
283 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
284 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
285 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
286 arch_sh2a_or_sh4_up child.
287 (sh_table): Do renaming as above.
288 Correct comment for ldc.l for gas testsuite to read.
289 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
290 Correct comments for movy.w and movy.l for gas testsuite to read.
291 Correct comments for fmov.d and fmov.s for gas testsuite to read.
293 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
295 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
297 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
299 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
301 2005-01-10 Andreas Schwab <schwab@suse.de>
303 * disassemble.c (disassemble_init_for_target) <case
304 bfd_arch_ia64>: Set skip_zeroes to 16.
305 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
307 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
309 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
311 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
313 * avr-dis.c: Prettyprint. Added printing of symbol names in all
314 memory references. Convert avr_operand() to C90 formatting.
316 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
318 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
320 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
322 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
323 (no_op_insn): Initialize array with instructions that have no
325 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
327 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
329 * arm-dis.c: Correct top-level comment.
331 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
333 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
334 architecuture defining the insn.
335 (arm_opcodes, thumb_opcodes): Delete. Move to ...
336 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
338 Also include opcode/arm.h.
339 * Makefile.am (arm-dis.lo): Update dependency list.
340 * Makefile.in: Regenerate.
342 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
344 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
345 reflect the change to the short immediate syntax.
347 2004-11-19 Alan Modra <amodra@bigpond.net.au>
349 * or32-opc.c (debug): Warning fix.
350 * po/POTFILES.in: Regenerate.
352 * maxq-dis.c: Formatting.
353 (print_insn): Warning fix.
355 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
357 * arm-dis.c (WORD_ADDRESS): Define.
358 (print_insn): Use it. Correct big-endian end-of-section handling.
360 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
361 Vineet Sharma <vineets@noida.hcltech.com>
363 * maxq-dis.c: New file.
364 * disassemble.c (ARCH_maxq): Define.
365 (disassembler): Add 'print_insn_maxq_little' for handling maxq
367 * configure.in: Add case for bfd_maxq_arch.
368 * configure: Regenerate.
369 * Makefile.am: Add support for maxq-dis.c
370 * Makefile.in: Regenerate.
371 * aclocal.m4: Regenerate.
373 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
375 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
377 * crx-dis.c: Likewise.
379 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
381 Generally, handle CRISv32.
382 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
383 (struct cris_disasm_data): New type.
384 (format_reg, format_hex, cris_constraint, print_flags)
385 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
387 (format_sup_reg, print_insn_crisv32_with_register_prefix)
388 (print_insn_crisv32_without_register_prefix)
389 (print_insn_crisv10_v32_with_register_prefix)
390 (print_insn_crisv10_v32_without_register_prefix)
391 (cris_parse_disassembler_options): New functions.
392 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
393 parameter. All callers changed.
394 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
396 (cris_constraint) <case 'Y', 'U'>: New cases.
397 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
399 (print_with_operands) <case 'Y'>: New case.
400 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
401 <case 'N', 'Y', 'Q'>: New cases.
402 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
403 (print_insn_cris_with_register_prefix)
404 (print_insn_cris_without_register_prefix): Call
405 cris_parse_disassembler_options.
406 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
407 for CRISv32 and the size of immediate operands. New v32-only
408 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
409 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
410 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
411 Change brp to be v3..v10.
412 (cris_support_regs): New vector.
413 (cris_opcodes): Update head comment. New format characters '[',
414 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
415 Add new opcodes for v32 and adjust existing opcodes to accommodate
416 differences to earlier variants.
417 (cris_cond15s): New vector.
419 2004-11-04 Jan Beulich <jbeulich@novell.com>
421 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
423 (Mp): Use f_mode rather than none at all.
424 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
425 replaces what previously was x_mode; x_mode now means 128-bit SSE
427 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
428 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
429 pinsrw's second operand is Edqw.
430 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
431 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
432 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
433 mode when an operand size override is present or always suffixing.
434 More instructions will need to be added to this group.
435 (putop): Handle new macro chars 'C' (short/long suffix selector),
436 'I' (Intel mode override for following macro char), and 'J' (for
437 adding the 'l' prefix to far branches in AT&T mode). When an
438 alternative was specified in the template, honor macro character when
439 specified for Intel mode.
440 (OP_E): Handle new *_mode values. Correct pointer specifications for
441 memory operands. Consolidate output of index register.
442 (OP_G): Handle new *_mode values.
443 (OP_I): Handle const_1_mode.
444 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
445 respective opcode prefix bits have been consumed.
446 (OP_EM, OP_EX): Provide some default handling for generating pointer
449 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
451 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
454 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
456 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
457 (getregliststring): Support HI/LO and user registers.
458 * crx-opc.c (crx_instruction): Update data structure according to the
459 rearrangement done in CRX opcode header file.
460 (crx_regtab): Likewise.
461 (crx_optab): Likewise.
462 (crx_instruction): Reorder load/stor instructions, remove unsupported
464 support new Co-Processor instruction 'cpi'.
466 2004-10-27 Nick Clifton <nickc@redhat.com>
468 * opcodes/iq2000-asm.c: Regenerate.
469 * opcodes/iq2000-desc.c: Regenerate.
470 * opcodes/iq2000-desc.h: Regenerate.
471 * opcodes/iq2000-dis.c: Regenerate.
472 * opcodes/iq2000-ibld.c: Regenerate.
473 * opcodes/iq2000-opc.c: Regenerate.
474 * opcodes/iq2000-opc.h: Regenerate.
476 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
478 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
479 us4, us5 (respectively).
480 Remove unsupported 'popa' instruction.
481 Reverse operands order in store co-processor instructions.
483 2004-10-15 Alan Modra <amodra@bigpond.net.au>
485 * Makefile.am: Run "make dep-am"
486 * Makefile.in: Regenerate.
488 2004-10-12 Bob Wilson <bob.wilson@acm.org>
490 * xtensa-dis.c: Use ISO C90 formatting.
492 2004-10-09 Alan Modra <amodra@bigpond.net.au>
494 * ppc-opc.c: Revert 2004-09-09 change.
496 2004-10-07 Bob Wilson <bob.wilson@acm.org>
498 * xtensa-dis.c (state_names): Delete.
499 (fetch_data): Use xtensa_isa_maxlength.
500 (print_xtensa_operand): Replace operand parameter with opcode/operand
501 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
502 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
503 instruction bundles. Use xmalloc instead of malloc.
505 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
507 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
510 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
512 * crx-opc.c (crx_instruction): Support Co-processor insns.
513 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
514 (getregliststring): Change function to use the above enum.
515 (print_arg): Handle CO-Processor insns.
516 (crx_cinvs): Add 'b' option to invalidate the branch-target
519 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
521 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
522 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
523 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
524 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
525 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
527 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
529 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
532 2004-09-30 Paul Brook <paul@codesourcery.com>
534 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
535 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
537 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
539 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
540 (CONFIG_STATUS_DEPENDENCIES): New.
542 (config.status): Likewise.
543 * Makefile.in: Regenerated.
545 2004-09-17 Alan Modra <amodra@bigpond.net.au>
547 * Makefile.am: Run "make dep-am".
548 * Makefile.in: Regenerate.
549 * aclocal.m4: Regenerate.
550 * configure: Regenerate.
551 * po/POTFILES.in: Regenerate.
552 * po/opcodes.pot: Regenerate.
554 2004-09-11 Andreas Schwab <schwab@suse.de>
556 * configure: Rebuild.
558 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
560 * ppc-opc.c (L): Make this field not optional.
562 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
564 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
565 Fix parameter to 'm[t|f]csr' insns.
567 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
569 * configure.in: Autoupdate to autoconf 2.59.
570 * aclocal.m4: Rebuild with aclocal 1.4p6.
571 * configure: Rebuild with autoconf 2.59.
572 * Makefile.in: Rebuild with automake 1.4p6 (picking up
573 bfd changes for autoconf 2.59 on the way).
574 * config.in: Rebuild with autoheader 2.59.
576 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
578 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
580 2004-07-30 Michal Ludvig <mludvig@suse.cz>
582 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
583 (GRPPADLCK2): New define.
584 (twobyte_has_modrm): True for 0xA6.
585 (grps): GRPPADLCK2 for opcode 0xA6.
587 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
589 Introduce SH2a support.
590 * sh-opc.h (arch_sh2a_base): Renumber.
591 (arch_sh2a_nofpu_base): Remove.
592 (arch_sh_base_mask): Adjust.
593 (arch_opann_mask): New.
594 (arch_sh2a, arch_sh2a_nofpu): Adjust.
595 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
596 (sh_table): Adjust whitespace.
597 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
598 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
599 instruction list throughout.
600 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
601 of arch_sh2a in instruction list throughout.
602 (arch_sh2e_up): Accomodate above changes.
603 (arch_sh2_up): Ditto.
604 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
605 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
606 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
607 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
608 * sh-opc.h (arch_sh2a_nofpu): New.
609 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
610 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
612 2004-01-20 DJ Delorie <dj@redhat.com>
613 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
614 2003-12-29 DJ Delorie <dj@redhat.com>
615 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
616 sh_opcode_info, sh_table): Add sh2a support.
617 (arch_op32): New, to tag 32-bit opcodes.
618 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
619 2003-12-02 Michael Snyder <msnyder@redhat.com>
620 * sh-opc.h (arch_sh2a): Add.
621 * sh-dis.c (arch_sh2a): Handle.
622 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
624 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
626 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
628 2004-07-22 Nick Clifton <nickc@redhat.com>
631 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
632 insns - this is done by objdump itself.
633 * h8500-dis.c (print_insn_h8500): Likewise.
635 2004-07-21 Jan Beulich <jbeulich@novell.com>
637 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
638 regardless of address size prefix in effect.
639 (ptr_reg): Size or address registers does not depend on rex64, but
640 on the presence of an address size override.
641 (OP_MMX): Use rex.x only for xmm registers.
642 (OP_EM): Use rex.z only for xmm registers.
644 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
646 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
647 move/branch operations to the bottom so that VR5400 multimedia
648 instructions take precedence in disassembly.
650 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
652 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
653 ISA-specific "break" encoding.
655 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
657 * arm-opc.h: Fix typo in comment.
659 2004-07-11 Andreas Schwab <schwab@suse.de>
661 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
663 2004-07-09 Andreas Schwab <schwab@suse.de>
665 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
667 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
669 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
670 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
671 (crx-dis.lo): New target.
672 (crx-opc.lo): Likewise.
673 * Makefile.in: Regenerate.
674 * configure.in: Handle bfd_crx_arch.
675 * configure: Regenerate.
676 * crx-dis.c: New file.
677 * crx-opc.c: New file.
678 * disassemble.c (ARCH_crx): Define.
679 (disassembler): Handle ARCH_crx.
681 2004-06-29 James E Wilson <wilson@specifixinc.com>
683 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
684 * ia64-asmtab.c: Regnerate.
686 2004-06-28 Alan Modra <amodra@bigpond.net.au>
688 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
689 (extract_fxm): Don't test dialect.
690 (XFXFXM_MASK): Include the power4 bit.
691 (XFXM): Add p4 param.
692 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
694 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
696 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
697 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
699 2004-06-26 Alan Modra <amodra@bigpond.net.au>
701 * ppc-opc.c (BH, XLBH_MASK): Define.
702 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
704 2004-06-24 Alan Modra <amodra@bigpond.net.au>
706 * i386-dis.c (x_mode): Comment.
707 (two_source_ops): File scope.
708 (float_mem): Correct fisttpll and fistpll.
709 (float_mem_mode): New table.
711 (OP_E): Correct intel mode PTR output.
712 (ptr_reg): Use open_char and close_char.
713 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
714 operands. Set two_source_ops.
716 2004-06-15 Alan Modra <amodra@bigpond.net.au>
718 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
719 instead of _raw_size.
721 2004-06-08 Jakub Jelinek <jakub@redhat.com>
723 * ia64-gen.c (in_iclass): Handle more postinc st
725 * ia64-asmtab.c: Rebuilt.
727 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
729 * s390-opc.txt: Correct architecture mask for some opcodes.
730 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
731 in the esa mode as well.
733 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
735 * sh-dis.c (target_arch): Make unsigned.
736 (print_insn_sh): Replace (most of) switch with a call to
737 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
738 * sh-opc.h: Redefine architecture flags values.
739 Add sh3-nommu architecture.
740 Reorganise <arch>_up macros so they make more visual sense.
741 (SH_MERGE_ARCH_SET): Define new macro.
742 (SH_VALID_BASE_ARCH_SET): Likewise.
743 (SH_VALID_MMU_ARCH_SET): Likewise.
744 (SH_VALID_CO_ARCH_SET): Likewise.
745 (SH_VALID_ARCH_SET): Likewise.
746 (SH_MERGE_ARCH_SET_VALID): Likewise.
747 (SH_ARCH_SET_HAS_FPU): Likewise.
748 (SH_ARCH_SET_HAS_DSP): Likewise.
749 (SH_ARCH_UNKNOWN_ARCH): Likewise.
750 (sh_get_arch_from_bfd_mach): Add prototype.
751 (sh_get_arch_up_from_bfd_mach): Likewise.
752 (sh_get_bfd_mach_from_arch_set): Likewise.
753 (sh_merge_bfd_arc): Likewise.
755 2004-05-24 Peter Barada <peter@the-baradas.com>
757 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
758 into new match_insn_m68k function. Loop over canidate
759 matches and select first that completely matches.
760 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
761 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
762 to verify addressing for MAC/EMAC.
763 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
764 reigster halves since 'fpu' and 'spl' look misleading.
765 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
766 * m68k-opc.c: Rearragne mac/emac cases to use longest for
767 first, tighten up match masks.
768 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
769 'size' from special case code in print_insn_m68k to
770 determine decode size of insns.
772 2004-05-19 Alan Modra <amodra@bigpond.net.au>
774 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
775 well as when -mpower4.
777 2004-05-13 Nick Clifton <nickc@redhat.com>
779 * po/fr.po: Updated French translation.
781 2004-05-05 Peter Barada <peter@the-baradas.com>
783 * m68k-dis.c(print_insn_m68k): Add new chips, use core
784 variants in arch_mask. Only set m68881/68851 for 68k chips.
785 * m68k-op.c: Switch from ColdFire chips to core variants.
787 2004-05-05 Alan Modra <amodra@bigpond.net.au>
790 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
792 2004-04-29 Ben Elliston <bje@au.ibm.com>
794 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
795 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
797 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
799 * sh-dis.c (print_insn_sh): Print the value in constant pool
800 as a symbol if it looks like a symbol.
802 2004-04-22 Peter Barada <peter@the-baradas.com>
804 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
805 appropriate ColdFire architectures.
806 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
808 Add EMAC instructions, fix MAC instructions. Remove
809 macmw/macml/msacmw/msacml instructions since mask addressing now
812 2004-04-20 Jakub Jelinek <jakub@redhat.com>
814 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
815 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
816 suffix. Use fmov*x macros, create all 3 fpsize variants in one
817 macro. Adjust all users.
819 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
821 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
824 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
826 * m32r-asm.c: Regenerate.
828 2004-03-29 Stan Shebs <shebs@apple.com>
830 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
833 2004-03-19 Alan Modra <amodra@bigpond.net.au>
835 * aclocal.m4: Regenerate.
836 * config.in: Regenerate.
837 * configure: Regenerate.
838 * po/POTFILES.in: Regenerate.
839 * po/opcodes.pot: Regenerate.
841 2004-03-16 Alan Modra <amodra@bigpond.net.au>
843 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
845 * ppc-opc.c (RA0): Define.
846 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
847 (RAOPT): Rename from RAO. Update all uses.
848 (powerpc_opcodes): Use RA0 as appropriate.
850 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
852 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
854 2004-03-15 Alan Modra <amodra@bigpond.net.au>
856 * sparc-dis.c (print_insn_sparc): Update getword prototype.
858 2004-03-12 Michal Ludvig <mludvig@suse.cz>
860 * i386-dis.c (GRPPLOCK): Delete.
861 (grps): Delete GRPPLOCK entry.
863 2004-03-12 Alan Modra <amodra@bigpond.net.au>
865 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
867 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
869 (dis386): Use NOP_Fixup on "nop".
870 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
871 (twobyte_has_modrm): Set for 0xa7.
872 (padlock_table): Delete. Move to..
873 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
875 (print_insn): Revert PADLOCK_SPECIAL code.
876 (OP_E): Delete sfence, lfence, mfence checks.
878 2004-03-12 Jakub Jelinek <jakub@redhat.com>
880 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
881 (INVLPG_Fixup): New function.
882 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
884 2004-03-12 Michal Ludvig <mludvig@suse.cz>
886 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
887 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
888 (padlock_table): New struct with PadLock instructions.
889 (print_insn): Handle PADLOCK_SPECIAL.
891 2004-03-12 Alan Modra <amodra@bigpond.net.au>
893 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
894 (OP_E): Twiddle clflush to sfence here.
896 2004-03-08 Nick Clifton <nickc@redhat.com>
898 * po/de.po: Updated German translation.
900 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
902 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
903 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
904 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
907 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
909 * frv-asm.c: Regenerate.
910 * frv-desc.c: Regenerate.
911 * frv-desc.h: Regenerate.
912 * frv-dis.c: Regenerate.
913 * frv-ibld.c: Regenerate.
914 * frv-opc.c: Regenerate.
915 * frv-opc.h: Regenerate.
917 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
919 * frv-desc.c, frv-opc.c: Regenerate.
921 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
923 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
925 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
927 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
928 Also correct mistake in the comment.
930 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
932 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
933 ensure that double registers have even numbers.
934 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
935 that reserved instruction 0xfffd does not decode the same
937 * sh-opc.h: Add REG_N_D nibble type and use it whereever
938 REG_N refers to a double register.
939 Add REG_N_B01 nibble type and use it instead of REG_NM
941 Adjust the bit patterns in a few comments.
943 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
945 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
947 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
949 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
951 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
953 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
955 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
957 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
958 mtivor32, mtivor33, mtivor34.
960 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
962 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
964 2004-02-10 Petko Manolov <petkan@nucleusys.com>
966 * arm-opc.h Maverick accumulator register opcode fixes.
968 2004-02-13 Ben Elliston <bje@wasabisystems.com>
970 * m32r-dis.c: Regenerate.
972 2004-01-27 Michael Snyder <msnyder@redhat.com>
974 * sh-opc.h (sh_table): "fsrra", not "fssra".
976 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
978 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
981 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
983 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
985 2004-01-19 Alan Modra <amodra@bigpond.net.au>
987 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
988 1. Don't print scale factor on AT&T mode when index missing.
990 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
992 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
993 when loaded into XR registers.
995 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
997 * frv-desc.h: Regenerate.
998 * frv-desc.c: Regenerate.
999 * frv-opc.c: Regenerate.
1001 2004-01-13 Michael Snyder <msnyder@redhat.com>
1003 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1005 2004-01-09 Paul Brook <paul@codesourcery.com>
1007 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1010 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1012 * Makefile.am (libopcodes_la_DEPENDENCIES)
1013 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1014 comment about the problem.
1015 * Makefile.in: Regenerate.
1017 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1019 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1020 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1021 cut&paste errors in shifting/truncating numerical operands.
1022 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1023 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1024 (parse_uslo16): Likewise.
1025 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1026 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1027 (parse_s12): Likewise.
1028 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1029 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1030 (parse_uslo16): Likewise.
1031 (parse_uhi16): Parse gothi and gotfuncdeschi.
1032 (parse_d12): Parse got12 and gotfuncdesc12.
1033 (parse_s12): Likewise.
1035 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1037 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1038 instruction which looks similar to an 'rla' instruction.
1040 For older changes see ChangeLog-0203
1046 version-control: never