opcodes/ChangeLog

   1 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
   2
   3         * i386-dis.c (x_mode): Comment.
   4         (two_source_ops): File scope.
   5         (float_mem): Correct fisttpll and fistpll.
   6         (float_mem_mode): New table.
   7         (dofloat): Use it.
   8         (OP_E): Correct intel mode PTR output.
   9         (ptr_reg): Use open_char and close_char.
  10         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
  11         operands.  Set two_source_ops.
  12
  13 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
  14
  15         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
  16         instead of _raw_size.
  17
  18 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
  19
  20         * ia64-gen.c (in_iclass): Handle more postinc st
  21         and ld variants.
  22         * ia64-asmtab.c: Rebuilt.
  23
  24 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
  25
  26         * s390-opc.txt: Correct architecture mask for some opcodes.
  27         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
  28         in the esa mode as well.
  29
  30 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
  31
  32         * sh-dis.c (target_arch): Make unsigned.
  33         (print_insn_sh): Replace (most of) switch with a call to
  34         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
  35         * sh-opc.h: Redefine architecture flags values.
  36         Add sh3-nommu architecture.
  37         Reorganise <arch>_up macros so they make more visual sense.
  38         (SH_MERGE_ARCH_SET): Define new macro.
  39         (SH_VALID_BASE_ARCH_SET): Likewise.
  40         (SH_VALID_MMU_ARCH_SET): Likewise.
  41         (SH_VALID_CO_ARCH_SET): Likewise.
  42         (SH_VALID_ARCH_SET): Likewise.
  43         (SH_MERGE_ARCH_SET_VALID): Likewise.
  44         (SH_ARCH_SET_HAS_FPU): Likewise.
  45         (SH_ARCH_SET_HAS_DSP): Likewise.
  46         (SH_ARCH_UNKNOWN_ARCH): Likewise.
  47         (sh_get_arch_from_bfd_mach): Add prototype.
  48         (sh_get_arch_up_from_bfd_mach): Likewise.
  49         (sh_get_bfd_mach_from_arch_set): Likewise.
  50         (sh_merge_bfd_arc): Likewise.
  51
  52 2004-05-24  Peter Barada  <peter@the-baradas.com>
  53
  54         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
  55         into new match_insn_m68k function.  Loop over canidate
  56         matches and select first that completely matches.
  57         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
  58         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
  59         to verify addressing for MAC/EMAC.
  60         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
  61         reigster halves since 'fpu' and 'spl' look misleading.
  62         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
  63         * m68k-opc.c: Rearragne mac/emac cases to use longest for
  64         first, tighten up match masks.
  65         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
  66         'size' from special case code in print_insn_m68k to
  67         determine decode size of insns.
  68
  69 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
  70
  71         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
  72         well as when -mpower4.
  73
  74 2004-05-13  Nick Clifton  <nickc@redhat.com>
  75
  76         * po/fr.po: Updated French translation.
  77
  78 2004-05-05  Peter Barada  <peter@the-baradas.com>
  79
  80         * m68k-dis.c(print_insn_m68k): Add new chips, use core
  81         variants in arch_mask.  Only set m68881/68851 for 68k chips.
  82         * m68k-op.c: Switch from ColdFire chips to core variants.
  83
  84 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
  85
  86         PR 147.
  87         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
  88
  89 2004-04-29  Ben Elliston  <bje@au.ibm.com>
  90
  91         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
  92         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
  93
  94 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
  95
  96         * sh-dis.c (print_insn_sh): Print the value in constant pool
  97         as a symbol if it looks like a symbol.
  98
  99 2004-04-22  Peter Barada <peter@the-baradas.com>
 100
 101         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 102         appropriate ColdFire architectures.
 103         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 104         mask addressing.
 105         Add EMAC instructions, fix MAC instructions. Remove
 106         macmw/macml/msacmw/msacml instructions since mask addressing now
 107         supported.
 108
 109 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 110
 111         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 112         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 113         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 114         macro.  Adjust all users.
 115
 116 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 117
 118         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 119         separately.
 120
 121 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 122
 123         * m32r-asm.c: Regenerate.
 124
 125 2004-03-29  Stan Shebs  <shebs@apple.com>
 126
 127         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 128         used.
 129
 130 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 131
 132         * aclocal.m4: Regenerate.
 133         * config.in: Regenerate.
 134         * configure: Regenerate.
 135         * po/POTFILES.in: Regenerate.
 136         * po/opcodes.pot: Regenerate.
 137
 138 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 139
 140         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 141         PPC_OPERANDS_GPR_0.
 142         * ppc-opc.c (RA0): Define.
 143         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 144         (RAOPT): Rename from RAO.  Update all uses.
 145         (powerpc_opcodes): Use RA0 as appropriate.
 146
 147 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 148
 149         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 150
 151 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 152
 153         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 154
 155 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 156
 157         * i386-dis.c (GRPPLOCK): Delete.
 158         (grps): Delete GRPPLOCK entry.
 159
 160 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 161
 162         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 163         (M, Mp): Use OP_M.
 164         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 165         (GRPPADLCK): Define.
 166         (dis386): Use NOP_Fixup on "nop".
 167         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 168         (twobyte_has_modrm): Set for 0xa7.
 169         (padlock_table): Delete.  Move to..
 170         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 171         and clflush.
 172         (print_insn): Revert PADLOCK_SPECIAL code.
 173         (OP_E): Delete sfence, lfence, mfence checks.
 174
 175 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 176
 177         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 178         (INVLPG_Fixup): New function.
 179         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 180
 181 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 182
 183         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 184         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 185         (padlock_table): New struct with PadLock instructions.
 186         (print_insn): Handle PADLOCK_SPECIAL.
 187
 188 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 189
 190         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 191         (OP_E): Twiddle clflush to sfence here.
 192
 193 2004-03-08  Nick Clifton  <nickc@redhat.com>
 194
 195         * po/de.po: Updated German translation.
 196
 197 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 198
 199         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 200         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 201         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 202         accordingly.
 203
 204 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 205
 206         * frv-asm.c: Regenerate.
 207         * frv-desc.c: Regenerate.
 208         * frv-desc.h: Regenerate.
 209         * frv-dis.c: Regenerate.
 210         * frv-ibld.c: Regenerate.
 211         * frv-opc.c: Regenerate.
 212         * frv-opc.h: Regenerate.
 213
 214 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 215
 216         * frv-desc.c, frv-opc.c: Regenerate.
 217
 218 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 219
 220         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
 221
 222 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
 223
 224         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
 225         Also correct mistake in the comment.
 226
 227 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
 228
 229         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
 230         ensure that double registers have even numbers.
 231         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
 232         that reserved instruction 0xfffd does not decode the same
 233         as 0xfdfd (ftrv).
 234         * sh-opc.h: Add REG_N_D nibble type and use it whereever
 235         REG_N refers to a double register.
 236         Add REG_N_B01 nibble type and use it instead of REG_NM
 237         in ftrv.
 238         Adjust the bit patterns in a few comments.
 239
 240 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
 241
 242         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
 243
 244 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 245
 246         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
 247
 248 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 249
 250         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
 251
 252 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 253
 254         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
 255         mtivor32, mtivor33, mtivor34.
 256
 257 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
 258
 259         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
 260
 261 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
 262
 263         * arm-opc.h Maverick accumulator register opcode fixes.
 264
 265 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
 266
 267         * m32r-dis.c: Regenerate.
 268
 269 2004-01-27  Michael Snyder  <msnyder@redhat.com>
 270
 271         * sh-opc.h (sh_table): "fsrra", not "fssra".
 272
 273 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
 274
 275         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
 276         contraints.
 277
 278 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
 279
 280         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
 281
 282 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
 283
 284         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
 285         1.  Don't print scale factor on AT&T mode when index missing.
 286
 287 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
 288
 289         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
 290         when loaded into XR registers.
 291
 292 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 293
 294         * frv-desc.h: Regenerate.
 295         * frv-desc.c: Regenerate.
 296         * frv-opc.c: Regenerate.
 297
 298 2004-01-13  Michael Snyder  <msnyder@redhat.com>
 299
 300         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
 301
 302 2004-01-09  Paul Brook  <paul@codesourcery.com>
 303
 304         * arm-opc.h (arm_opcodes): Move generic mcrr after known
 305         specific opcodes.
 306
 307 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
 308
 309         * Makefile.am (libopcodes_la_DEPENDENCIES)
 310         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
 311         comment about the problem.
 312         * Makefile.in: Regenerate.
 313
 314 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 315
 316         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
 317         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
 318         cut&paste errors in shifting/truncating numerical operands.
 319         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 320         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
 321         (parse_uslo16): Likewise.
 322         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
 323         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
 324         (parse_s12): Likewise.
 325         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
 326         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
 327         (parse_uslo16): Likewise.
 328         (parse_uhi16): Parse gothi and gotfuncdeschi.
 329         (parse_d12): Parse got12 and gotfuncdesc12.
 330         (parse_s12): Likewise.
 331
 332 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
 333
 334         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
 335         instruction which looks similar to an 'rla' instruction.
 336
 337 For older changes see ChangeLog-0203
 338 \f
 339 Local Variables:
 340 mode: change-log
 341 left-margin: 8
 342 fill-column: 74
 343 version-control: never
 344 End: