opcodes/ChangeLog

   1 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
   2
   3         * vax-dis.c: Fix spelling error
   4         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
   5         of just "Entry mask: < r1 ... >"
   6
   7 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
   8
   9         * arm-dis.c (arm_opcodes): Document %E and %V.
  10         Add entries for v6T2 ARM instructions:
  11         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
  12         (print_insn_arm): Add support for %E and %V.
  13         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
  14
  15 2005-03-10  Jeff Baker  <jbaker@qnx.com>
  16             Alan Modra  <amodra@bigpond.net.au>
  17
  18         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
  19         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
  20         (SPRG_MASK): Delete.
  21         (XSPRG_MASK): Mask off extra bits now part of sprg field.
  22         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
  23         mfsprg4..7 after msprg and consolidate.
  24
  25 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
  26
  27         * vax-dis.c (entry_mask_bit): New array.
  28         (print_insn_vax): Decode function entry mask.
  29
  30 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
  31
  32         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
  33
  34 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
  35
  36         * po/opcodes.pot: Regenerate.
  37
  38 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
  39
  40         * arc-dis.c (a4_decoding_class): New enum.
  41         (dsmOneArcInst): Use the enum values for the decoding class.
  42         Remove redundant case in the switch for decodingClass value 11.
  43
  44 2005-03-02  Jan Beulich  <jbeulich@novell.com>
  45
  46         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
  47         accesses.
  48         (OP_C): Consider lock prefix in non-64-bit modes.
  49
  50 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
  51
  52         * cris-dis.c (format_hex): Remove ineffective warning fix.
  53         * crx-dis.c (make_instruction): Warning fix.
  54         * frv-asm.c: Regenerate.
  55
  56 2005-02-23  Nick Clifton  <nickc@redhat.com>
  57
  58         * cgen-dis.in: Use bfd_byte for buffers that are passed to
  59         read_memory.
  60
  61         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
  62
  63         * crx-dis.c (make_instruction): Move argument structure into inner
  64         scope and ensure that all of its fields are initialised before
  65         they are used.
  66
  67         * fr30-asm.c: Regenerate.
  68         * fr30-dis.c: Regenerate.
  69         * frv-asm.c: Regenerate.
  70         * frv-dis.c: Regenerate.
  71         * ip2k-asm.c: Regenerate.
  72         * ip2k-dis.c: Regenerate.
  73         * iq2000-asm.c: Regenerate.
  74         * iq2000-dis.c: Regenerate.
  75         * m32r-asm.c: Regenerate.
  76         * m32r-dis.c: Regenerate.
  77         * openrisc-asm.c: Regenerate.
  78         * openrisc-dis.c: Regenerate.
  79         * xstormy16-asm.c: Regenerate.
  80         * xstormy16-dis.c: Regenerate.
  81
  82 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
  83
  84         * arc-ext.c: Warning fixes.
  85         * arc-ext.h: Likewise.
  86         * cgen-opc.c: Likewise.
  87         * ia64-gen.c: Likewise.
  88         * maxq-dis.c: Likewise.
  89         * ns32k-dis.c: Likewise.
  90         * w65-dis.c: Likewise.
  91         * ia64-asmtab.c: Regenerate.
  92
  93 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
  94
  95         * fr30-desc.c: Regenerate.
  96         * fr30-desc.h: Regenerate.
  97         * fr30-opc.c: Regenerate.
  98         * fr30-opc.h: Regenerate.
  99         * frv-desc.c: Regenerate.
 100         * frv-desc.h: Regenerate.
 101         * frv-opc.c: Regenerate.
 102         * frv-opc.h: Regenerate.
 103         * ip2k-desc.c: Regenerate.
 104         * ip2k-desc.h: Regenerate.
 105         * ip2k-opc.c: Regenerate.
 106         * ip2k-opc.h: Regenerate.
 107         * iq2000-desc.c: Regenerate.
 108         * iq2000-desc.h: Regenerate.
 109         * iq2000-opc.c: Regenerate.
 110         * iq2000-opc.h: Regenerate.
 111         * m32r-desc.c: Regenerate.
 112         * m32r-desc.h: Regenerate.
 113         * m32r-opc.c: Regenerate.
 114         * m32r-opc.h: Regenerate.
 115         * m32r-opinst.c: Regenerate.
 116         * openrisc-desc.c: Regenerate.
 117         * openrisc-desc.h: Regenerate.
 118         * openrisc-opc.c: Regenerate.
 119         * openrisc-opc.h: Regenerate.
 120         * xstormy16-desc.c: Regenerate.
 121         * xstormy16-desc.h: Regenerate.
 122         * xstormy16-opc.c: Regenerate.
 123         * xstormy16-opc.h: Regenerate.
 124
 125 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 126
 127         * Makefile.am: Run "make dep-am"
 128         * Makefile.in: Regenerate.
 129
 130 2005-02-15  Nick Clifton  <nickc@redhat.com>
 131
 132         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 133         compile time warnings.
 134         (print_keyword): Likewise.
 135         (default_print_insn): Likewise.
 136
 137         * fr30-desc.c: Regenerated.
 138         * fr30-desc.h: Regenerated.
 139         * fr30-dis.c: Regenerated.
 140         * fr30-opc.c: Regenerated.
 141         * fr30-opc.h: Regenerated.
 142         * frv-desc.c: Regenerated.
 143         * frv-dis.c: Regenerated.
 144         * frv-opc.c: Regenerated.
 145         * ip2k-asm.c: Regenerated.
 146         * ip2k-desc.c: Regenerated.
 147         * ip2k-desc.h: Regenerated.
 148         * ip2k-dis.c: Regenerated.
 149         * ip2k-opc.c: Regenerated.
 150         * ip2k-opc.h: Regenerated.
 151         * iq2000-desc.c: Regenerated.
 152         * iq2000-dis.c: Regenerated.
 153         * iq2000-opc.c: Regenerated.
 154         * m32r-asm.c: Regenerated.
 155         * m32r-desc.c: Regenerated.
 156         * m32r-desc.h: Regenerated.
 157         * m32r-dis.c: Regenerated.
 158         * m32r-opc.c: Regenerated.
 159         * m32r-opc.h: Regenerated.
 160         * m32r-opinst.c: Regenerated.
 161         * openrisc-desc.c: Regenerated.
 162         * openrisc-desc.h: Regenerated.
 163         * openrisc-dis.c: Regenerated.
 164         * openrisc-opc.c: Regenerated.
 165         * openrisc-opc.h: Regenerated.
 166         * xstormy16-desc.c: Regenerated.
 167         * xstormy16-desc.h: Regenerated.
 168         * xstormy16-dis.c: Regenerated.
 169         * xstormy16-opc.c: Regenerated.
 170         * xstormy16-opc.h: Regenerated.
 171
 172 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 173
 174         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 175         address.
 176
 177 2005-02-11  Nick Clifton  <nickc@redhat.com>
 178
 179         * iq2000-asm.c: Regenerate.
 180
 181         * frv-dis.c: Regenerate.
 182
 183 2005-02-07  Jim Blandy  <jimb@redhat.com>
 184
 185         * Makefile.am (CGEN): Load guile.scm before calling the main
 186         application script.
 187         * Makefile.in: Regenerated.
 188         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 189         Simply pass the cgen-opc.scm path to ${cgen} as its first
 190         argument; ${cgen} itself now contains the '-s', or whatever is
 191         appropriate for the Scheme being used.
 192
 193 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 194
 195         * configure: Regenerate to track ../gettext.m4.
 196
 197 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 198
 199         * ia64-gen.c (NELEMS): Define.
 200         (shrink): Generate alias with missing second predicate register when
 201         opcode has two outputs and these are both predicates.
 202         * ia64-opc-i.c (FULL17): Define.
 203         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 204         here to generate output template.
 205         (TBITCM, TNATCM): Undefine after use.
 206         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 207         first input. Add ld16 aliases without ar.csd as second output. Add
 208         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 209         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 210         ar.ccv as third/fourth inputs. Consolidate through...
 211         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 212         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 213         * ia64-asmtab.c: Regenerate.
 214
 215 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 216
 217         * configure: Regenerate to track ../gettext.m4 change.
 218
 219 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 220
 221         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 222         * frv-asm.c: Rebuilt.
 223         * frv-desc.c: Rebuilt.
 224         * frv-desc.h: Rebuilt.
 225         * frv-dis.c: Rebuilt.
 226         * frv-ibld.c: Rebuilt.
 227         * frv-opc.c: Rebuilt.
 228         * frv-opc.h: Rebuilt.
 229
 230 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 231
 232         * configure: Regenerate, ../gettext.m4 was updated.
 233
 234 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 235
 236         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 237         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 238         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 239         * mips-dis.c: Ditto.
 240
 241 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 242
 243         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 244
 245 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 246
 247         * mips-dis.c (no_aliases): New disassembly option flag.
 248         (set_default_mips_dis_options): Init no_aliases to zero.
 249         (parse_mips_dis_option): Handle no-aliases option.
 250         (print_insn_mips): Ignore table entries that are aliases
 251         if no_aliases is set.
 252         (print_insn_mips16): Ditto.
 253         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 254         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 255         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 256         * mips16-opc.c (mips16_opcodes): Ditto.
 257
 258 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 259
 260         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 261         (inheritance diagram): Add missing edge.
 262         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 263         easier for the testsuite.
 264         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 265         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 266         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 267         arch_sh2a_or_sh4_up child.
 268         (sh_table): Do renaming as above.
 269         Correct comment for ldc.l for gas testsuite to read.
 270         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 271         Correct comments for movy.w and movy.l for gas testsuite to read.
 272         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 273
 274 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 275
 276         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 277
 278 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 279
 280         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 281
 282 2005-01-10  Andreas Schwab  <schwab@suse.de>
 283
 284         * disassemble.c (disassemble_init_for_target) <case
 285         bfd_arch_ia64>: Set skip_zeroes to 16.
 286         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 287
 288 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 289
 290         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 291
 292 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 293
 294         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 295         memory references. Convert avr_operand() to C90 formatting.
 296
 297 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 298
 299         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 300
 301 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 302
 303         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 304         (no_op_insn): Initialize array with instructions that have no
 305         operands.
 306         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 307
 308 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 309
 310         * arm-dis.c: Correct top-level comment.
 311
 312 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 313
 314         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 315         architecuture defining the insn.
 316         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 317         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 318         field.
 319         Also include opcode/arm.h.
 320         * Makefile.am (arm-dis.lo): Update dependency list.
 321         * Makefile.in: Regenerate.
 322
 323 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 324
 325         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 326         reflect the change to the short immediate syntax.
 327
 328 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 329
 330         * or32-opc.c (debug): Warning fix.
 331         * po/POTFILES.in: Regenerate.
 332
 333         * maxq-dis.c: Formatting.
 334         (print_insn): Warning fix.
 335
 336 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 337
 338         * arm-dis.c (WORD_ADDRESS): Define.
 339         (print_insn): Use it.  Correct big-endian end-of-section handling.
 340
 341 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 342             Vineet Sharma      <vineets@noida.hcltech.com>
 343
 344         * maxq-dis.c: New file.
 345         * disassemble.c (ARCH_maxq): Define.
 346         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 347         instructions..
 348         * configure.in: Add case for bfd_maxq_arch.
 349         * configure: Regenerate.
 350         * Makefile.am: Add support for maxq-dis.c
 351         * Makefile.in: Regenerate.
 352         * aclocal.m4: Regenerate.
 353
 354 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 355
 356         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 357         mode.
 358         * crx-dis.c: Likewise.
 359
 360 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 361
 362         Generally, handle CRISv32.
 363         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 364         (struct cris_disasm_data): New type.
 365         (format_reg, format_hex, cris_constraint, print_flags)
 366         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 367         callers changed.
 368         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 369         (print_insn_crisv32_without_register_prefix)
 370         (print_insn_crisv10_v32_with_register_prefix)
 371         (print_insn_crisv10_v32_without_register_prefix)
 372         (cris_parse_disassembler_options): New functions.
 373         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 374         parameter.  All callers changed.
 375         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 376         failure.
 377         (cris_constraint) <case 'Y', 'U'>: New cases.
 378         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 379         for constraint 'n'.
 380         (print_with_operands) <case 'Y'>: New case.
 381         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 382         <case 'N', 'Y', 'Q'>: New cases.
 383         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 384         (print_insn_cris_with_register_prefix)
 385         (print_insn_cris_without_register_prefix): Call
 386         cris_parse_disassembler_options.
 387         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 388         for CRISv32 and the size of immediate operands.  New v32-only
 389         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 390         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 391         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 392         Change brp to be v3..v10.
 393         (cris_support_regs): New vector.
 394         (cris_opcodes): Update head comment.  New format characters '[',
 395         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 396         Add new opcodes for v32 and adjust existing opcodes to accommodate
 397         differences to earlier variants.
 398         (cris_cond15s): New vector.
 399
 400 2004-11-04 Jan Beulich <jbeulich@novell.com>
 401
 402         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 403         (indirEb): Remove.
 404         (Mp): Use f_mode rather than none at all.
 405         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 406         replaces what previously was x_mode; x_mode now means 128-bit SSE
 407         operands.
 408         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 409         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 410         pinsrw's second operand is Edqw.
 411         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 412         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 413         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 414         mode when an operand size override is present or always suffixing.
 415         More instructions will need to be added to this group.
 416         (putop): Handle new macro chars 'C' (short/long suffix selector),
 417         'I' (Intel mode override for following macro char), and 'J' (for
 418         adding the 'l' prefix to far branches in AT&T mode). When an
 419         alternative was specified in the template, honor macro character when
 420         specified for Intel mode.
 421         (OP_E): Handle new *_mode values. Correct pointer specifications for
 422         memory operands. Consolidate output of index register.
 423         (OP_G): Handle new *_mode values.
 424         (OP_I): Handle const_1_mode.
 425         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 426         respective opcode prefix bits have been consumed.
 427         (OP_EM, OP_EX): Provide some default handling for generating pointer
 428         specifications.
 429
 430 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 431
 432         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 433         COP_INST macro.
 434
 435 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 436
 437         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 438         (getregliststring): Support HI/LO and user registers.
 439         * crx-opc.c (crx_instruction): Update data structure according to the
 440         rearrangement done in CRX opcode header file.
 441         (crx_regtab):  Likewise.
 442         (crx_optab):  Likewise.
 443         (crx_instruction): Reorder load/stor instructions, remove unsupported
 444         formats.
 445         support new Co-Processor instruction 'cpi'.
 446
 447 2004-10-27  Nick Clifton  <nickc@redhat.com>
 448
 449         * opcodes/iq2000-asm.c: Regenerate.
 450         * opcodes/iq2000-desc.c: Regenerate.
 451         * opcodes/iq2000-desc.h: Regenerate.
 452         * opcodes/iq2000-dis.c: Regenerate.
 453         * opcodes/iq2000-ibld.c: Regenerate.
 454         * opcodes/iq2000-opc.c: Regenerate.
 455         * opcodes/iq2000-opc.h: Regenerate.
 456
 457 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 458
 459         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 460         us4, us5 (respectively).
 461         Remove unsupported 'popa' instruction.
 462         Reverse operands order in store co-processor instructions.
 463
 464 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 465
 466         * Makefile.am: Run "make dep-am"
 467         * Makefile.in: Regenerate.
 468
 469 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 470
 471         * xtensa-dis.c: Use ISO C90 formatting.
 472
 473 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 474
 475         * ppc-opc.c: Revert 2004-09-09 change.
 476
 477 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 478
 479         * xtensa-dis.c (state_names): Delete.
 480         (fetch_data): Use xtensa_isa_maxlength.
 481         (print_xtensa_operand): Replace operand parameter with opcode/operand
 482         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 483         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 484         instruction bundles.  Use xmalloc instead of malloc.
 485
 486 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 487
 488         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 489         initializers.
 490
 491 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 492
 493         * crx-opc.c (crx_instruction): Support Co-processor insns.
 494         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 495         (getregliststring): Change function to use the above enum.
 496         (print_arg): Handle CO-Processor insns.
 497         (crx_cinvs): Add 'b' option to invalidate the branch-target
 498         cache.
 499
 500 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 501
 502         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 503         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 504         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 505         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 506         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 507
 508 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 509
 510         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 511         rather than add it.
 512
 513 2004-09-30  Paul Brook  <paul@codesourcery.com>
 514
 515         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 516         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 517
 518 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 519
 520         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 521         (CONFIG_STATUS_DEPENDENCIES): New.
 522         (Makefile): Removed.
 523         (config.status): Likewise.
 524         * Makefile.in: Regenerated.
 525
 526 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 527
 528         * Makefile.am: Run "make dep-am".
 529         * Makefile.in: Regenerate.
 530         * aclocal.m4: Regenerate.
 531         * configure: Regenerate.
 532         * po/POTFILES.in: Regenerate.
 533         * po/opcodes.pot: Regenerate.
 534
 535 2004-09-11  Andreas Schwab  <schwab@suse.de>
 536
 537         * configure: Rebuild.
 538
 539 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 540
 541         * ppc-opc.c (L): Make this field not optional.
 542
 543 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 544
 545         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 546         Fix parameter to 'm[t|f]csr' insns.
 547
 548 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 549
 550         * configure.in: Autoupdate to autoconf 2.59.
 551         * aclocal.m4: Rebuild with aclocal 1.4p6.
 552         * configure: Rebuild with autoconf 2.59.
 553         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 554         bfd changes for autoconf 2.59 on the way).
 555         * config.in: Rebuild with autoheader 2.59.
 556
 557 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 558
 559         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 560
 561 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 562
 563         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 564         (GRPPADLCK2): New define.
 565         (twobyte_has_modrm): True for 0xA6.
 566         (grps): GRPPADLCK2 for opcode 0xA6.
 567
 568 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 569
 570         Introduce SH2a support.
 571         * sh-opc.h (arch_sh2a_base): Renumber.
 572         (arch_sh2a_nofpu_base): Remove.
 573         (arch_sh_base_mask): Adjust.
 574         (arch_opann_mask): New.
 575         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 576         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 577         (sh_table): Adjust whitespace.
 578         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 579         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 580         instruction list throughout.
 581         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 582         of arch_sh2a in instruction list throughout.
 583         (arch_sh2e_up): Accomodate above changes.
 584         (arch_sh2_up): Ditto.
 585         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 586         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 587         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 588         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 589         * sh-opc.h (arch_sh2a_nofpu): New.
 590         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 591         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 592         instruction.
 593         2004-01-20  DJ Delorie  <dj@redhat.com>
 594         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 595         2003-12-29  DJ Delorie  <dj@redhat.com>
 596         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 597         sh_opcode_info, sh_table): Add sh2a support.
 598         (arch_op32): New, to tag 32-bit opcodes.
 599         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 600         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 601         * sh-opc.h (arch_sh2a): Add.
 602         * sh-dis.c (arch_sh2a): Handle.
 603         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 604
 605 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 606
 607         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 608
 609 2004-07-22  Nick Clifton  <nickc@redhat.com>
 610
 611         PR/280
 612         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 613         insns - this is done by objdump itself.
 614         * h8500-dis.c (print_insn_h8500): Likewise.
 615
 616 2004-07-21  Jan Beulich <jbeulich@novell.com>
 617
 618         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 619         regardless of address size prefix in effect.
 620         (ptr_reg): Size or address registers does not depend on rex64, but
 621         on the presence of an address size override.
 622         (OP_MMX): Use rex.x only for xmm registers.
 623         (OP_EM): Use rex.z only for xmm registers.
 624
 625 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 626
 627         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 628         move/branch operations to the bottom so that VR5400 multimedia
 629         instructions take precedence in disassembly.
 630
 631 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 632
 633         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 634         ISA-specific "break" encoding.
 635
 636 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 637
 638         * arm-opc.h: Fix typo in comment.
 639
 640 2004-07-11  Andreas Schwab  <schwab@suse.de>
 641
 642         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 643
 644 2004-07-09  Andreas Schwab  <schwab@suse.de>
 645
 646         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 647
 648 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 649
 650         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 651         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 652         (crx-dis.lo): New target.
 653         (crx-opc.lo): Likewise.
 654         * Makefile.in: Regenerate.
 655         * configure.in: Handle bfd_crx_arch.
 656         * configure: Regenerate.
 657         * crx-dis.c: New file.
 658         * crx-opc.c: New file.
 659         * disassemble.c (ARCH_crx): Define.
 660         (disassembler): Handle ARCH_crx.
 661
 662 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 663
 664         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 665         * ia64-asmtab.c: Regnerate.
 666
 667 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 668
 669         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 670         (extract_fxm): Don't test dialect.
 671         (XFXFXM_MASK): Include the power4 bit.
 672         (XFXM): Add p4 param.
 673         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 674
 675 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 676
 677         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 678         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 679
 680 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 681
 682         * ppc-opc.c (BH, XLBH_MASK): Define.
 683         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 684
 685 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 686
 687         * i386-dis.c (x_mode): Comment.
 688         (two_source_ops): File scope.
 689         (float_mem): Correct fisttpll and fistpll.
 690         (float_mem_mode): New table.
 691         (dofloat): Use it.
 692         (OP_E): Correct intel mode PTR output.
 693         (ptr_reg): Use open_char and close_char.
 694         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 695         operands.  Set two_source_ops.
 696
 697 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 698
 699         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 700         instead of _raw_size.
 701
 702 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 703
 704         * ia64-gen.c (in_iclass): Handle more postinc st
 705         and ld variants.
 706         * ia64-asmtab.c: Rebuilt.
 707
 708 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 709
 710         * s390-opc.txt: Correct architecture mask for some opcodes.
 711         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 712         in the esa mode as well.
 713
 714 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 715
 716         * sh-dis.c (target_arch): Make unsigned.
 717         (print_insn_sh): Replace (most of) switch with a call to
 718         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 719         * sh-opc.h: Redefine architecture flags values.
 720         Add sh3-nommu architecture.
 721         Reorganise <arch>_up macros so they make more visual sense.
 722         (SH_MERGE_ARCH_SET): Define new macro.
 723         (SH_VALID_BASE_ARCH_SET): Likewise.
 724         (SH_VALID_MMU_ARCH_SET): Likewise.
 725         (SH_VALID_CO_ARCH_SET): Likewise.
 726         (SH_VALID_ARCH_SET): Likewise.
 727         (SH_MERGE_ARCH_SET_VALID): Likewise.
 728         (SH_ARCH_SET_HAS_FPU): Likewise.
 729         (SH_ARCH_SET_HAS_DSP): Likewise.
 730         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 731         (sh_get_arch_from_bfd_mach): Add prototype.
 732         (sh_get_arch_up_from_bfd_mach): Likewise.
 733         (sh_get_bfd_mach_from_arch_set): Likewise.
 734         (sh_merge_bfd_arc): Likewise.
 735
 736 2004-05-24  Peter Barada  <peter@the-baradas.com>
 737
 738         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 739         into new match_insn_m68k function.  Loop over canidate
 740         matches and select first that completely matches.
 741         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 742         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 743         to verify addressing for MAC/EMAC.
 744         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 745         reigster halves since 'fpu' and 'spl' look misleading.
 746         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 747         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 748         first, tighten up match masks.
 749         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 750         'size' from special case code in print_insn_m68k to
 751         determine decode size of insns.
 752
 753 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 754
 755         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 756         well as when -mpower4.
 757
 758 2004-05-13  Nick Clifton  <nickc@redhat.com>
 759
 760         * po/fr.po: Updated French translation.
 761
 762 2004-05-05  Peter Barada  <peter@the-baradas.com>
 763
 764         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 765         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 766         * m68k-op.c: Switch from ColdFire chips to core variants.
 767
 768 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 769
 770         PR 147.
 771         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 772
 773 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 774
 775         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 776         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 777
 778 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 779
 780         * sh-dis.c (print_insn_sh): Print the value in constant pool
 781         as a symbol if it looks like a symbol.
 782
 783 2004-04-22  Peter Barada <peter@the-baradas.com>
 784
 785         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 786         appropriate ColdFire architectures.
 787         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 788         mask addressing.
 789         Add EMAC instructions, fix MAC instructions. Remove
 790         macmw/macml/msacmw/msacml instructions since mask addressing now
 791         supported.
 792
 793 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 794
 795         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 796         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 797         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 798         macro.  Adjust all users.
 799
 800 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 801
 802         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 803         separately.
 804
 805 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 806
 807         * m32r-asm.c: Regenerate.
 808
 809 2004-03-29  Stan Shebs  <shebs@apple.com>
 810
 811         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 812         used.
 813
 814 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 815
 816         * aclocal.m4: Regenerate.
 817         * config.in: Regenerate.
 818         * configure: Regenerate.
 819         * po/POTFILES.in: Regenerate.
 820         * po/opcodes.pot: Regenerate.
 821
 822 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 823
 824         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 825         PPC_OPERANDS_GPR_0.
 826         * ppc-opc.c (RA0): Define.
 827         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 828         (RAOPT): Rename from RAO.  Update all uses.
 829         (powerpc_opcodes): Use RA0 as appropriate.
 830
 831 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 832
 833         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 834
 835 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 836
 837         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 838
 839 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 840
 841         * i386-dis.c (GRPPLOCK): Delete.
 842         (grps): Delete GRPPLOCK entry.
 843
 844 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 845
 846         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 847         (M, Mp): Use OP_M.
 848         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 849         (GRPPADLCK): Define.
 850         (dis386): Use NOP_Fixup on "nop".
 851         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 852         (twobyte_has_modrm): Set for 0xa7.
 853         (padlock_table): Delete.  Move to..
 854         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 855         and clflush.
 856         (print_insn): Revert PADLOCK_SPECIAL code.
 857         (OP_E): Delete sfence, lfence, mfence checks.
 858
 859 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 860
 861         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 862         (INVLPG_Fixup): New function.
 863         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 864
 865 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 866
 867         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 868         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 869         (padlock_table): New struct with PadLock instructions.
 870         (print_insn): Handle PADLOCK_SPECIAL.
 871
 872 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 873
 874         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 875         (OP_E): Twiddle clflush to sfence here.
 876
 877 2004-03-08  Nick Clifton  <nickc@redhat.com>
 878
 879         * po/de.po: Updated German translation.
 880
 881 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 882
 883         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 884         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 885         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 886         accordingly.
 887
 888 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 889
 890         * frv-asm.c: Regenerate.
 891         * frv-desc.c: Regenerate.
 892         * frv-desc.h: Regenerate.
 893         * frv-dis.c: Regenerate.
 894         * frv-ibld.c: Regenerate.
 895         * frv-opc.c: Regenerate.
 896         * frv-opc.h: Regenerate.
 897
 898 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 899
 900         * frv-desc.c, frv-opc.c: Regenerate.
 901
 902 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 903
 904         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
 905
 906 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
 907
 908         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
 909         Also correct mistake in the comment.
 910
 911 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
 912
 913         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
 914         ensure that double registers have even numbers.
 915         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
 916         that reserved instruction 0xfffd does not decode the same
 917         as 0xfdfd (ftrv).
 918         * sh-opc.h: Add REG_N_D nibble type and use it whereever
 919         REG_N refers to a double register.
 920         Add REG_N_B01 nibble type and use it instead of REG_NM
 921         in ftrv.
 922         Adjust the bit patterns in a few comments.
 923
 924 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
 925
 926         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
 927
 928 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 929
 930         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
 931
 932 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 933
 934         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
 935
 936 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 937
 938         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
 939         mtivor32, mtivor33, mtivor34.
 940
 941 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
 942
 943         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
 944
 945 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
 946
 947         * arm-opc.h Maverick accumulator register opcode fixes.
 948
 949 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
 950
 951         * m32r-dis.c: Regenerate.
 952
 953 2004-01-27  Michael Snyder  <msnyder@redhat.com>
 954
 955         * sh-opc.h (sh_table): "fsrra", not "fssra".
 956
 957 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
 958
 959         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
 960         contraints.
 961
 962 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
 963
 964         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
 965
 966 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
 967
 968         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
 969         1.  Don't print scale factor on AT&T mode when index missing.
 970
 971 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
 972
 973         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
 974         when loaded into XR registers.
 975
 976 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
 977
 978         * frv-desc.h: Regenerate.
 979         * frv-desc.c: Regenerate.
 980         * frv-opc.c: Regenerate.
 981
 982 2004-01-13  Michael Snyder  <msnyder@redhat.com>
 983
 984         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
 985
 986 2004-01-09  Paul Brook  <paul@codesourcery.com>
 987
 988         * arm-opc.h (arm_opcodes): Move generic mcrr after known
 989         specific opcodes.
 990
 991 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
 992
 993         * Makefile.am (libopcodes_la_DEPENDENCIES)
 994         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
 995         comment about the problem.
 996         * Makefile.in: Regenerate.
 997
 998 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
 999
1000         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1001         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1002         cut&paste errors in shifting/truncating numerical operands.
1003         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1004         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1005         (parse_uslo16): Likewise.
1006         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1007         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1008         (parse_s12): Likewise.
1009         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1010         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1011         (parse_uslo16): Likewise.
1012         (parse_uhi16): Parse gothi and gotfuncdeschi.
1013         (parse_d12): Parse got12 and gotfuncdesc12.
1014         (parse_s12): Likewise.
1015
1016 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1017
1018         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1019         instruction which looks similar to an 'rla' instruction.
1020
1021 For older changes see ChangeLog-0203
1022 \f
1023 Local Variables:
1024 mode: change-log
1025 left-margin: 8
1026 fill-column: 74
1027 version-control: never
1028 End: