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[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2012-04-12 David S. Miller <davem@davemloft.net>
2
3 * sparc-dis.c (X_DISP10): Define.
4 (print_insn_sparc): Handle '='.
5
6 2012-04-01 Mike Frysinger <vapier@gentoo.org>
7
8 * bfin-dis.c (fmtconst): Replace decimal handling with a single
9 sprintf call and the '*' field width.
10
11 2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
12
13 * mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
14
15 2012-03-16 Alan Modra <amodra@gmail.com>
16
17 * ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
18 (powerpc_opcd_indices): Bump array size.
19 (disassemble_init_powerpc): Set powerpc_opcd_indices entries
20 corresponding to unused opcodes to following entry.
21 (lookup_powerpc): New function, extracted and optimised from..
22 (print_insn_powerpc): ..here.
23
24 2012-03-15 Alan Modra <amodra@gmail.com>
25 James Lemke <jwlemke@codesourcery.com>
26
27 * disassemble.c (disassemble_init_for_target): Handle ppc init.
28 * ppc-dis.c (private): New var.
29 (powerpc_init_dialect): Don't return calloc failure, instead use
30 private.
31 (PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
32 (powerpc_opcd_indices): New array.
33 (disassemble_init_powerpc): New function.
34 (print_insn_big_powerpc): Don't init dialect here.
35 (print_insn_little_powerpc): Likewise.
36 (print_insn_powerpc): Start search using powerpc_opcd_indices.
37
38 2012-03-10 Edmar Wienskoski <edmar@freescale.com>
39
40 * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
41 * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
42 (PPCVEC2, PPCTMR, E6500): New short names.
43 (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
44 mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
45 lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
46 lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
47 lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
48 optional operands on sync instruction for E6500 target.
49
50 2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
51
52 * s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
53
54 2012-02-27 Alan Modra <amodra@gmail.com>
55
56 * mt-dis.c: Regenerate.
57
58 2012-02-27 Alan Modra <amodra@gmail.com>
59
60 * v850-opc.c (extract_v8): Rearrange to make it obvious this
61 is the inverse of corresponding insert function.
62 (extract_d22, extract_u9, extract_r4): Likewise.
63 (extract_d9): Correct sign extension.
64 (extract_d16_15): Don't assume "long" is 32 bits, and don't
65 rely on implementation defined behaviour for shift right of
66 signed types.
67 (extract_d16_16, extract_d17_16, extract_i9): Likewise.
68 (extract_d23): Likewise, and correct mask.
69
70 2012-02-27 Alan Modra <amodra@gmail.com>
71
72 * crx-dis.c (print_arg): Mask constant to 32 bits.
73 * crx-opc.c (cst4_map): Use int array.
74
75 2012-02-27 Alan Modra <amodra@gmail.com>
76
77 * arc-dis.c (BITS): Don't use shifts to mask off bits.
78 (FIELDD): Sign extend with xor,sub.
79
80 2012-02-25 Walter Lee <walt@tilera.com>
81
82 * tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
83 * tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
84 TILEPRO_OPC_LW_TLS_SN.
85
86 2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
87
88 * i386-opc.h (HLEPrefixNone): New.
89 (HLEPrefixLock): Likewise.
90 (HLEPrefixAny): Likewise.
91 (HLEPrefixRelease): Likewise.
92
93 2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
94
95 * i386-dis.c (HLE_Fixup1): New.
96 (HLE_Fixup2): Likewise.
97 (HLE_Fixup3): Likewise.
98 (Ebh1): Likewise.
99 (Evh1): Likewise.
100 (Ebh2): Likewise.
101 (Evh2): Likewise.
102 (Ebh3): Likewise.
103 (Evh3): Likewise.
104 (MOD_C6_REG_7): Likewise.
105 (MOD_C7_REG_7): Likewise.
106 (RM_C6_REG_7): Likewise.
107 (RM_C7_REG_7): Likewise.
108 (XACQUIRE_PREFIX): Likewise.
109 (XRELEASE_PREFIX): Likewise.
110 (dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
111 cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
112 Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
113 (reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
114 not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
115 MOD_C6_REG_7 and MOD_C7_REG_7.
116 (mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
117 (rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
118 xtest.
119 (prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
120 (CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
121
122 * i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
123 CPU_RTM_FLAGS.
124 (cpu_flags): Add CpuHLE and CpuRTM.
125 (opcode_modifiers): Add HLEPrefixOk.
126
127 * i386-opc.h (CpuHLE): New.
128 (CpuRTM): Likewise.
129 (HLEPrefixOk): Likewise.
130 (i386_cpu_flags): Add cpuhle and cpurtm.
131 (i386_opcode_modifier): Add hleprefixok.
132
133 * i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
134 add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
135 sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
136 operand. Add xacquire, xrelease, xabort, xbegin, xend and
137 xtest.
138 * i386-init.h: Regenerated.
139 * i386-tbl.h: Likewise.
140
141 2012-01-24 DJ Delorie <dj@redhat.com>
142
143 * rl78-decode.opc (rl78_decode_opcode): Add NOT1.
144 * rl78-decode.c: Regenerate.
145
146 2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
147
148 PR binutils/10173
149 * cr16-dis.c (print_arg): Test symtab_size not num_symbols.
150
151 2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
152
153 * m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
154 register and move them after pmove with PSR/PCSR register.
155
156 2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
157
158 * i386-dis.c (mod_table): Add vmfunc.
159
160 * i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
161 (cpu_flags): CpuVMFUNC.
162
163 * i386-opc.h (CpuVMFUNC): New.
164 (i386_cpu_flags): Add cpuvmfunc.
165
166 * i386-opc.tbl: Add vmfunc.
167 * i386-init.h: Regenerated.
168 * i386-tbl.h: Likewise.
169
170 For older changes see ChangeLog-2011
171 \f
172 Local Variables:
173 mode: change-log
174 left-margin: 8
175 fill-column: 74
176 version-control: never
177 End:
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