opcodes/ChangeLog

   1 2008-08-28  Jan Beulich  <jbeulich@novell.com>
   2
   3         * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
   4
   5 2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>
   6
   7         * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
   8         * ia64-gen.c (lookup_specifier): Likewise.
   9
  10         * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
  11         * ia64-raw.tbl: Likewise.
  12         * ia64-waw.tbl: Likewise.
  13         * ia64-asmtab.c: Regenerated.
  14
  15 2008-08-27  H.J. Lu  <hongjiu.lu@intel.com>
  16
  17         * i386-opc.tbl: Correct fidivr operand size.
  18
  19         * i386-tbl.h: Regenerated.
  20
  21 2008-08-24  Alan Modra  <amodra@bigpond.net.au>
  22
  23         * configure.in: Update a number of obsolete autoconf macros.
  24         * aclocal.m4: Regenerate.
  25
  26 2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>
  27
  28         AVX Programming Reference (August, 2008)
  29         * i386-dis.c (PREFIX_VEX_38DB): New.
  30         (PREFIX_VEX_38DC): Likewise.
  31         (PREFIX_VEX_38DD): Likewise.
  32         (PREFIX_VEX_38DE): Likewise.
  33         (PREFIX_VEX_38DF): Likewise.
  34         (PREFIX_VEX_3ADF): Likewise.
  35         (VEX_LEN_38DB_P_2): Likewise.
  36         (VEX_LEN_38DC_P_2): Likewise.
  37         (VEX_LEN_38DD_P_2): Likewise.
  38         (VEX_LEN_38DE_P_2): Likewise.
  39         (VEX_LEN_38DF_P_2): Likewise.
  40         (VEX_LEN_3ADF_P_2): Likewise.
  41         (PREFIX_VEX_3A04): Updated.
  42         (VEX_LEN_3A06_P_2): Likewise.
  43         (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
  44         PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
  45         (x86_64_table): Likewise.
  46         (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
  47         VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
  48         VEX_LEN_3ADF_P_2.
  49
  50         * i386-opc.tbl: Add AES + AVX instructions.
  51         * i386-init.h: Regenerated.
  52         * i386-tbl.h: Likewise.
  53
  54 2008-08-15  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  55
  56         * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
  57         * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
  58
  59 2008-08-15  Alan Modra  <amodra@bigpond.net.au>
  60
  61         PR 6526
  62         * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
  63         * Makefile.in: Regenerate.
  64         * aclocal.m4: Regenerate.
  65         * config.in: Regenerate.
  66         * configure: Regenerate.
  67
  68 2008-08-14  Sebastian Huber  <sebastian.huber@embedded-brains.de>
  69
  70         PR 6825
  71         * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
  72
  73 2008-08-12  H.J. Lu  <hongjiu.lu@intel.com>
  74
  75         * i386-opc.tbl: Add syscall and sysret for Cpu64.
  76
  77         * i386-tbl.h: Regenerated.
  78
  79 2008-08-04  Alan Modra  <amodra@bigpond.net.au>
  80
  81         * Makefile.am (POTFILES.in): Set LC_ALL=C.
  82         * Makefile.in: Regenerate.
  83         * po/POTFILES.in: Regenerate.
  84
  85 2008-08-01  Peter Bergner  <bergner@vnet.ibm.com>
  86
  87         * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
  88         (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
  89         (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
  90         * ppc-opc.c (insert_xt6): New static function.
  91         (extract_xt6): Likewise.
  92         (insert_xa6): Likewise.
  93         (extract_xa6: Likewise.
  94         (insert_xb6): Likewise.
  95         (extract_xb6): Likewise.
  96         (insert_xb6s): Likewise.
  97         (extract_xb6s): Likewise.
  98         (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
  99         XX3DM_MASK, PPCVSX): New.
 100         (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
 101         "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
 102
 103 2008-08-01  Pedro Alves  <pedro@codesourcery.com>
 104
 105         * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
 106         * Makefile.in: Regenerate.
 107
 108 2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>
 109
 110         * i386-reg.tbl: Use Dw2Inval on AVX registers.
 111         * i386-tbl.h: Regenerated.
 112
 113 2008-07-30  Michael J. Eager  <eager@eagercon.com>
 114
 115         * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
 116         * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
 117         (insert_sprg, PPC405): Use PPC_OPCODE_405.
 118         (powerpc_opcodes): Add Xilinx APU related opcodes.
 119
 120 2008-07-30  Alan Modra  <amodra@bigpond.net.au>
 121
 122         * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
 123
 124 2008-07-10  Richard Sandiford  <rdsandiford@googlemail.com>
 125
 126         * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
 127
 128 2008-07-07  Adam Nemet  <anemet@caviumnetworks.com>
 129
 130         * mips-opc.c (CP): New macro.
 131         (mips_builtin_opcodes): Mark c0, c2 and c3 as CP.  Add Octeon to the
 132         membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0.  Add dmfc2 and
 133         dmtc2 Octeon instructions.
 134
 135 2008-07-07  Stan Shebs  <stan@codesourcery.com>
 136
 137         * dis-init.c (init_disassemble_info): Init endian_code field.
 138         * arm-dis.c (print_insn): Disassemble code according to
 139         setting of endian_code.
 140         (print_insn_big_arm): Detect when BE8 extension flag has been set.
 141
 142 2008-06-30  Richard Sandiford  <rdsandiford@googlemail.com>
 143
 144         * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
 145         for ELF symbols.
 146
 147 2008-06-25  Peter Bergner  <bergner@vnet.ibm.com>
 148
 149         * ppc-dis.c (powerpc_init_dialect): Handle -M464.
 150         (print_ppc_disassembler_options): Likewise.
 151         * ppc-opc.c (PPC464): Define.
 152         (powerpc_opcodes): Add mfdcrux and mtdcrux.
 153
 154 2008-06-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 155
 156         * configure: Regenerate.
 157
 158 2008-06-13  Peter Bergner  <bergner@vnet.ibm.com>
 159
 160         * ppc-dis.c (print_insn_powerpc): Update prototye to use new
 161         ppc_cpu_t typedef.
 162         (struct dis_private): New.
 163         (POWERPC_DIALECT): New define.
 164         (powerpc_dialect): Renamed to...
 165         (powerpc_init_dialect): This.  Update to use ppc_cpu_t and
 166         struct dis_private.
 167         (print_insn_big_powerpc): Update for using structure in
 168         info->private_data.
 169         (print_insn_little_powerpc): Likewise.
 170         (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
 171         (skip_optional_operands): Likewise.
 172         (print_insn_powerpc): Likewise.  Remove initialization of dialect.
 173         * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
 174         extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
 175         extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
 176         extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
 177         insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
 178         insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
 179         insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
 180         param to be of type ppc_cpu_t.  Update prototype.
 181
 182 2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
 183
 184         * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
 185         +s, +S.
 186         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
 187         baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
 188         syncw, syncws, vm3mulu, vm0 and vmulu.
 189
 190         * mips-dis.c (print_insn_args): Handle field descriptor +Q.
 191         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
 192         seqi, sne and snei.
 193
 194 2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>
 195
 196         * i386-opc.tbl: Add vmovd with 64bit operand.
 197         * i386-tbl.h: Regenerated.
 198
 199 2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 200
 201         * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
 202
 203 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 204
 205         * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
 206         * i386-tbl.h: Regenerated.
 207
 208 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 209
 210         PR gas/6517
 211         * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
 212         into 32bit and 64bit.  Remove Reg64|Qword and add
 213         IgnoreSize|No_qSuf on 32bit version.
 214         * i386-tbl.h: Regenerated.
 215
 216 2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
 217
 218         * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
 219         * i386-tbl.h: Regenerated.
 220
 221 2008-05-21  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 222
 223         * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
 224
 225 2008-05-14  Alan Modra  <amodra@bigpond.net.au>
 226
 227         * Makefile.am: Run "make dep-am".
 228         * Makefile.in: Regenerate.
 229
 230 2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 231
 232         * i386-dis.c (MOVBE_Fixup): New.
 233         (Mo): Likewise.
 234         (PREFIX_0F3880): Likewise.
 235         (PREFIX_0F3881): Likewise.
 236         (PREFIX_0F38F0): Updated.
 237         (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
 238         PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
 239         (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
 240
 241         * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
 242         CPU_EPT_FLAGS.
 243         (cpu_flags): Add CpuMovbe and CpuEPT.
 244
 245         * i386-opc.h (CpuMovbe): New.
 246         (CpuEPT): Likewise.
 247         (CpuLM): Updated.
 248         (i386_cpu_flags): Add cpumovbe and cpuept.
 249
 250         * i386-opc.tbl: Add entries for movbe and EPT instructions.
 251         * i386-init.h: Regenerated.
 252         * i386-tbl.h: Likewise.
 253
 254 2008-04-29  Adam Nemet  <anemet@caviumnetworks.com>
 255
 256         * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
 257         the two drem and the two dremu macros.
 258
 259 2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
 260
 261         * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
 262         instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
 263         cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
 264         INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
 265
 266 2008-04-25  David S. Miller  <davem@davemloft.net>
 267
 268         * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
 269         instead of %sys_tick_cmpr, as suggested in architecture manuals.
 270
 271 2008-04-23  Paolo Bonzini  <bonzini@gnu.org>
 272
 273         * aclocal.m4: Regenerate.
 274         * configure: Regenerate.
 275
 276 2008-04-23  David S. Miller  <davem@davemloft.net>
 277
 278         * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
 279         extended values.
 280         (prefetch_table): Add missing values.
 281
 282 2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>
 283
 284         * i386-gen.c (opcode_modifiers): Add NoAVX.
 285
 286         * i386-opc.h (NoAVX): New.
 287         (OldGcc): Updated.
 288         (i386_opcode_modifier): Add noavx.
 289
 290         * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
 291         instructions which don't have AVX equivalent.
 292         * i386-tbl.h: Regenerated.
 293
 294 2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 295
 296         * i386-dis.c (OP_VEX_FMA): New.
 297         (OP_EX_VexImmW): Likewise.
 298         (VexFMA): Likewise.
 299         (Vex128FMA): Likewise.
 300         (EXVexImmW): Likewise.
 301         (get_vex_imm8): Likewise.
 302         (OP_EX_VexReg): Likewise.
 303         (vex_i4_done): Renamed to ...
 304         (vex_w_done): This.
 305         (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
 306         and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
 307         FMA instructions.
 308         (print_insn): Updated.
 309         (OP_EX_VexW): Rewrite to swap register in VEX with EX.
 310         (OP_REG_VexI4): Check invalid high registers.
 311
 312 2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 313             Michael Meissner  <michael.meissner@amd.com>
 314
 315         * i386-opc.tbl: Fix protX to allow memory in the middle operand.
 316         * i386-tbl.h: Regenerate from i386-opc.tbl.
 317
 318 2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
 319
 320         * ppc-dis.c (powerpc_dialect): Handle "e500mc".  Extend "e500" to
 321         accept Power E500MC instructions.
 322         (print_ppc_disassembler_options): Document -Me500mc.
 323         * ppc-opc.c (DUIS, DUI, T): New.
 324         (XRT, XRTRA): Likewise.
 325         (E500MC): Likewise.
 326         (powerpc_opcodes): Add new Power E500MC instructions.
 327
 328 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 329
 330         * s390-dis.c (init_disasm): Evaluate disassembler_options.
 331         (print_s390_disassembler_options): New function.
 332         * disassemble.c (disassembler_usage): Invoke
 333         print_s390_disassembler_options.
 334
 335 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 336
 337         * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
 338         of local variables used for mnemonic parsing: prefix, suffix and
 339         number.
 340
 341 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 342
 343         * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
 344         extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
 345         (s390_crb_extensions): New extensions table.
 346         (insertExpandedMnemonic): Handle '$' tag.
 347         * s390-opc.txt: Remove conditional jump variants which can now
 348         be expanded automatically.
 349         Replace '*' tag with '$' in the compare and branch instructions.
 350
 351 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 352
 353         * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
 354         (PREFIX_VEX_3AXX): Likewis.
 355
 356 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 357
 358         * i386-opc.tbl: Remove 4 extra blank lines.
 359
 360 2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 361
 362         * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
 363         with CPU_PCLMUL_FLAGS/CpuPCLMUL.
 364         (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
 365         * i386-opc.tbl: Likewise.
 366
 367         * i386-opc.h (CpuCLMUL): Renamed to ...
 368         (CpuPCLMUL): This.
 369         (CpuFMA): Updated.
 370         (i386_cpu_flags): Replace cpuclmul with cpupclmul.
 371
 372         * i386-init.h: Regenerated.
 373
 374 2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
 375
 376         * i386-dis.c (OP_E_register): New.
 377         (OP_E_memory): Likewise.
 378         (OP_VEX): Likewise.
 379         (OP_EX_Vex): Likewise.
 380         (OP_EX_VexW): Likewise.
 381         (OP_XMM_Vex): Likewise.
 382         (OP_XMM_VexW): Likewise.
 383         (OP_REG_VexI4): Likewise.
 384         (PCLMUL_Fixup): Likewise.
 385         (VEXI4_Fixup): Likewise.
 386         (VZERO_Fixup): Likewise.
 387         (VCMP_Fixup): Likewise.
 388         (VPERMIL2_Fixup): Likewise.
 389         (rex_original): Likewise.
 390         (rex_ignored): Likewise.
 391         (Mxmm): Likewise.
 392         (XMM): Likewise.
 393         (EXxmm): Likewise.
 394         (EXxmmq): Likewise.
 395         (EXymmq): Likewise.
 396         (Vex): Likewise.
 397         (Vex128): Likewise.
 398         (Vex256): Likewise.
 399         (VexI4): Likewise.
 400         (EXdVex): Likewise.
 401         (EXqVex): Likewise.
 402         (EXVexW): Likewise.
 403         (EXdVexW): Likewise.
 404         (EXqVexW): Likewise.
 405         (XMVex): Likewise.
 406         (XMVexW): Likewise.
 407         (XMVexI4): Likewise.
 408         (PCLMUL): Likewise.
 409         (VZERO): Likewise.
 410         (VCMP): Likewise.
 411         (VPERMIL2): Likewise.
 412         (xmm_mode): Likewise.
 413         (xmmq_mode): Likewise.
 414         (ymmq_mode): Likewise.
 415         (vex_mode): Likewise.
 416         (vex128_mode): Likewise.
 417         (vex256_mode): Likewise.
 418         (USE_VEX_C4_TABLE): Likewise.
 419         (USE_VEX_C5_TABLE): Likewise.
 420         (USE_VEX_LEN_TABLE): Likewise.
 421         (VEX_C4_TABLE): Likewise.
 422         (VEX_C5_TABLE): Likewise.
 423         (VEX_LEN_TABLE): Likewise.
 424         (REG_VEX_XX): Likewise.
 425         (MOD_VEX_XXX): Likewise.
 426         (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
 427         (PREFIX_0F3A44): Likewise.
 428         (PREFIX_0F3ADF): Likewise.
 429         (PREFIX_VEX_XXX): Likewise.
 430         (VEX_OF): Likewise.
 431         (VEX_OF38): Likewise.
 432         (VEX_OF3A): Likewise.
 433         (VEX_LEN_XXX): Likewise.
 434         (vex): Likewise.
 435         (need_vex): Likewise.
 436         (need_vex_reg): Likewise.
 437         (vex_i4_done): Likewise.
 438         (vex_table): Likewise.
 439         (vex_len_table): Likewise.
 440         (OP_REG_VexI4): Likewise.
 441         (vex_cmp_op): Likewise.
 442         (pclmul_op): Likewise.
 443         (vpermil2_op): Likewise.
 444         (m_mode): Updated.
 445         (es_reg): Likewise.
 446         (PREFIX_0F38F0): Likewise.
 447         (PREFIX_0F3A60): Likewise.
 448         (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
 449         (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
 450         and PREFIX_VEX_XXX entries.
 451         (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
 452         (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
 453         PREFIX_0F3ADF.
 454         (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
 455         Add MOD_VEX_XXX entries.
 456         (ckprefix): Initialize rex_original and rex_ignored.  Store the
 457         REX byte in rex_original.
 458         (get_valid_dis386): Handle the implicit prefix in VEX prefix
 459         bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
 460         (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
 461         calling get_valid_dis386.  Use rex_original and rex_ignored when
 462         printing out REX.
 463         (putop): Handle "XY".
 464         (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
 465         ymmq_mode.
 466         (OP_E_extended): Updated to use OP_E_register and
 467         OP_E_memory.
 468         (OP_XMM): Handle VEX.
 469         (OP_EX): Likewise.
 470         (XMM_Fixup): Likewise.
 471         (CMP_Fixup): Use ARRAY_SIZE.
 472
 473         * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
 474         CPU_FMA_FLAGS and CPU_AVX_FLAGS.
 475         (operand_type_init): Add OPERAND_TYPE_REGYMM and
 476         OPERAND_TYPE_VEX_IMM4.
 477         (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
 478         (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
 479         VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
 480         VexImmExt and SSE2AVX.
 481         (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
 482
 483         * i386-opc.h (CpuAVX): New.
 484         (CpuAES): Likewise.
 485         (CpuCLMUL): Likewise.
 486         (CpuFMA): Likewise.
 487         (Vex): Likewise.
 488         (Vex256): Likewise.
 489         (VexNDS): Likewise.
 490         (VexNDD): Likewise.
 491         (VexW0): Likewise.
 492         (VexW1): Likewise.
 493         (Vex0F): Likewise.
 494         (Vex0F38): Likewise.
 495         (Vex0F3A): Likewise.
 496         (Vex3Sources): Likewise.
 497         (VexImmExt): Likewise.
 498         (SSE2AVX): Likewise.
 499         (RegYMM): Likewise.
 500         (Ymmword): Likewise.
 501         (Vex_Imm4): Likewise.
 502         (Implicit1stXmm0): Likewise.
 503         (CpuXsave): Updated.
 504         (CpuLM): Likewise.
 505         (ByteOkIntel): Likewise.
 506         (OldGcc): Likewise.
 507         (Control): Likewise.
 508         (Unspecified): Likewise.
 509         (OTMax): Likewise.
 510         (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
 511         (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
 512         vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
 513         vex3sources, veximmext and sse2avx.
 514         (i386_operand_type): Add regymm, ymmword and vex_imm4.
 515
 516         * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
 517
 518         * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
 519
 520         * i386-init.h: Regenerated.
 521         * i386-tbl.h: Likewise.
 522
 523 2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
 524
 525         From  Robin Getz  <robin.getz@analog.com>
 526         * bfin-dis.c (bu32): Typedef.
 527         (enum const_forms_t): Add c_uimm32 and c_huimm32.
 528         (constant_formats[]): Add uimm32 and huimm16.
 529         (fmtconst_val): New.
 530         (uimm32): Define.
 531         (huimm32): Define.
 532         (imm16_val): Define.
 533         (luimm16_val): Define.
 534         (struct saved_state): Define.
 535         (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
 536         A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
 537         LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
 538         (get_allreg): New.
 539         (decode_LDIMMhalf_0): Print out the whole register value.
 540
 541         From Jie Zhang  <jie.zhang@analog.com>
 542         * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
 543         multiply and multiply-accumulate to data register instruction.
 544
 545         * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
 546         c_imm32, c_huimm32e): Define.
 547         (constant_formats): Add flags for printing decimal, leading spaces, and
 548         exact symbols.
 549         (comment, parallel): Add global flags in all disassembly.
 550         (fmtconst): Take advantage of new flags, and print default in hex.
 551         (fmtconst_val): Likewise.
 552         (decode_macfunc): Be consistant with spaces, tabs, comments,
 553         capitalization in disassembly, fix minor coding style issues.
 554         (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
 555         (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
 556         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 557         decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
 558         decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 559         decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
 560         decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
 561         decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
 562         decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
 563         decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
 564         _print_insn_bfin, print_insn_bfin): Likewise.
 565
 566 2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 567
 568         * aclocal.m4: Regenerate.
 569         * configure: Likewise.
 570         * Makefile.in: Likewise.
 571
 572 2008-03-13  Alan Modra  <amodra@bigpond.net.au>
 573
 574         * Makefile.am: Run "make dep-am".
 575         * Makefile.in: Regenerate.
 576         * configure: Regenerate.
 577
 578 2008-03-07  Alan Modra  <amodra@bigpond.net.au>
 579
 580         * ppc-opc.c (powerpc_opcodes): Order and format.
 581
 582 2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 583
 584         * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
 585         * i386-tbl.h: Regenerated.
 586
 587 2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 588
 589         * i386-opc.tbl: Disallow 16-bit near indirect branches for
 590         x86-64.
 591         * i386-tbl.h: Regenerated.
 592
 593 2008-02-21  Jan Beulich  <jbeulich@novell.com>
 594
 595         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
 596         and Fword for far indirect jmp. Allow Reg16 and Word for near
 597         indirect jmp on x86-64. Disallow Fword for lcall.
 598         * i386-tbl.h: Re-generate.
 599
 600 2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 601
 602         * cr16-opc.c  (cr16_num_optab): Defined
 603
 604 2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>
 605
 606         * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
 607         * i386-init.h: Regenerated.
 608
 609 2008-02-14  Nick Clifton  <nickc@redhat.com>
 610
 611         PR binutils/5524
 612         * configure.in (SHARED_LIBADD): Select the correct host specific
 613         file extension for shared libraries.
 614         * configure: Regenerate.
 615
 616 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 617
 618         * i386-opc.h (RegFlat): New.
 619         * i386-reg.tbl (flat): Add.
 620         * i386-tbl.h: Re-generate.
 621
 622 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 623
 624         * i386-dis.c (a_mode): New.
 625         (cond_jump_mode): Adjust.
 626         (Ma): Change to a_mode.
 627         (intel_operand_size): Handle a_mode.
 628         * i386-opc.tbl: Allow Dword and Qword for bound.
 629         * i386-tbl.h: Re-generate.
 630
 631 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 632
 633         * i386-gen.c (process_i386_registers): Process new fields.
 634         * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
 635         unsigned char. Add dw2_regnum and Dw2Inval.
 636         * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
 637         register names.
 638         * i386-tbl.h: Re-generate.
 639
 640 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 641
 642         * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
 643         * i386-init.h: Updated.
 644
 645 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 646
 647         * i386-gen.c (cpu_flags): Add CpuXsave.
 648
 649         * i386-opc.h (CpuXsave): New.
 650         (CpuLM): Updated.
 651         (i386_cpu_flags): Add cpuxsave.
 652
 653         * i386-dis.c (MOD_0FAE_REG_4): New.
 654         (RM_0F01_REG_2): Likewise.
 655         (MOD_0FAE_REG_5): Updated.
 656         (RM_0F01_REG_3): Likewise.
 657         (reg_table): Use MOD_0FAE_REG_4.
 658         (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
 659         for xrstor.
 660         (rm_table): Add RM_0F01_REG_2.
 661
 662         * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
 663         * i386-init.h: Regenerated.
 664         * i386-tbl.h: Likewise.
 665
 666 2008-02-11  Jan Beulich  <jbeulich@novell.com>
 667
 668         * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
 669         Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
 670         * i386-tbl.h: Re-generate.
 671
 672 2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
 673
 674         PR 5715
 675         * configure: Regenerated.
 676
 677 2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
 678
 679         * mips-dis.c: Update copyright.
 680         (mips_arch_choices): Add Octeon.
 681         * mips-opc.c: Update copyright.
 682         (IOCT): New macro.
 683         (mips_builtin_opcodes): Add Octeon instruction synciobdma.
 684
 685 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 686
 687         * ppc-opc.c: Support optional L form mtmsr.
 688
 689 2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 690
 691         * i386-dis.c (OP_E_extended): Handle r12 like rsp.
 692
 693 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 694
 695         * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
 696         * i386-init.h: Regenerated.
 697
 698 2008-01-23  Tristan Gingold  <gingold@adacore.com>
 699
 700         * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
 701         ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 702
 703 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 704
 705         * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
 706         (cpu_flags): Likewise.
 707
 708         * i386-opc.h (CpuMMX2): Removed.
 709         (CpuSSE): Updated.
 710
 711         * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
 712         * i386-init.h: Regenerated.
 713         * i386-tbl.h: Likewise.
 714
 715 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 716
 717         * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
 718         CPU_SMX_FLAGS.
 719         * i386-init.h: Regenerated.
 720
 721 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 722
 723         * i386-opc.tbl: Use Qword on movddup.
 724         * i386-tbl.h: Regenerated.
 725
 726 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 727
 728         * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
 729         * i386-tbl.h: Regenerated.
 730
 731 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 732
 733         * i386-dis.c (Mx): New.
 734         (PREFIX_0FC3): Likewise.
 735         (PREFIX_0FC7_REG_6): Updated.
 736         (dis386_twobyte): Use PREFIX_0FC3.
 737         (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
 738         Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
 739         movntss.
 740
 741 2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 742
 743         * i386-gen.c (opcode_modifiers): Add IntelSyntax.
 744         (operand_types): Add Mem.
 745
 746         * i386-opc.h (IntelSyntax): New.
 747         * i386-opc.h (Mem): New.
 748         (Byte): Updated.
 749         (Opcode_Modifier_Max): Updated.
 750         (i386_opcode_modifier): Add intelsyntax.
 751         (i386_operand_type): Add mem.
 752
 753         * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
 754         instructions.
 755
 756         * i386-reg.tbl: Add size for accumulator.
 757
 758         * i386-init.h: Regenerated.
 759         * i386-tbl.h: Likewise.
 760
 761 2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 762
 763         * i386-opc.h (Byte): Fix a typo.
 764
 765 2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 766
 767         PR gas/5534
 768         * i386-gen.c (operand_type_init): Add Dword to
 769         OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
 770         (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
 771         Qword and Xmmword.
 772         (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
 773         Xmmword, Unspecified and Anysize.
 774         (set_bitfield): Make Mmword an alias of Qword.  Make Oword
 775         an alias of Xmmword.
 776
 777         * i386-opc.h (CheckSize): Removed.
 778         (Byte): Updated.
 779         (Word): Likewise.
 780         (Dword): Likewise.
 781         (Qword): Likewise.
 782         (Xmmword): Likewise.
 783         (FWait): Updated.
 784         (OTMax): Likewise.
 785         (i386_opcode_modifier): Remove checksize, byte, word, dword,
 786         qword and xmmword.
 787         (Fword): New.
 788         (TBYTE): Likewise.
 789         (Unspecified): Likewise.
 790         (Anysize): Likewise.
 791         (i386_operand_type): Add byte, word, dword, fword, qword,
 792         tbyte xmmword, unspecified and anysize.
 793
 794         * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
 795         Tbyte, Xmmword, Unspecified and Anysize.
 796
 797         * i386-reg.tbl: Add size for accumulator.
 798
 799         * i386-init.h: Regenerated.
 800         * i386-tbl.h: Likewise.
 801
 802 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
 803
 804         * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
 805         (REG_0F18): Updated.
 806         (reg_table): Updated.
 807         (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
 808         (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
 809
 810 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 811
 812         * i386-gen.c (set_bitfield): Use fail () on error.
 813
 814 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 815
 816         * i386-gen.c (lineno): New.
 817         (filename): Likewise.
 818         (set_bitfield): Report filename and line numer on error.
 819         (process_i386_opcodes): Set filename and update lineno.
 820         (process_i386_registers): Likewise.
 821
 822 2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
 823
 824         * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
 825         ATTSyntax.
 826
 827         * i386-opc.h (IntelMnemonic): Renamed to ..
 828         (ATTSyntax): This
 829         (Opcode_Modifier_Max): Updated.
 830         (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
 831         and intelsyntax.
 832
 833         * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
 834         on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
 835         * i386-tbl.h: Regenerated.
 836
 837 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 838
 839         * i386-gen.c: Update copyright to 2008.
 840         * i386-opc.h: Likewise.
 841         * i386-opc.tbl: Likewise.
 842
 843         * i386-init.h: Regenerated.
 844         * i386-tbl.h: Likewise.
 845
 846 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 847
 848         * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
 849         pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
 850         * i386-tbl.h: Regenerated.
 851
 852 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 853
 854         * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
 855         CpuSSE4_2_Or_ABM.
 856         (cpu_flags): Likewise.
 857
 858         * i386-opc.h (CpuSSE4_1_Or_5): Removed.
 859         (CpuSSE4_2_Or_ABM): Likewise.
 860         (CpuLM): Updated.
 861         (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
 862
 863         * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
 864         Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
 865         and CpuPadLock, respectively.
 866         * i386-init.h: Regenerated.
 867         * i386-tbl.h: Likewise.
 868
 869 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 870
 871         * i386-gen.c (opcode_modifiers): Remove No_xSuf.
 872
 873         * i386-opc.h (No_xSuf): Removed.
 874         (CheckSize): Updated.
 875
 876         * i386-tbl.h: Regenerated.
 877
 878 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 879
 880         * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
 881         CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
 882         CPU_SSE5_FLAGS.
 883         (cpu_flags): Add CpuSSE4_2_Or_ABM.
 884
 885         * i386-opc.h (CpuSSE4_2_Or_ABM): New.
 886         (CpuLM): Updated.
 887         (i386_cpu_flags): Add cpusse4_2_or_abm.
 888
 889         * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
 890         CpuABM|CpuSSE4_2 on popcnt.
 891         * i386-init.h: Regenerated.
 892         * i386-tbl.h: Likewise.
 893
 894 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 895
 896         * i386-opc.h: Update comments.
 897
 898 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 899
 900         * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
 901         * i386-opc.h: Likewise.
 902         * i386-opc.tbl: Likewise.
 903
 904 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
 905
 906         PR gas/5534
 907         * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
 908         Byte, Word, Dword, QWord and Xmmword.
 909
 910         * i386-opc.h (No_xSuf): New.
 911         (CheckSize): Likewise.
 912         (Byte): Likewise.
 913         (Word): Likewise.
 914         (Dword): Likewise.
 915         (QWord): Likewise.
 916         (Xmmword): Likewise.
 917         (FWait): Updated.
 918         (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
 919         Dword, QWord and Xmmword.
 920
 921         * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
 922         used.
 923         * i386-tbl.h: Regenerated.
 924
 925 2008-01-02  Mark Kettenis  <kettenis@gnu.org>
 926
 927         * m88k-dis.c (instructions): Fix fcvt.* instructions.
 928         From Miod Vallat.
 929
 930 For older changes see ChangeLog-2007
 931 \f
 932 Local Variables:
 933 mode: change-log
 934 left-margin: 8
 935 fill-column: 74
 936 version-control: never
 937 End: