2006-01-05 Paul Brook <paul@codesourcery.com>
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2006-01-05 Paul Brook <paul@codesourcery.com>
2
3 * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
4
5 2006-01-06 DJ Delorie <dj@redhat.com>
6
7 * m32c-desc.c: Regenerate.
8 * m32c-opc.c: Regenerate.
9 * m32c-opc.h: Regenerate.
10
11 2006-01-03 DJ Delorie <dj@redhat.com>
12
13 * cgen-ibld.in (extract_normal): Avoid memory range errors.
14 * m32c-ibld.c: Regenerated.
15
16 2005-12-27 Alan Modra <amodra@bigpond.net.au>
17
18 * Makefile.am: Run "make dep-am".
19 * Makefile.in: Regenerate.
20 * po/POTFILES.in: Regenerate.
21
22 2005-12-22 Laurent Menten <laurent.menten@teledisnet.be>
23
24 * pj-opc.c (jsr, ret, getstatic, putstatic, getfield, putfield,
25 invokevirtual, invokespecial, invokestatic, invokeinterface,
26 goto_w, jsr_w, ldc_quick, ldc_w_quick, ldc2_w_quick,
27 getfield_quick, putfield_quick, getfield2_quick, putfield2_quick,
28 getstatic_quick, putstatic_quick, getstatic2_quick,
29 putstatic2_quick, invokevirtual_quick, invokenonvirtual_quick,
30 invokesuper_quick, invokestatic_quick, invokeinterface_quick,
31 aastore_quick, new_quick, anewarray_quick, multianewarray_quick,
32 checkcast_quick, instanceof_quick, invokevirtiual_quick_w,
33 getfield_quick_w, putfield_quick_w, nonnull_quick,
34 agetfield_quick, aputfield_quick, agetstatic_quick,
35 aputstatic_quick, aldc_quick, aldc_w_quick, exit_sync_method): Fix
36 opcodes.
37
38 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
39
40 Second part of ms1 to mt renaming.
41 * Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust.
42 (stamp-mt): Adjust rule.
43 (mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename &
44 adjust.
45 * Makefile.in: Rebuilt.
46 * configure: Rebuilt.
47 * configure.in (bfd_mt_arch): Rename & adjust.
48 * disassemble.c (ARCH_mt): Renamed.
49 (disassembler): Adjust.
50 * mt-asm.c: Renamed, rebuilt.
51 * mt-desc.c: Renamed, rebuilt.
52 * mt-desc.h: Renamed, rebuilt.
53 * mt-dis.c: Renamed, rebuilt.
54 * mt-ibld.c: Renamed, rebuilt.
55 * mt-opc.c: Renamed, rebuilt.
56 * mt-opc.h: Renamed, rebuilt.
57
58 2005-12-13 DJ Delorie <dj@redhat.com>
59
60 * m32c-desc.c: Regenerate.
61 * m32c-opc.c: Regenerate.
62 * m32c-opc.h: Regenerate.
63
64 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
65
66 * Makefile.am (CLEANFILES, CGEN_CPUS, MT_DEPS): Replace ms1 with mt.
67 * Makefile.in: Rebuilt.
68 * configure.in: Replace ms1 files with mt files.
69 * configure: Rebuilt.
70
71 2005-12-08 Jan Beulich <jbeulich@novell.com>
72
73 * i386-dis.c (MAXLEN): Reduce to architectural limit.
74 (fetch_data): Check for sufficient buffer size.
75
76 2005-12-08 Jan Beulich <jbeulich@novell.com>
77
78 * i386-dis.c (OP_ST): Remove prefix in Intel mode.
79
80 2005-12-08 Daniel Jacobowitz <dan@codesourcery.com>
81
82 * i386-dis.c (dofloat): Handle %rip-relative floating point addressing.
83
84 2005-12-07 Hans-Peter Nilsson <hp@axis.com>
85
86 * cris-opc.c (cris_opcodes) <"move" "s,P">: Define using
87 MOVE_M_TO_PREG_OPCODE and MOVE_M_TO_PREG_ZBITS instead of constants.
88
89 2005-12-06 H.J. Lu <hongjiu.lu@intel.com>
90
91 PR gas/1874
92 * i386-dis.c (address_mode): New enum type.
93 (address_mode): New variable.
94 (mode_64bit): Removed.
95 (ckprefix): Updated to check address_mode instead of mode_64bit.
96 (prefix_name): Likewise.
97 (print_insn): Likewise.
98 (putop): Likewise.
99 (print_operand_value): Likewise.
100 (intel_operand_size): Likewise.
101 (OP_E): Likewise.
102 (OP_G): Likewise.
103 (set_op): Likewise.
104 (OP_REG): Likewise.
105 (OP_I): Likewise.
106 (OP_I64): Likewise.
107 (OP_OFF): Likewise.
108 (OP_OFF64): Likewise.
109 (ptr_reg): Likewise.
110 (OP_C): Likewise.
111 (SVME_Fixup): Likewise.
112 (print_insn): Set address_mode.
113 (PNI_Fixup): Add 64bit and address size override support for
114 monitor and mwait.
115
116 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
117
118 * cris-dis.c (bytes_to_skip): Handle new parameter prefix_matchedp.
119 (print_with_operands): Check for prefix when [PC+] is seen.
120
121 2005-12-02 Dave Brolley <brolley@redhat.com>
122
123 * configure.in (cgen_files): Add cgen-bitset.lo.
124 (ta): Add cgen-bitset.lo when arch==bfd_cris_arch.
125 * Makefile.am (CFILES): Add cgen-bitset.c.
126 (ALL_MACHINES): Add cgen-bitset.lo.
127 (cgen-bitset.lo): New target.
128 * cgen-opc.c (cgen_bitset_create, cgen_bitset_init, cgen_bitset_clear)
129 (cgen_bitset_add, cgen_bitset_set, cgen_bitset_contains)
130 (cgen_bitset_compare, cgen_bitset_intersect_p, cgen_bitset_copy)
131 (cgen_bitset_union): Moved from here ...
132 * cgen-bitset.c: ... to here. New file.
133 * Makefile.in: Regenerated.
134 * configure: Regenerated.
135
136 2005-11-22 James E Wilson <wilson@specifix.com>
137
138 * ia64-gen.c (_opcode_int64_low, _opcode_int64_high,
139 opcode_fprintf_vma): New.
140 (print_main_table): New opcode_fprintf_vma instead of fprintf_vma.
141
142 2005-11-16 Alan Modra <amodra@bigpond.net.au>
143
144 * ppc-opc.c (powerpc_opcodes): Add frin,friz,frip,frim. Correct
145 frsqrtes.
146
147 2005-11-14 David Ung <davidu@mips.com>
148
149 * mips16-opc.c: Add MIPS16e save/restore opcodes.
150 * mips-dis.c (print_mips16_insn_arg): Handle printing of 'm'/'M'
151 codes for save/restore.
152
153 2005-11-10 Andreas Schwab <schwab@suse.de>
154
155 * m68k-dis.c (print_insn_m68k): Only match FPU insns with
156 coprocessor ID 1.
157
158 2005-11-08 H.J. Lu <hongjiu.lu@intel.com>
159
160 * m32c-desc.c: Regenerated.
161
162 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
163
164 Add ms2.
165 * ms1-asm.c, ms1-desc.c, ms1-desc.h, ms1-dis.c, ms1-ibld.c,
166 ms1-opc.c, ms1-opc.h: Regenerated.
167
168 2005-11-07 Steve Ellcey <sje@cup.hp.com>
169
170 * configure: Regenerate after modifying bfd/warning.m4.
171
172 2005-11-07 Alan Modra <amodra@bigpond.net.au>
173
174 * i386-dis.c (ckprefix): Handle rex on fwait. Don't print
175 ignored rex prefixes here.
176 (print_insn): Instead, handle them similarly to fwait followed
177 by non-fp insns.
178
179 2005-11-02 H.J. Lu <hongjiu.lu@intel.com>
180
181 * iq2000-desc.c: Regenerated.
182 * iq2000-desc.h: Likewise.
183 * iq2000-dis.c: Likewise.
184 * iq2000-opc.c: Likewise.
185
186 2005-11-02 Paul Brook <paul@codesourcery.com>
187
188 * arm-dis.c (print_insn_thumb32): Word align blx target address.
189
190 2005-10-31 Alan Modra <amodra@bigpond.net.au>
191
192 * arm-dis.c (print_insn): Warning fix.
193
194 2005-10-30 H.J. Lu <hongjiu.lu@intel.com>
195
196 * Makefile.am: Run "make dep-am".
197 * Makefile.in: Regenerated.
198
199 * dep-in.sed: Replace " ./" with " ".
200
201 2005-10-28 Dave Brolley <brolley@redhat.com>
202
203 * All CGEN-generated sources: Regenerate.
204
205 Contribute the following changes:
206 2005-09-19 Dave Brolley <brolley@redhat.com>
207
208 * disassemble.c (disassemble_init_for_target): Add 'break' to case for
209 bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
210 bfd_arch_m32c case.
211
212 2005-02-16 Dave Brolley <brolley@redhat.com>
213
214 * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
215 cgen_isa_mask_* to cgen_bitset_*.
216 * cgen-opc.c: Likewise.
217
218 2003-11-28 Richard Sandiford <rsandifo@redhat.com>
219
220 * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
221 * *-dis.c: Regenerate.
222
223 2003-06-05 DJ Delorie <dj@redhat.com>
224
225 * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
226 it, as it may point to a reused buffer. Set prev_isas when we
227 change cpus.
228
229 2002-12-13 Dave Brolley <brolley@redhat.com>
230
231 * cgen-opc.c (cgen_isa_mask_create): New support function for
232 CGEN_ISA_MASK.
233 (cgen_isa_mask_init): Ditto.
234 (cgen_isa_mask_clear): Ditto.
235 (cgen_isa_mask_add): Ditto.
236 (cgen_isa_mask_set): Ditto.
237 (cgen_isa_supported): Ditto.
238 (cgen_isa_mask_compare): Ditto.
239 (cgen_isa_mask_intersection): Ditto.
240 (cgen_isa_mask_copy): Ditto.
241 (cgen_isa_mask_combine): Ditto.
242 * cgen-dis.in (libiberty.h): #include it.
243 (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
244 (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
245 * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
246 * Makefile.in: Regenerated.
247
248 2005-10-27 DJ Delorie <dj@redhat.com>
249
250 * m32c-asm.c: Regenerate.
251 * m32c-desc.c: Regenerate.
252 * m32c-desc.h: Regenerate.
253 * m32c-dis.c: Regenerate.
254 * m32c-ibld.c: Regenerate.
255 * m32c-opc.c: Regenerate.
256 * m32c-opc.h: Regenerate.
257
258 2005-10-26 DJ Delorie <dj@redhat.com>
259
260 * m32c-asm.c: Regenerate.
261 * m32c-desc.c: Regenerate.
262 * m32c-desc.h: Regenerate.
263 * m32c-dis.c: Regenerate.
264 * m32c-ibld.c: Regenerate.
265 * m32c-opc.c: Regenerate.
266 * m32c-opc.h: Regenerate.
267
268 2005-10-26 Paul Brook <paul@codesourcery.com>
269
270 * arm-dis.c (arm_opcodes): Correct "sel" entry.
271
272 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
273
274 * m32r-asm.c: Regenerate.
275
276 2005-10-25 DJ Delorie <dj@redhat.com>
277
278 * m32c-asm.c: Regenerate.
279 * m32c-desc.c: Regenerate.
280 * m32c-desc.h: Regenerate.
281 * m32c-dis.c: Regenerate.
282 * m32c-ibld.c: Regenerate.
283 * m32c-opc.c: Regenerate.
284 * m32c-opc.h: Regenerate.
285
286 2005-10-25 Arnold Metselaar <arnold.metselaar@planet.nl>
287
288 * configure.in: Add target architecture bfd_arch_z80.
289 * configure: Regenerated.
290 * disassemble.c (disassembler)<ARCH_z80>: Add case
291 bfd_arch_z80.
292 * z80-dis.c: New file.
293
294 2005-10-25 Alan Modra <amodra@bigpond.net.au>
295
296 * po/POTFILES.in: Regenerate.
297 * po/opcodes.pot: Regenerate.
298
299 2005-10-24 Jan Beulich <jbeulich@novell.com>
300
301 * ia64-asmtab.c: Regenerate.
302
303 2005-10-21 DJ Delorie <dj@redhat.com>
304
305 * m32c-asm.c: Regenerate.
306 * m32c-desc.c: Regenerate.
307 * m32c-desc.h: Regenerate.
308 * m32c-dis.c: Regenerate.
309 * m32c-ibld.c: Regenerate.
310 * m32c-opc.c: Regenerate.
311 * m32c-opc.h: Regenerate.
312
313 2005-10-21 Nick Clifton <nickc@redhat.com>
314
315 * bfin-dis.c: Tidy up code, removing redundant constructs.
316
317 2005-10-19 Martin Schwidefsky <schwidefsky@de.ibm.com>
318
319 * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
320 instructions.
321
322 2005-10-18 Nick Clifton <nickc@redhat.com>
323
324 * m32r-asm.c: Regenerate after updating m32r.opc.
325
326 2005-10-18 Jie Zhang <jie.zhang@analog.com>
327
328 * bfin-dis.c (print_insn_bfin): Do proper endian transform when
329 reading instruction from memory.
330
331 2005-10-18 Nick Clifton <nickc@redhat.com>
332
333 * m32r-asm.c: Regenerate after updating m32r.opc.
334
335 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
336
337 * m32r-asm.c: Regenerate after updating m32r.opc.
338
339 2005-10-08 James Lemke <jim@wasabisystems.com>
340
341 * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
342 operations.
343
344 2005-10-06 Daniel Jacobowitz <dan@codesourcery.com>
345
346 * ppc-dis.c (struct dis_private): Remove.
347 (powerpc_dialect): Avoid aliasing warnings.
348 (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
349
350 2005-09-30 Nick Clifton <nickc@redhat.com>
351
352 * po/ga.po: New Irish translation.
353 * configure.in (ALL_LINGUAS): Add "ga".
354 * configure: Regenerate.
355
356 2005-09-30 H.J. Lu <hongjiu.lu@intel.com>
357
358 * Makefile.am: Run "make dep-am".
359 * Makefile.in: Regenerated.
360 * aclocal.m4: Likewise.
361 * configure: Likewise.
362
363 2005-09-30 Catherine Moore <clm@cm00re.com>
364
365 * Makefile.am: Bfin support.
366 * Makefile.in: Regenerated.
367 * aclocal.m4: Regenerated.
368 * bfin-dis.c: New file.
369 * configure.in: Bfin support.
370 * configure: Regenerated.
371 * disassemble.c (ARCH_bfin): Define.
372 (disassembler): Add case for bfd_arch_bfin.
373
374 2005-09-28 Jan Beulich <jbeulich@novell.com>
375
376 * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
377 (indirEv): Use it.
378 (stackEv): New.
379 (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
380 (dis386): Document and use new 'V' meta character. Use it for
381 single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
382 opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
383 (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
384 data prefix as used whenever DFLAG was examined. Handle 'V'.
385 (intel_operand_size): Use stack_v_mode.
386 (OP_E): Use stack_v_mode, but handle only the special case of
387 64-bit mode without operand size override here; fall through to
388 v_mode case otherwise.
389 (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
390 and no operand size override is present.
391 (OP_J): Use get32s for obtaining the displacement also when rex64
392 is present.
393
394 2005-09-08 Paul Brook <paul@codesourcery.com>
395
396 * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
397
398 2005-09-06 Chao-ying Fu <fu@mips.com>
399
400 * mips-opc.c (MT32): New define.
401 (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
402 bottom to avoid opcode collision with "mftr" and "mttr".
403 Add MT instructions.
404 * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
405 (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
406 formats.
407
408 2005-09-02 Paul Brook <paul@codesourcery.com>
409
410 * arm-dis.c (coprocessor_opcodes): Add null terminator.
411
412 2005-09-02 Paul Brook <paul@codesourcery.com>
413
414 * arm-dis.c (coprocessor_opcodes): New.
415 (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
416 (print_insn_coprocessor): New function.
417 (print_insn_arm): Use print_insn_coprocessor. Remove coprocessor
418 format characters.
419 (print_insn_thumb32): Use print_insn_coprocessor.
420
421 2005-08-30 Paul Brook <paul@codesourcery.com>
422
423 * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
424
425 2005-08-26 Jan Beulich <jbeulich@novell.com>
426
427 * i386-dis.c (intel_operand_size): New, broken out from OP_E for
428 re-use.
429 (OP_E): Call intel_operand_size, move call site out of mode
430 dependent code.
431 (OP_OFF): Call intel_operand_size if suffix_always. Remove
432 ATTRIBUTE_UNUSED from parameters.
433 (OP_OFF64): Likewise.
434 (OP_ESreg): Call intel_operand_size.
435 (OP_DSreg): Likewise.
436 (OP_DIR): Use colon rather than semicolon as separator of far
437 jump/call operands.
438
439 2005-08-25 Chao-ying Fu <fu@mips.com>
440
441 * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
442 (mips_builtin_opcodes): Add DSP instructions.
443 * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
444 mips64, mips64r2.
445 (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
446 operand formats.
447
448 2005-08-23 David Ung <davidu@mips.com>
449
450 * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
451 instructions to the table.
452
453 2005-08-18 Alan Modra <amodra@bigpond.net.au>
454
455 * a29k-dis.c: Delete.
456 * Makefile.am: Remove a29k support.
457 * configure.in: Likewise.
458 * disassemble.c: Likewise.
459 * Makefile.in: Regenerate.
460 * configure: Regenerate.
461 * po/POTFILES.in: Regenerate.
462
463 2005-08-15 Daniel Jacobowitz <dan@codesourcery.com>
464
465 * ppc-dis.c (powerpc_dialect): Handle e300.
466 (print_ppc_disassembler_options): Likewise.
467 * ppc-opc.c (PPCE300): Define.
468 (powerpc_opcodes): Mark icbt as available for the e300.
469
470 2005-08-13 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
471
472 * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
473 Use "rp" instead of "%r2" in "b,l" insns.
474
475 2005-08-12 Martin Schwidefsky <schwidefsky@de.ibm.com>
476
477 * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
478 * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
479 (main): Likewise.
480 * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
481 and 4 bit optional masks.
482 (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
483 INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
484 (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
485 MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
486 (s390_opformats): Likewise.
487 * s390-opc.txt: Add new instructions for cpu type z9-109.
488
489 2005-08-05 John David Anglin <dave.anglin@nrc-crnc.gc.ca>
490
491 * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
492
493 2005-07-29 Paul Brook <paul@codesourcery.com>
494
495 * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
496
497 2005-07-29 Paul Brook <paul@codesourcery.com>
498
499 * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
500 (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
501
502 2005-07-25 DJ Delorie <dj@redhat.com>
503
504 * m32c-asm.c Regenerate.
505 * m32c-dis.c Regenerate.
506
507 2005-07-20 DJ Delorie <dj@redhat.com>
508
509 * disassemble.c (disassemble_init_for_target): M32C ISAs are
510 enums, so convert them to bit masks, which attributes are.
511
512 2005-07-18 Nick Clifton <nickc@redhat.com>
513
514 * configure.in: Restore alpha ordering to list of arches.
515 * configure: Regenerate.
516 * disassemble.c: Restore alpha ordering to list of arches.
517
518 2005-07-18 Nick Clifton <nickc@redhat.com>
519
520 * m32c-asm.c: Regenerate.
521 * m32c-desc.c: Regenerate.
522 * m32c-desc.h: Regenerate.
523 * m32c-dis.c: Regenerate.
524 * m32c-ibld.h: Regenerate.
525 * m32c-opc.c: Regenerate.
526 * m32c-opc.h: Regenerate.
527
528 2005-07-18 H.J. Lu <hongjiu.lu@intel.com>
529
530 * i386-dis.c (PNI_Fixup): Update comment.
531 (VMX_Fixup): Properly handle the suffix check.
532
533 2005-07-16 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
534
535 * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
536 mfctl disassembly.
537
538 2005-07-16 Alan Modra <amodra@bigpond.net.au>
539
540 * Makefile.am: Run "make dep-am".
541 (stamp-m32c): Fix cpu dependencies.
542 * Makefile.in: Regenerate.
543 * ip2k-dis.c: Regenerate.
544
545 2007-07-15 H.J. Lu <hongjiu.lu@intel.com>
546
547 * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
548 (VMX_Fixup): New. Fix up Intel VMX Instructions.
549 (Em): New.
550 (Gm): New.
551 (VM): New.
552 (dis386_twobyte): Updated entries 0x78 and 0x79.
553 (twobyte_has_modrm): Likewise.
554 (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
555 (OP_G): Handle m_mode.
556
557 2005-07-14 Jim Blandy <jimb@redhat.com>
558
559 Add support for the Renesas M32C and M16C.
560 * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
561 * m32c-desc.h, m32c-opc.h: New.
562 * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
563 (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
564 m32c-opc.c.
565 (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
566 m32c-ibld.lo, m32c-opc.lo.
567 (CLEANFILES): List stamp-m32c.
568 (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
569 (CGEN_CPUS): Add m32c.
570 (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
571 (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
572 (m32c_opc_h): New variable.
573 (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
574 (m32c-opc.lo): New rules.
575 * Makefile.in: Regenerated.
576 * configure.in: Add case for bfd_m32c_arch.
577 * configure: Regenerated.
578 * disassemble.c (ARCH_m32c): New.
579 [ARCH_m32c]: #include "m32c-desc.h".
580 (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
581 (disassemble_init_for_target) [ARCH_m32c]: Same.
582
583 * cgen-ops.h, cgen-types.h: New files.
584 * Makefile.am (HFILES): List them.
585 * Makefile.in: Regenerated.
586
587 2005-07-07 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
588
589 * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
590 d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
591 ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
592 m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
593 ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
594 v850-dis.c: Fix format bugs.
595 * ia64-gen.c (fail, warn): Add format attribute.
596 * or32-opc.c (debug): Likewise.
597
598 2005-07-07 Khem Raj <kraj@mvista.com>
599
600 * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
601 disassembly pattern.
602
603 2005-07-06 Alan Modra <amodra@bigpond.net.au>
604
605 * Makefile.am (stamp-m32r): Fix path to cpu files.
606 (stamp-m32r, stamp-iq2000): Likewise.
607 * Makefile.in: Regenerate.
608 * m32r-asm.c: Regenerate.
609 * po/POTFILES.in: Remove arm-opc.h. Add ms1-asm.c, ms1-desc.c,
610 ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
611
612 2005-07-05 Nick Clifton <nickc@redhat.com>
613
614 * iq2000-asm.c: Regenerate.
615 * ms1-asm.c: Regenerate.
616
617 2005-07-05 Jan Beulich <jbeulich@novell.com>
618
619 * i386-dis.c (SVME_Fixup): New.
620 (grps): Use it for the lidt entry.
621 (PNI_Fixup): Call OP_M rather than OP_E.
622 (INVLPG_Fixup): Likewise.
623
624 2005-07-04 H.J. Lu <hongjiu.lu@intel.com>
625
626 * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
627
628 2005-07-01 Nick Clifton <nickc@redhat.com>
629
630 * a29k-dis.c: Update to ISO C90 style function declarations and
631 fix formatting.
632 * alpha-opc.c: Likewise.
633 * arc-dis.c: Likewise.
634 * arc-opc.c: Likewise.
635 * avr-dis.c: Likewise.
636 * cgen-asm.in: Likewise.
637 * cgen-dis.in: Likewise.
638 * cgen-ibld.in: Likewise.
639 * cgen-opc.c: Likewise.
640 * cris-dis.c: Likewise.
641 * d10v-dis.c: Likewise.
642 * d30v-dis.c: Likewise.
643 * d30v-opc.c: Likewise.
644 * dis-buf.c: Likewise.
645 * dlx-dis.c: Likewise.
646 * h8300-dis.c: Likewise.
647 * h8500-dis.c: Likewise.
648 * hppa-dis.c: Likewise.
649 * i370-dis.c: Likewise.
650 * i370-opc.c: Likewise.
651 * m10200-dis.c: Likewise.
652 * m10300-dis.c: Likewise.
653 * m68k-dis.c: Likewise.
654 * m88k-dis.c: Likewise.
655 * mips-dis.c: Likewise.
656 * mmix-dis.c: Likewise.
657 * msp430-dis.c: Likewise.
658 * ns32k-dis.c: Likewise.
659 * or32-dis.c: Likewise.
660 * or32-opc.c: Likewise.
661 * pdp11-dis.c: Likewise.
662 * pj-dis.c: Likewise.
663 * s390-dis.c: Likewise.
664 * sh-dis.c: Likewise.
665 * sh64-dis.c: Likewise.
666 * sparc-dis.c: Likewise.
667 * sparc-opc.c: Likewise.
668 * sysdep.h: Likewise.
669 * tic30-dis.c: Likewise.
670 * tic4x-dis.c: Likewise.
671 * tic80-dis.c: Likewise.
672 * v850-dis.c: Likewise.
673 * v850-opc.c: Likewise.
674 * vax-dis.c: Likewise.
675 * w65-dis.c: Likewise.
676 * z8kgen.c: Likewise.
677
678 * fr30-*: Regenerate.
679 * frv-*: Regenerate.
680 * ip2k-*: Regenerate.
681 * iq2000-*: Regenerate.
682 * m32r-*: Regenerate.
683 * ms1-*: Regenerate.
684 * openrisc-*: Regenerate.
685 * xstormy16-*: Regenerate.
686
687 2005-06-23 Ben Elliston <bje@gnu.org>
688
689 * m68k-dis.c: Use ISC C90.
690 * m68k-opc.c: Formatting fixes.
691
692 2005-06-16 David Ung <davidu@mips.com>
693
694 * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
695 instructions to the table; seb/seh/sew/zeb/zeh/zew.
696
697 2005-06-15 Dave Brolley <brolley@redhat.com>
698
699 Contribute Morpho ms1 on behalf of Red Hat
700 * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
701 ms1-opc.h: New files, Morpho ms1 target.
702
703 2004-05-14 Stan Cox <scox@redhat.com>
704
705 * disassemble.c (ARCH_ms1): Define.
706 (disassembler): Handle bfd_arch_ms1
707
708 2004-05-13 Michael Snyder <msnyder@redhat.com>
709
710 * Makefile.am, Makefile.in: Add ms1 target.
711 * configure.in: Ditto.
712
713 2005-06-08 Zack Weinberg <zack@codesourcery.com>
714
715 * arm-opc.h: Delete; fold contents into ...
716 * arm-dis.c: ... here. Move includes of internal COFF headers
717 next to includes of internal ELF headers.
718 (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
719 (struct arm_opcode): Rename struct opcode32. Make 'assembler' const.
720 (struct thumb_opcode): Rename struct opcode16. Make 'assembler' const.
721 (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
722 (iwmmxt_wwnames, iwmmxt_wwssnames):
723 Make const.
724 (regnames): Remove iWMMXt coprocessor register sets.
725 (iwmmxt_regnames, iwmmxt_cregnames): New statics.
726 (get_arm_regnames): Adjust fourth argument to match above changes.
727 (set_iwmmxt_regnames): Delete.
728 (print_insn_arm): Constify 'c'. Use ISO syntax for function
729 pointer calls. Expand sole use of BDISP. Use iwmmxt_regnames
730 and iwmmxt_cregnames, not set_iwmmxt_regnames.
731 (print_insn_thumb16, print_insn_thumb32): Constify 'c'. Use
732 ISO syntax for function pointer calls.
733
734 2005-06-07 Zack Weinberg <zack@codesourcery.com>
735
736 * arm-dis.c: Split up the comments describing the format codes, so
737 that the ARM and 16-bit Thumb opcode tables each have comments
738 preceding them that describe all the codes, and only the codes,
739 valid in those tables. (32-bit Thumb table is already like this.)
740 Reorder the lists in all three comments to match the order in
741 which the codes are implemented.
742 Remove all forward declarations of static functions. Convert all
743 function definitions to ISO C format.
744 (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
745 Return nothing.
746 (print_insn_thumb16): Remove unused case 'I'.
747 (print_insn): Update for changed calling convention of subroutines.
748
749 2005-05-25 Jan Beulich <jbeulich@novell.com>
750
751 * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
752 hex (but retain it being displayed as signed). Remove redundant
753 checks. Add handling of displacements for 16-bit addressing in Intel
754 mode.
755
756 2005-05-25 Jan Beulich <jbeulich@novell.com>
757
758 * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
759 (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
760 masking of 'rm' in 16-bit memory address handling.
761
762 2005-05-19 Anton Blanchard <anton@samba.org>
763
764 * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
765 (print_ppc_disassembler_options): Document it.
766 * ppc-opc.c (SVC_LEV): Define.
767 (LEV): Allow optional operand.
768 (POWER5): Define.
769 (powerpc_opcodes): Extend "sc". Adjust "svc" and "svcl". Add
770 "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
771
772 2005-05-19 Kelley Cook <kcook@gcc.gnu.org>
773
774 * Makefile.in: Regenerate.
775
776 2005-05-17 Zack Weinberg <zack@codesourcery.com>
777
778 * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
779 instructions. Adjust disassembly of some opcodes to match
780 unified syntax.
781 (thumb32_opcodes): New table.
782 (print_insn_thumb): Rename print_insn_thumb16; don't handle
783 two-halfword branches here.
784 (print_insn_thumb32): New function.
785 (print_insn): Choose among print_insn_arm, print_insn_thumb16,
786 and print_insn_thumb32. Be consistent about order of
787 halfwords when printing 32-bit instructions.
788
789 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
790
791 PR 843
792 * i386-dis.c (branch_v_mode): New.
793 (indirEv): Use branch_v_mode instead of v_mode.
794 (OP_E): Handle branch_v_mode.
795
796 2005-05-07 H.J. Lu <hongjiu.lu@intel.com>
797
798 * d10v-dis.c (dis_2_short): Support 64bit host.
799
800 2005-05-07 Nick Clifton <nickc@redhat.com>
801
802 * po/nl.po: Updated translation.
803
804 2005-05-07 Nick Clifton <nickc@redhat.com>
805
806 * Update the address and phone number of the FSF organization in
807 the GPL notices in the following files:
808 a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
809 arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
810 avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
811 cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
812 crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
813 d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
814 fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
815 fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
816 frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
817 h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
818 i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
819 ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
820 ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
821 ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
822 ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
823 iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
824 iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
825 m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
826 m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
827 m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
828 maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
829 mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
830 openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
831 openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
832 or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
833 pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
834 s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
835 sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
836 tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
837 v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
838 xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
839 xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
840 xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
841
842 2005-05-05 James E Wilson <wilson@specifixinc.com>
843
844 * ia64-opc.c: Include sysdep.h before libiberty.h.
845
846 2005-05-05 Nick Clifton <nickc@redhat.com>
847
848 * configure.in (ALL_LINGUAS): Add vi.
849 * configure: Regenerate.
850 * po/vi.po: New.
851
852 2005-04-26 Jerome Guitton <guitton@gnat.com>
853
854 * configure.in: Fix the check for basename declaration.
855 * configure: Regenerate.
856
857 2005-04-19 Alan Modra <amodra@bigpond.net.au>
858
859 * ppc-opc.c (RTO): Define.
860 (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
861 entries to suit PPC440.
862
863 2005-04-18 Mark Kettenis <kettenis@gnu.org>
864
865 * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
866 Add xcrypt-ctr.
867
868 2005-04-14 Nick Clifton <nickc@redhat.com>
869
870 * po/fi.po: New translation: Finnish.
871 * configure.in (ALL_LINGUAS): Add fi.
872 * configure: Regenerate.
873
874 2005-04-14 Alan Modra <amodra@bigpond.net.au>
875
876 * Makefile.am (NO_WERROR): Define.
877 * configure.in: Invoke AM_BINUTILS_WARNINGS.
878 * Makefile.in: Regenerate.
879 * aclocal.m4: Regenerate.
880 * configure: Regenerate.
881
882 2005-04-04 Nick Clifton <nickc@redhat.com>
883
884 * fr30-asm.c: Regenerate.
885 * frv-asm.c: Regenerate.
886 * iq2000-asm.c: Regenerate.
887 * m32r-asm.c: Regenerate.
888 * openrisc-asm.c: Regenerate.
889
890 2005-04-01 Jan Beulich <jbeulich@novell.com>
891
892 * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
893 visible operands in Intel mode. The first operand of monitor is
894 %rax in 64-bit mode.
895
896 2005-04-01 Jan Beulich <jbeulich@novell.com>
897
898 * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
899 easier future additions.
900
901 2005-03-31 Jerome Guitton <guitton@gnat.com>
902
903 * configure.in: Check for basename.
904 * configure: Regenerate.
905 * config.in: Ditto.
906
907 2005-03-29 H.J. Lu <hongjiu.lu@intel.com>
908
909 * i386-dis.c (SEG_Fixup): New.
910 (Sv): New.
911 (dis386): Use "Sv" for 0x8c and 0x8e.
912
913 2005-03-21 Jan-Benedict Glaw <jbglaw@lug-owl.de>
914 Nick Clifton <nickc@redhat.com>
915
916 * vax-dis.c: (entry_addr): New varible: An array of user supplied
917 function entry mask addresses.
918 (entry_addr_occupied_slots): New variable: The number of occupied
919 elements in entry_addr.
920 (entry_addr_total_slots): New variable: The total number of
921 elements in entry_addr.
922 (parse_disassembler_options): New function. Fills in the entry_addr
923 array.
924 (free_entry_array): New function. Release the memory used by the
925 entry addr array. Suppressed because there is no way to call it.
926 (is_function_entry): Check if a given address is a function's
927 start address by looking at supplied entry mask addresses and
928 symbol information, if available.
929 (print_insn_vax): Use parse_disassembler_options and is_function_entry.
930
931 2005-03-23 H.J. Lu <hongjiu.lu@intel.com>
932
933 * cris-dis.c (print_with_operands): Use ~31L for long instead
934 of ~31.
935
936 2005-03-20 H.J. Lu <hongjiu.lu@intel.com>
937
938 * mmix-opc.c (O): Revert the last change.
939 (Z): Likewise.
940
941 2005-03-19 H.J. Lu <hongjiu.lu@intel.com>
942
943 * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
944 (Z): Likewise.
945
946 2005-03-19 Hans-Peter Nilsson <hp@bitrange.com>
947
948 * mmix-opc.c (O, Z): Force expression as unsigned long.
949
950 2005-03-18 Nick Clifton <nickc@redhat.com>
951
952 * ip2k-asm.c: Regenerate.
953 * op/opcodes.pot: Regenerate.
954
955 2005-03-16 Nick Clifton <nickc@redhat.com>
956 Ben Elliston <bje@au.ibm.com>
957
958 * configure.in (werror): New switch: Add -Werror to the
959 compiler command line. Enabled by default. Disable via
960 --disable-werror.
961 * configure: Regenerate.
962
963 2005-03-16 Alan Modra <amodra@bigpond.net.au>
964
965 * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
966 BOOKE.
967
968 2005-03-15 Alan Modra <amodra@bigpond.net.au>
969
970 * po/es.po: Commit new Spanish translation.
971
972 * po/fr.po: Commit new French translation.
973
974 2005-03-14 Jan-Benedict Glaw <jbglaw@lug-owl.de>
975
976 * vax-dis.c: Fix spelling error
977 (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
978 of just "Entry mask: < r1 ... >"
979
980 2005-03-12 Zack Weinberg <zack@codesourcery.com>
981
982 * arm-dis.c (arm_opcodes): Document %E and %V.
983 Add entries for v6T2 ARM instructions:
984 bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
985 (print_insn_arm): Add support for %E and %V.
986 (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
987
988 2005-03-10 Jeff Baker <jbaker@qnx.com>
989 Alan Modra <amodra@bigpond.net.au>
990
991 * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
992 (powerpc_operands <SPRG>): Call the above. Bit field is 5 bits.
993 (SPRG_MASK): Delete.
994 (XSPRG_MASK): Mask off extra bits now part of sprg field.
995 (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask. Move
996 mfsprg4..7 after msprg and consolidate.
997
998 2005-03-09 Jan-Benedict Glaw <jbglaw@lug-owl.de>
999
1000 * vax-dis.c (entry_mask_bit): New array.
1001 (print_insn_vax): Decode function entry mask.
1002
1003 2005-03-07 Aldy Hernandez <aldyh@redhat.com>
1004
1005 * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
1006
1007 2005-03-05 Alan Modra <amodra@bigpond.net.au>
1008
1009 * po/opcodes.pot: Regenerate.
1010
1011 2005-03-03 Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
1012
1013 * arc-dis.c (a4_decoding_class): New enum.
1014 (dsmOneArcInst): Use the enum values for the decoding class.
1015 Remove redundant case in the switch for decodingClass value 11.
1016
1017 2005-03-02 Jan Beulich <jbeulich@novell.com>
1018
1019 * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
1020 accesses.
1021 (OP_C): Consider lock prefix in non-64-bit modes.
1022
1023 2005-02-24 Alan Modra <amodra@bigpond.net.au>
1024
1025 * cris-dis.c (format_hex): Remove ineffective warning fix.
1026 * crx-dis.c (make_instruction): Warning fix.
1027 * frv-asm.c: Regenerate.
1028
1029 2005-02-23 Nick Clifton <nickc@redhat.com>
1030
1031 * cgen-dis.in: Use bfd_byte for buffers that are passed to
1032 read_memory.
1033
1034 * ia64-opc.c (locate_opcode_ent): Initialise opval array.
1035
1036 * crx-dis.c (make_instruction): Move argument structure into inner
1037 scope and ensure that all of its fields are initialised before
1038 they are used.
1039
1040 * fr30-asm.c: Regenerate.
1041 * fr30-dis.c: Regenerate.
1042 * frv-asm.c: Regenerate.
1043 * frv-dis.c: Regenerate.
1044 * ip2k-asm.c: Regenerate.
1045 * ip2k-dis.c: Regenerate.
1046 * iq2000-asm.c: Regenerate.
1047 * iq2000-dis.c: Regenerate.
1048 * m32r-asm.c: Regenerate.
1049 * m32r-dis.c: Regenerate.
1050 * openrisc-asm.c: Regenerate.
1051 * openrisc-dis.c: Regenerate.
1052 * xstormy16-asm.c: Regenerate.
1053 * xstormy16-dis.c: Regenerate.
1054
1055 2005-02-22 Alan Modra <amodra@bigpond.net.au>
1056
1057 * arc-ext.c: Warning fixes.
1058 * arc-ext.h: Likewise.
1059 * cgen-opc.c: Likewise.
1060 * ia64-gen.c: Likewise.
1061 * maxq-dis.c: Likewise.
1062 * ns32k-dis.c: Likewise.
1063 * w65-dis.c: Likewise.
1064 * ia64-asmtab.c: Regenerate.
1065
1066 2005-02-22 Alan Modra <amodra@bigpond.net.au>
1067
1068 * fr30-desc.c: Regenerate.
1069 * fr30-desc.h: Regenerate.
1070 * fr30-opc.c: Regenerate.
1071 * fr30-opc.h: Regenerate.
1072 * frv-desc.c: Regenerate.
1073 * frv-desc.h: Regenerate.
1074 * frv-opc.c: Regenerate.
1075 * frv-opc.h: Regenerate.
1076 * ip2k-desc.c: Regenerate.
1077 * ip2k-desc.h: Regenerate.
1078 * ip2k-opc.c: Regenerate.
1079 * ip2k-opc.h: Regenerate.
1080 * iq2000-desc.c: Regenerate.
1081 * iq2000-desc.h: Regenerate.
1082 * iq2000-opc.c: Regenerate.
1083 * iq2000-opc.h: Regenerate.
1084 * m32r-desc.c: Regenerate.
1085 * m32r-desc.h: Regenerate.
1086 * m32r-opc.c: Regenerate.
1087 * m32r-opc.h: Regenerate.
1088 * m32r-opinst.c: Regenerate.
1089 * openrisc-desc.c: Regenerate.
1090 * openrisc-desc.h: Regenerate.
1091 * openrisc-opc.c: Regenerate.
1092 * openrisc-opc.h: Regenerate.
1093 * xstormy16-desc.c: Regenerate.
1094 * xstormy16-desc.h: Regenerate.
1095 * xstormy16-opc.c: Regenerate.
1096 * xstormy16-opc.h: Regenerate.
1097
1098 2005-02-21 Alan Modra <amodra@bigpond.net.au>
1099
1100 * Makefile.am: Run "make dep-am"
1101 * Makefile.in: Regenerate.
1102
1103 2005-02-15 Nick Clifton <nickc@redhat.com>
1104
1105 * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
1106 compile time warnings.
1107 (print_keyword): Likewise.
1108 (default_print_insn): Likewise.
1109
1110 * fr30-desc.c: Regenerated.
1111 * fr30-desc.h: Regenerated.
1112 * fr30-dis.c: Regenerated.
1113 * fr30-opc.c: Regenerated.
1114 * fr30-opc.h: Regenerated.
1115 * frv-desc.c: Regenerated.
1116 * frv-dis.c: Regenerated.
1117 * frv-opc.c: Regenerated.
1118 * ip2k-asm.c: Regenerated.
1119 * ip2k-desc.c: Regenerated.
1120 * ip2k-desc.h: Regenerated.
1121 * ip2k-dis.c: Regenerated.
1122 * ip2k-opc.c: Regenerated.
1123 * ip2k-opc.h: Regenerated.
1124 * iq2000-desc.c: Regenerated.
1125 * iq2000-dis.c: Regenerated.
1126 * iq2000-opc.c: Regenerated.
1127 * m32r-asm.c: Regenerated.
1128 * m32r-desc.c: Regenerated.
1129 * m32r-desc.h: Regenerated.
1130 * m32r-dis.c: Regenerated.
1131 * m32r-opc.c: Regenerated.
1132 * m32r-opc.h: Regenerated.
1133 * m32r-opinst.c: Regenerated.
1134 * openrisc-desc.c: Regenerated.
1135 * openrisc-desc.h: Regenerated.
1136 * openrisc-dis.c: Regenerated.
1137 * openrisc-opc.c: Regenerated.
1138 * openrisc-opc.h: Regenerated.
1139 * xstormy16-desc.c: Regenerated.
1140 * xstormy16-desc.h: Regenerated.
1141 * xstormy16-dis.c: Regenerated.
1142 * xstormy16-opc.c: Regenerated.
1143 * xstormy16-opc.h: Regenerated.
1144
1145 2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
1146
1147 * dis-buf.c (perror_memory): Use sprintf_vma to print out
1148 address.
1149
1150 2005-02-11 Nick Clifton <nickc@redhat.com>
1151
1152 * iq2000-asm.c: Regenerate.
1153
1154 * frv-dis.c: Regenerate.
1155
1156 2005-02-07 Jim Blandy <jimb@redhat.com>
1157
1158 * Makefile.am (CGEN): Load guile.scm before calling the main
1159 application script.
1160 * Makefile.in: Regenerated.
1161 * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
1162 Simply pass the cgen-opc.scm path to ${cgen} as its first
1163 argument; ${cgen} itself now contains the '-s', or whatever is
1164 appropriate for the Scheme being used.
1165
1166 2005-01-31 Andrew Cagney <cagney@gnu.org>
1167
1168 * configure: Regenerate to track ../gettext.m4.
1169
1170 2005-01-31 Jan Beulich <jbeulich@novell.com>
1171
1172 * ia64-gen.c (NELEMS): Define.
1173 (shrink): Generate alias with missing second predicate register when
1174 opcode has two outputs and these are both predicates.
1175 * ia64-opc-i.c (FULL17): Define.
1176 (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1177 here to generate output template.
1178 (TBITCM, TNATCM): Undefine after use.
1179 * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1180 first input. Add ld16 aliases without ar.csd as second output. Add
1181 st16 aliases without ar.csd as second input. Add cmpxchg aliases
1182 without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1183 ar.ccv as third/fourth inputs. Consolidate through...
1184 (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1185 CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1186 * ia64-asmtab.c: Regenerate.
1187
1188 2005-01-27 Andrew Cagney <cagney@gnu.org>
1189
1190 * configure: Regenerate to track ../gettext.m4 change.
1191
1192 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
1193
1194 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
1195 * frv-asm.c: Rebuilt.
1196 * frv-desc.c: Rebuilt.
1197 * frv-desc.h: Rebuilt.
1198 * frv-dis.c: Rebuilt.
1199 * frv-ibld.c: Rebuilt.
1200 * frv-opc.c: Rebuilt.
1201 * frv-opc.h: Rebuilt.
1202
1203 2005-01-24 Andrew Cagney <cagney@gnu.org>
1204
1205 * configure: Regenerate, ../gettext.m4 was updated.
1206
1207 2005-01-21 Fred Fish <fnf@specifixinc.com>
1208
1209 * mips-opc.c: Change INSN_ALIAS to INSN2_ALIAS.
1210 Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1211 Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1212 * mips-dis.c: Ditto.
1213
1214 2005-01-20 Alan Modra <amodra@bigpond.net.au>
1215
1216 * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1217
1218 2005-01-19 Fred Fish <fnf@specifixinc.com>
1219
1220 * mips-dis.c (no_aliases): New disassembly option flag.
1221 (set_default_mips_dis_options): Init no_aliases to zero.
1222 (parse_mips_dis_option): Handle no-aliases option.
1223 (print_insn_mips): Ignore table entries that are aliases
1224 if no_aliases is set.
1225 (print_insn_mips16): Ditto.
1226 * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1227 new pinfo2 member and add INSN_ALIAS initializers as needed. Also
1228 move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1229 * mips16-opc.c (mips16_opcodes): Ditto.
1230
1231 2005-01-17 Andrew Stubbs <andrew.stubbs@st.com>
1232
1233 * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1234 (inheritance diagram): Add missing edge.
1235 (arch_sh1_up): Rename arch_sh_up to match external name to make life
1236 easier for the testsuite.
1237 (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1238 (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
1239 (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
1240 arch_sh2a_or_sh4_up child.
1241 (sh_table): Do renaming as above.
1242 Correct comment for ldc.l for gas testsuite to read.
1243 Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1244 Correct comments for movy.w and movy.l for gas testsuite to read.
1245 Correct comments for fmov.d and fmov.s for gas testsuite to read.
1246
1247 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1248
1249 * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1250
1251 2005-01-12 H.J. Lu <hongjiu.lu@intel.com>
1252
1253 * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1254
1255 2005-01-10 Andreas Schwab <schwab@suse.de>
1256
1257 * disassemble.c (disassemble_init_for_target) <case
1258 bfd_arch_ia64>: Set skip_zeroes to 16.
1259 <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1260
1261 2004-12-23 Tomer Levi <Tomer.Levi@nsc.com>
1262
1263 * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1264
1265 2004-12-14 Svein E. Seldal <Svein.Seldal@solidas.com>
1266
1267 * avr-dis.c: Prettyprint. Added printing of symbol names in all
1268 memory references. Convert avr_operand() to C90 formatting.
1269
1270 2004-12-05 Tomer Levi <Tomer.Levi@nsc.com>
1271
1272 * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1273
1274 2004-11-29 Tomer Levi <Tomer.Levi@nsc.com>
1275
1276 * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1277 (no_op_insn): Initialize array with instructions that have no
1278 operands.
1279 * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1280
1281 2004-11-29 Richard Earnshaw <rearnsha@arm.com>
1282
1283 * arm-dis.c: Correct top-level comment.
1284
1285 2004-11-27 Richard Earnshaw <rearnsha@arm.com>
1286
1287 * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1288 architecuture defining the insn.
1289 (arm_opcodes, thumb_opcodes): Delete. Move to ...
1290 * arm-dis.c (arm_opcodes, thumb_opcodes): Here. Add architecutre
1291 field.
1292 Also include opcode/arm.h.
1293 * Makefile.am (arm-dis.lo): Update dependency list.
1294 * Makefile.in: Regenerate.
1295
1296 2004-11-22 Ravi Ramaseshan <ravi.ramaseshan@codito.com>
1297
1298 * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1299 reflect the change to the short immediate syntax.
1300
1301 2004-11-19 Alan Modra <amodra@bigpond.net.au>
1302
1303 * or32-opc.c (debug): Warning fix.
1304 * po/POTFILES.in: Regenerate.
1305
1306 * maxq-dis.c: Formatting.
1307 (print_insn): Warning fix.
1308
1309 2004-11-17 Daniel Jacobowitz <dan@codesourcery.com>
1310
1311 * arm-dis.c (WORD_ADDRESS): Define.
1312 (print_insn): Use it. Correct big-endian end-of-section handling.
1313
1314 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com>
1315 Vineet Sharma <vineets@noida.hcltech.com>
1316
1317 * maxq-dis.c: New file.
1318 * disassemble.c (ARCH_maxq): Define.
1319 (disassembler): Add 'print_insn_maxq_little' for handling maxq
1320 instructions..
1321 * configure.in: Add case for bfd_maxq_arch.
1322 * configure: Regenerate.
1323 * Makefile.am: Add support for maxq-dis.c
1324 * Makefile.in: Regenerate.
1325 * aclocal.m4: Regenerate.
1326
1327 2004-11-05 Tomer Levi <Tomer.Levi@nsc.com>
1328
1329 * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1330 mode.
1331 * crx-dis.c: Likewise.
1332
1333 2004-11-04 Hans-Peter Nilsson <hp@axis.com>
1334
1335 Generally, handle CRISv32.
1336 * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1337 (struct cris_disasm_data): New type.
1338 (format_reg, format_hex, cris_constraint, print_flags)
1339 (get_opcode_entry): Add struct cris_disasm_data * parameter. All
1340 callers changed.
1341 (format_sup_reg, print_insn_crisv32_with_register_prefix)
1342 (print_insn_crisv32_without_register_prefix)
1343 (print_insn_crisv10_v32_with_register_prefix)
1344 (print_insn_crisv10_v32_without_register_prefix)
1345 (cris_parse_disassembler_options): New functions.
1346 (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1347 parameter. All callers changed.
1348 (get_opcode_entry): Call malloc, not xmalloc. Return NULL on
1349 failure.
1350 (cris_constraint) <case 'Y', 'U'>: New cases.
1351 (bytes_to_skip): Handle 'Y' and 'N' as 's'. Skip size is 4 bytes
1352 for constraint 'n'.
1353 (print_with_operands) <case 'Y'>: New case.
1354 (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1355 <case 'N', 'Y', 'Q'>: New cases.
1356 (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1357 (print_insn_cris_with_register_prefix)
1358 (print_insn_cris_without_register_prefix): Call
1359 cris_parse_disassembler_options.
1360 * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1361 for CRISv32 and the size of immediate operands. New v32-only
1362 entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1363 spc. Add v32-only 4-byte entries for p2, p3, p5 and p6. Change
1364 ccr, ibr, irp to be v0..v10. Change bar, dccr to be v8..v10.
1365 Change brp to be v3..v10.
1366 (cris_support_regs): New vector.
1367 (cris_opcodes): Update head comment. New format characters '[',
1368 ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1369 Add new opcodes for v32 and adjust existing opcodes to accommodate
1370 differences to earlier variants.
1371 (cris_cond15s): New vector.
1372
1373 2004-11-04 Jan Beulich <jbeulich@novell.com>
1374
1375 * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1376 (indirEb): Remove.
1377 (Mp): Use f_mode rather than none at all.
1378 (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1379 replaces what previously was x_mode; x_mode now means 128-bit SSE
1380 operands.
1381 (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1382 mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1383 pinsrw's second operand is Edqw.
1384 (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1385 operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1386 fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1387 mode when an operand size override is present or always suffixing.
1388 More instructions will need to be added to this group.
1389 (putop): Handle new macro chars 'C' (short/long suffix selector),
1390 'I' (Intel mode override for following macro char), and 'J' (for
1391 adding the 'l' prefix to far branches in AT&T mode). When an
1392 alternative was specified in the template, honor macro character when
1393 specified for Intel mode.
1394 (OP_E): Handle new *_mode values. Correct pointer specifications for
1395 memory operands. Consolidate output of index register.
1396 (OP_G): Handle new *_mode values.
1397 (OP_I): Handle const_1_mode.
1398 (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1399 respective opcode prefix bits have been consumed.
1400 (OP_EM, OP_EX): Provide some default handling for generating pointer
1401 specifications.
1402
1403 2004-10-28 Tomer Levi <Tomer.Levi@nsc.com>
1404
1405 * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1406 COP_INST macro.
1407
1408 2004-10-27 Tomer Levi <Tomer.Levi@nsc.com>
1409
1410 * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1411 (getregliststring): Support HI/LO and user registers.
1412 * crx-opc.c (crx_instruction): Update data structure according to the
1413 rearrangement done in CRX opcode header file.
1414 (crx_regtab): Likewise.
1415 (crx_optab): Likewise.
1416 (crx_instruction): Reorder load/stor instructions, remove unsupported
1417 formats.
1418 support new Co-Processor instruction 'cpi'.
1419
1420 2004-10-27 Nick Clifton <nickc@redhat.com>
1421
1422 * opcodes/iq2000-asm.c: Regenerate.
1423 * opcodes/iq2000-desc.c: Regenerate.
1424 * opcodes/iq2000-desc.h: Regenerate.
1425 * opcodes/iq2000-dis.c: Regenerate.
1426 * opcodes/iq2000-ibld.c: Regenerate.
1427 * opcodes/iq2000-opc.c: Regenerate.
1428 * opcodes/iq2000-opc.h: Regenerate.
1429
1430 2004-10-21 Tomer Levi <Tomer.Levi@nsc.com>
1431
1432 * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1433 us4, us5 (respectively).
1434 Remove unsupported 'popa' instruction.
1435 Reverse operands order in store co-processor instructions.
1436
1437 2004-10-15 Alan Modra <amodra@bigpond.net.au>
1438
1439 * Makefile.am: Run "make dep-am"
1440 * Makefile.in: Regenerate.
1441
1442 2004-10-12 Bob Wilson <bob.wilson@acm.org>
1443
1444 * xtensa-dis.c: Use ISO C90 formatting.
1445
1446 2004-10-09 Alan Modra <amodra@bigpond.net.au>
1447
1448 * ppc-opc.c: Revert 2004-09-09 change.
1449
1450 2004-10-07 Bob Wilson <bob.wilson@acm.org>
1451
1452 * xtensa-dis.c (state_names): Delete.
1453 (fetch_data): Use xtensa_isa_maxlength.
1454 (print_xtensa_operand): Replace operand parameter with opcode/operand
1455 pair. Remove print_sr_name parameter. Use new xtensa-isa.h functions.
1456 (print_insn_xtensa): Use new xtensa-isa.h functions. Handle multislot
1457 instruction bundles. Use xmalloc instead of malloc.
1458
1459 2004-10-07 David Gibson <david@gibson.dropbear.id.au>
1460
1461 * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1462 initializers.
1463
1464 2004-10-07 Tomer Levi <Tomer.Levi@nsc.com>
1465
1466 * crx-opc.c (crx_instruction): Support Co-processor insns.
1467 * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1468 (getregliststring): Change function to use the above enum.
1469 (print_arg): Handle CO-Processor insns.
1470 (crx_cinvs): Add 'b' option to invalidate the branch-target
1471 cache.
1472
1473 2004-10-06 Aldy Hernandez <aldyh@redhat.com>
1474
1475 * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1476 efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1477 efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1478 efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1479 efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1480
1481 2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
1482
1483 * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1484 rather than add it.
1485
1486 2004-09-30 Paul Brook <paul@codesourcery.com>
1487
1488 * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1489 * arm-opc.h: Document %e. Add ARMv6ZK instructions.
1490
1491 2004-09-17 H.J. Lu <hongjiu.lu@intel.com>
1492
1493 * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1494 (CONFIG_STATUS_DEPENDENCIES): New.
1495 (Makefile): Removed.
1496 (config.status): Likewise.
1497 * Makefile.in: Regenerated.
1498
1499 2004-09-17 Alan Modra <amodra@bigpond.net.au>
1500
1501 * Makefile.am: Run "make dep-am".
1502 * Makefile.in: Regenerate.
1503 * aclocal.m4: Regenerate.
1504 * configure: Regenerate.
1505 * po/POTFILES.in: Regenerate.
1506 * po/opcodes.pot: Regenerate.
1507
1508 2004-09-11 Andreas Schwab <schwab@suse.de>
1509
1510 * configure: Rebuild.
1511
1512 2004-09-09 Segher Boessenkool <segher@kernel.crashing.org>
1513
1514 * ppc-opc.c (L): Make this field not optional.
1515
1516 2004-09-03 Tomer Levi <Tomer.Levi@nsc.com>
1517
1518 * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1519 Fix parameter to 'm[t|f]csr' insns.
1520
1521 2004-08-30 Nathanael Nerode <neroden@gcc.gnu.org>
1522
1523 * configure.in: Autoupdate to autoconf 2.59.
1524 * aclocal.m4: Rebuild with aclocal 1.4p6.
1525 * configure: Rebuild with autoconf 2.59.
1526 * Makefile.in: Rebuild with automake 1.4p6 (picking up
1527 bfd changes for autoconf 2.59 on the way).
1528 * config.in: Rebuild with autoheader 2.59.
1529
1530 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1531
1532 * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1533
1534 2004-07-30 Michal Ludvig <mludvig@suse.cz>
1535
1536 * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1537 (GRPPADLCK2): New define.
1538 (twobyte_has_modrm): True for 0xA6.
1539 (grps): GRPPADLCK2 for opcode 0xA6.
1540
1541 2004-07-29 Alexandre Oliva <aoliva@redhat.com>
1542
1543 Introduce SH2a support.
1544 * sh-opc.h (arch_sh2a_base): Renumber.
1545 (arch_sh2a_nofpu_base): Remove.
1546 (arch_sh_base_mask): Adjust.
1547 (arch_opann_mask): New.
1548 (arch_sh2a, arch_sh2a_nofpu): Adjust.
1549 (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1550 (sh_table): Adjust whitespace.
1551 2004-02-24 Corinna Vinschen <vinschen@redhat.com>
1552 * sh-opc.h (arch_sh2a_nofpu_up): New. Use instead of arch_sh2a_up in
1553 instruction list throughout.
1554 (arch_sh2a_up): Redefine to include fpu instruction set. Use instead
1555 of arch_sh2a in instruction list throughout.
1556 (arch_sh2e_up): Accomodate above changes.
1557 (arch_sh2_up): Ditto.
1558 2004-02-20 Corinna Vinschen <vinschen@redhat.com>
1559 * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1560 2004-02-18 Corinna Vinschen <vinschen@redhat.com>
1561 * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1562 * sh-opc.h (arch_sh2a_nofpu): New.
1563 (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1564 (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1565 instruction.
1566 2004-01-20 DJ Delorie <dj@redhat.com>
1567 * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1568 2003-12-29 DJ Delorie <dj@redhat.com>
1569 * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1570 sh_opcode_info, sh_table): Add sh2a support.
1571 (arch_op32): New, to tag 32-bit opcodes.
1572 * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1573 2003-12-02 Michael Snyder <msnyder@redhat.com>
1574 * sh-opc.h (arch_sh2a): Add.
1575 * sh-dis.c (arch_sh2a): Handle.
1576 * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1577
1578 2004-07-27 Tomer Levi <Tomer.Levi@nsc.com>
1579
1580 * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1581
1582 2004-07-22 Nick Clifton <nickc@redhat.com>
1583
1584 PR/280
1585 * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1586 insns - this is done by objdump itself.
1587 * h8500-dis.c (print_insn_h8500): Likewise.
1588
1589 2004-07-21 Jan Beulich <jbeulich@novell.com>
1590
1591 * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1592 regardless of address size prefix in effect.
1593 (ptr_reg): Size or address registers does not depend on rex64, but
1594 on the presence of an address size override.
1595 (OP_MMX): Use rex.x only for xmm registers.
1596 (OP_EM): Use rex.z only for xmm registers.
1597
1598 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1599
1600 * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1601 move/branch operations to the bottom so that VR5400 multimedia
1602 instructions take precedence in disassembly.
1603
1604 2004-07-20 Maciej W. Rozycki <macro@linux-mips.org>
1605
1606 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1607 ISA-specific "break" encoding.
1608
1609 2004-07-13 Elvis Chiang <elvisfb@gmail.com>
1610
1611 * arm-opc.h: Fix typo in comment.
1612
1613 2004-07-11 Andreas Schwab <schwab@suse.de>
1614
1615 * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1616
1617 2004-07-09 Andreas Schwab <schwab@suse.de>
1618
1619 * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1620
1621 2004-07-07 Tomer Levi <Tomer.Levi@nsc.com>
1622
1623 * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1624 (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1625 (crx-dis.lo): New target.
1626 (crx-opc.lo): Likewise.
1627 * Makefile.in: Regenerate.
1628 * configure.in: Handle bfd_crx_arch.
1629 * configure: Regenerate.
1630 * crx-dis.c: New file.
1631 * crx-opc.c: New file.
1632 * disassemble.c (ARCH_crx): Define.
1633 (disassembler): Handle ARCH_crx.
1634
1635 2004-06-29 James E Wilson <wilson@specifixinc.com>
1636
1637 * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1638 * ia64-asmtab.c: Regnerate.
1639
1640 2004-06-28 Alan Modra <amodra@bigpond.net.au>
1641
1642 * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1643 (extract_fxm): Don't test dialect.
1644 (XFXFXM_MASK): Include the power4 bit.
1645 (XFXM): Add p4 param.
1646 (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr.
1647
1648 2004-06-27 Alexandre Oliva <aoliva@redhat.com>
1649
1650 2003-07-21 Richard Sandiford <rsandifo@redhat.com>
1651 * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1652
1653 2004-06-26 Alan Modra <amodra@bigpond.net.au>
1654
1655 * ppc-opc.c (BH, XLBH_MASK): Define.
1656 (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1657
1658 2004-06-24 Alan Modra <amodra@bigpond.net.au>
1659
1660 * i386-dis.c (x_mode): Comment.
1661 (two_source_ops): File scope.
1662 (float_mem): Correct fisttpll and fistpll.
1663 (float_mem_mode): New table.
1664 (dofloat): Use it.
1665 (OP_E): Correct intel mode PTR output.
1666 (ptr_reg): Use open_char and close_char.
1667 (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for
1668 operands. Set two_source_ops.
1669
1670 2004-06-15 Alan Modra <amodra@bigpond.net.au>
1671
1672 * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1673 instead of _raw_size.
1674
1675 2004-06-08 Jakub Jelinek <jakub@redhat.com>
1676
1677 * ia64-gen.c (in_iclass): Handle more postinc st
1678 and ld variants.
1679 * ia64-asmtab.c: Rebuilt.
1680
1681 2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com>
1682
1683 * s390-opc.txt: Correct architecture mask for some opcodes.
1684 lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1685 in the esa mode as well.
1686
1687 2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com>
1688
1689 * sh-dis.c (target_arch): Make unsigned.
1690 (print_insn_sh): Replace (most of) switch with a call to
1691 sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1692 * sh-opc.h: Redefine architecture flags values.
1693 Add sh3-nommu architecture.
1694 Reorganise <arch>_up macros so they make more visual sense.
1695 (SH_MERGE_ARCH_SET): Define new macro.
1696 (SH_VALID_BASE_ARCH_SET): Likewise.
1697 (SH_VALID_MMU_ARCH_SET): Likewise.
1698 (SH_VALID_CO_ARCH_SET): Likewise.
1699 (SH_VALID_ARCH_SET): Likewise.
1700 (SH_MERGE_ARCH_SET_VALID): Likewise.
1701 (SH_ARCH_SET_HAS_FPU): Likewise.
1702 (SH_ARCH_SET_HAS_DSP): Likewise.
1703 (SH_ARCH_UNKNOWN_ARCH): Likewise.
1704 (sh_get_arch_from_bfd_mach): Add prototype.
1705 (sh_get_arch_up_from_bfd_mach): Likewise.
1706 (sh_get_bfd_mach_from_arch_set): Likewise.
1707 (sh_merge_bfd_arc): Likewise.
1708
1709 2004-05-24 Peter Barada <peter@the-baradas.com>
1710
1711 * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1712 into new match_insn_m68k function. Loop over canidate
1713 matches and select first that completely matches.
1714 * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1715 * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1716 to verify addressing for MAC/EMAC.
1717 * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1718 reigster halves since 'fpu' and 'spl' look misleading.
1719 * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1720 * m68k-opc.c: Rearragne mac/emac cases to use longest for
1721 first, tighten up match masks.
1722 * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce
1723 'size' from special case code in print_insn_m68k to
1724 determine decode size of insns.
1725
1726 2004-05-19 Alan Modra <amodra@bigpond.net.au>
1727
1728 * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1729 well as when -mpower4.
1730
1731 2004-05-13 Nick Clifton <nickc@redhat.com>
1732
1733 * po/fr.po: Updated French translation.
1734
1735 2004-05-05 Peter Barada <peter@the-baradas.com>
1736
1737 * m68k-dis.c(print_insn_m68k): Add new chips, use core
1738 variants in arch_mask. Only set m68881/68851 for 68k chips.
1739 * m68k-op.c: Switch from ColdFire chips to core variants.
1740
1741 2004-05-05 Alan Modra <amodra@bigpond.net.au>
1742
1743 PR 147.
1744 * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1745
1746 2004-04-29 Ben Elliston <bje@au.ibm.com>
1747
1748 * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1749 (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1750
1751 2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp>
1752
1753 * sh-dis.c (print_insn_sh): Print the value in constant pool
1754 as a symbol if it looks like a symbol.
1755
1756 2004-04-22 Peter Barada <peter@the-baradas.com>
1757
1758 * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1759 appropriate ColdFire architectures.
1760 (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1761 mask addressing.
1762 Add EMAC instructions, fix MAC instructions. Remove
1763 macmw/macml/msacmw/msacml instructions since mask addressing now
1764 supported.
1765
1766 2004-04-20 Jakub Jelinek <jakub@redhat.com>
1767
1768 * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1769 (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1770 suffix. Use fmov*x macros, create all 3 fpsize variants in one
1771 macro. Adjust all users.
1772
1773 2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com>
1774
1775 * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1776 separately.
1777
1778 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1779
1780 * m32r-asm.c: Regenerate.
1781
1782 2004-03-29 Stan Shebs <shebs@apple.com>
1783
1784 * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1785 used.
1786
1787 2004-03-19 Alan Modra <amodra@bigpond.net.au>
1788
1789 * aclocal.m4: Regenerate.
1790 * config.in: Regenerate.
1791 * configure: Regenerate.
1792 * po/POTFILES.in: Regenerate.
1793 * po/opcodes.pot: Regenerate.
1794
1795 2004-03-16 Alan Modra <amodra@bigpond.net.au>
1796
1797 * ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle
1798 PPC_OPERANDS_GPR_0.
1799 * ppc-opc.c (RA0): Define.
1800 (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1801 (RAOPT): Rename from RAO. Update all uses.
1802 (powerpc_opcodes): Use RA0 as appropriate.
1803
1804 2004-03-15 Aldy Hernandez <aldyh@redhat.com>
1805
1806 * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1807
1808 2004-03-15 Alan Modra <amodra@bigpond.net.au>
1809
1810 * sparc-dis.c (print_insn_sparc): Update getword prototype.
1811
1812 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1813
1814 * i386-dis.c (GRPPLOCK): Delete.
1815 (grps): Delete GRPPLOCK entry.
1816
1817 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1818
1819 * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1820 (M, Mp): Use OP_M.
1821 (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1822 (GRPPADLCK): Define.
1823 (dis386): Use NOP_Fixup on "nop".
1824 (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1825 (twobyte_has_modrm): Set for 0xa7.
1826 (padlock_table): Delete. Move to..
1827 (grps): ..here, using OP_0f07. Use OP_Ofae on lfence, mfence
1828 and clflush.
1829 (print_insn): Revert PADLOCK_SPECIAL code.
1830 (OP_E): Delete sfence, lfence, mfence checks.
1831
1832 2004-03-12 Jakub Jelinek <jakub@redhat.com>
1833
1834 * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1835 (INVLPG_Fixup): New function.
1836 (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1837
1838 2004-03-12 Michal Ludvig <mludvig@suse.cz>
1839
1840 * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1841 (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1842 (padlock_table): New struct with PadLock instructions.
1843 (print_insn): Handle PADLOCK_SPECIAL.
1844
1845 2004-03-12 Alan Modra <amodra@bigpond.net.au>
1846
1847 * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1848 (OP_E): Twiddle clflush to sfence here.
1849
1850 2004-03-08 Nick Clifton <nickc@redhat.com>
1851
1852 * po/de.po: Updated German translation.
1853
1854 2003-03-03 Andrew Stubbs <andrew.stubbs@superh.com>
1855
1856 * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1857 nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
1858 * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1859 accordingly.
1860
1861 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1862
1863 * frv-asm.c: Regenerate.
1864 * frv-desc.c: Regenerate.
1865 * frv-desc.h: Regenerate.
1866 * frv-dis.c: Regenerate.
1867 * frv-ibld.c: Regenerate.
1868 * frv-opc.c: Regenerate.
1869 * frv-opc.h: Regenerate.
1870
1871 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1872
1873 * frv-desc.c, frv-opc.c: Regenerate.
1874
1875 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1876
1877 * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1878
1879 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1880
1881 * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1882 Also correct mistake in the comment.
1883
1884 2004-02-26 Andrew Stubbs <andrew.stubbs@superh.com>
1885
1886 * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1887 ensure that double registers have even numbers.
1888 Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1889 that reserved instruction 0xfffd does not decode the same
1890 as 0xfdfd (ftrv).
1891 * sh-opc.h: Add REG_N_D nibble type and use it whereever
1892 REG_N refers to a double register.
1893 Add REG_N_B01 nibble type and use it instead of REG_NM
1894 in ftrv.
1895 Adjust the bit patterns in a few comments.
1896
1897 2004-02-25 Aldy Hernandez <aldyh@redhat.com>
1898
1899 * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1900
1901 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1902
1903 * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1904
1905 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1906
1907 * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1908
1909 2004-02-20 Aldy Hernandez <aldyh@redhat.com>
1910
1911 * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1912 mtivor32, mtivor33, mtivor34.
1913
1914 2004-02-19 Aldy Hernandez <aldyh@redhat.com>
1915
1916 * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1917
1918 2004-02-10 Petko Manolov <petkan@nucleusys.com>
1919
1920 * arm-opc.h Maverick accumulator register opcode fixes.
1921
1922 2004-02-13 Ben Elliston <bje@wasabisystems.com>
1923
1924 * m32r-dis.c: Regenerate.
1925
1926 2004-01-27 Michael Snyder <msnyder@redhat.com>
1927
1928 * sh-opc.h (sh_table): "fsrra", not "fssra".
1929
1930 2004-01-23 Andrew Over <andrew.over@cs.anu.edu.au>
1931
1932 * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1933 contraints.
1934
1935 2004-01-19 Andrew Over <andrew.over@cs.anu.edu.au>
1936
1937 * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1938
1939 2004-01-19 Alan Modra <amodra@bigpond.net.au>
1940
1941 * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1942 1. Don't print scale factor on AT&T mode when index missing.
1943
1944 2004-01-16 Alexandre Oliva <aoliva@redhat.com>
1945
1946 * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1947 when loaded into XR registers.
1948
1949 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1950
1951 * frv-desc.h: Regenerate.
1952 * frv-desc.c: Regenerate.
1953 * frv-opc.c: Regenerate.
1954
1955 2004-01-13 Michael Snyder <msnyder@redhat.com>
1956
1957 * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1958
1959 2004-01-09 Paul Brook <paul@codesourcery.com>
1960
1961 * arm-opc.h (arm_opcodes): Move generic mcrr after known
1962 specific opcodes.
1963
1964 2004-01-07 Daniel Jacobowitz <drow@mvista.com>
1965
1966 * Makefile.am (libopcodes_la_DEPENDENCIES)
1967 (libopcodes_la_LIBADD): Revert 2003-05-17 change. Add explanatory
1968 comment about the problem.
1969 * Makefile.in: Regenerate.
1970
1971 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1972
1973 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1974 * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1975 cut&paste errors in shifting/truncating numerical operands.
1976 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1977 * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1978 (parse_uslo16): Likewise.
1979 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1980 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1981 (parse_s12): Likewise.
1982 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1983 * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1984 (parse_uslo16): Likewise.
1985 (parse_uhi16): Parse gothi and gotfuncdeschi.
1986 (parse_d12): Parse got12 and gotfuncdesc12.
1987 (parse_s12): Likewise.
1988
1989 2004-01-02 Albert Bartoszko <albar@nt.kegel.com.pl>
1990
1991 * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1992 instruction which looks similar to an 'rla' instruction.
1993
1994 For older changes see ChangeLog-0203
1995 \f
1996 Local Variables:
1997 mode: change-log
1998 left-margin: 8
1999 fill-column: 74
2000 version-control: never
2001 End:
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