opcodes/ChangeLog

   1 2011-05-19  Nick Clifton  <nickc@redhat.com>
   2
   3         * v850-opc.c (cmpf.[sd]): Reverse the order of the reg1 and reg2
   4         operands.
   5
   6 2011-05-10  Quentin Neill  <quentin.neill@amd.com>
   7
   8         * i386-gen.c (cpu_flag_init): Add new CPU_BDVER2_FLAGS.
   9         * i386-init.h: Regenerated.
  10
  11 2011-04-27  Nick Clifton  <nickc@redhat.com>
  12
  13         * po/da.po: Updated Danish translation.
  14
  15 2011-04-26  Anton Blanchard  <anton@samba.org>
  16
  17         * ppc-opc.c: (powerpc_opcodes): Enable icswx for POWER7.
  18
  19 2011-04-21  DJ Delorie  <dj@redhat.com>
  20
  21         * rx-decode.opc (rx_decode_opcode): Set the syntax for multi-byte NOPs.
  22         * rx-decode.c: Regenerate.
  23
  24 2011-04-20  H.J. Lu  <hongjiu.lu@intel.com>
  25
  26         * i386-init.h: Regenerated.
  27
  28 2011-04-19  Quentin Neill  <quentin.neill@amd.com>
  29
  30         * i386-gen.c (cpu_flag_init): Remove 3dnow and 3dnowa bits
  31         from bdver1 flags.
  32
  33 2011-04-13  Nick Clifton  <nickc@redhat.com>
  34
  35         * v850-dis.c (disassemble): Always print a closing square brace if
  36         an opening square brace was printed.
  37
  38 2011-04-12  Nick Clifton  <nickc@redhat.com>
  39
  40         PR binutils/12534
  41         * arm-dis.c (thumb32_opcodes): Add %L suffix to LDRD and STRD insn
  42         patterns.
  43         (print_insn_thumb32): Handle %L.
  44
  45 2011-04-11  Julian Brown  <julian@codesourcery.com>
  46
  47         * arm-dis.c (psr_name): Fix typo for BASEPRI_MAX.
  48         (print_insn_thumb32): Add APSR bitmask support.
  49
  50 2011-04-07  Paul Carroll<pcarroll@codesourcery.com>
  51
  52         * arm-dis.c (print_insn): init vars moved into private_data structure.
  53
  54 2011-03-24  Mike Frysinger  <vapier@gentoo.org>
  55
  56         * bfin-dis.c (decode_dsp32mac_0): Move MM zeroing down to MAC0 logic.
  57
  58 2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>
  59
  60         * avr-dis.c (avr_operand): Add opcode_str parameter. Check for
  61         post-increment to support LPM Z+ instruction. Add support for 'E'
  62         constraint for DES instruction.
  63         (print_insn_avr): Adjust calls to avr_operand. Rename variable.
  64
  65 2011-03-14  Richard Sandiford  <richard.sandiford@linaro.org>
  66
  67         * arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code.
  68
  69 2011-03-14  Richard Sandiford  <richard.sandiford@linaro.org>
  70
  71         * arm-dis.c (get_sym_code_type): Don't check for STT_ARM_TFUNC.
  72         Use branch types instead.
  73         (print_insn): Likewise.
  74
  75 2011-02-28  Maciej W. Rozycki  <macro@codesourcery.com>
  76
  77         * mips-opc.c (mips_builtin_opcodes): Correct register use
  78         annotation of "alnv.ps".
  79
  80 2011-02-28  Maciej W. Rozycki  <macro@codesourcery.com>
  81
  82         * mips-opc.c (mips_builtin_opcodes): Add "pref" macro.
  83
  84 2011-02-22  Mike Frysinger  <vapier@gentoo.org>
  85
  86         * bfin-dis.c (OUTS): Remove p NULL check and txt NUL check.
  87
  88 2011-02-22  Mike Frysinger  <vapier@gentoo.org>
  89
  90         * bfin-dis.c (print_insn_bfin): Change outf->fprintf_func to OUTS.
  91
  92 2011-02-19  Mike Frysinger  <vapier@gentoo.org>
  93
  94         * bfin-dis.c (saved_state): Mark static.  Change a[01]x to ax[] and
  95         a[01]w to aw[].  Delete ac0, ac0_copy, ac1, an, aq, av0, av0s, av1,
  96         av1s, az, cc, v, v_copy, vs, rnd_mod, v_internal, pc, ticks, insts,
  97         exception, end_of_registers, msize, memory, bfd_mach.
  98         (CCREG, PCREG, A0XREG, A0WREG, A1XREG, A1WREG, LC0REG, LT0REG,
  99         LB0REG, LC1REG, LT1REG, LB1REG): Delete
 100         (AXREG, AWREG, LCREG, LTREG, LBREG): Define.
 101         (get_allreg): Change to new defines.  Fallback to abort().
 102
 103 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 104
 105         * bfin-dis.c: Add whitespace/parenthesis where needed.
 106
 107 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 108
 109         * bfin-dis.c (decode_LoopSetup_0): Return when reg is greater
 110         than 7.
 111
 112 2011-02-13  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 113
 114         * configure: Regenerate.
 115
 116 2011-02-13  Mike Frysinger  <vapier@gentoo.org>
 117
 118         * bfin-dis.c (decode_dsp32alu_0): Fix typo with A1 reg.
 119
 120 2011-02-13  Mike Frysinger  <vapier@gentoo.org>
 121
 122         * bfin-dis.c (decode_dsp32mult_0): Add 1 to dst for mac1.  Output
 123         dregs only when P is set, and dregs_lo otherwise.
 124
 125 2011-02-13  Mike Frysinger  <vapier@gentoo.org>
 126
 127         * bfin-dis.c (decode_dsp32alu_0): Delete BYTEOP2M code.
 128
 129 2011-02-12  Mike Frysinger  <vapier@gentoo.org>
 130
 131         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after PRNT.
 132
 133 2011-02-12  Mike Frysinger  <vapier@gentoo.org>
 134
 135         * bfin-dis.c (machine_registers): Delete REG_GP.
 136         (reg_names): Delete "GP".
 137         (decode_allregs): Change REG_GP to REG_LASTREG.
 138
 139 2011-02-12  Mike Frysinger  <vapier@gentoo.org>
 140
 141         * bfin-dis.c (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2,
 142         M_IH, M_IU): Delete.
 143
 144 2011-02-11  Mike Frysinger  <vapier@gentoo.org>
 145
 146         * bfin-dis.c (reg_names): Add const.
 147         (decode_dregs_lo, decode_dregs_hi, decode_dregs, decode_dregs_byte,
 148         decode_pregs, decode_iregs, decode_mregs, decode_dpregs, decode_gregs,
 149         decode_regs, decode_regs_lo, decode_regs_hi, decode_statbits,
 150         decode_counters, decode_allregs): Likewise.
 151
 152 2011-02-09  Michael Snyder  <msnyder@vmware.com>
 153
 154         * i386-dis.c (OP_J): Parenthesize expression to prevent
 155         truncated addresses.
 156         (print_insn): Fix indentation off-by-one.
 157
 158 2011-02-01  Nick Clifton  <nickc@redhat.com>
 159
 160         * po/da.po: Updated Danish translation.
 161
 162 2011-01-21  Dave Murphy  <davem@devkitpro.org>
 163
 164         * ppc-opc.c (NON32, NO371): Remove PPC_OPCODE_PPCPS.
 165
 166 2011-01-18  H.J. Lu  <hongjiu.lu@intel.com>
 167
 168         * i386-dis.c (sIbT): New.
 169         (b_T_mode): Likewise.
 170         (dis386): Replace sIb with sIbT on "pushT".
 171         (x86_64_table): Replace sIb with Ib on "aam" and "aad".
 172         (OP_sI): Handle b_T_mode.  Properly sign-extend byte.
 173
 174 2011-01-18  Jan Kratochvil  <jan.kratochvil@redhat.com>
 175
 176         * i386-init.h: Regenerated.
 177         * i386-tbl.h: Regenerated
 178
 179 2011-01-17  Quentin Neill  <quentin.neill@amd.com>
 180
 181         * i386-dis.c (REG_XOP_TBM_01): New.
 182         (REG_XOP_TBM_02): New.
 183         (reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables.
 184         (xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02
 185         entries, and add bextr instruction.
 186
 187         * i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM.
 188         (cpu_flags): Add CpuTBM.
 189
 190         * i386-opc.h (CpuTBM) New.
 191         (i386_cpu_flags): Add bit cputbm.
 192
 193         * i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk,
 194         blcs, blsfill, blsic, t1mskc, and tzmsk.
 195
 196 2011-01-12  DJ Delorie  <dj@redhat.com>
 197
 198         * rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg.
 199
 200 2011-01-11  Mingjie Xing  <mingjie.xing@gmail.com>
 201
 202         * mips-dis.c (print_insn_args): Adjust the value to print the real
 203         offset for "+c" argument.
 204
 205 2011-01-10  Nick Clifton  <nickc@redhat.com>
 206
 207         * po/da.po: Updated Danish translation.
 208
 209 2011-01-05  Nathan Sidwell  <nathan@codesourcery.com>
 210
 211         * arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
 212
 213 2011-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 214
 215         * i386-dis.c (REG_VEX_38F3): New.
 216         (PREFIX_0FBC): Likewise.
 217         (PREFIX_VEX_38F2): Likewise.
 218         (PREFIX_VEX_38F3_REG_1): Likewise.
 219         (PREFIX_VEX_38F3_REG_2): Likewise.
 220         (PREFIX_VEX_38F3_REG_3): Likewise.
 221         (PREFIX_VEX_38F7): Likewise.
 222         (VEX_LEN_38F2_P_0): Likewise.
 223         (VEX_LEN_38F3_R_1_P_0): Likewise.
 224         (VEX_LEN_38F3_R_2_P_0): Likewise.
 225         (VEX_LEN_38F3_R_3_P_0): Likewise.
 226         (VEX_LEN_38F7_P_0): Likewise.
 227         (dis386_twobyte): Use PREFIX_0FBC.
 228         (reg_table): Add REG_VEX_38F3.
 229         (prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2,
 230         PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2,
 231         PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7.
 232         (vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and
 233         PREFIX_VEX_38F7.
 234         (vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0,
 235         VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and
 236         VEX_LEN_38F7_P_0.
 237
 238         * i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS.
 239         (cpu_flags): Add CpuBMI.
 240
 241         * i386-opc.h (CpuBMI): New.
 242         (i386_cpu_flags): Add cpubmi.
 243
 244         * i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt.
 245         * i386-init.h: Regenerated.
 246         * i386-tbl.h: Likewise.
 247
 248 2011-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 249
 250         * i386-dis.c (VexGdq): New.
 251         (OP_VEX): Handle dq_mode.
 252
 253 2011-01-01  H.J. Lu  <hongjiu.lu@intel.com>
 254
 255         * i386-gen.c (process_copyright): Update copyright to 2011.
 256
 257 For older changes see ChangeLog-2010
 258 \f
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