* v850-dis.c (disassemble): Always print a closing square brace if
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2011-04-13 Nick Clifton <nickc@redhat.com>
2
3 * v850-dis.c (disassemble): Always print a closing square brace if
4 an opening square brace was printed.
5
6 2011-04-12 Nick Clifton <nickc@redhat.com>
7
8 PR binutils/12534
9 * arm-dis.c (thumb32_opcodes): Add %L suffix to LDRD and STRD insn
10 patterns.
11 (print_insn_thumb32): Handle %L.
12
13 2011-04-11 Julian Brown <julian@codesourcery.com>
14
15 * arm-dis.c (psr_name): Fix typo for BASEPRI_MAX.
16 (print_insn_thumb32): Add APSR bitmask support.
17
18 2011-04-07 Paul Carroll<pcarroll@codesourcery.com>
19
20 * arm-dis.c (print_insn): init vars moved into private_data structure.
21
22 2011-03-24 Mike Frysinger <vapier@gentoo.org>
23
24 * bfin-dis.c (decode_dsp32mac_0): Move MM zeroing down to MAC0 logic.
25
26 2011-03-22 Eric B. Weddington <eric.weddington@atmel.com>
27
28 * avr-dis.c (avr_operand): Add opcode_str parameter. Check for
29 post-increment to support LPM Z+ instruction. Add support for 'E'
30 constraint for DES instruction.
31 (print_insn_avr): Adjust calls to avr_operand. Rename variable.
32
33 2011-03-14 Richard Sandiford <richard.sandiford@linaro.org>
34
35 * arm-dis.c (get_sym_code_type): Treat STT_GNU_IFUNCs as code.
36
37 2011-03-14 Richard Sandiford <richard.sandiford@linaro.org>
38
39 * arm-dis.c (get_sym_code_type): Don't check for STT_ARM_TFUNC.
40 Use branch types instead.
41 (print_insn): Likewise.
42
43 2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
44
45 * mips-opc.c (mips_builtin_opcodes): Correct register use
46 annotation of "alnv.ps".
47
48 2011-02-28 Maciej W. Rozycki <macro@codesourcery.com>
49
50 * mips-opc.c (mips_builtin_opcodes): Add "pref" macro.
51
52 2011-02-22 Mike Frysinger <vapier@gentoo.org>
53
54 * bfin-dis.c (OUTS): Remove p NULL check and txt NUL check.
55
56 2011-02-22 Mike Frysinger <vapier@gentoo.org>
57
58 * bfin-dis.c (print_insn_bfin): Change outf->fprintf_func to OUTS.
59
60 2011-02-19 Mike Frysinger <vapier@gentoo.org>
61
62 * bfin-dis.c (saved_state): Mark static. Change a[01]x to ax[] and
63 a[01]w to aw[]. Delete ac0, ac0_copy, ac1, an, aq, av0, av0s, av1,
64 av1s, az, cc, v, v_copy, vs, rnd_mod, v_internal, pc, ticks, insts,
65 exception, end_of_registers, msize, memory, bfd_mach.
66 (CCREG, PCREG, A0XREG, A0WREG, A1XREG, A1WREG, LC0REG, LT0REG,
67 LB0REG, LC1REG, LT1REG, LB1REG): Delete
68 (AXREG, AWREG, LCREG, LTREG, LBREG): Define.
69 (get_allreg): Change to new defines. Fallback to abort().
70
71 2011-02-14 Mike Frysinger <vapier@gentoo.org>
72
73 * bfin-dis.c: Add whitespace/parenthesis where needed.
74
75 2011-02-14 Mike Frysinger <vapier@gentoo.org>
76
77 * bfin-dis.c (decode_LoopSetup_0): Return when reg is greater
78 than 7.
79
80 2011-02-13 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
81
82 * configure: Regenerate.
83
84 2011-02-13 Mike Frysinger <vapier@gentoo.org>
85
86 * bfin-dis.c (decode_dsp32alu_0): Fix typo with A1 reg.
87
88 2011-02-13 Mike Frysinger <vapier@gentoo.org>
89
90 * bfin-dis.c (decode_dsp32mult_0): Add 1 to dst for mac1. Output
91 dregs only when P is set, and dregs_lo otherwise.
92
93 2011-02-13 Mike Frysinger <vapier@gentoo.org>
94
95 * bfin-dis.c (decode_dsp32alu_0): Delete BYTEOP2M code.
96
97 2011-02-12 Mike Frysinger <vapier@gentoo.org>
98
99 * bfin-dis.c (decode_pseudoDEBUG_0): Add space after PRNT.
100
101 2011-02-12 Mike Frysinger <vapier@gentoo.org>
102
103 * bfin-dis.c (machine_registers): Delete REG_GP.
104 (reg_names): Delete "GP".
105 (decode_allregs): Change REG_GP to REG_LASTREG.
106
107 2011-02-12 Mike Frysinger <vapier@gentoo.org>
108
109 * bfin-dis.c (M_S2RND, M_T, M_W32, M_FU, M_TFU, M_IS, M_ISS2,
110 M_IH, M_IU): Delete.
111
112 2011-02-11 Mike Frysinger <vapier@gentoo.org>
113
114 * bfin-dis.c (reg_names): Add const.
115 (decode_dregs_lo, decode_dregs_hi, decode_dregs, decode_dregs_byte,
116 decode_pregs, decode_iregs, decode_mregs, decode_dpregs, decode_gregs,
117 decode_regs, decode_regs_lo, decode_regs_hi, decode_statbits,
118 decode_counters, decode_allregs): Likewise.
119
120 2011-02-09 Michael Snyder <msnyder@vmware.com>
121
122 * i386-dis.c (OP_J): Parenthesize expression to prevent
123 truncated addresses.
124 (print_insn): Fix indentation off-by-one.
125
126 2011-02-01 Nick Clifton <nickc@redhat.com>
127
128 * po/da.po: Updated Danish translation.
129
130 2011-01-21 Dave Murphy <davem@devkitpro.org>
131
132 * ppc-opc.c (NON32, NO371): Remove PPC_OPCODE_PPCPS.
133
134 2011-01-18 H.J. Lu <hongjiu.lu@intel.com>
135
136 * i386-dis.c (sIbT): New.
137 (b_T_mode): Likewise.
138 (dis386): Replace sIb with sIbT on "pushT".
139 (x86_64_table): Replace sIb with Ib on "aam" and "aad".
140 (OP_sI): Handle b_T_mode. Properly sign-extend byte.
141
142 2011-01-18 Jan Kratochvil <jan.kratochvil@redhat.com>
143
144 * i386-init.h: Regenerated.
145 * i386-tbl.h: Regenerated
146
147 2011-01-17 Quentin Neill <quentin.neill@amd.com>
148
149 * i386-dis.c (REG_XOP_TBM_01): New.
150 (REG_XOP_TBM_02): New.
151 (reg_table): Add REG_XOP_TBM_01 and REG_XOP_TBM_02 tables.
152 (xop_table): Redirect to REG_XOP_TBM_01 and REG_XOP_TBM_02
153 entries, and add bextr instruction.
154
155 * i386-gen.c (cpu_flag_init): Add CPU_TBM_FLAGS, CpuTBM.
156 (cpu_flags): Add CpuTBM.
157
158 * i386-opc.h (CpuTBM) New.
159 (i386_cpu_flags): Add bit cputbm.
160
161 * i386-opc.tbl: Add bextr, blcfill, blci, blcic, blcmsk,
162 blcs, blsfill, blsic, t1mskc, and tzmsk.
163
164 2011-01-12 DJ Delorie <dj@redhat.com>
165
166 * rx-dis.c (print_insn_rx): Support RX_Operand_TwoReg.
167
168 2011-01-11 Mingjie Xing <mingjie.xing@gmail.com>
169
170 * mips-dis.c (print_insn_args): Adjust the value to print the real
171 offset for "+c" argument.
172
173 2011-01-10 Nick Clifton <nickc@redhat.com>
174
175 * po/da.po: Updated Danish translation.
176
177 2011-01-05 Nathan Sidwell <nathan@codesourcery.com>
178
179 * arm-dis.c (thumb32_opcodes): BLX must have bit zero clear.
180
181 2011-01-04 H.J. Lu <hongjiu.lu@intel.com>
182
183 * i386-dis.c (REG_VEX_38F3): New.
184 (PREFIX_0FBC): Likewise.
185 (PREFIX_VEX_38F2): Likewise.
186 (PREFIX_VEX_38F3_REG_1): Likewise.
187 (PREFIX_VEX_38F3_REG_2): Likewise.
188 (PREFIX_VEX_38F3_REG_3): Likewise.
189 (PREFIX_VEX_38F7): Likewise.
190 (VEX_LEN_38F2_P_0): Likewise.
191 (VEX_LEN_38F3_R_1_P_0): Likewise.
192 (VEX_LEN_38F3_R_2_P_0): Likewise.
193 (VEX_LEN_38F3_R_3_P_0): Likewise.
194 (VEX_LEN_38F7_P_0): Likewise.
195 (dis386_twobyte): Use PREFIX_0FBC.
196 (reg_table): Add REG_VEX_38F3.
197 (prefix_table): Add PREFIX_0FBC, PREFIX_VEX_38F2,
198 PREFIX_VEX_38F3_REG_1, PREFIX_VEX_38F3_REG_2,
199 PREFIX_VEX_38F3_REG_3 and PREFIX_VEX_38F7.
200 (vex_table): Use PREFIX_VEX_38F2, REG_VEX_38F3 and
201 PREFIX_VEX_38F7.
202 (vex_len_table): Add VEX_LEN_38F2_P_0, VEX_LEN_38F3_R_1_P_0,
203 VEX_LEN_38F3_R_2_P_0, VEX_LEN_38F3_R_3_P_0 and
204 VEX_LEN_38F7_P_0.
205
206 * i386-gen.c (cpu_flag_init): Add CPU_BMI_FLAGS.
207 (cpu_flags): Add CpuBMI.
208
209 * i386-opc.h (CpuBMI): New.
210 (i386_cpu_flags): Add cpubmi.
211
212 * i386-opc.tbl: Add andn, bextr, blsi, blsmsk, blsr and tzcnt.
213 * i386-init.h: Regenerated.
214 * i386-tbl.h: Likewise.
215
216 2011-01-04 H.J. Lu <hongjiu.lu@intel.com>
217
218 * i386-dis.c (VexGdq): New.
219 (OP_VEX): Handle dq_mode.
220
221 2011-01-01 H.J. Lu <hongjiu.lu@intel.com>
222
223 * i386-gen.c (process_copyright): Update copyright to 2011.
224
225 For older changes see ChangeLog-2010
226 \f
227 Local Variables:
228 mode: change-log
229 left-margin: 8
230 fill-column: 74
231 version-control: never
232 End:
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