b046303fe500072ec384e129a6cbb988408cc9cf
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2018-03-22 Jan Beulich <jbeulich@suse.com>
2
3 * i386-opc.tbl (vfrczs*, vphadd*, vphsub*, vpmacs*, vpmadcs*,
4 vprot*, vpsha*, vpshl*, bextr, blc*, bls*, t1mskc, tzmsk, sha1*,
5 sha256*): Drop Disp<N>.
6
7 2018-03-22 Jan Beulich <jbeulich@suse.com>
8
9 * i386-dis.c (EbndS, bnd_swap_mode): New.
10 (prefix_table): Use EbndS.
11 (OP_E_register, OP_E_memory): Also handle bnd_swap_mode.
12 * i386-opc.tbl (bndmov): Move misplaced Load.
13 * i386-tlb.h: Re-generate.
14
15 2018-03-22 Jan Beulich <jbeulich@suse.com>
16
17 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd): Use separate
18 templates allowing memory operands and folded ones for register
19 only flavors.
20 * i386-tlb.h: Re-generate.
21
22 2018-03-22 Jan Beulich <jbeulich@suse.com>
23
24 * i386-opc.tbl (vfrczp*, vpcmov, vpermil2p*): Fold 128- and
25 256-bit templates. Drop redundant leftover Disp<N>.
26 * i386-tlb.h: Re-generate.
27
28 2018-03-14 Kito Cheng <kito.cheng@gmail.com>
29
30 * riscv-opc.c (riscv_insn_types): New.
31
32 2018-03-13 Nick Clifton <nickc@redhat.com>
33
34 * po/pt_BR.po: Updated Brazilian Portuguese translation.
35
36 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
37
38 * i386-opc.tbl: Add Optimize to clr.
39 * i386-tbl.h: Regenerated.
40
41 2018-03-08 H.J. Lu <hongjiu.lu@intel.com>
42
43 * i386-gen.c (opcode_modifiers): Remove OldGcc.
44 * i386-opc.h (OldGcc): Removed.
45 (i386_opcode_modifier): Remove oldgcc.
46 * i386-opc.tbl: Remove fsubp, fsubrp, fdivp and fdivrp
47 instructions for old (<= 2.8.1) versions of gcc.
48 * i386-tbl.h: Regenerated.
49
50 2018-03-08 Jan Beulich <jbeulich@suse.com>
51
52 * i386-opc.h (EVEXDYN): New.
53 * i386-opc.tbl: Fold various AVX512VL templates.
54 * i386-tlb.h: Re-generate.
55
56 2018-03-08 Jan Beulich <jbeulich@suse.com>
57
58 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
59 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
60 vpexpandd, vpexpandq): Fold AFX512VF templates.
61 * i386-tlb.h: Re-generate.
62
63 2018-03-08 Jan Beulich <jbeulich@suse.com>
64
65 * i386-opc.tbl (vgf2p8affineinvqb, vgf2p8affineqb, vgf2p8mulb):
66 Fold 128- and 256-bit VEX-encoded templates.
67 * i386-tlb.h: Re-generate.
68
69 2018-03-08 Jan Beulich <jbeulich@suse.com>
70
71 * i386-opc.tbl (vexpandpd, vexpandps, vmovapd, vmovaps,
72 vmovdqa32, vmovdqa64, vmovdqu32, vmovdqu64, vmovupd, vmovups,
73 vpexpandd, vpexpandq): Fold AVX512F templates.
74 * i386-tlb.h: Re-generate.
75
76 2018-03-08 Jan Beulich <jbeulich@suse.com>
77
78 * i386-opc.tbl (llwpcb, slwpcb, lwpval, lwpins): Fold 32- and
79 64-bit templates. Drop Disp<N>.
80 * i386-tlb.h: Re-generate.
81
82 2018-03-08 Jan Beulich <jbeulich@suse.com>
83
84 * i386-opc.tbl (vfmadd*, vfmsub*, vfnmadd*, vfnmsub*): Fold 128-
85 and 256-bit templates.
86 * i386-tlb.h: Re-generate.
87
88 2018-03-08 Jan Beulich <jbeulich@suse.com>
89
90 * i386-opc.tbl (cmpxchg8b): Add NoRex64.
91 * i386-tlb.h: Re-generate.
92
93 2018-03-08 Jan Beulich <jbeulich@suse.com>
94
95 * i386-opc.tbl (cmpxchg16b, fisttp, fisttpll, bndmov, mwaitx):
96 Drop NoAVX.
97 * i386-tlb.h: Re-generate.
98
99 2018-03-08 Jan Beulich <jbeulich@suse.com>
100
101 * i386-opc.tbl (ldmxcsr, stmxcsr): Add NoAVX.
102 * i386-tlb.h: Re-generate.
103
104 2018-03-08 Jan Beulich <jbeulich@suse.com>
105
106 * i386-gen.c (opcode_modifiers): Delete FloatD.
107 * i386-opc.h (FloatD): Delete.
108 (struct i386_opcode_modifier): Delete floatd.
109 * i386-opc.tbl (fadd, fsub, fsubr, fmul, fdiv, fdivr): Replace
110 FloatD by D.
111 * i386-tlb.h: Re-generate.
112
113 2018-03-08 Jan Beulich <jbeulich@suse.com>
114
115 * i386-dis.c (float_reg): Adjust DC and DE fsub*/fdiv* patterns.
116
117 2018-03-08 Jan Beulich <jbeulich@suse.com>
118
119 * i386-opc.tbl (vmovd): Disallow Qword memory operands.
120 * i386-tlb.h: Re-generate.
121
122 2018-03-08 Jan Beulich <jbeulich@suse.com>
123
124 * i386-opc.tbl (vcvtpd2ps): Fold AVX 128- and 256-bit memory
125 forms.
126 * i386-tlb.h: Re-generate.
127
128 2018-03-07 Alan Modra <amodra@gmail.com>
129
130 * disassemble.c (disassembler): Use bfd_arch_powerpc entry for
131 bfd_arch_rs6000.
132 * disassemble.h (print_insn_rs6000): Delete.
133 * ppc-dis.c (powerpc_init_dialect): Handle rs6000.
134 (disassemble_init_powerpc): Call powerpc_init_dialect for rs6000.
135 (print_insn_rs6000): Delete.
136
137 2018-03-03 Alan Modra <amodra@gmail.com>
138
139 * sysdep.h (opcodes_error_handler): Define.
140 (_bfd_error_handler): Declare.
141 * Makefile.am: Remove stray #.
142 * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT
143 EDIT" comment.
144 * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c,
145 * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c,
146 * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use
147 opcodes_error_handler to print errors. Standardize error messages.
148 * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise,
149 and include opintl.h.
150 * nds32-asm.c: Likewise, and include sysdep.h and opintl.h.
151 * i386-gen.c: Standardize error messages.
152 * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate.
153 * Makefile.in: Regenerate.
154 * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c,
155 * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c,
156 * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c,
157 * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c,
158 * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c,
159 * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c,
160 * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c,
161 * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c,
162 * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c,
163 * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c,
164 * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c,
165 * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c,
166 * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
167
168 2018-03-01 H.J. Lu <hongjiu.lu@intel.com>
169
170 * * i386-opc.tbl: Add "Optimize" to AVX256 and AVX512
171 vpsub[bwdq] instructions.
172 * i386-tbl.h: Regenerated.
173
174 2018-03-01 Alan Modra <amodra@gmail.com>
175
176 * configure.ac (ALL_LINGUAS): Sort.
177 * configure: Regenerate.
178
179 2018-02-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
180
181 * arm-dis.c (print_insn_coprocessor): Replace uses of ARM_FEATURE_COPY
182 macro by assignements.
183
184 2018-02-27 H.J. Lu <hongjiu.lu@intel.com>
185
186 PR gas/22871
187 * i386-gen.c (opcode_modifiers): Add Optimize.
188 * i386-opc.h (Optimize): New enum.
189 (i386_opcode_modifier): Add optimize.
190 * i386-opc.tbl: Add "Optimize" to "mov $imm, reg",
191 "sub reg, reg/mem", "test $imm, acc", "test $imm, reg/mem",
192 "and $imm, acc", "and $imm, reg/mem", "xor reg, reg/mem",
193 "movq $imm, reg" and AVX256 and AVX512 versions of vandnps,
194 vandnpd, vpandn, vpandnd, vpandnq, vxorps, vxorpd, vpxor,
195 vpxord and vpxorq.
196 * i386-tbl.h: Regenerated.
197
198 2018-02-26 Alan Modra <amodra@gmail.com>
199
200 * crx-dis.c (getregliststring): Allocate a large enough buffer
201 to silence false positive gcc8 warning.
202
203 2018-02-22 Shea Levy <shea@shealevy.com>
204
205 * disassemble.c (ARCH_riscv): Define if ARCH_all.
206
207 2018-02-22 H.J. Lu <hongjiu.lu@intel.com>
208
209 * i386-opc.tbl: Add {rex},
210 * i386-tbl.h: Regenerated.
211
212 2018-02-20 Maciej W. Rozycki <macro@mips.com>
213
214 * mips16-opc.c (decode_mips16_operand) <'M'>: Remove case.
215 (mips16_opcodes): Replace `M' with `m' for "restore".
216
217 2018-02-19 Thomas Preud'homme <thomas.preudhomme@arm.com>
218
219 * arm-dis.c (thumb_opcodes): Fix BXNS mask.
220
221 2018-02-13 Maciej W. Rozycki <macro@mips.com>
222
223 * wasm32-dis.c (print_insn_wasm32): Rename `index' local
224 variable to `function_index'.
225
226 2018-02-13 Nick Clifton <nickc@redhat.com>
227
228 PR 22823
229 * metag-dis.c (print_fmmov): Double buffer size to avoid warning
230 about truncation of printing.
231
232 2018-02-12 Henry Wong <henry@stuffedcow.net>
233
234 * mips-opc.c (mips_builtin_opcodes): Correct "sigrie" encoding.
235
236 2018-02-05 Nick Clifton <nickc@redhat.com>
237
238 * po/pt_BR.po: Updated Brazilian Portuguese translation.
239
240 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
241
242 * i386-dis.c (enum): Add pconfig.
243 * i386-gen.c (cpu_flag_init): Add CPU_PCONFIG_FLAGS.
244 (cpu_flags): Add CpuPCONFIG.
245 * i386-opc.h (enum): Add CpuPCONFIG.
246 (i386_cpu_flags): Add cpupconfig.
247 * i386-opc.tbl: Add PCONFIG instruction.
248 * i386-init.h: Regenerate.
249 * i386-tbl.h: Likewise.
250
251 2018-01-23 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
252
253 * i386-dis.c (enum): Add PREFIX_0F09.
254 * i386-gen.c (cpu_flag_init): Add CPU_WBNOINVD_FLAGS.
255 (cpu_flags): Add CpuWBNOINVD.
256 * i386-opc.h (enum): Add CpuWBNOINVD.
257 (i386_cpu_flags): Add cpuwbnoinvd.
258 * i386-opc.tbl: Add WBNOINVD instruction.
259 * i386-init.h: Regenerate.
260 * i386-tbl.h: Likewise.
261
262 2018-01-17 Jim Wilson <jimw@sifive.com>
263
264 * riscv-opc.c (riscv_opcodes) <addi>: Use z instead of 0.
265
266 2018-01-17 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
267
268 * i386-gen.c (cpu_flag_init): Delete CPU_CET_FLAGS, CpuCET.
269 Add CPU_IBT_FLAGS, CPU_SHSTK_FLAGS, CPY_ANY_IBT_FLAGS,
270 CPU_ANY_SHSTK_FLAGS, CpuIBT, CpuSHSTK.
271 (cpu_flags): Add CpuIBT, CpuSHSTK.
272 * i386-opc.h (enum): Add CpuIBT, CpuSHSTK.
273 (i386_cpu_flags): Add cpuibt, cpushstk.
274 * i386-opc.tbl: Change CpuCET to CpuSHSTK and CpuIBT.
275 * i386-init.h: Regenerate.
276 * i386-tbl.h: Likewise.
277
278 2018-01-16 Nick Clifton <nickc@redhat.com>
279
280 * po/pt_BR.po: Updated Brazilian Portugese translation.
281 * po/de.po: Updated German translation.
282
283 2018-01-15 Jim Wilson <jimw@sifive.com>
284
285 * riscv-opc.c (match_c_nop): New.
286 (riscv_opcodes) <addi>: Handle an addi that compresses to c.nop.
287
288 2018-01-15 Nick Clifton <nickc@redhat.com>
289
290 * po/uk.po: Updated Ukranian translation.
291
292 2018-01-13 Nick Clifton <nickc@redhat.com>
293
294 * po/opcodes.pot: Regenerated.
295
296 2018-01-13 Nick Clifton <nickc@redhat.com>
297
298 * configure: Regenerate.
299
300 2018-01-13 Nick Clifton <nickc@redhat.com>
301
302 2.30 branch created.
303
304 2018-01-11 Igor Tsimbalist <igor.v.tsimbalist@intel.com>
305
306 * i386-opc.tbl: Remove VL variants for 4FMAPS and 4VNNIW insns.
307 * i386-tbl.h: Regenerate.
308
309 2018-01-10 Jan Beulich <jbeulich@suse.com>
310
311 * i386-opc.tbl (v4fmaddss, v4fnmaddss): Adjust Disp8MemShift.
312 * i386-tbl.h: Re-generate.
313
314 2018-01-10 Jan Beulich <jbeulich@suse.com>
315
316 * i386-opc.tbl (vpcmpeqb, vpcmpleb, vpcmpltb, vpcmpneqb,
317 vpcmpnleb, vpcmpnltb, vpcmpequb, vpcmpleub, vpcmpltub,
318 vpcmpnequb, vpcmpnleub, vpcmpnltub, vpcmpeqw, vpcmplew,
319 vpcmpltw, vpcmpneqw, vpcmpnlew, vpcmpnltw, vpcmpequw, vpcmpleuw,
320 vpcmpltuw, vpcmpnequw, vpcmpnleuw, vpcmpnltuw): Adjust
321 Disp8MemShift of AVX512VL forms.
322 * i386-tbl.h: Re-generate.
323
324 2018-01-09 Jim Wilson <jimw@sifive.com>
325
326 * riscv-dis.c (maybe_print_address): If base_reg is zero,
327 then the hi_addr value is zero.
328
329 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
330
331 * arm-dis.c (arm_opcodes): Add csdb.
332 (thumb32_opcodes): Add csdb.
333
334 2018-01-09 James Greenhalgh <james.greenhalgh@arm.com>
335
336 * aarch64-tbl.h (aarch64_opcode_table): Add "csdb".
337 * aarch64-asm-2.c: Regenerate.
338 * aarch64-dis-2.c: Regenerate.
339 * aarch64-opc-2.c: Regenerate.
340
341 2018-01-08 H.J. Lu <hongjiu.lu@intel.com>
342
343 PR gas/22681
344 * i386-opc.tbl: Properly encode vmovd with Qword memeory operand.
345 Remove AVX512 vmovd with 64-bit operands.
346 * i386-tbl.h: Regenerated.
347
348 2018-01-05 Jim Wilson <jimw@sifive.com>
349
350 * riscv-dis.c (print_insn_args) <'s'>: Call maybe_print_address for a
351 jalr.
352
353 2018-01-03 Alan Modra <amodra@gmail.com>
354
355 Update year range in copyright notice of all files.
356
357 2018-01-02 Jan Beulich <jbeulich@suse.com>
358
359 * i386-gen.c (operand_type_init): Restore OPERAND_TYPE_REGYMM
360 and OPERAND_TYPE_REGZMM entries.
361
362 For older changes see ChangeLog-2017
363 \f
364 Copyright (C) 2018 Free Software Foundation, Inc.
365
366 Copying and distribution of this file, with or without modification,
367 are permitted in any medium without royalty provided the copyright
368 notice and this notice are preserved.
369
370 Local Variables:
371 mode: change-log
372 left-margin: 8
373 fill-column: 74
374 version-control: never
375 End:
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