b0fec5e4a52a8eeaed98b11375e6a76d9491e2d0
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2016-03-22 Nick Clifton <nickc@redhat.com>
2
3 * configure: Regenerate.
4
5 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
6
7 * arc-nps400-tbl.h: New file.
8 * arc-opc.c: Add top level comment.
9 (insert_nps_3bit_dst): New function.
10 (extract_nps_3bit_dst): New function.
11 (insert_nps_3bit_src2): New function.
12 (extract_nps_3bit_src2): New function.
13 (insert_nps_bitop_size): New function.
14 (extract_nps_bitop_size): New function.
15 (arc_flag_operands): Add nps400 entries.
16 (arc_flag_classes): Add nps400 entries.
17 (arc_operands): Add nps400 entries.
18 (arc_opcodes): Add nps400 include.
19
20 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
21
22 * arc-opc.c (arc_flag_classes): Convert all flag classes to use
23 the new class enum values.
24
25 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
26
27 * arc-dis.c (print_insn_arc): Handle nps400.
28
29 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
30
31 * arc-opc.c (BASE): Delete.
32
33 2016-03-18 Nick Clifton <nickc@redhat.com>
34
35 PR target/19721
36 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
37 of MOV insn that aliases an ORR insn.
38
39 2016-03-16 Jiong Wang <jiong.wang@arm.com>
40
41 * arm-dis.c (neon_opcodes): Support new FP16 instructions.
42
43 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
44
45 * mcore-opc.h: Add const qualifiers.
46 * microblaze-opc.h (struct op_code_struct): Likewise.
47 * sh-opc.h: Likewise.
48 * tic4x-dis.c (tic4x_print_indirect): Likewise.
49 (tic4x_print_op): Likewise.
50
51 2016-03-02 Alan Modra <amodra@gmail.com>
52
53 * or1k-desc.h: Regenerate.
54 * fr30-ibld.c: Regenerate.
55 * rl78-decode.c: Regenerate.
56
57 2016-03-01 Nick Clifton <nickc@redhat.com>
58
59 PR target/19747
60 * rl78-dis.c (print_insn_rl78_common): Fix typo.
61
62 2016-02-24 Renlin Li <renlin.li@arm.com>
63
64 * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
65 (print_insn_coprocessor): Support fp16 instructions.
66
67 2016-02-24 Renlin Li <renlin.li@arm.com>
68
69 * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
70 vminnm, vrint(mpna).
71
72 2016-02-24 Renlin Li <renlin.li@arm.com>
73
74 * arm-dis.c (print_insn_coprocessor): Check co-processor number for
75 cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
76
77 2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
78
79 * i386-dis.c (print_insn): Parenthesize expression to prevent
80 truncated addresses.
81 (OP_J): Likewise.
82
83 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
84 Janek van Oirschot <jvanoirs@synopsys.com>
85
86 * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
87 variable.
88
89 2016-02-04 Nick Clifton <nickc@redhat.com>
90
91 PR target/19561
92 * msp430-dis.c (print_insn_msp430): Add a special case for
93 decoding an RRC instruction with the ZC bit set in the extension
94 word.
95
96 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
97
98 * cgen-ibld.in (insert_normal): Rework calculation of shift.
99 * epiphany-ibld.c: Regenerate.
100 * fr30-ibld.c: Regenerate.
101 * frv-ibld.c: Regenerate.
102 * ip2k-ibld.c: Regenerate.
103 * iq2000-ibld.c: Regenerate.
104 * lm32-ibld.c: Regenerate.
105 * m32c-ibld.c: Regenerate.
106 * m32r-ibld.c: Regenerate.
107 * mep-ibld.c: Regenerate.
108 * mt-ibld.c: Regenerate.
109 * or1k-ibld.c: Regenerate.
110 * xc16x-ibld.c: Regenerate.
111 * xstormy16-ibld.c: Regenerate.
112
113 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
114
115 * epiphany-dis.c: Regenerated from latest cpu files.
116
117 2016-02-01 Michael McConville <mmcco@mykolab.com>
118
119 * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
120 test bit.
121
122 2016-01-25 Renlin Li <renlin.li@arm.com>
123
124 * arm-dis.c (mapping_symbol_for_insn): New function.
125 (find_ifthen_state): Call mapping_symbol_for_insn().
126
127 2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
128
129 * aarch64-opc.c (operand_general_constraint_met_p): Check validity
130 of MSR UAO immediate operand.
131
132 2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
133
134 * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
135 instruction support.
136
137 2016-01-17 Alan Modra <amodra@gmail.com>
138
139 * configure: Regenerate.
140
141 2016-01-14 Nick Clifton <nickc@redhat.com>
142
143 * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
144 instructions that can support stack pointer operations.
145 * rl78-decode.c: Regenerate.
146 * rl78-dis.c: Fix display of stack pointer in MOVW based
147 instructions.
148
149 2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
150
151 * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
152 testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
153 erxtatus_el1 and erxaddr_el1.
154
155 2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
156
157 * arm-dis.c (arm_opcodes): Add "esb".
158 (thumb_opcodes): Likewise.
159
160 2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
161
162 * ppc-opc.c <xscmpnedp>: Delete.
163 <xvcmpnedp>: Likewise.
164 <xvcmpnedp.>: Likewise.
165 <xvcmpnesp>: Likewise.
166 <xvcmpnesp.>: Likewise.
167
168 2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
169
170 PR gas/13050
171 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
172 addition to ISA_A.
173
174 2016-01-01 Alan Modra <amodra@gmail.com>
175
176 Update year range in copyright notice of all files.
177
178 For older changes see ChangeLog-2015
179 \f
180 Copyright (C) 2016 Free Software Foundation, Inc.
181
182 Copying and distribution of this file, with or without modification,
183 are permitted in any medium without royalty provided the copyright
184 notice and this notice are preserved.
185
186 Local Variables:
187 mode: change-log
188 left-margin: 8
189 fill-column: 74
190 version-control: never
191 End:
This page took 0.032423 seconds and 3 git commands to generate.