opcodes/ChangeLog

   1 2006-06-06  Thiemo Seufer  <ths@mips.com>
   2             Chao-ying Fu  <fu@mips.com>
   3
   4         * mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
   5         * mips-opc.c: Add DSP64 instructions.
   6
   7 2006-06-06  Alan Modra  <amodra@bigpond.net.au>
   8
   9         * m68hc11-dis.c (print_insn): Warning fix.
  10
  11 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
  12
  13         * po/Make-in (top_builddir): Define.
  14
  15 2006-06-05  Alan Modra  <amodra@bigpond.net.au>
  16
  17         * Makefile.am: Run "make dep-am".
  18         * Makefile.in: Regenerate.
  19         * config.in: Regenerate.
  20
  21 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
  22
  23         * Makefile.am (INCLUDES): Use @INCINTL@.
  24         * acinclude.m4: Include new gettext macros.
  25         * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
  26         Remove local code for po/Makefile.
  27         * Makefile.in, aclocal.m4, configure: Regenerated.
  28
  29 2006-05-30  Nick Clifton  <nickc@redhat.com>
  30
  31         * po/es.po: Updated Spanish translation.
  32
  33 2006-05-25  Richard Sandiford  <richard@codesourcery.com>
  34
  35         * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
  36         and fmovem entries.  Put register list entries before immediate
  37         mask entries.  Use "l" rather than "L" in the fmovem entries.
  38         * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
  39         out from INFO.
  40         (m68k_scan_mask): New function, split out from...
  41         (print_insn_m68k): ...here.  If no architecture has been set,
  42         first try printing an m680x0 instruction, then try a Coldfire one.
  43
  44 2006-05-24  Nick Clifton  <nickc@redhat.com>
  45
  46         * po/ga.po: Updated Irish translation.
  47
  48 2006-05-22  Nick Clifton  <nickc@redhat.com>
  49
  50         * crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
  51
  52 2006-05-22  Nick Clifton  <nickc@redhat.com>
  53
  54         * po/nl.po: Updated translation.
  55
  56 2006-05-18  Alan Modra  <amodra@bigpond.net.au>
  57
  58         * avr-dis.c: Formatting fix.
  59
  60 2006-05-14  Thiemo Seufer  <ths@mips.com>
  61
  62         * mips16-opc.c (I1, I32, I64): New shortcut defines.
  63         (mips16_opcodes): Change membership of instructions to their
  64         lowest baseline ISA.
  65
  66 2006-05-09  H.J. Lu  <hongjiu.lu@intel.com>
  67
  68         * i386-dis.c (grps): Update sgdt/sidt for 64bit.
  69
  70 2006-05-05  Julian Brown  <julian@codesourcery.com>
  71
  72         * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
  73         vldm/vstm.
  74
  75 2006-05-05  Thiemo Seufer  <ths@mips.com>
  76             David Ung  <davidu@mips.com>
  77
  78         * mips-opc.c: Add macro for cache instruction.
  79
  80 2006-05-04  Thiemo Seufer  <ths@mips.com>
  81             Nigel Stephens  <nigel@mips.com>
  82             David Ung  <davidu@mips.com>
  83
  84         * mips-dis.c (mips_arch_choices): Add smartmips instruction
  85         decoding to MIPS32 and MIPS32R2.  Limit DSP decoding to release
  86         2 ISAs.  Add MIPS3D decoding to MIPS32R2.  Add MT decoding to
  87         MIPS64R2.
  88         * mips-opc.c: fix random typos in comments.
  89         (INSN_SMARTMIPS): New defines.
  90         (mips_builtin_opcodes): Add paired single support for MIPS32R2.
  91         Move bc3f, bc3fl, bc3t, bc3tl downwards.  Move flushi, flushd,
  92         flushid, wb upwards.  Move cfc3, ctc3 downwards.  Rework the
  93         FP_S and FP_D flags to denote single and double register
  94         accesses separately.  Move dmfc3, dmtc3, mfc3, mtc3 downwards.
  95         Allow jr.hb and jalr.hb for release 1 ISAs.  Allow luxc1, suxc1
  96         for MIPS32R2.  Add SmartMIPS instructions.  Add two-argument
  97         variants of bc2f, bc2fl, bc2t, bc2tl.  Add mfhc2, mthc2 to
  98         release 2 ISAs.
  99         * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
 100
 101 2006-05-03  Thiemo Seufer  <ths@mips.com>
 102
 103         * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
 104
 105 2006-05-02  Thiemo Seufer  <ths@mips.com>
 106             Nigel Stephens  <nigel@mips.com>
 107             David Ung  <davidu@mips.com>
 108
 109         * mips-dis.c (print_insn_args): Force mips16 to odd addresses.
 110         (print_mips16_insn_arg): Force mips16 to odd addresses.
 111
 112 2006-04-30  Thiemo Seufer  <ths@mips.com>
 113             David Ung  <davidu@mips.com>
 114
 115         * mips-opc.c (mips_builtin_opcodes): Add udi instructions
 116         "udi0" to "udi15".
 117         * mips-dis.c (print_insn_args): Adds udi argument handling.
 118
 119 2006-04-28  James E Wilson  <wilson@specifix.com>
 120
 121         * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
 122         error message.
 123
 124 2006-04-28  Thiemo Seufer  <ths@mips.com>
 125             David Ung  <davidu@mips.com>
 126             Nigel Stephens  <nigel@mips.com>
 127
 128         * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
 129         names.
 130
 131 2006-04-28  Thiemo Seufer  <ths@mips.com>
 132             Nigel Stephens  <nigel@mips.com>
 133             David Ung  <davidu@mips.com>
 134
 135         * mips-dis.c (print_insn_args): Add mips_opcode argument.
 136         (print_insn_mips):  Adjust print_insn_args call.
 137
 138 2006-04-28  Thiemo Seufer  <ths@mips.com>
 139             Nigel Stephens  <nigel@mips.com>
 140
 141         * mips-dis.c (print_insn_args): Print $fcc only for FP
 142         instructions, use $cc elsewise.
 143
 144 2006-04-28  Thiemo Seufer  <ths@mips.com>
 145             Nigel Stephens  <nigel@mips.com>
 146
 147         * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
 148         Map MIPS16 registers to O32 names.
 149         (print_mips16_insn_arg): Use mips16_reg_names.
 150
 151 2006-04-26  Julian Brown  <julian@codesourcery.com>
 152
 153         * arm-dis.c (print_insn_neon): Disassemble floating-point constant
 154         VMOV.
 155
 156 2006-04-26  Nathan Sidwell  <nathan@codesourcery.com>
 157             Julian Brown  <julian@codesourcery.com>
 158
 159         * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
 160         %<code>[zy] into %[zy]<code>.  Expand meaning of %<bitfield>['`?].
 161         Add unified load/store instruction names.
 162         (neon_opcode_table): New.
 163         (arm_opcodes): Expand meaning of %<bitfield>['`?].
 164         (arm_decode_bitfield): New.
 165         (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
 166         Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
 167         (print_insn_neon): New.
 168         (print_insn_arm): Adjust print_insn_coprocessor call. Call
 169         print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
 170         (print_insn_thumb32): Likewise.
 171
 172 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 173
 174         * Makefile.am: Run "make dep-am".
 175         * Makefile.in: Regenerate.
 176
 177 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 178
 179         * avr-dis.c (avr_operand): Warning fix.
 180
 181         * configure: Regenerate.
 182
 183 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 184
 185         * po/POTFILES.in: Regenerated.
 186
 187 2006-04-12   Hochstein  <hochstein@algo.informatik.tu-darmstadt.de>
 188
 189         PR binutils/2454
 190         * avr-dis.c (avr_operand): Arrange for a comment to appear before
 191         the symolic form of an address, so that the output of objdump -d
 192         can be reassembled.
 193
 194 2006-04-10  DJ Delorie  <dj@redhat.com>
 195
 196         * m32c-asm.c: Regenerate.
 197
 198 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 199
 200         * Makefile.am: Add install-html target.
 201         * Makefile.in: Regenerate.
 202
 203 2006-04-06  Nick Clifton  <nickc@redhat.com>
 204
 205         * po/vi/po: Updated Vietnamese translation.
 206
 207 2006-03-31  Paul Koning  <ni1d@arrl.net>
 208
 209         * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
 210
 211 2006-03-16  Bernd Schmidt  <bernd.schmidt@analog.com>
 212
 213         * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
 214         logic to identify halfword shifts.
 215
 216 2006-03-16  Paul Brook  <paul@codesourcery.com>
 217
 218         * arm-dis.c (arm_opcodes): Rename swi to svc.
 219         (thumb_opcodes): Ditto.
 220
 221 2006-03-13  DJ Delorie  <dj@redhat.com>
 222
 223         * m32c-asm.c: Regenerate.
 224         * m32c-desc.c: Likewise.
 225         * m32c-desc.h: Likewise.
 226         * m32c-dis.c: Likewise.
 227         * m32c-ibld.c: Likewise.
 228         * m32c-opc.c: Likewise.
 229         * m32c-opc.h: Likewise.
 230
 231 2006-03-10  DJ Delorie  <dj@redhat.com>
 232
 233         * m32c-desc.c: Regenerate with mul.l, mulu.l.
 234         * m32c-opc.c: Likewise.
 235         * m32c-opc.h: Likewise.
 236
 237
 238 2006-03-09  Nick Clifton  <nickc@redhat.com>
 239
 240         * po/sv.po: Updated Swedish translation.
 241
 242 2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>
 243
 244         PR binutils/2428
 245         * i386-dis.c (REP_Fixup): New function.
 246         (AL): Remove duplicate.
 247         (Xbr): New.
 248         (Xvr): Likewise.
 249         (Ybr): Likewise.
 250         (Yvr): Likewise.
 251         (indirDXr): Likewise.
 252         (ALr): Likewise.
 253         (eAXr): Likewise.
 254         (dis386): Updated entries of ins, outs, movs, lods and stos.
 255
 256 2006-03-05  Nick Clifton  <nickc@redhat.com>
 257
 258         * cgen-ibld.in (insert_normal): Cope with attempts to insert a
 259         signed 32-bit value into an unsigned 32-bit field when the host is
 260         a 64-bit machine.
 261         * fr30-ibld.c: Regenerate.
 262         * frv-ibld.c: Regenerate.
 263         * ip2k-ibld.c: Regenerate.
 264         * iq2000-asm.c: Regenerate.
 265         * iq2000-ibld.c: Regenerate.
 266         * m32c-ibld.c: Regenerate.
 267         * m32r-ibld.c: Regenerate.
 268         * openrisc-ibld.c: Regenerate.
 269         * xc16x-ibld.c: Regenerate.
 270         * xstormy16-ibld.c: Regenerate.
 271
 272 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 273
 274         * xc16x-asm.c: Regenerate.
 275         * xc16x-dis.c: Regenerate.
 276
 277 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 278
 279         * po/Make-in: Add html target.
 280
 281 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 282
 283         * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
 284         Intel Merom New Instructions.
 285         (THREE_BYTE_0): Likewise.
 286         (THREE_BYTE_1): Likewise.
 287         (three_byte_table): Likewise.
 288         (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
 289         THREE_BYTE_1 for entry 0x3a.
 290         (twobyte_has_modrm): Updated.
 291         (twobyte_uses_SSE_prefix): Likewise.
 292         (print_insn): Handle 3-byte opcodes used by Intel Merom New
 293         Instructions.
 294
 295 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 296
 297         * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
 298         (v9_hpriv_reg_names): New table.
 299         (print_insn_sparc): Allow values up to 16 for '?' and '!'.
 300         New cases '$' and '%' for read/write hyperprivileged register.
 301         * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
 302         window handling and rdhpr/wrhpr instructions.
 303
 304 2006-02-24  DJ Delorie  <dj@redhat.com>
 305
 306         * m32c-desc.c: Regenerate with linker relaxation attributes.
 307         * m32c-desc.h: Likewise.
 308         * m32c-dis.c: Likewise.
 309         * m32c-opc.c: Likewise.
 310
 311 2006-02-24  Paul Brook  <paul@codesourcery.com>
 312
 313         * arm-dis.c (arm_opcodes): Add V7 instructions.
 314         (thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
 315         (print_arm_address): New function.
 316         (print_insn_arm): Use it.  Add 'P' and 'U' cases.
 317         (psr_name): New function.
 318         (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
 319
 320 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 321
 322         * ia64-opc-i.c (bXc): New.
 323         (mXc): Likewise.
 324         (OpX2TaTbYaXcC): Likewise.
 325         (TF). Likewise.
 326         (TFCM). Likewise.
 327         (ia64_opcodes_i): Add instructions for tf.
 328
 329         * ia64-opc.h (IMMU5b): New.
 330
 331         * ia64-asmtab.c: Regenerated.
 332
 333 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 334
 335         * ia64-gen.c: Update copyright years.
 336         * ia64-opc-b.c: Likewise.
 337
 338 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 339
 340         * ia64-gen.c (lookup_regindex): Handle ".vm".
 341         (print_dependency_table): Handle '\"'.
 342
 343         * ia64-ic.tbl: Updated from SDM 2.2.
 344         * ia64-raw.tbl: Likewise.
 345         * ia64-waw.tbl: Likewise.
 346         * ia64-asmtab.c: Regenerated.
 347
 348         * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
 349
 350 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 351             Anil Paranjape   <anilp1@kpitcummins.com>
 352             Shilin Shakti    <shilins@kpitcummins.com>
 353
 354         * xc16x-desc.h: New file
 355         * xc16x-desc.c: New file
 356         * xc16x-opc.h: New file
 357         * xc16x-opc.c: New file
 358         * xc16x-ibld.c: New file
 359         * xc16x-asm.c: New file
 360         * xc16x-dis.c: New file
 361         * Makefile.am: Entries for xc16x
 362         * Makefile.in: Regenerate
 363         * cofigure.in: Add xc16x target information.
 364         * configure: Regenerate.
 365         * disassemble.c: Add xc16x target information.
 366
 367 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 368
 369         * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
 370         moves.
 371
 372 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 373
 374         * i386-dis.c ('Z'): Add a new macro.
 375         (dis386_twobyte): Use "movZ" for control register moves.
 376
 377 2006-02-10  Nick Clifton  <nickc@redhat.com>
 378
 379         * iq2000-asm.c: Regenerate.
 380
 381 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 382
 383         * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
 384
 385 2006-01-26  David Ung  <davidu@mips.com>
 386
 387         * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
 388         ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
 389         floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
 390         nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
 391         rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
 392
 393 2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>
 394
 395         * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
 396         ld_d_r, pref_xd_cb): Use signed char to hold data to be
 397         disassembled.
 398         * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
 399         buffer overflows when disassembling instructions like
 400         ld (ix+123),0x23
 401         * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
 402         operand, if the offset is negative.
 403
 404 2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>
 405
 406         * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
 407         unsigned char to hold data to be disassembled.
 408
 409 2006-01-17  Andreas Schwab  <schwab@suse.de>
 410
 411         PR binutils/1486
 412         * disassemble.c (disassemble_init_for_target): Set
 413         disassembler_needs_relocs for bfd_arch_arm.
 414
 415 2006-01-16  Paul Brook  <paul@codesourcery.com>
 416
 417         * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
 418         f?add?, and f?sub? instructions.
 419
 420 2006-01-16  Nick Clifton  <nickc@redhat.com>
 421
 422         * po/zh_CN.po: New Chinese (simplified) translation.
 423         * configure.in (ALL_LINGUAS): Add "zh_CH".
 424         * configure: Regenerate.
 425
 426 2006-01-05  Paul Brook  <paul@codesourcery.com>
 427
 428         * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
 429
 430 2006-01-06  DJ Delorie  <dj@redhat.com>
 431
 432         * m32c-desc.c: Regenerate.
 433         * m32c-opc.c: Regenerate.
 434         * m32c-opc.h: Regenerate.
 435
 436 2006-01-03  DJ Delorie  <dj@redhat.com>
 437
 438         * cgen-ibld.in (extract_normal): Avoid memory range errors.
 439         * m32c-ibld.c: Regenerated.
 440
 441 For older changes see ChangeLog-2005
 442 \f
 443 Local Variables:
 444 mode: change-log
 445 left-margin: 8
 446 fill-column: 74
 447 version-control: never
 448 End: