opcodes/ChangeLog

   1 2015-03-10  Renlin Li  <renlin.li@arm.com>
   2
   3         * aarch64-tbl.h (aarch64_opcode_table): Remove strub, ldurb, ldursb,
   4         stur, ldur, sturh, ldurh, ldursh, ldursw, prfum F_HAS_ALIAS flag and
   5         related alias.
   6         * aarch64-asm-2.c: Regenerate.
   7         * aarch64-dis-2.c: Likewise.
   8         * aarch64-opc-2.c: Likewise.
   9
  10 2015-03-03  Jiong Wang  <jiong.wang@arm.com>
  11
  12         * arm-dis.c (arm_symbol_is_valid): Skip ARM private symbols.
  13
  14 2015-02-25  Oleg Endo  <olegendo@gcc.gnu.org>
  15
  16         * sh-opc.h (clrs, sets): Mark as arch_sh3_nommu_up instead of
  17         arch_sh_up.
  18         (pref): Mark as arch_sh2a_nofpu_or_sh3_nommu_up instead of
  19         arch_sh2a_nofpu_or_sh4_nommu_nofpu_up.
  20
  21 2015-02-23  Vinay  <Vinay.G@kpit.com>
  22
  23         * rl78-decode.opc (MOV): Added space between two operands for
  24         'mov' instruction in index addressing mode.
  25         * rl78-decode.c: Regenerate.
  26
  27 2015-02-19  Pedro Alves  <palves@redhat.com>
  28
  29         * microblaze-dis.h [__cplusplus]: Wrap in extern "C".
  30
  31 2015-02-10  Pedro Alves  <palves@redhat.com>
  32             Tom Tromey  <tromey@redhat.com>
  33
  34         * microblaze-opcm.h (or, and, xor): Rename to microblaze_or,
  35         microblaze_and, microblaze_xor.
  36         * microblaze-opc.h (opcodes): Adjust.
  37
  38 2015-01-28  James Bowman  <james.bowman@ftdichip.com>
  39
  40         * Makefile.am: Add FT32 files.
  41         * configure.ac: Handle FT32.
  42         * disassemble.c (disassembler): Call print_insn_ft32.
  43         * ft32-dis.c: New file.
  44         * ft32-opc.c: New file.
  45         * Makefile.in: Regenerate.
  46         * configure: Regenerate.
  47         * po/POTFILES.in: Regenerate.
  48
  49 2015-01-28 Kuan-Lin Chen <kuanlinchentw@gmail.com>
  50
  51         * nds32-asm.c (keyword_sr): Add new system registers.
  52
  53 2015-01-16  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
  54
  55         * s390-dis.c (s390_extract_operand): Support vector register
  56         operands.
  57         (s390_print_insn_with_opcode): Support new operands types and add
  58         new handling of optional operands.
  59         * s390-mkopc.c (s390_opcode_mode_val, s390_opcode_cpu_val): Remove
  60         and include opcode/s390.h instead.
  61         (struct op_struct): New field `flags'.
  62         (insertOpcode, insertExpandedMnemonic): New parameter `flags'.
  63         (dumpTable): Dump flags.
  64         (main): Parse flags from the s390-opc.txt file.  Add z13 as cpu
  65         string.
  66         * s390-opc.c: Add new operands types, instruction formats, and
  67         instruction masks.
  68         (s390_opformats): Add new formats for .insn.
  69         * s390-opc.txt: Add new instructions.
  70
  71 2015-01-01  Alan Modra  <amodra@gmail.com>
  72
  73         Update year range in copyright notice of all files.
  74
  75 For older changes see ChangeLog-2014
  76 \f
  77 Copyright (C) 2015 Free Software Foundation, Inc.
  78
  79 Copying and distribution of this file, with or without modification,
  80 are permitted in any medium without royalty provided the copyright
  81 notice and this notice are preserved.
  82
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  84 mode: change-log
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