opcodes/ChangeLog

   1 2005-11-07  Alan Modra  <amodra@bigpond.net.au>
   2
   3         * i386-dis.c (ckprefix): Handle rex on fwait.  Don't print
   4         ignored rex prefixes here.
   5         (print_insn): Instead, handle them similarly to fwait followed
   6         by non-fp insns.
   7
   8 2005-11-02  H.J. Lu  <hongjiu.lu@intel.com>
   9
  10         * iq2000-desc.c: Regenerated.
  11         * iq2000-desc.h: Likewise.
  12         * iq2000-dis.c: Likewise.
  13         * iq2000-opc.c: Likewise.
  14
  15 2005-11-02  Paul Brook  <paul@codesourcery.com>
  16
  17         * arm-dis.c (print_insn_thumb32): Word align blx target address.
  18
  19 2005-10-31  Alan Modra  <amodra@bigpond.net.au>
  20
  21         * arm-dis.c (print_insn): Warning fix.
  22
  23 2005-10-30  H.J. Lu  <hongjiu.lu@intel.com>
  24
  25         * Makefile.am: Run "make dep-am".
  26         * Makefile.in: Regenerated.
  27
  28         * dep-in.sed: Replace " ./" with " ".
  29
  30 2005-10-28  Dave Brolley  <brolley@redhat.com>
  31
  32         * All CGEN-generated sources: Regenerate.
  33
  34         Contribute the following changes:
  35         2005-09-19  Dave Brolley  <brolley@redhat.com>
  36
  37         * disassemble.c (disassemble_init_for_target): Add 'break' to case for
  38         bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
  39         bfd_arch_m32c case.
  40
  41         2005-02-16  Dave Brolley  <brolley@redhat.com>
  42
  43         * cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
  44         cgen_isa_mask_* to cgen_bitset_*.
  45         * cgen-opc.c: Likewise.
  46
  47         2003-11-28  Richard Sandiford  <rsandifo@redhat.com>
  48
  49         * cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
  50         * *-dis.c: Regenerate.
  51
  52         2003-06-05  DJ Delorie  <dj@redhat.com>
  53
  54         * cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
  55         it, as it may point to a reused buffer. Set prev_isas when we
  56         change cpus.
  57
  58         2002-12-13  Dave Brolley  <brolley@redhat.com>
  59
  60         * cgen-opc.c (cgen_isa_mask_create): New support function for
  61         CGEN_ISA_MASK.
  62         (cgen_isa_mask_init): Ditto.
  63         (cgen_isa_mask_clear): Ditto.
  64         (cgen_isa_mask_add): Ditto.
  65         (cgen_isa_mask_set): Ditto.
  66         (cgen_isa_supported): Ditto.
  67         (cgen_isa_mask_compare): Ditto.
  68         (cgen_isa_mask_intersection): Ditto.
  69         (cgen_isa_mask_copy): Ditto.
  70         (cgen_isa_mask_combine): Ditto.
  71         * cgen-dis.in (libiberty.h): #include it.
  72         (isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
  73         (print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
  74         * Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
  75         * Makefile.in: Regenerated.
  76
  77 2005-10-27  DJ Delorie  <dj@redhat.com>
  78
  79         * m32c-asm.c: Regenerate.
  80         * m32c-desc.c: Regenerate.
  81         * m32c-desc.h: Regenerate.
  82         * m32c-dis.c: Regenerate.
  83         * m32c-ibld.c: Regenerate.
  84         * m32c-opc.c: Regenerate.
  85         * m32c-opc.h: Regenerate.
  86
  87 2005-10-26  DJ Delorie  <dj@redhat.com>
  88
  89         * m32c-asm.c: Regenerate.
  90         * m32c-desc.c: Regenerate.
  91         * m32c-desc.h: Regenerate.
  92         * m32c-dis.c: Regenerate.
  93         * m32c-ibld.c: Regenerate.
  94         * m32c-opc.c: Regenerate.
  95         * m32c-opc.h: Regenerate.
  96
  97 2005-10-26  Paul Brook  <paul@codesourcery.com>
  98
  99         * arm-dis.c (arm_opcodes): Correct "sel" entry.
 100
 101 2005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 102
 103         * m32r-asm.c: Regenerate.
 104
 105 2005-10-25  DJ Delorie  <dj@redhat.com>
 106
 107         * m32c-asm.c: Regenerate.
 108         * m32c-desc.c: Regenerate.
 109         * m32c-desc.h: Regenerate.
 110         * m32c-dis.c: Regenerate.
 111         * m32c-ibld.c: Regenerate.
 112         * m32c-opc.c: Regenerate.
 113         * m32c-opc.h: Regenerate.
 114
 115 2005-10-25  Arnold Metselaar  <arnold.metselaar@planet.nl>
 116
 117         * configure.in: Add target architecture bfd_arch_z80.
 118         * configure: Regenerated.
 119         * disassemble.c (disassembler)<ARCH_z80>: Add case
 120         bfd_arch_z80.
 121         * z80-dis.c: New file.
 122
 123 2005-10-25  Alan Modra  <amodra@bigpond.net.au>
 124
 125         * po/POTFILES.in: Regenerate.
 126         * po/opcodes.pot: Regenerate.
 127
 128 2005-10-24  Jan Beulich  <jbeulich@novell.com>
 129
 130         * ia64-asmtab.c: Regenerate.
 131
 132 2005-10-21  DJ Delorie  <dj@redhat.com>
 133
 134         * m32c-asm.c: Regenerate.
 135         * m32c-desc.c: Regenerate.
 136         * m32c-desc.h: Regenerate.
 137         * m32c-dis.c: Regenerate.
 138         * m32c-ibld.c: Regenerate.
 139         * m32c-opc.c: Regenerate.
 140         * m32c-opc.h: Regenerate.
 141
 142 2005-10-21  Nick Clifton  <nickc@redhat.com>
 143
 144         * bfin-dis.c: Tidy up code, removing redundant constructs.
 145
 146 2005-10-19  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 147
 148         * s390-opc.txt: Add unnormalized hfp multiply and multiply-and-add
 149         instructions.
 150
 151 2005-10-18  Nick Clifton  <nickc@redhat.com>
 152
 153         * m32r-asm.c: Regenerate after updating m32r.opc.
 154
 155 2005-10-18  Jie Zhang  <jie.zhang@analog.com>
 156
 157         * bfin-dis.c (print_insn_bfin): Do proper endian transform when
 158         reading instruction from memory.
 159
 160 2005-10-18  Nick Clifton  <nickc@redhat.com>
 161
 162         * m32r-asm.c: Regenerate after updating m32r.opc.
 163
 164 2005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
 165
 166         * m32r-asm.c: Regenerate after updating m32r.opc.
 167
 168 2005-10-08  James Lemke  <jim@wasabisystems.com>
 169
 170         * arm-dis.c (coprocessor_opcodes): Fix mask for various Maverick CDP
 171         operations.
 172
 173 2005-10-06  Daniel Jacobowitz  <dan@codesourcery.com>
 174
 175         * ppc-dis.c (struct dis_private): Remove.
 176         (powerpc_dialect): Avoid aliasing warnings.
 177         (print_insn_big_powerpc, print_insn_little_powerpc): Likewise.
 178
 179 2005-09-30  Nick Clifton  <nickc@redhat.com>
 180
 181         * po/ga.po: New Irish translation.
 182         * configure.in (ALL_LINGUAS): Add "ga".
 183         * configure: Regenerate.
 184
 185 2005-09-30  H.J. Lu  <hongjiu.lu@intel.com>
 186
 187         * Makefile.am: Run "make dep-am".
 188         * Makefile.in: Regenerated.
 189         * aclocal.m4: Likewise.
 190         * configure: Likewise.
 191
 192 2005-09-30  Catherine Moore  <clm@cm00re.com>
 193
 194         * Makefile.am: Bfin support.
 195         * Makefile.in: Regenerated.
 196         * aclocal.m4: Regenerated.
 197         * bfin-dis.c: New file.
 198         * configure.in: Bfin support.
 199         * configure: Regenerated.
 200         * disassemble.c (ARCH_bfin): Define.
 201         (disassembler): Add case for bfd_arch_bfin.
 202
 203 2005-09-28  Jan Beulich  <jbeulich@novell.com>
 204
 205         * i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
 206         (indirEv): Use it.
 207         (stackEv): New.
 208         (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
 209         (dis386): Document and use new 'V' meta character. Use it for
 210         single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
 211         opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
 212         (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
 213         data prefix as used whenever DFLAG was examined. Handle 'V'.
 214         (intel_operand_size): Use stack_v_mode.
 215         (OP_E): Use stack_v_mode, but handle only the special case of
 216         64-bit mode without operand size override here; fall through to
 217         v_mode case otherwise.
 218         (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
 219         and no operand size override is present.
 220         (OP_J): Use get32s for obtaining the displacement also when rex64
 221         is present.
 222
 223 2005-09-08  Paul Brook  <paul@codesourcery.com>
 224
 225         * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
 226
 227 2005-09-06  Chao-ying Fu  <fu@mips.com>
 228
 229         * mips-opc.c (MT32): New define.
 230         (mips_builtin_opcodes): Move "bc0f", "bc0fl", "bc0t", "bc0tl" to the
 231         bottom to avoid opcode collision with "mftr" and "mttr".
 232         Add MT instructions.
 233         * mips-dis.c (mips_arch_choices): Enable INSN_MT for mips32r2.
 234         (print_insn_args): Add supports for +t, +T, !, $, *, &, g operand
 235         formats.
 236
 237 2005-09-02  Paul Brook  <paul@codesourcery.com>
 238
 239         * arm-dis.c (coprocessor_opcodes): Add null terminator.
 240
 241 2005-09-02  Paul Brook  <paul@codesourcery.com>
 242
 243         * arm-dis.c (coprocessor_opcodes): New.
 244         (arm_opcodes, thumb32_opcodes): Remove coprocessor insns.
 245         (print_insn_coprocessor): New function.
 246         (print_insn_arm): Use print_insn_coprocessor.  Remove coprocessor
 247         format characters.
 248         (print_insn_thumb32): Use print_insn_coprocessor.
 249
 250 2005-08-30  Paul Brook  <paul@codesourcery.com>
 251
 252         * arm-dis.c (thumb_opcodes): Disassemble sub(3) as subs.
 253
 254 2005-08-26  Jan Beulich  <jbeulich@novell.com>
 255
 256         * i386-dis.c (intel_operand_size): New, broken out from OP_E for
 257         re-use.
 258         (OP_E): Call intel_operand_size, move call site out of mode
 259         dependent code.
 260         (OP_OFF): Call intel_operand_size if suffix_always. Remove
 261         ATTRIBUTE_UNUSED from parameters.
 262         (OP_OFF64): Likewise.
 263         (OP_ESreg): Call intel_operand_size.
 264         (OP_DSreg): Likewise.
 265         (OP_DIR): Use colon rather than semicolon as separator of far
 266         jump/call operands.
 267
 268 2005-08-25  Chao-ying Fu  <fu@mips.com>
 269
 270         * mips-opc.c (WR_a, RD_a, MOD_a, DSP_VOLA, D32): New define.
 271         (mips_builtin_opcodes): Add DSP instructions.
 272         * mips-dis.c (mips_arch_choices): Enable INSN_DSP for mips32, mips32r2,
 273         mips64, mips64r2.
 274         (print_insn_args): Add supports for 3, 4, 5, 6, 7, 8, 9, 0, :, ', @
 275         operand formats.
 276
 277 2005-08-23  David Ung  <davidu@mips.com>
 278
 279         * mips16-opc.c (mips16_opcodes): Add the MIPS16e jalrc/jrc
 280         instructions to the table.
 281
 282 2005-08-18  Alan Modra  <amodra@bigpond.net.au>
 283
 284         * a29k-dis.c: Delete.
 285         * Makefile.am: Remove a29k support.
 286         * configure.in: Likewise.
 287         * disassemble.c: Likewise.
 288         * Makefile.in: Regenerate.
 289         * configure: Regenerate.
 290         * po/POTFILES.in: Regenerate.
 291
 292 2005-08-15  Daniel Jacobowitz  <dan@codesourcery.com>
 293
 294         * ppc-dis.c (powerpc_dialect): Handle e300.
 295         (print_ppc_disassembler_options): Likewise.
 296         * ppc-opc.c (PPCE300): Define.
 297         (powerpc_opcodes): Mark icbt as available for the e300.
 298
 299 2005-08-13  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 300
 301         * hppa-dis.c (print_insn_hppa): Don't print '%' before register names.
 302         Use "rp" instead of "%r2" in "b,l" insns.
 303
 304 2005-08-12 Martin Schwidefsky  <schwidefsky@de.ibm.com>
 305
 306         * s390-dis.c (print_insn_s390): Print unsigned operands with %u.
 307         * s390-mkopc.c (s390_opcode_cpu_val): Add support for cpu type z9-109.
 308         (main): Likewise.
 309         * s390-opc.c (I32_16, U32_16, M_16): Add defines 32 bit immediates
 310         and 4 bit optional masks.
 311         (INSTR_RIL_RI, INSTR_RIL_RU, INSTR_RRF_M0RR, INSTR_RSE_CCRD,
 312         INSTR_RSY_CCRD, INSTR_SSF_RRDRD): Add new instruction formats.
 313         (MASK_RIL_RI, MASK_RIL_RU, MASK_RRF_M0RR, MASK_RSE_CCRD,
 314         MASK_RSY_CCRD, MASK_SSF_RRDRD): Likewise.
 315         (s390_opformats): Likewise.
 316         * s390-opc.txt: Add new instructions for cpu type z9-109.
 317
 318 2005-08-05  John David Anglin  <dave.anglin@nrc-crnc.gc.ca>
 319
 320         * hppa-dis.c (print_insn_hppa): Prefix 21-bit values with "L%".
 321
 322 2005-07-29  Paul Brook  <paul@codesourcery.com>
 323
 324         * arm-dis.c: Fix disassebly of thumb2 writeback addressing modes.
 325
 326 2005-07-29  Paul Brook  <paul@codesourcery.com>
 327
 328         * arm-dis.c (thumb32_opc): Fix addressing mode for tbh.
 329         (print_insn_thumb32): Fix decoding of thumb2 'I' operands.
 330
 331 2005-07-25  DJ Delorie  <dj@redhat.com>
 332
 333         * m32c-asm.c Regenerate.
 334         * m32c-dis.c Regenerate.
 335
 336 2005-07-20  DJ Delorie  <dj@redhat.com>
 337
 338         * disassemble.c (disassemble_init_for_target): M32C ISAs are
 339         enums, so convert them to bit masks, which attributes are.
 340
 341 2005-07-18  Nick Clifton  <nickc@redhat.com>
 342
 343         * configure.in: Restore alpha ordering to list of arches.
 344         * configure: Regenerate.
 345         * disassemble.c: Restore alpha ordering to list of arches.
 346
 347 2005-07-18  Nick Clifton  <nickc@redhat.com>
 348
 349         * m32c-asm.c: Regenerate.
 350         * m32c-desc.c: Regenerate.
 351         * m32c-desc.h: Regenerate.
 352         * m32c-dis.c: Regenerate.
 353         * m32c-ibld.h: Regenerate.
 354         * m32c-opc.c: Regenerate.
 355         * m32c-opc.h: Regenerate.
 356
 357 2005-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 358
 359         * i386-dis.c (PNI_Fixup): Update comment.
 360         (VMX_Fixup): Properly handle the suffix check.
 361
 362 2005-07-16  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 363
 364         * hppa-dis.c (print_insn_hppa): Add space after 'w' in wide-mode
 365         mfctl disassembly.
 366
 367 2005-07-16  Alan Modra  <amodra@bigpond.net.au>
 368
 369         * Makefile.am: Run "make dep-am".
 370         (stamp-m32c): Fix cpu dependencies.
 371         * Makefile.in: Regenerate.
 372         * ip2k-dis.c: Regenerate.
 373
 374 2007-07-15  H.J. Lu <hongjiu.lu@intel.com>
 375
 376         * i386-dis.c (OP_VMX): New. Handle Intel VMX Instructions.
 377         (VMX_Fixup): New. Fix up Intel VMX Instructions.
 378         (Em): New.
 379         (Gm): New.
 380         (VM): New.
 381         (dis386_twobyte): Updated entries 0x78 and 0x79.
 382         (twobyte_has_modrm): Likewise.
 383         (grps): Use OP_VMX in the "sgdtIQ" entry. Updated GRP9.
 384         (OP_G): Handle m_mode.
 385
 386 2005-07-14  Jim Blandy  <jimb@redhat.com>
 387
 388         Add support for the Renesas M32C and M16C.
 389         * m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
 390         * m32c-desc.h, m32c-opc.h: New.
 391         * Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
 392         (CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
 393         m32c-opc.c.
 394         (ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
 395         m32c-ibld.lo, m32c-opc.lo.
 396         (CLEANFILES): List stamp-m32c.
 397         (M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
 398         (CGEN_CPUS): Add m32c.
 399         (m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
 400         (m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
 401         (m32c_opc_h): New variable.
 402         (stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
 403         (m32c-opc.lo): New rules.
 404         * Makefile.in: Regenerated.
 405         * configure.in: Add case for bfd_m32c_arch.
 406         * configure: Regenerated.
 407         * disassemble.c (ARCH_m32c): New.
 408         [ARCH_m32c]: #include "m32c-desc.h".
 409         (disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
 410         (disassemble_init_for_target) [ARCH_m32c]: Same.
 411
 412         * cgen-ops.h, cgen-types.h: New files.
 413         * Makefile.am (HFILES): List them.
 414         * Makefile.in: Regenerated.
 415
 416 2005-07-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 417
 418         * arc-dis.c, arm-dis.c, cris-dis.c, crx-dis.c, d10v-dis.c,
 419         d30v-dis.c, fr30-dis.c, h8300-dis.c, h8500-dis.c, i860-dis.c,
 420         ia64-dis.c, ip2k-dis.c, m10200-dis.c, m10300-dis.c,
 421         m88k-dis.c, mcore-dis.c, mips-dis.c, ms1-dis.c, or32-dis.c,
 422         ppc-dis.c, sh64-dis.c, sparc-dis.c, tic4x-dis.c, tic80-dis.c,
 423         v850-dis.c: Fix format bugs.
 424         * ia64-gen.c (fail, warn): Add format attribute.
 425         * or32-opc.c (debug): Likewise.
 426
 427 2005-07-07  Khem Raj  <kraj@mvista.com>
 428
 429         * arm-dis.c (opcode32 arm_opcodes): Fix ARM VFP fadds instruction
 430         disassembly pattern.
 431
 432 2005-07-06  Alan Modra  <amodra@bigpond.net.au>
 433
 434         * Makefile.am (stamp-m32r): Fix path to cpu files.
 435         (stamp-m32r, stamp-iq2000): Likewise.
 436         * Makefile.in: Regenerate.
 437         * m32r-asm.c: Regenerate.
 438         * po/POTFILES.in: Remove arm-opc.h.  Add ms1-asm.c, ms1-desc.c,
 439         ms1-desc.h, ms1-dis.c, ms1-ibld.c, ms1-opc.c, ms1-opc.h.
 440
 441 2005-07-05  Nick Clifton  <nickc@redhat.com>
 442
 443         * iq2000-asm.c: Regenerate.
 444         * ms1-asm.c: Regenerate.
 445
 446 2005-07-05  Jan Beulich  <jbeulich@novell.com>
 447
 448         * i386-dis.c (SVME_Fixup): New.
 449         (grps): Use it for the lidt entry.
 450         (PNI_Fixup): Call OP_M rather than OP_E.
 451         (INVLPG_Fixup): Likewise.
 452
 453 2005-07-04  H.J. Lu  <hongjiu.lu@intel.com>
 454
 455         * tic30-dis.c (cnvt_tmsfloat_ieee): Use HUGE_VALF if defined.
 456
 457 2005-07-01  Nick Clifton  <nickc@redhat.com>
 458
 459         * a29k-dis.c: Update to ISO C90 style function declarations and
 460         fix formatting.
 461         * alpha-opc.c: Likewise.
 462         * arc-dis.c: Likewise.
 463         * arc-opc.c: Likewise.
 464         * avr-dis.c: Likewise.
 465         * cgen-asm.in: Likewise.
 466         * cgen-dis.in: Likewise.
 467         * cgen-ibld.in: Likewise.
 468         * cgen-opc.c: Likewise.
 469         * cris-dis.c: Likewise.
 470         * d10v-dis.c: Likewise.
 471         * d30v-dis.c: Likewise.
 472         * d30v-opc.c: Likewise.
 473         * dis-buf.c: Likewise.
 474         * dlx-dis.c: Likewise.
 475         * h8300-dis.c: Likewise.
 476         * h8500-dis.c: Likewise.
 477         * hppa-dis.c: Likewise.
 478         * i370-dis.c: Likewise.
 479         * i370-opc.c: Likewise.
 480         * m10200-dis.c: Likewise.
 481         * m10300-dis.c: Likewise.
 482         * m68k-dis.c: Likewise.
 483         * m88k-dis.c: Likewise.
 484         * mips-dis.c: Likewise.
 485         * mmix-dis.c: Likewise.
 486         * msp430-dis.c: Likewise.
 487         * ns32k-dis.c: Likewise.
 488         * or32-dis.c: Likewise.
 489         * or32-opc.c: Likewise.
 490         * pdp11-dis.c: Likewise.
 491         * pj-dis.c: Likewise.
 492         * s390-dis.c: Likewise.
 493         * sh-dis.c: Likewise.
 494         * sh64-dis.c: Likewise.
 495         * sparc-dis.c: Likewise.
 496         * sparc-opc.c: Likewise.
 497         * sysdep.h: Likewise.
 498         * tic30-dis.c: Likewise.
 499         * tic4x-dis.c: Likewise.
 500         * tic80-dis.c: Likewise.
 501         * v850-dis.c: Likewise.
 502         * v850-opc.c: Likewise.
 503         * vax-dis.c: Likewise.
 504         * w65-dis.c: Likewise.
 505         * z8kgen.c: Likewise.
 506
 507         * fr30-*: Regenerate.
 508         * frv-*: Regenerate.
 509         * ip2k-*: Regenerate.
 510         * iq2000-*: Regenerate.
 511         * m32r-*: Regenerate.
 512         * ms1-*: Regenerate.
 513         * openrisc-*: Regenerate.
 514         * xstormy16-*: Regenerate.
 515
 516 2005-06-23  Ben Elliston  <bje@gnu.org>
 517
 518         * m68k-dis.c: Use ISC C90.
 519         * m68k-opc.c: Formatting fixes.
 520
 521 2005-06-16  David Ung  <davidu@mips.com>
 522
 523         * mips16-opc.c (mips16_opcodes): Add the following MIPS16e
 524         instructions to the table; seb/seh/sew/zeb/zeh/zew.
 525
 526 2005-06-15  Dave Brolley  <brolley@redhat.com>
 527
 528         Contribute Morpho ms1 on behalf of Red Hat
 529         * ms1-asm.c, ms1-desc.c, ms1-dis.c, ms1-ibld.c, ms1-opc.c,
 530         ms1-opc.h: New files, Morpho ms1 target.
 531
 532         2004-05-14  Stan Cox  <scox@redhat.com>
 533
 534         * disassemble.c (ARCH_ms1): Define.
 535         (disassembler): Handle bfd_arch_ms1
 536
 537         2004-05-13  Michael Snyder  <msnyder@redhat.com>
 538
 539         * Makefile.am, Makefile.in: Add ms1 target.
 540         * configure.in: Ditto.
 541
 542 2005-06-08  Zack Weinberg  <zack@codesourcery.com>
 543
 544         * arm-opc.h: Delete; fold contents into ...
 545         * arm-dis.c: ... here.  Move includes of internal COFF headers
 546         next to includes of internal ELF headers.
 547         (streq, WORD_ADDRESS, BDISP, BDISP23): Delete, unused.
 548         (struct arm_opcode): Rename struct opcode32.  Make 'assembler' const.
 549         (struct thumb_opcode): Rename struct opcode16.  Make 'assembler' const.
 550         (arm_conditional, arm_fp_const, arm_shift, arm_regname, regnames)
 551         (iwmmxt_wwnames, iwmmxt_wwssnames):
 552         Make const.
 553         (regnames): Remove iWMMXt coprocessor register sets.
 554         (iwmmxt_regnames, iwmmxt_cregnames): New statics.
 555         (get_arm_regnames): Adjust fourth argument to match above changes.
 556         (set_iwmmxt_regnames): Delete.
 557         (print_insn_arm): Constify 'c'.  Use ISO syntax for function
 558         pointer calls.  Expand sole use of BDISP.  Use iwmmxt_regnames
 559         and iwmmxt_cregnames, not set_iwmmxt_regnames.
 560         (print_insn_thumb16, print_insn_thumb32): Constify 'c'.  Use
 561         ISO syntax for function pointer calls.
 562
 563 2005-06-07  Zack Weinberg  <zack@codesourcery.com>
 564
 565         * arm-dis.c: Split up the comments describing the format codes, so
 566         that the ARM and 16-bit Thumb opcode tables each have comments
 567         preceding them that describe all the codes, and only the codes,
 568         valid in those tables.  (32-bit Thumb table is already like this.)
 569         Reorder the lists in all three comments to match the order in
 570         which the codes are implemented.
 571         Remove all forward declarations of static functions.  Convert all
 572         function definitions to ISO C format.
 573         (print_insn_arm, print_insn_thumb16, print_insn_thumb32):
 574         Return nothing.
 575         (print_insn_thumb16): Remove unused case 'I'.
 576         (print_insn): Update for changed calling convention of subroutines.
 577
 578 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 579
 580         * i386-dis.c (OP_E): In Intel mode, display 32-bit displacements in
 581         hex (but retain it being displayed as signed). Remove redundant
 582         checks. Add handling of displacements for 16-bit addressing in Intel
 583         mode.
 584
 585 2005-05-25  Jan Beulich  <jbeulich@novell.com>
 586
 587         * i386-dis.c (prefix_name): Remove pointless mode_64bit check.
 588         (OP_E): Remove redundant REX_EXTZ handling. Remove pointless
 589         masking of 'rm' in 16-bit memory address handling.
 590
 591 2005-05-19  Anton Blanchard  <anton@samba.org>
 592
 593         * ppc-dis.c (powerpc_dialect): Handle "-Mpower5".
 594         (print_ppc_disassembler_options): Document it.
 595         * ppc-opc.c (SVC_LEV): Define.
 596         (LEV): Allow optional operand.
 597         (POWER5): Define.
 598         (powerpc_opcodes): Extend "sc".  Adjust "svc" and "svcl".  Add
 599         "hrfid", "popcntb", "fsqrtes", "fsqrtes.", "fre" and "fre.".
 600
 601 2005-05-19  Kelley Cook  <kcook@gcc.gnu.org>
 602
 603         * Makefile.in:  Regenerate.
 604
 605 2005-05-17  Zack Weinberg  <zack@codesourcery.com>
 606
 607         * arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
 608         instructions.  Adjust disassembly of some opcodes to match
 609         unified syntax.
 610         (thumb32_opcodes): New table.
 611         (print_insn_thumb): Rename print_insn_thumb16; don't handle
 612         two-halfword branches here.
 613         (print_insn_thumb32): New function.
 614         (print_insn): Choose among print_insn_arm, print_insn_thumb16,
 615         and print_insn_thumb32.  Be consistent about order of
 616         halfwords when printing 32-bit instructions.
 617
 618 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 619
 620         PR 843
 621         * i386-dis.c (branch_v_mode): New.
 622         (indirEv): Use branch_v_mode instead of v_mode.
 623         (OP_E): Handle branch_v_mode.
 624
 625 2005-05-07  H.J. Lu  <hongjiu.lu@intel.com>
 626
 627         * d10v-dis.c (dis_2_short): Support 64bit host.
 628
 629 2005-05-07  Nick Clifton  <nickc@redhat.com>
 630
 631         * po/nl.po: Updated translation.
 632
 633 2005-05-07  Nick Clifton  <nickc@redhat.com>
 634
 635         * Update the address and phone number of the FSF organization in
 636         the GPL notices in the following files:
 637         a29k-dis.c, aclocal.m4, alpha-dis.c, alpha-opc.c, arc-dis.c,
 638         arc-dis.h, arc-ext.c, arc-ext.h, arc-opc.c, arm-dis.c, arm-opc.h,
 639         avr-dis.c, cgen-asm.c, cgen-asm.in, cgen-dis.c, cgen-dis.in,
 640         cgen-ibld.in, cgen-opc.c, cgen.sh, cris-dis.c, cris-opc.c,
 641         crx-dis.c, crx-opc.c, d10v-dis.c, d10v-opc.c, d30v-dis.c,
 642         d30v-opc.c, dis-buf.c, dis-init.c, disassemble.c, dlx-dis.c,
 643         fr30-asm.c, fr30-desc.c, fr30-desc.h, fr30-dis.c, fr30-ibld.c,
 644         fr30-opc.c, fr30-opc.h, frv-asm.c, frv-desc.c, frv-desc.h,
 645         frv-dis.c, frv-ibld.c, frv-opc.c, frv-opc.h, h8300-dis.c,
 646         h8500-dis.c, h8500-opc.h, hppa-dis.c, i370-dis.c, i370-opc.c,
 647         i386-dis.c, i860-dis.c, i960-dis.c, ia64-asmtab.h, ia64-dis.c,
 648         ia64-gen.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c,
 649         ia64-opc-f.c, ia64-opc-i.c, ia64-opc-m.c, ia64-opc-x.c,
 650         ia64-opc.c, ia64-opc.h, ip2k-asm.c, ip2k-desc.c, ip2k-desc.h,
 651         ip2k-dis.c, ip2k-ibld.c, ip2k-opc.c, ip2k-opc.h, iq2000-asm.c,
 652         iq2000-desc.c, iq2000-desc.h, iq2000-dis.c, iq2000-ibld.c,
 653         iq2000-opc.c, iq2000-opc.h, m10200-dis.c, m10200-opc.c,
 654         m10300-dis.c, m10300-opc.c, m32r-asm.c, m32r-desc.c, m32r-desc.h,
 655         m32r-dis.c, m32r-ibld.c, m32r-opc.c, m32r-opc.h, m32r-opinst.c,
 656         m68hc11-dis.c, m68hc11-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c,
 657         maxq-dis.c, mcore-dis.c, mcore-opc.h, mips-dis.c, mips-opc.c,
 658         mips16-opc.c, mmix-dis.c, mmix-opc.c, msp430-dis.c, ns32k-dis.c,
 659         openrisc-asm.c, openrisc-desc.c, openrisc-desc.h, openrisc-dis.c,
 660         openrisc-ibld.c, openrisc-opc.c, openrisc-opc.h, opintl.h,
 661         or32-dis.c, or32-opc.c, pdp11-dis.c, pdp11-opc.c, pj-dis.c,
 662         pj-opc.c, ppc-dis.c, ppc-opc.c, s390-dis.c, s390-mkopc.c,
 663         s390-opc.c, sh-dis.c, sh-opc.h, sh64-dis.c, sh64-opc.c,
 664         sh64-opc.h, sparc-dis.c, sparc-opc.c, sysdep.h, tic30-dis.c,
 665         tic4x-dis.c, tic54x-dis.c, tic54x-opc.c, tic80-dis.c, tic80-opc.c,
 666         v850-dis.c, v850-opc.c, vax-dis.c, w65-dis.c, w65-opc.h,
 667         xstormy16-asm.c, xstormy16-desc.c, xstormy16-desc.h,
 668         xstormy16-dis.c, xstormy16-ibld.c, xstormy16-opc.c,
 669         xstormy16-opc.h, xtensa-dis.c, z8k-dis.c, z8kgen.c
 670
 671 2005-05-05  James E Wilson  <wilson@specifixinc.com>
 672
 673         * ia64-opc.c: Include sysdep.h before libiberty.h.
 674
 675 2005-05-05  Nick Clifton  <nickc@redhat.com>
 676
 677         * configure.in (ALL_LINGUAS): Add vi.
 678         * configure: Regenerate.
 679         * po/vi.po: New.
 680
 681 2005-04-26  Jerome Guitton  <guitton@gnat.com>
 682
 683         * configure.in: Fix the check for basename declaration.
 684         * configure: Regenerate.
 685
 686 2005-04-19  Alan Modra  <amodra@bigpond.net.au>
 687
 688         * ppc-opc.c (RTO): Define.
 689         (powerpc_opcodes <tlbsx, tlbsx., tlbre>): Combine PPC403 and BOOKE
 690         entries to suit PPC440.
 691
 692 2005-04-18  Mark Kettenis  <kettenis@gnu.org>
 693
 694         * i386-dis.c: Insert hyphens into selected VIA PadLock extensions.
 695         Add xcrypt-ctr.
 696
 697 2005-04-14  Nick Clifton  <nickc@redhat.com>
 698
 699         * po/fi.po: New translation: Finnish.
 700         * configure.in (ALL_LINGUAS): Add fi.
 701         * configure: Regenerate.
 702
 703 2005-04-14  Alan Modra  <amodra@bigpond.net.au>
 704
 705         * Makefile.am (NO_WERROR): Define.
 706         * configure.in: Invoke AM_BINUTILS_WARNINGS.
 707         * Makefile.in: Regenerate.
 708         * aclocal.m4: Regenerate.
 709         * configure: Regenerate.
 710
 711 2005-04-04  Nick Clifton  <nickc@redhat.com>
 712
 713         * fr30-asm.c: Regenerate.
 714         * frv-asm.c: Regenerate.
 715         * iq2000-asm.c: Regenerate.
 716         * m32r-asm.c: Regenerate.
 717         * openrisc-asm.c: Regenerate.
 718
 719 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 720
 721         * i386-dis.c (PNI_Fixup): Neither mwait nor monitor have any
 722         visible operands in Intel mode. The first operand of monitor is
 723         %rax in 64-bit mode.
 724
 725 2005-04-01  Jan Beulich  <jbeulich@novell.com>
 726
 727         * i386-dis.c (INVLPG_Fixup): Decode rdtscp; change code to allow for
 728         easier future additions.
 729
 730 2005-03-31  Jerome Guitton  <guitton@gnat.com>
 731
 732         * configure.in: Check for basename.
 733         * configure: Regenerate.
 734         * config.in: Ditto.
 735
 736 2005-03-29  H.J. Lu  <hongjiu.lu@intel.com>
 737
 738         * i386-dis.c (SEG_Fixup): New.
 739         (Sv): New.
 740         (dis386): Use "Sv" for 0x8c and 0x8e.
 741
 742 2005-03-21  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 743             Nick Clifton  <nickc@redhat.com>
 744
 745         * vax-dis.c: (entry_addr): New varible:  An array of user supplied
 746         function entry mask addresses.
 747         (entry_addr_occupied_slots): New variable: The number of occupied
 748         elements in entry_addr.
 749         (entry_addr_total_slots): New variable: The total number of
 750         elements in entry_addr.
 751         (parse_disassembler_options): New function.  Fills in the entry_addr
 752         array.
 753         (free_entry_array): New function.  Release the memory used by the
 754         entry addr array.  Suppressed because there is no way to call it.
 755         (is_function_entry): Check if a given address is a function's
 756         start address by looking at supplied entry mask addresses and
 757         symbol information, if available.
 758         (print_insn_vax): Use parse_disassembler_options and is_function_entry.
 759
 760 2005-03-23  H.J. Lu  <hongjiu.lu@intel.com>
 761
 762         * cris-dis.c (print_with_operands): Use ~31L for long instead
 763         of ~31.
 764
 765 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
 766
 767         * mmix-opc.c (O): Revert the last change.
 768         (Z): Likewise.
 769
 770 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
 771
 772         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
 773         (Z): Likewise.
 774
 775 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
 776
 777         * mmix-opc.c (O, Z): Force expression as unsigned long.
 778
 779 2005-03-18  Nick Clifton  <nickc@redhat.com>
 780
 781         * ip2k-asm.c: Regenerate.
 782         * op/opcodes.pot: Regenerate.
 783
 784 2005-03-16  Nick Clifton  <nickc@redhat.com>
 785             Ben Elliston  <bje@au.ibm.com>
 786
 787         * configure.in (werror): New switch: Add -Werror to the
 788         compiler command line.  Enabled by default.  Disable via
 789         --disable-werror.
 790         * configure: Regenerate.
 791
 792 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
 793
 794         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
 795         BOOKE.
 796
 797 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
 798
 799         * po/es.po: Commit new Spanish translation.
 800
 801         * po/fr.po: Commit new French translation.
 802
 803 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 804
 805         * vax-dis.c: Fix spelling error
 806         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
 807         of just "Entry mask: < r1 ... >"
 808
 809 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
 810
 811         * arm-dis.c (arm_opcodes): Document %E and %V.
 812         Add entries for v6T2 ARM instructions:
 813         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
 814         (print_insn_arm): Add support for %E and %V.
 815         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
 816
 817 2005-03-10  Jeff Baker  <jbaker@qnx.com>
 818             Alan Modra  <amodra@bigpond.net.au>
 819
 820         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
 821         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
 822         (SPRG_MASK): Delete.
 823         (XSPRG_MASK): Mask off extra bits now part of sprg field.
 824         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
 825         mfsprg4..7 after msprg and consolidate.
 826
 827 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
 828
 829         * vax-dis.c (entry_mask_bit): New array.
 830         (print_insn_vax): Decode function entry mask.
 831
 832 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
 833
 834         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
 835
 836 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
 837
 838         * po/opcodes.pot: Regenerate.
 839
 840 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
 841
 842         * arc-dis.c (a4_decoding_class): New enum.
 843         (dsmOneArcInst): Use the enum values for the decoding class.
 844         Remove redundant case in the switch for decodingClass value 11.
 845
 846 2005-03-02  Jan Beulich  <jbeulich@novell.com>
 847
 848         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
 849         accesses.
 850         (OP_C): Consider lock prefix in non-64-bit modes.
 851
 852 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
 853
 854         * cris-dis.c (format_hex): Remove ineffective warning fix.
 855         * crx-dis.c (make_instruction): Warning fix.
 856         * frv-asm.c: Regenerate.
 857
 858 2005-02-23  Nick Clifton  <nickc@redhat.com>
 859
 860         * cgen-dis.in: Use bfd_byte for buffers that are passed to
 861         read_memory.
 862
 863         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 864
 865         * crx-dis.c (make_instruction): Move argument structure into inner
 866         scope and ensure that all of its fields are initialised before
 867         they are used.
 868
 869         * fr30-asm.c: Regenerate.
 870         * fr30-dis.c: Regenerate.
 871         * frv-asm.c: Regenerate.
 872         * frv-dis.c: Regenerate.
 873         * ip2k-asm.c: Regenerate.
 874         * ip2k-dis.c: Regenerate.
 875         * iq2000-asm.c: Regenerate.
 876         * iq2000-dis.c: Regenerate.
 877         * m32r-asm.c: Regenerate.
 878         * m32r-dis.c: Regenerate.
 879         * openrisc-asm.c: Regenerate.
 880         * openrisc-dis.c: Regenerate.
 881         * xstormy16-asm.c: Regenerate.
 882         * xstormy16-dis.c: Regenerate.
 883
 884 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 885
 886         * arc-ext.c: Warning fixes.
 887         * arc-ext.h: Likewise.
 888         * cgen-opc.c: Likewise.
 889         * ia64-gen.c: Likewise.
 890         * maxq-dis.c: Likewise.
 891         * ns32k-dis.c: Likewise.
 892         * w65-dis.c: Likewise.
 893         * ia64-asmtab.c: Regenerate.
 894
 895 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 896
 897         * fr30-desc.c: Regenerate.
 898         * fr30-desc.h: Regenerate.
 899         * fr30-opc.c: Regenerate.
 900         * fr30-opc.h: Regenerate.
 901         * frv-desc.c: Regenerate.
 902         * frv-desc.h: Regenerate.
 903         * frv-opc.c: Regenerate.
 904         * frv-opc.h: Regenerate.
 905         * ip2k-desc.c: Regenerate.
 906         * ip2k-desc.h: Regenerate.
 907         * ip2k-opc.c: Regenerate.
 908         * ip2k-opc.h: Regenerate.
 909         * iq2000-desc.c: Regenerate.
 910         * iq2000-desc.h: Regenerate.
 911         * iq2000-opc.c: Regenerate.
 912         * iq2000-opc.h: Regenerate.
 913         * m32r-desc.c: Regenerate.
 914         * m32r-desc.h: Regenerate.
 915         * m32r-opc.c: Regenerate.
 916         * m32r-opc.h: Regenerate.
 917         * m32r-opinst.c: Regenerate.
 918         * openrisc-desc.c: Regenerate.
 919         * openrisc-desc.h: Regenerate.
 920         * openrisc-opc.c: Regenerate.
 921         * openrisc-opc.h: Regenerate.
 922         * xstormy16-desc.c: Regenerate.
 923         * xstormy16-desc.h: Regenerate.
 924         * xstormy16-opc.c: Regenerate.
 925         * xstormy16-opc.h: Regenerate.
 926
 927 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 928
 929         * Makefile.am: Run "make dep-am"
 930         * Makefile.in: Regenerate.
 931
 932 2005-02-15  Nick Clifton  <nickc@redhat.com>
 933
 934         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 935         compile time warnings.
 936         (print_keyword): Likewise.
 937         (default_print_insn): Likewise.
 938
 939         * fr30-desc.c: Regenerated.
 940         * fr30-desc.h: Regenerated.
 941         * fr30-dis.c: Regenerated.
 942         * fr30-opc.c: Regenerated.
 943         * fr30-opc.h: Regenerated.
 944         * frv-desc.c: Regenerated.
 945         * frv-dis.c: Regenerated.
 946         * frv-opc.c: Regenerated.
 947         * ip2k-asm.c: Regenerated.
 948         * ip2k-desc.c: Regenerated.
 949         * ip2k-desc.h: Regenerated.
 950         * ip2k-dis.c: Regenerated.
 951         * ip2k-opc.c: Regenerated.
 952         * ip2k-opc.h: Regenerated.
 953         * iq2000-desc.c: Regenerated.
 954         * iq2000-dis.c: Regenerated.
 955         * iq2000-opc.c: Regenerated.
 956         * m32r-asm.c: Regenerated.
 957         * m32r-desc.c: Regenerated.
 958         * m32r-desc.h: Regenerated.
 959         * m32r-dis.c: Regenerated.
 960         * m32r-opc.c: Regenerated.
 961         * m32r-opc.h: Regenerated.
 962         * m32r-opinst.c: Regenerated.
 963         * openrisc-desc.c: Regenerated.
 964         * openrisc-desc.h: Regenerated.
 965         * openrisc-dis.c: Regenerated.
 966         * openrisc-opc.c: Regenerated.
 967         * openrisc-opc.h: Regenerated.
 968         * xstormy16-desc.c: Regenerated.
 969         * xstormy16-desc.h: Regenerated.
 970         * xstormy16-dis.c: Regenerated.
 971         * xstormy16-opc.c: Regenerated.
 972         * xstormy16-opc.h: Regenerated.
 973
 974 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 975
 976         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 977         address.
 978
 979 2005-02-11  Nick Clifton  <nickc@redhat.com>
 980
 981         * iq2000-asm.c: Regenerate.
 982
 983         * frv-dis.c: Regenerate.
 984
 985 2005-02-07  Jim Blandy  <jimb@redhat.com>
 986
 987         * Makefile.am (CGEN): Load guile.scm before calling the main
 988         application script.
 989         * Makefile.in: Regenerated.
 990         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 991         Simply pass the cgen-opc.scm path to ${cgen} as its first
 992         argument; ${cgen} itself now contains the '-s', or whatever is
 993         appropriate for the Scheme being used.
 994
 995 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 996
 997         * configure: Regenerate to track ../gettext.m4.
 998
 999 2005-01-31  Jan Beulich  <jbeulich@novell.com>
1000
1001         * ia64-gen.c (NELEMS): Define.
1002         (shrink): Generate alias with missing second predicate register when
1003         opcode has two outputs and these are both predicates.
1004         * ia64-opc-i.c (FULL17): Define.
1005         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
1006         here to generate output template.
1007         (TBITCM, TNATCM): Undefine after use.
1008         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
1009         first input. Add ld16 aliases without ar.csd as second output. Add
1010         st16 aliases without ar.csd as second input. Add cmpxchg aliases
1011         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
1012         ar.ccv as third/fourth inputs. Consolidate through...
1013         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
1014         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
1015         * ia64-asmtab.c: Regenerate.
1016
1017 2005-01-27  Andrew Cagney  <cagney@gnu.org>
1018
1019         * configure: Regenerate to track ../gettext.m4 change.
1020
1021 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
1022
1023         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
1024         * frv-asm.c: Rebuilt.
1025         * frv-desc.c: Rebuilt.
1026         * frv-desc.h: Rebuilt.
1027         * frv-dis.c: Rebuilt.
1028         * frv-ibld.c: Rebuilt.
1029         * frv-opc.c: Rebuilt.
1030         * frv-opc.h: Rebuilt.
1031
1032 2005-01-24  Andrew Cagney  <cagney@gnu.org>
1033
1034         * configure: Regenerate, ../gettext.m4 was updated.
1035
1036 2005-01-21  Fred Fish  <fnf@specifixinc.com>
1037
1038         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
1039         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
1040         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
1041         * mips-dis.c: Ditto.
1042
1043 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
1044
1045         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
1046
1047 2005-01-19  Fred Fish  <fnf@specifixinc.com>
1048
1049         * mips-dis.c (no_aliases): New disassembly option flag.
1050         (set_default_mips_dis_options): Init no_aliases to zero.
1051         (parse_mips_dis_option): Handle no-aliases option.
1052         (print_insn_mips): Ignore table entries that are aliases
1053         if no_aliases is set.
1054         (print_insn_mips16): Ditto.
1055         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
1056         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
1057         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
1058         * mips16-opc.c (mips16_opcodes): Ditto.
1059
1060 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
1061
1062         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
1063         (inheritance diagram): Add missing edge.
1064         (arch_sh1_up): Rename arch_sh_up to match external name to make life
1065         easier for the testsuite.
1066         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
1067         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
1068         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
1069         arch_sh2a_or_sh4_up child.
1070         (sh_table): Do renaming as above.
1071         Correct comment for ldc.l for gas testsuite to read.
1072         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
1073         Correct comments for movy.w and movy.l for gas testsuite to read.
1074         Correct comments for fmov.d and fmov.s for gas testsuite to read.
1075
1076 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
1077
1078         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
1079
1080 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
1081
1082         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
1083
1084 2005-01-10  Andreas Schwab  <schwab@suse.de>
1085
1086         * disassemble.c (disassemble_init_for_target) <case
1087         bfd_arch_ia64>: Set skip_zeroes to 16.
1088         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
1089
1090 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
1091
1092         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
1093
1094 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
1095
1096         * avr-dis.c: Prettyprint. Added printing of symbol names in all
1097         memory references. Convert avr_operand() to C90 formatting.
1098
1099 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
1100
1101         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
1102
1103 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
1104
1105         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
1106         (no_op_insn): Initialize array with instructions that have no
1107         operands.
1108         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
1109
1110 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
1111
1112         * arm-dis.c: Correct top-level comment.
1113
1114 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
1115
1116         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
1117         architecuture defining the insn.
1118         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
1119         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
1120         field.
1121         Also include opcode/arm.h.
1122         * Makefile.am (arm-dis.lo): Update dependency list.
1123         * Makefile.in: Regenerate.
1124
1125 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
1126
1127         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
1128         reflect the change to the short immediate syntax.
1129
1130 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
1131
1132         * or32-opc.c (debug): Warning fix.
1133         * po/POTFILES.in: Regenerate.
1134
1135         * maxq-dis.c: Formatting.
1136         (print_insn): Warning fix.
1137
1138 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
1139
1140         * arm-dis.c (WORD_ADDRESS): Define.
1141         (print_insn): Use it.  Correct big-endian end-of-section handling.
1142
1143 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
1144             Vineet Sharma      <vineets@noida.hcltech.com>
1145
1146         * maxq-dis.c: New file.
1147         * disassemble.c (ARCH_maxq): Define.
1148         (disassembler): Add 'print_insn_maxq_little' for handling maxq
1149         instructions..
1150         * configure.in: Add case for bfd_maxq_arch.
1151         * configure: Regenerate.
1152         * Makefile.am: Add support for maxq-dis.c
1153         * Makefile.in: Regenerate.
1154         * aclocal.m4: Regenerate.
1155
1156 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
1157
1158         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
1159         mode.
1160         * crx-dis.c: Likewise.
1161
1162 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
1163
1164         Generally, handle CRISv32.
1165         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
1166         (struct cris_disasm_data): New type.
1167         (format_reg, format_hex, cris_constraint, print_flags)
1168         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
1169         callers changed.
1170         (format_sup_reg, print_insn_crisv32_with_register_prefix)
1171         (print_insn_crisv32_without_register_prefix)
1172         (print_insn_crisv10_v32_with_register_prefix)
1173         (print_insn_crisv10_v32_without_register_prefix)
1174         (cris_parse_disassembler_options): New functions.
1175         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
1176         parameter.  All callers changed.
1177         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
1178         failure.
1179         (cris_constraint) <case 'Y', 'U'>: New cases.
1180         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
1181         for constraint 'n'.
1182         (print_with_operands) <case 'Y'>: New case.
1183         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
1184         <case 'N', 'Y', 'Q'>: New cases.
1185         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
1186         (print_insn_cris_with_register_prefix)
1187         (print_insn_cris_without_register_prefix): Call
1188         cris_parse_disassembler_options.
1189         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
1190         for CRISv32 and the size of immediate operands.  New v32-only
1191         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
1192         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
1193         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
1194         Change brp to be v3..v10.
1195         (cris_support_regs): New vector.
1196         (cris_opcodes): Update head comment.  New format characters '[',
1197         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
1198         Add new opcodes for v32 and adjust existing opcodes to accommodate
1199         differences to earlier variants.
1200         (cris_cond15s): New vector.
1201
1202 2004-11-04 Jan Beulich <jbeulich@novell.com>
1203
1204         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
1205         (indirEb): Remove.
1206         (Mp): Use f_mode rather than none at all.
1207         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
1208         replaces what previously was x_mode; x_mode now means 128-bit SSE
1209         operands.
1210         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
1211         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
1212         pinsrw's second operand is Edqw.
1213         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
1214         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
1215         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
1216         mode when an operand size override is present or always suffixing.
1217         More instructions will need to be added to this group.
1218         (putop): Handle new macro chars 'C' (short/long suffix selector),
1219         'I' (Intel mode override for following macro char), and 'J' (for
1220         adding the 'l' prefix to far branches in AT&T mode). When an
1221         alternative was specified in the template, honor macro character when
1222         specified for Intel mode.
1223         (OP_E): Handle new *_mode values. Correct pointer specifications for
1224         memory operands. Consolidate output of index register.
1225         (OP_G): Handle new *_mode values.
1226         (OP_I): Handle const_1_mode.
1227         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
1228         respective opcode prefix bits have been consumed.
1229         (OP_EM, OP_EX): Provide some default handling for generating pointer
1230         specifications.
1231
1232 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
1233
1234         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
1235         COP_INST macro.
1236
1237 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
1238
1239         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
1240         (getregliststring): Support HI/LO and user registers.
1241         * crx-opc.c (crx_instruction): Update data structure according to the
1242         rearrangement done in CRX opcode header file.
1243         (crx_regtab):  Likewise.
1244         (crx_optab):  Likewise.
1245         (crx_instruction): Reorder load/stor instructions, remove unsupported
1246         formats.
1247         support new Co-Processor instruction 'cpi'.
1248
1249 2004-10-27  Nick Clifton  <nickc@redhat.com>
1250
1251         * opcodes/iq2000-asm.c: Regenerate.
1252         * opcodes/iq2000-desc.c: Regenerate.
1253         * opcodes/iq2000-desc.h: Regenerate.
1254         * opcodes/iq2000-dis.c: Regenerate.
1255         * opcodes/iq2000-ibld.c: Regenerate.
1256         * opcodes/iq2000-opc.c: Regenerate.
1257         * opcodes/iq2000-opc.h: Regenerate.
1258
1259 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
1260
1261         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
1262         us4, us5 (respectively).
1263         Remove unsupported 'popa' instruction.
1264         Reverse operands order in store co-processor instructions.
1265
1266 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
1267
1268         * Makefile.am: Run "make dep-am"
1269         * Makefile.in: Regenerate.
1270
1271 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
1272
1273         * xtensa-dis.c: Use ISO C90 formatting.
1274
1275 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
1276
1277         * ppc-opc.c: Revert 2004-09-09 change.
1278
1279 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
1280
1281         * xtensa-dis.c (state_names): Delete.
1282         (fetch_data): Use xtensa_isa_maxlength.
1283         (print_xtensa_operand): Replace operand parameter with opcode/operand
1284         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
1285         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
1286         instruction bundles.  Use xmalloc instead of malloc.
1287
1288 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
1289
1290         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
1291         initializers.
1292
1293 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
1294
1295         * crx-opc.c (crx_instruction): Support Co-processor insns.
1296         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
1297         (getregliststring): Change function to use the above enum.
1298         (print_arg): Handle CO-Processor insns.
1299         (crx_cinvs): Add 'b' option to invalidate the branch-target
1300         cache.
1301
1302 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
1303
1304         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
1305         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
1306         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
1307         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
1308         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
1309
1310 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
1311
1312         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
1313         rather than add it.
1314
1315 2004-09-30  Paul Brook  <paul@codesourcery.com>
1316
1317         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
1318         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
1319
1320 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
1321
1322         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
1323         (CONFIG_STATUS_DEPENDENCIES): New.
1324         (Makefile): Removed.
1325         (config.status): Likewise.
1326         * Makefile.in: Regenerated.
1327
1328 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
1329
1330         * Makefile.am: Run "make dep-am".
1331         * Makefile.in: Regenerate.
1332         * aclocal.m4: Regenerate.
1333         * configure: Regenerate.
1334         * po/POTFILES.in: Regenerate.
1335         * po/opcodes.pot: Regenerate.
1336
1337 2004-09-11  Andreas Schwab  <schwab@suse.de>
1338
1339         * configure: Rebuild.
1340
1341 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
1342
1343         * ppc-opc.c (L): Make this field not optional.
1344
1345 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
1346
1347         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
1348         Fix parameter to 'm[t|f]csr' insns.
1349
1350 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
1351
1352         * configure.in: Autoupdate to autoconf 2.59.
1353         * aclocal.m4: Rebuild with aclocal 1.4p6.
1354         * configure: Rebuild with autoconf 2.59.
1355         * Makefile.in: Rebuild with automake 1.4p6 (picking up
1356         bfd changes for autoconf 2.59 on the way).
1357         * config.in: Rebuild with autoheader 2.59.
1358
1359 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
1360
1361         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
1362
1363 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
1364
1365         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
1366         (GRPPADLCK2): New define.
1367         (twobyte_has_modrm): True for 0xA6.
1368         (grps): GRPPADLCK2 for opcode 0xA6.
1369
1370 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
1371
1372         Introduce SH2a support.
1373         * sh-opc.h (arch_sh2a_base): Renumber.
1374         (arch_sh2a_nofpu_base): Remove.
1375         (arch_sh_base_mask): Adjust.
1376         (arch_opann_mask): New.
1377         (arch_sh2a, arch_sh2a_nofpu): Adjust.
1378         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
1379         (sh_table): Adjust whitespace.
1380         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
1381         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
1382         instruction list throughout.
1383         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
1384         of arch_sh2a in instruction list throughout.
1385         (arch_sh2e_up): Accomodate above changes.
1386         (arch_sh2_up): Ditto.
1387         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
1388         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
1389         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
1390         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
1391         * sh-opc.h (arch_sh2a_nofpu): New.
1392         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
1393         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
1394         instruction.
1395         2004-01-20  DJ Delorie  <dj@redhat.com>
1396         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
1397         2003-12-29  DJ Delorie  <dj@redhat.com>
1398         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
1399         sh_opcode_info, sh_table): Add sh2a support.
1400         (arch_op32): New, to tag 32-bit opcodes.
1401         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
1402         2003-12-02  Michael Snyder  <msnyder@redhat.com>
1403         * sh-opc.h (arch_sh2a): Add.
1404         * sh-dis.c (arch_sh2a): Handle.
1405         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
1406
1407 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
1408
1409         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
1410
1411 2004-07-22  Nick Clifton  <nickc@redhat.com>
1412
1413         PR/280
1414         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
1415         insns - this is done by objdump itself.
1416         * h8500-dis.c (print_insn_h8500): Likewise.
1417
1418 2004-07-21  Jan Beulich <jbeulich@novell.com>
1419
1420         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
1421         regardless of address size prefix in effect.
1422         (ptr_reg): Size or address registers does not depend on rex64, but
1423         on the presence of an address size override.
1424         (OP_MMX): Use rex.x only for xmm registers.
1425         (OP_EM): Use rex.z only for xmm registers.
1426
1427 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1428
1429         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
1430         move/branch operations to the bottom so that VR5400 multimedia
1431         instructions take precedence in disassembly.
1432
1433 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
1434
1435         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
1436         ISA-specific "break" encoding.
1437
1438 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
1439
1440         * arm-opc.h: Fix typo in comment.
1441
1442 2004-07-11  Andreas Schwab  <schwab@suse.de>
1443
1444         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
1445
1446 2004-07-09  Andreas Schwab  <schwab@suse.de>
1447
1448         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
1449
1450 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
1451
1452         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
1453         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
1454         (crx-dis.lo): New target.
1455         (crx-opc.lo): Likewise.
1456         * Makefile.in: Regenerate.
1457         * configure.in: Handle bfd_crx_arch.
1458         * configure: Regenerate.
1459         * crx-dis.c: New file.
1460         * crx-opc.c: New file.
1461         * disassemble.c (ARCH_crx): Define.
1462         (disassembler): Handle ARCH_crx.
1463
1464 2004-06-29  James E Wilson  <wilson@specifixinc.com>
1465
1466         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
1467         * ia64-asmtab.c: Regnerate.
1468
1469 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
1470
1471         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
1472         (extract_fxm): Don't test dialect.
1473         (XFXFXM_MASK): Include the power4 bit.
1474         (XFXM): Add p4 param.
1475         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
1476
1477 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
1478
1479         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
1480         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
1481
1482 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
1483
1484         * ppc-opc.c (BH, XLBH_MASK): Define.
1485         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
1486
1487 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
1488
1489         * i386-dis.c (x_mode): Comment.
1490         (two_source_ops): File scope.
1491         (float_mem): Correct fisttpll and fistpll.
1492         (float_mem_mode): New table.
1493         (dofloat): Use it.
1494         (OP_E): Correct intel mode PTR output.
1495         (ptr_reg): Use open_char and close_char.
1496         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
1497         operands.  Set two_source_ops.
1498
1499 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
1500
1501         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
1502         instead of _raw_size.
1503
1504 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
1505
1506         * ia64-gen.c (in_iclass): Handle more postinc st
1507         and ld variants.
1508         * ia64-asmtab.c: Rebuilt.
1509
1510 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
1511
1512         * s390-opc.txt: Correct architecture mask for some opcodes.
1513         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
1514         in the esa mode as well.
1515
1516 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
1517
1518         * sh-dis.c (target_arch): Make unsigned.
1519         (print_insn_sh): Replace (most of) switch with a call to
1520         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
1521         * sh-opc.h: Redefine architecture flags values.
1522         Add sh3-nommu architecture.
1523         Reorganise <arch>_up macros so they make more visual sense.
1524         (SH_MERGE_ARCH_SET): Define new macro.
1525         (SH_VALID_BASE_ARCH_SET): Likewise.
1526         (SH_VALID_MMU_ARCH_SET): Likewise.
1527         (SH_VALID_CO_ARCH_SET): Likewise.
1528         (SH_VALID_ARCH_SET): Likewise.
1529         (SH_MERGE_ARCH_SET_VALID): Likewise.
1530         (SH_ARCH_SET_HAS_FPU): Likewise.
1531         (SH_ARCH_SET_HAS_DSP): Likewise.
1532         (SH_ARCH_UNKNOWN_ARCH): Likewise.
1533         (sh_get_arch_from_bfd_mach): Add prototype.
1534         (sh_get_arch_up_from_bfd_mach): Likewise.
1535         (sh_get_bfd_mach_from_arch_set): Likewise.
1536         (sh_merge_bfd_arc): Likewise.
1537
1538 2004-05-24  Peter Barada  <peter@the-baradas.com>
1539
1540         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
1541         into new match_insn_m68k function.  Loop over canidate
1542         matches and select first that completely matches.
1543         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
1544         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
1545         to verify addressing for MAC/EMAC.
1546         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
1547         reigster halves since 'fpu' and 'spl' look misleading.
1548         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
1549         * m68k-opc.c: Rearragne mac/emac cases to use longest for
1550         first, tighten up match masks.
1551         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
1552         'size' from special case code in print_insn_m68k to
1553         determine decode size of insns.
1554
1555 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
1556
1557         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
1558         well as when -mpower4.
1559
1560 2004-05-13  Nick Clifton  <nickc@redhat.com>
1561
1562         * po/fr.po: Updated French translation.
1563
1564 2004-05-05  Peter Barada  <peter@the-baradas.com>
1565
1566         * m68k-dis.c(print_insn_m68k): Add new chips, use core
1567         variants in arch_mask.  Only set m68881/68851 for 68k chips.
1568         * m68k-op.c: Switch from ColdFire chips to core variants.
1569
1570 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
1571
1572         PR 147.
1573         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
1574
1575 2004-04-29  Ben Elliston  <bje@au.ibm.com>
1576
1577         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
1578         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
1579
1580 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
1581
1582         * sh-dis.c (print_insn_sh): Print the value in constant pool
1583         as a symbol if it looks like a symbol.
1584
1585 2004-04-22  Peter Barada <peter@the-baradas.com>
1586
1587         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
1588         appropriate ColdFire architectures.
1589         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
1590         mask addressing.
1591         Add EMAC instructions, fix MAC instructions. Remove
1592         macmw/macml/msacmw/msacml instructions since mask addressing now
1593         supported.
1594
1595 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
1596
1597         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
1598         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
1599         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
1600         macro.  Adjust all users.
1601
1602 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
1603
1604         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
1605         separately.
1606
1607 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
1608
1609         * m32r-asm.c: Regenerate.
1610
1611 2004-03-29  Stan Shebs  <shebs@apple.com>
1612
1613         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
1614         used.
1615
1616 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
1617
1618         * aclocal.m4: Regenerate.
1619         * config.in: Regenerate.
1620         * configure: Regenerate.
1621         * po/POTFILES.in: Regenerate.
1622         * po/opcodes.pot: Regenerate.
1623
1624 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
1625
1626         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
1627         PPC_OPERANDS_GPR_0.
1628         * ppc-opc.c (RA0): Define.
1629         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
1630         (RAOPT): Rename from RAO.  Update all uses.
1631         (powerpc_opcodes): Use RA0 as appropriate.
1632
1633 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
1634
1635         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
1636
1637 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
1638
1639         * sparc-dis.c (print_insn_sparc): Update getword prototype.
1640
1641 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1642
1643         * i386-dis.c (GRPPLOCK): Delete.
1644         (grps): Delete GRPPLOCK entry.
1645
1646 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1647
1648         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
1649         (M, Mp): Use OP_M.
1650         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
1651         (GRPPADLCK): Define.
1652         (dis386): Use NOP_Fixup on "nop".
1653         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
1654         (twobyte_has_modrm): Set for 0xa7.
1655         (padlock_table): Delete.  Move to..
1656         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
1657         and clflush.
1658         (print_insn): Revert PADLOCK_SPECIAL code.
1659         (OP_E): Delete sfence, lfence, mfence checks.
1660
1661 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
1662
1663         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
1664         (INVLPG_Fixup): New function.
1665         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
1666
1667 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
1668
1669         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
1670         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
1671         (padlock_table): New struct with PadLock instructions.
1672         (print_insn): Handle PADLOCK_SPECIAL.
1673
1674 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
1675
1676         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
1677         (OP_E): Twiddle clflush to sfence here.
1678
1679 2004-03-08  Nick Clifton  <nickc@redhat.com>
1680
1681         * po/de.po: Updated German translation.
1682
1683 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
1684
1685         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
1686         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
1687         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
1688         accordingly.
1689
1690 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1691
1692         * frv-asm.c: Regenerate.
1693         * frv-desc.c: Regenerate.
1694         * frv-desc.h: Regenerate.
1695         * frv-dis.c: Regenerate.
1696         * frv-ibld.c: Regenerate.
1697         * frv-opc.c: Regenerate.
1698         * frv-opc.h: Regenerate.
1699
1700 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1701
1702         * frv-desc.c, frv-opc.c: Regenerate.
1703
1704 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
1705
1706         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
1707
1708 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
1709
1710         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
1711         Also correct mistake in the comment.
1712
1713 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
1714
1715         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
1716         ensure that double registers have even numbers.
1717         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
1718         that reserved instruction 0xfffd does not decode the same
1719         as 0xfdfd (ftrv).
1720         * sh-opc.h: Add REG_N_D nibble type and use it whereever
1721         REG_N refers to a double register.
1722         Add REG_N_B01 nibble type and use it instead of REG_NM
1723         in ftrv.
1724         Adjust the bit patterns in a few comments.
1725
1726 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
1727
1728         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
1729
1730 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1731
1732         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
1733
1734 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1735
1736         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
1737
1738 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
1739
1740         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
1741         mtivor32, mtivor33, mtivor34.
1742
1743 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
1744
1745         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
1746
1747 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
1748
1749         * arm-opc.h Maverick accumulator register opcode fixes.
1750
1751 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
1752
1753         * m32r-dis.c: Regenerate.
1754
1755 2004-01-27  Michael Snyder  <msnyder@redhat.com>
1756
1757         * sh-opc.h (sh_table): "fsrra", not "fssra".
1758
1759 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
1760
1761         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
1762         contraints.
1763
1764 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1765
1766         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1767
1768 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1769
1770         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1771         1.  Don't print scale factor on AT&T mode when index missing.
1772
1773 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1774
1775         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1776         when loaded into XR registers.
1777
1778 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1779
1780         * frv-desc.h: Regenerate.
1781         * frv-desc.c: Regenerate.
1782         * frv-opc.c: Regenerate.
1783
1784 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1785
1786         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1787
1788 2004-01-09  Paul Brook  <paul@codesourcery.com>
1789
1790         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1791         specific opcodes.
1792
1793 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1794
1795         * Makefile.am (libopcodes_la_DEPENDENCIES)
1796         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1797         comment about the problem.
1798         * Makefile.in: Regenerate.
1799
1800 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1801
1802         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1803         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1804         cut&paste errors in shifting/truncating numerical operands.
1805         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1806         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1807         (parse_uslo16): Likewise.
1808         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1809         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1810         (parse_s12): Likewise.
1811         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1812         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1813         (parse_uslo16): Likewise.
1814         (parse_uhi16): Parse gothi and gotfuncdeschi.
1815         (parse_d12): Parse got12 and gotfuncdesc12.
1816         (parse_s12): Likewise.
1817
1818 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1819
1820         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1821         instruction which looks similar to an 'rla' instruction.
1822
1823 For older changes see ChangeLog-0203
1824 \f
1825 Local Variables:
1826 mode: change-log
1827 left-margin: 8
1828 fill-column: 74
1829 version-control: never
1830 End: