opcodes/ChangeLog

   1 2008-12-04  Ben Elliston  <bje@au.ibm.com>
   2
   3         * ppc-dis.c (powerpc_init_dialect): Do not set PPC_OPCODE_BOOKE
   4         for -Mbooke.
   5         (print_ppc_disassembler_options): Update usage.
   6         * ppc-opc.c (DE, DES, DEO, DE_MASK): Remove.
   7         (BOOKE64): Remove.
   8         (PPCCHLK64): Likewise.
   9         (powerpc_opcodes): Remove all BOOKE64 instructions.
  10
  11 2008-11-28  Joshua Kinard  <kumba@gentoo.org>
  12
  13         * mips-dis.c (mips_arch_choices): Add r14000, r16000.
  14
  15 2008-11-27  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
  16
  17         * cr16-dis.c (match_opcode): Truncate mcode to 32 bit and
  18         adjusted the mask for 32-bit branch instruction.
  19
  20 2008-11-27  Alan Modra  <amodra@bigpond.net.au>
  21
  22         * ppc-opc.c (extract_sprg): Correct operand range check.
  23
  24 2008-11-26  Andreas Schwab  <schwab@suse.de>
  25
  26         * m68k-dis.c (NEXTBYTE, NEXTWORD, NEXTLONG, NEXTULONG, NEXTSINGLE)
  27         (NEXTDOUBLE, NEXTEXTEND, NEXTPACKED): Fix error handling.
  28         (save_printer, save_print_address): Remove.
  29         (fetch_data): Don't use them.
  30         (match_insn_m68k): Always restore printing functions.
  31         (print_insn_m68k): Don't save/restore printing functions.
  32
  33 2008-11-25  Nick Clifton  <nickc@redhat.com>
  34
  35         * m68k-dis.c: Rewrite to remove use of setjmp/longjmp.
  36
  37 2008-11-18  Catherine Moore  <clm@codesourcery.com>
  38
  39         * arm-dis.c (coprocessor_opcodes): Add half-precision vcvt
  40         instructions.
  41         (neon_opcodes): Likewise.
  42         (print_insn_coprocessor): Print 't' or 'b' for vcvt
  43         instructions.
  44
  45 2008-11-14  Tristan Gingold  <gingold@adacore.com>
  46
  47         * makefile.vms (OBJS): Update list of objects.
  48         (DEFS): Update
  49         (CFLAGS): Update.
  50
  51 2008-11-06  Chao-ying Fu  <fu@mips.com>
  52
  53         * mips-opc.c (synciobdma, syncs, syncw, syncws): Move these
  54         before sync.
  55         (sync): New instruction with 5-bit sync type.
  56         * mips-dis.c (print_insn_args): Add case '1' to print 5-bit values.
  57
  58 2008-11-06  Nick Clifton  <nickc@redhat.com>
  59
  60         * avr-dis.c: Replace uses of sprintf without a format string with
  61         calls to strcpy.
  62
  63 2008-11-03  H.J. Lu  <hongjiu.lu@intel.com>
  64
  65         * i386-opc.tbl: Add cmovpe and cmovpo.
  66         * i386-tbl.h: Regenerated.
  67
  68 2008-10-22  Nick Clifton  <nickc@redhat.com>
  69
  70         PR 6937
  71         * configure.in (SHARED_LIBADD): Revert previous change.
  72         Add a comment explaining why.
  73         (SHARED_DEPENDENCIES): Revert previous change.
  74         * configure: Regenerate.
  75
  76 2008-10-10  Nick Clifton  <nickc@redhat.com>
  77
  78         PR 6937
  79         * configure.in (SHARED_LIBADD): Add libiberty.a.
  80         (SHARED_DEPENDENCIES): Add libiberty.a.
  81
  82 2008-09-30  H.J. Lu  <hongjiu.lu@intel.com>
  83
  84         * i386-gen.c: Include "hashtab.h".
  85         (next_field): Take a new argument, last.  Check last.
  86         (process_i386_cpu_flag): Updated.
  87         (process_i386_opcode_modifier): Likewise.
  88         (process_i386_operand_type): Likewise.
  89         (process_i386_registers): Likewise.
  90         (output_i386_opcode): New.
  91         (opcode_hash_entry): Likewise.
  92         (opcode_hash_table): Likewise.
  93         (opcode_hash_hash): Likewise.
  94         (opcode_hash_eq): Likewise.
  95         (process_i386_opcodes): Use opcode hash table and opcode array.
  96
  97 2008-09-30  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
  98
  99         * s390-opc.txt (stdy, stey): Fix description
 100
 101 2008-09-30  Alan Modra  <amodra@bigpond.net.au>
 102
 103         * Makefile.am: Run "make dep-am".
 104         * Makefile.in: Regenerate.
 105
 106 2008-09-29  H.J. Lu  <hongjiu.lu@intel.com>
 107
 108         * aclocal.m4: Regenerated.
 109         * configure: Likewise.
 110         * Makefile.in: Likewise.
 111
 112 2008-09-29  Nick Clifton  <nickc@redhat.com>
 113
 114         * po/vi.po: Updated Vietnamese translation.
 115         * po/fr.po: Updated French translation.
 116
 117 2008-09-26  Florian Krohm  <fkrohm@us.ibm.com>
 118
 119         * s390-opc.txt (thder, thdr): Change RRE_RR to RRE_FF.
 120         (cfxr, cfdr, cfer, clclu): Add esa flag.
 121         (sqd): Instruction added.
 122         (qadtr, qaxtr): Change RRF_FFFU to RRF_FUFF.
 123         * s390-opc.c: (INSTR_RRF_FFFU, MASK_RRF_FFFU): Removed.
 124
 125 2008-09-14  Arnold Metselaar  <arnold.metselaar@planet.nl>
 126
 127         * z80-dis.c (prt_rr_nn): Fix register pair for two byte opcodes.
 128         (tab_elt opc_ed): Add "ld r,a" and "ld r,a" instructions.
 129
 130 2008-09-11  H.J. Lu  <hongjiu.lu@intel.com>
 131
 132         * i386-opc.tbl: Fix memory operand size for cmpXXXs[sd].
 133         * i386-tbl.h: Regenerated.
 134
 135 2008-08-28  Jan Beulich  <jbeulich@novell.com>
 136
 137         * i386-dis.c (dis386): Adjust far return mnemonics.
 138         * i386-opc.tbl: Add retf.
 139         * i386-tbl.h: Re-generate.
 140
 141 2008-08-28  Jan Beulich  <jbeulich@novell.com>
 142
 143         * i386-dis.c (dis386_twobyte): Adjust cmovXX mnemonics.
 144
 145 2008-08-28  H.J. Lu  <hongjiu.lu@intel.com>
 146
 147         * ia64-dis.c (print_insn_ia64): Handle cr.iib0 and cr.iib1.
 148         * ia64-gen.c (lookup_specifier): Likewise.
 149
 150         * ia64-ic.tbl: Add support for cr.iib0 and cr.iib1.
 151         * ia64-raw.tbl: Likewise.
 152         * ia64-waw.tbl: Likewise.
 153         * ia64-asmtab.c: Regenerated.
 154
 155 2008-08-27  H.J. Lu  <hongjiu.lu@intel.com>
 156
 157         * i386-opc.tbl: Correct fidivr operand size.
 158
 159         * i386-tbl.h: Regenerated.
 160
 161 2008-08-24  Alan Modra  <amodra@bigpond.net.au>
 162
 163         * configure.in: Update a number of obsolete autoconf macros.
 164         * aclocal.m4: Regenerate.
 165
 166 2008-08-20  H.J. Lu  <hongjiu.lu@intel.com>
 167
 168         AVX Programming Reference (August, 2008)
 169         * i386-dis.c (PREFIX_VEX_38DB): New.
 170         (PREFIX_VEX_38DC): Likewise.
 171         (PREFIX_VEX_38DD): Likewise.
 172         (PREFIX_VEX_38DE): Likewise.
 173         (PREFIX_VEX_38DF): Likewise.
 174         (PREFIX_VEX_3ADF): Likewise.
 175         (VEX_LEN_38DB_P_2): Likewise.
 176         (VEX_LEN_38DC_P_2): Likewise.
 177         (VEX_LEN_38DD_P_2): Likewise.
 178         (VEX_LEN_38DE_P_2): Likewise.
 179         (VEX_LEN_38DF_P_2): Likewise.
 180         (VEX_LEN_3ADF_P_2): Likewise.
 181         (PREFIX_VEX_3A04): Updated.
 182         (VEX_LEN_3A06_P_2): Likewise.
 183         (prefix_table): Add PREFIX_VEX_38DB, PREFIX_VEX_38DC,
 184         PREFIX_VEX_38DD, PREFIX_VEX_38DE and PREFIX_VEX_3ADF.
 185         (x86_64_table): Likewise.
 186         (vex_len_table): Add VEX_LEN_38DB_P_2, VEX_LEN_38DC_P_2,
 187         VEX_LEN_38DD_P_2, VEX_LEN_38DE_P_2, VEX_LEN_38DF_P_2 and
 188         VEX_LEN_3ADF_P_2.
 189
 190         * i386-opc.tbl: Add AES + AVX instructions.
 191         * i386-init.h: Regenerated.
 192         * i386-tbl.h: Likewise.
 193
 194 2008-08-15  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
 195
 196         * s390-opc.c (INSTR_RRF_FFRU, MASK_RRF_FFRU): New instruction format.
 197         * s390-opc.txt (lxr, rrdtr, rrxtr): Fix instruction format.
 198
 199 2008-08-15  Alan Modra  <amodra@bigpond.net.au>
 200
 201         PR 6526
 202         * configure.in: Invoke AC_USE_SYSTEM_EXTENSIONS.
 203         * Makefile.in: Regenerate.
 204         * aclocal.m4: Regenerate.
 205         * config.in: Regenerate.
 206         * configure: Regenerate.
 207
 208 2008-08-14  Sebastian Huber  <sebastian.huber@embedded-brains.de>
 209
 210         PR 6825
 211         * ppc-opc.c (powerpc_opcodes): Enable rfci, mfpmr, mtpmr for e300.
 212
 213 2008-08-12  H.J. Lu  <hongjiu.lu@intel.com>
 214
 215         * i386-opc.tbl: Add syscall and sysret for Cpu64.
 216
 217         * i386-tbl.h: Regenerated.
 218
 219 2008-08-04  Alan Modra  <amodra@bigpond.net.au>
 220
 221         * Makefile.am (POTFILES.in): Set LC_ALL=C.
 222         * Makefile.in: Regenerate.
 223         * po/POTFILES.in: Regenerate.
 224
 225 2008-08-01  Peter Bergner  <bergner@vnet.ibm.com>
 226
 227         * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options.
 228         (print_insn_powerpc): Prepend 'vs' when printing VSX registers.
 229         (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx.
 230         * ppc-opc.c (insert_xt6): New static function.
 231         (extract_xt6): Likewise.
 232         (insert_xa6): Likewise.
 233         (extract_xa6: Likewise.
 234         (insert_xb6): Likewise.
 235         (extract_xb6): Likewise.
 236         (insert_xb6s): Likewise.
 237         (extract_xb6s): Likewise.
 238         (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK,
 239         XX3DM_MASK, PPCVSX): New.
 240         (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x",
 241         "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
 242
 243 2008-08-01  Pedro Alves  <pedro@codesourcery.com>
 244
 245         * Makefile.am ($(srcdir)/ia64-asmtab.c): Remove line continuation.
 246         * Makefile.in: Regenerate.
 247
 248 2008-08-01  H.J. Lu  <hongjiu.lu@intel.com>
 249
 250         * i386-reg.tbl: Use Dw2Inval on AVX registers.
 251         * i386-tbl.h: Regenerated.
 252
 253 2008-07-30  Michael J. Eager  <eager@eagercon.com>
 254
 255         * ppc-dis.c (print_insn_powerpc): Disassemble FSL/FCR/UDI fields.
 256         * ppc-opc.c (powerpc_operands): Add Xilinx APU related operands.
 257         (insert_sprg, PPC405): Use PPC_OPCODE_405.
 258         (powerpc_opcodes): Add Xilinx APU related opcodes.
 259
 260 2008-07-30  Alan Modra  <amodra@bigpond.net.au>
 261
 262         * bfin-dis.c, cris-dis.c, i386-dis.c, or32-opc.c: Silence gcc warnings.
 263
 264 2008-07-10  Richard Sandiford  <rdsandiford@googlemail.com>
 265
 266         * mips-dis.c (_print_insn_mips): Use ELF_ST_IS_MIPS16.
 267
 268 2008-07-07  Adam Nemet  <anemet@caviumnetworks.com>
 269
 270         * mips-opc.c (CP): New macro.
 271         (mips_builtin_opcodes): Mark c0, c2 and c3 as CP.  Add Octeon to the
 272         membership of di, dmfc0, dmtc0, ei, mfc0 and mtc0.  Add dmfc2 and
 273         dmtc2 Octeon instructions.
 274
 275 2008-07-07  Stan Shebs  <stan@codesourcery.com>
 276
 277         * dis-init.c (init_disassemble_info): Init endian_code field.
 278         * arm-dis.c (print_insn): Disassemble code according to
 279         setting of endian_code.
 280         (print_insn_big_arm): Detect when BE8 extension flag has been set.
 281
 282 2008-06-30  Richard Sandiford  <rdsandiford@googlemail.com>
 283
 284         * mips-dis.c (_print_insn_mips): Use bfd_asymbol_flavour to check
 285         for ELF symbols.
 286
 287 2008-06-25  Peter Bergner  <bergner@vnet.ibm.com>
 288
 289         * ppc-dis.c (powerpc_init_dialect): Handle -M464.
 290         (print_ppc_disassembler_options): Likewise.
 291         * ppc-opc.c (PPC464): Define.
 292         (powerpc_opcodes): Add mfdcrux and mtdcrux.
 293
 294 2008-06-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 295
 296         * configure: Regenerate.
 297
 298 2008-06-13  Peter Bergner  <bergner@vnet.ibm.com>
 299
 300         * ppc-dis.c (print_insn_powerpc): Update prototye to use new
 301         ppc_cpu_t typedef.
 302         (struct dis_private): New.
 303         (POWERPC_DIALECT): New define.
 304         (powerpc_dialect): Renamed to...
 305         (powerpc_init_dialect): This.  Update to use ppc_cpu_t and
 306         struct dis_private.
 307         (print_insn_big_powerpc): Update for using structure in
 308         info->private_data.
 309         (print_insn_little_powerpc): Likewise.
 310         (operand_value_powerpc): Change type of dialect param to ppc_cpu_t.
 311         (skip_optional_operands): Likewise.
 312         (print_insn_powerpc): Likewise.  Remove initialization of dialect.
 313         * ppc-opc.c (extract_bat, extract_bba, extract_bdm, extract_bdp,
 314         extract_bo, extract_boe, extract_fxm, extract_mb6, extract_mbe,
 315         extract_nb, extract_nsi, extract_rbs, extract_sh6, extract_spr,
 316         extract_sprg, extract_tbr insert_bat, insert_bba, insert_bdm,
 317         insert_bdp, insert_bo, insert_boe, insert_fxm, insert_mb6, insert_mbe,
 318         insert_nsi, insert_ral, insert_ram, insert_raq, insert_ras, insert_rbs,
 319         insert_sh6, insert_spr, insert_sprg, insert_tbr): Change the dialect
 320         param to be of type ppc_cpu_t.  Update prototype.
 321
 322 2008-06-12  Adam Nemet  <anemet@caviumnetworks.com>
 323
 324         * mips-dis.c (print_insn_args): Handle field descriptors +x, +p,
 325         +s, +S.
 326         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions
 327         baddu, bbit*, cins*, dmul, pop, dpop, exts*, mtm*, mtp*, syncs,
 328         syncw, syncws, vm3mulu, vm0 and vmulu.
 329
 330         * mips-dis.c (print_insn_args): Handle field descriptor +Q.
 331         * mips-opc.c (mips_builtin_opcodes): Add Octeon instructions seq,
 332         seqi, sne and snei.
 333
 334 2008-05-30  H.J. Lu  <hongjiu.lu@intel.com>
 335
 336         * i386-opc.tbl: Add vmovd with 64bit operand.
 337         * i386-tbl.h: Regenerated.
 338
 339 2008-05-27  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 340
 341         * s390-opc.c (INSTR_RRF_R0RR): Fix RRF_R0RR operand format.
 342
 343 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 344
 345         * i386-opc.tbl: Add NoAVX to cvtpd2pi, cvtpi2pd and cvttpd2pi.
 346         * i386-tbl.h: Regenerated.
 347
 348 2008-05-22  H.J. Lu  <hongjiu.lu@intel.com>
 349
 350         PR gas/6517
 351         * i386-opc.tbl: Break cvtsi2ss/cvtsi2sd/vcvtsi2sd/vcvtsi2ss
 352         into 32bit and 64bit.  Remove Reg64|Qword and add
 353         IgnoreSize|No_qSuf on 32bit version.
 354         * i386-tbl.h: Regenerated.
 355
 356 2008-05-21  H.J. Lu  <hongjiu.lu@intel.com>
 357
 358         * i386-opc.tbl: Add NoAVX to movdq2q and movq2dq.
 359         * i386-tbl.h: Regenerated.
 360
 361 2008-05-21  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 362
 363         * cr16-dis.c (build_mask): Adjust the mask for 32-bit bcond.
 364
 365 2008-05-14  Alan Modra  <amodra@bigpond.net.au>
 366
 367         * Makefile.am: Run "make dep-am".
 368         * Makefile.in: Regenerate.
 369
 370 2008-05-02  H.J. Lu  <hongjiu.lu@intel.com>
 371
 372         * i386-dis.c (MOVBE_Fixup): New.
 373         (Mo): Likewise.
 374         (PREFIX_0F3880): Likewise.
 375         (PREFIX_0F3881): Likewise.
 376         (PREFIX_0F38F0): Updated.
 377         (prefix_table): Add PREFIX_0F3880 and PREFIX_0F3881.  Update
 378         PREFIX_0F38F0 and PREFIX_0F38F1 for movbe.
 379         (three_byte_table): Use PREFIX_0F3880 and PREFIX_0F3881.
 380
 381         * i386-gen.c (cpu_flag_init): Add CPU_MOVBE_FLAGS and
 382         CPU_EPT_FLAGS.
 383         (cpu_flags): Add CpuMovbe and CpuEPT.
 384
 385         * i386-opc.h (CpuMovbe): New.
 386         (CpuEPT): Likewise.
 387         (CpuLM): Updated.
 388         (i386_cpu_flags): Add cpumovbe and cpuept.
 389
 390         * i386-opc.tbl: Add entries for movbe and EPT instructions.
 391         * i386-init.h: Regenerated.
 392         * i386-tbl.h: Likewise.
 393
 394 2008-04-29  Adam Nemet  <anemet@caviumnetworks.com>
 395
 396         * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for
 397         the two drem and the two dremu macros.
 398
 399 2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
 400
 401         * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1
 402         instructions FP_S.  Mark l.s, li.s, lwc1, swc1, s.s, trunc.w.s and
 403         cop1 macros INSN2_M_FP_S.  Mark l.d, li.d, ldc1 and sdc1 macros
 404         INSN2_M_FP_D.  Mark trunc.w.d macro INSN2_M_FP_S and INSN2_M_FP_D.
 405
 406 2008-04-25  David S. Miller  <davem@davemloft.net>
 407
 408         * sparc-dis.c: Emit %stick instead of %sys_tick, and %stick_cmpr
 409         instead of %sys_tick_cmpr, as suggested in architecture manuals.
 410
 411 2008-04-23  Paolo Bonzini  <bonzini@gnu.org>
 412
 413         * aclocal.m4: Regenerate.
 414         * configure: Regenerate.
 415
 416 2008-04-23  David S. Miller  <davem@davemloft.net>
 417
 418         * sparc-opc.c (asi_table): Add UltraSPARC and Niagara
 419         extended values.
 420         (prefetch_table): Add missing values.
 421
 422 2008-04-22  H.J. Lu  <hongjiu.lu@intel.com>
 423
 424         * i386-gen.c (opcode_modifiers): Add NoAVX.
 425
 426         * i386-opc.h (NoAVX): New.
 427         (OldGcc): Updated.
 428         (i386_opcode_modifier): Add noavx.
 429
 430         * i386-opc.tbl: Add NoAVX to SSE, SSE2, SSE3 and SSSE3
 431         instructions which don't have AVX equivalent.
 432         * i386-tbl.h: Regenerated.
 433
 434 2008-04-18  H.J. Lu  <hongjiu.lu@intel.com>
 435
 436         * i386-dis.c (OP_VEX_FMA): New.
 437         (OP_EX_VexImmW): Likewise.
 438         (VexFMA): Likewise.
 439         (Vex128FMA): Likewise.
 440         (EXVexImmW): Likewise.
 441         (get_vex_imm8): Likewise.
 442         (OP_EX_VexReg): Likewise.
 443         (vex_i4_done): Renamed to ...
 444         (vex_w_done): This.
 445         (prefix_table): Replace EXVexW with EXVexImmW on vpermil2ps
 446         and vpermil2pd.  Replace Vex/Vex128 with VexFMA/Vex128FMA on
 447         FMA instructions.
 448         (print_insn): Updated.
 449         (OP_EX_VexW): Rewrite to swap register in VEX with EX.
 450         (OP_REG_VexI4): Check invalid high registers.
 451
 452 2008-04-16  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 453             Michael Meissner  <michael.meissner@amd.com>
 454
 455         * i386-opc.tbl: Fix protX to allow memory in the middle operand.
 456         * i386-tbl.h: Regenerate from i386-opc.tbl.
 457
 458 2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
 459
 460         * ppc-dis.c (powerpc_dialect): Handle "e500mc".  Extend "e500" to
 461         accept Power E500MC instructions.
 462         (print_ppc_disassembler_options): Document -Me500mc.
 463         * ppc-opc.c (DUIS, DUI, T): New.
 464         (XRT, XRTRA): Likewise.
 465         (E500MC): Likewise.
 466         (powerpc_opcodes): Add new Power E500MC instructions.
 467
 468 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 469
 470         * s390-dis.c (init_disasm): Evaluate disassembler_options.
 471         (print_s390_disassembler_options): New function.
 472         * disassemble.c (disassembler_usage): Invoke
 473         print_s390_disassembler_options.
 474
 475 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 476
 477         * s390-mkopc.c (insertExpandedMnemonic): Expand string sizes
 478         of local variables used for mnemonic parsing: prefix, suffix and
 479         number.
 480
 481 2008-04-10  Andreas Krebbel  <krebbel1@de.ibm.com>
 482
 483         * s390-mkopc.c (s390_cond_ext_format): Add back the mnemonic
 484         extensions for conditional jumps (o, p, m, nz, z, nm, np, no).
 485         (s390_crb_extensions): New extensions table.
 486         (insertExpandedMnemonic): Handle '$' tag.
 487         * s390-opc.txt: Remove conditional jump variants which can now
 488         be expanded automatically.
 489         Replace '*' tag with '$' in the compare and branch instructions.
 490
 491 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 492
 493         * i386-dis.c (PREFIX_VEX_38XX): Add a tab.
 494         (PREFIX_VEX_3AXX): Likewis.
 495
 496 2008-04-07  H.J. Lu  <hongjiu.lu@intel.com>
 497
 498         * i386-opc.tbl: Remove 4 extra blank lines.
 499
 500 2008-04-04  H.J. Lu  <hongjiu.lu@intel.com>
 501
 502         * i386-gen.c (cpu_flag_init): Replace CPU_CLMUL_FLAGS/CpuCLMUL
 503         with CPU_PCLMUL_FLAGS/CpuPCLMUL.
 504         (cpu_flags): Replace CpuCLMUL with CpuPCLMUL.
 505         * i386-opc.tbl: Likewise.
 506
 507         * i386-opc.h (CpuCLMUL): Renamed to ...
 508         (CpuPCLMUL): This.
 509         (CpuFMA): Updated.
 510         (i386_cpu_flags): Replace cpuclmul with cpupclmul.
 511
 512         * i386-init.h: Regenerated.
 513
 514 2008-04-03  H.J. Lu  <hongjiu.lu@intel.com>
 515
 516         * i386-dis.c (OP_E_register): New.
 517         (OP_E_memory): Likewise.
 518         (OP_VEX): Likewise.
 519         (OP_EX_Vex): Likewise.
 520         (OP_EX_VexW): Likewise.
 521         (OP_XMM_Vex): Likewise.
 522         (OP_XMM_VexW): Likewise.
 523         (OP_REG_VexI4): Likewise.
 524         (PCLMUL_Fixup): Likewise.
 525         (VEXI4_Fixup): Likewise.
 526         (VZERO_Fixup): Likewise.
 527         (VCMP_Fixup): Likewise.
 528         (VPERMIL2_Fixup): Likewise.
 529         (rex_original): Likewise.
 530         (rex_ignored): Likewise.
 531         (Mxmm): Likewise.
 532         (XMM): Likewise.
 533         (EXxmm): Likewise.
 534         (EXxmmq): Likewise.
 535         (EXymmq): Likewise.
 536         (Vex): Likewise.
 537         (Vex128): Likewise.
 538         (Vex256): Likewise.
 539         (VexI4): Likewise.
 540         (EXdVex): Likewise.
 541         (EXqVex): Likewise.
 542         (EXVexW): Likewise.
 543         (EXdVexW): Likewise.
 544         (EXqVexW): Likewise.
 545         (XMVex): Likewise.
 546         (XMVexW): Likewise.
 547         (XMVexI4): Likewise.
 548         (PCLMUL): Likewise.
 549         (VZERO): Likewise.
 550         (VCMP): Likewise.
 551         (VPERMIL2): Likewise.
 552         (xmm_mode): Likewise.
 553         (xmmq_mode): Likewise.
 554         (ymmq_mode): Likewise.
 555         (vex_mode): Likewise.
 556         (vex128_mode): Likewise.
 557         (vex256_mode): Likewise.
 558         (USE_VEX_C4_TABLE): Likewise.
 559         (USE_VEX_C5_TABLE): Likewise.
 560         (USE_VEX_LEN_TABLE): Likewise.
 561         (VEX_C4_TABLE): Likewise.
 562         (VEX_C5_TABLE): Likewise.
 563         (VEX_LEN_TABLE): Likewise.
 564         (REG_VEX_XX): Likewise.
 565         (MOD_VEX_XXX): Likewise.
 566         (PREFIX_0F38DB..PREFIX_0F38DF): Likewise.
 567         (PREFIX_0F3A44): Likewise.
 568         (PREFIX_0F3ADF): Likewise.
 569         (PREFIX_VEX_XXX): Likewise.
 570         (VEX_OF): Likewise.
 571         (VEX_OF38): Likewise.
 572         (VEX_OF3A): Likewise.
 573         (VEX_LEN_XXX): Likewise.
 574         (vex): Likewise.
 575         (need_vex): Likewise.
 576         (need_vex_reg): Likewise.
 577         (vex_i4_done): Likewise.
 578         (vex_table): Likewise.
 579         (vex_len_table): Likewise.
 580         (OP_REG_VexI4): Likewise.
 581         (vex_cmp_op): Likewise.
 582         (pclmul_op): Likewise.
 583         (vpermil2_op): Likewise.
 584         (m_mode): Updated.
 585         (es_reg): Likewise.
 586         (PREFIX_0F38F0): Likewise.
 587         (PREFIX_0F3A60): Likewise.
 588         (reg_table): Add REG_VEX_71...REG_VEX_73 and REG_VEX_AE.
 589         (prefix_table): Add PREFIX_0F38DB..PREFIX_0F38DF, PREFIX_0F3ADF
 590         and PREFIX_VEX_XXX entries.
 591         (x86_64_table): Use VEX_C4_TABLE and VEX_C5_TABLE.
 592         (three_byte_table): Use PREFIX_0F38DB..PREFIX_0F38DF and
 593         PREFIX_0F3ADF.
 594         (mod_table): Use VEX_C4_TABLE, VEX_C5_TABLE and VEX_LEN_TABLE.
 595         Add MOD_VEX_XXX entries.
 596         (ckprefix): Initialize rex_original and rex_ignored.  Store the
 597         REX byte in rex_original.
 598         (get_valid_dis386): Handle the implicit prefix in VEX prefix
 599         bytes and USE_VEX_LEN_TABLE/USE_VEX_C4_TABLE/USE_VEX_C5_TABLE.
 600         (print_insn): Set need_vex/need_vex_reg/vex_i4_done to 0 before
 601         calling get_valid_dis386.  Use rex_original and rex_ignored when
 602         printing out REX.
 603         (putop): Handle "XY".
 604         (intel_operand_size): Handle VEX, xmm_mode, xmmq_mode and
 605         ymmq_mode.
 606         (OP_E_extended): Updated to use OP_E_register and
 607         OP_E_memory.
 608         (OP_XMM): Handle VEX.
 609         (OP_EX): Likewise.
 610         (XMM_Fixup): Likewise.
 611         (CMP_Fixup): Use ARRAY_SIZE.
 612
 613         * i386-gen.c (cpu_flag_init): Add CpuAES, CPU_CLMUL_FLAGS,
 614         CPU_FMA_FLAGS and CPU_AVX_FLAGS.
 615         (operand_type_init): Add OPERAND_TYPE_REGYMM and
 616         OPERAND_TYPE_VEX_IMM4.
 617         (cpu_flags): Add CpuAVX, CpuAES, CpuCLMUL and CpuFMA.
 618         (opcode_modifiers): Add Implicit1stXmm0, Vex, Vex256, VexNDD,
 619         VexNDS, VexW0, VexW1, Vex0F, Vex0F38, Vex0F3A, Vex3Sources,
 620         VexImmExt and SSE2AVX.
 621         (operand_types): Add RegYMM, Ymmword and Vex_Imm4.
 622
 623         * i386-opc.h (CpuAVX): New.
 624         (CpuAES): Likewise.
 625         (CpuCLMUL): Likewise.
 626         (CpuFMA): Likewise.
 627         (Vex): Likewise.
 628         (Vex256): Likewise.
 629         (VexNDS): Likewise.
 630         (VexNDD): Likewise.
 631         (VexW0): Likewise.
 632         (VexW1): Likewise.
 633         (Vex0F): Likewise.
 634         (Vex0F38): Likewise.
 635         (Vex0F3A): Likewise.
 636         (Vex3Sources): Likewise.
 637         (VexImmExt): Likewise.
 638         (SSE2AVX): Likewise.
 639         (RegYMM): Likewise.
 640         (Ymmword): Likewise.
 641         (Vex_Imm4): Likewise.
 642         (Implicit1stXmm0): Likewise.
 643         (CpuXsave): Updated.
 644         (CpuLM): Likewise.
 645         (ByteOkIntel): Likewise.
 646         (OldGcc): Likewise.
 647         (Control): Likewise.
 648         (Unspecified): Likewise.
 649         (OTMax): Likewise.
 650         (i386_cpu_flags): Add cpuavx, cpuaes, cpuclmul and cpufma.
 651         (i386_opcode_modifier): Add implicit1stxmm0, vex, vex256,
 652         vexnds, vexndd, vexw0, vexw1, vex0f, vex0f38, vex0f3a,
 653         vex3sources, veximmext and sse2avx.
 654         (i386_operand_type): Add regymm, ymmword and vex_imm4.
 655
 656         * i386-opc.tbl: Add AES, CLMUL, AVX and FMA new instructions.
 657
 658         * i386-reg.tbl: Add AVX registers, ymm0..ymm15.
 659
 660         * i386-init.h: Regenerated.
 661         * i386-tbl.h: Likewise.
 662
 663 2008-03-26  Bernd Schmidt  <bernd.schmidt@analog.com>
 664
 665         From  Robin Getz  <robin.getz@analog.com>
 666         * bfin-dis.c (bu32): Typedef.
 667         (enum const_forms_t): Add c_uimm32 and c_huimm32.
 668         (constant_formats[]): Add uimm32 and huimm16.
 669         (fmtconst_val): New.
 670         (uimm32): Define.
 671         (huimm32): Define.
 672         (imm16_val): Define.
 673         (luimm16_val): Define.
 674         (struct saved_state): Define.
 675         (GREG, DPREG, DREG, PREG, SPREG, FPREG, IREG, MREG, BREG, LREG,
 676         A0XREG, A0WREG, A1XREG, A1WREG,CCREG, LC0REG, LT0REG, LB0REG,
 677         LC1REG, LT1REG, LB1REG, RETSREG, PCREG): Define.
 678         (get_allreg): New.
 679         (decode_LDIMMhalf_0): Print out the whole register value.
 680
 681         From Jie Zhang  <jie.zhang@analog.com>
 682         * bfin-dis.c (decode_dsp32mac_0): Decode (IU) option for
 683         multiply and multiply-accumulate to data register instruction.
 684
 685         * bfin-dis.c: (c_uimm4s4d, c_imm5d, c_imm7d, c_imm16d, c_uimm16s4d,
 686         c_imm32, c_huimm32e): Define.
 687         (constant_formats): Add flags for printing decimal, leading spaces, and
 688         exact symbols.
 689         (comment, parallel): Add global flags in all disassembly.
 690         (fmtconst): Take advantage of new flags, and print default in hex.
 691         (fmtconst_val): Likewise.
 692         (decode_macfunc): Be consistant with spaces, tabs, comments,
 693         capitalization in disassembly, fix minor coding style issues.
 694         (reg_names, amod0, amod1, amod0amod2, aligndir, get_allreg): Likewise.
 695         (decode_ProgCtrl_0, decode_PushPopMultiple_0, decode_CCflag_0,
 696         decode_CC2dreg_0, decode_CC2stat_0, decode_BRCC_0, decode_UJUMP_0,
 697         decode_REGMV_0, decode_ALU2op_0, decode_PTR2op_0, decode_LOGI2op_0,
 698         decode_COMP3op_0, decode_COMPI2opD_0, decode_COMPI2opP_0,
 699         decode_LDSTpmod_0, decode_dagMODim_0, decode_dagMODik_0,
 700         decode_dspLDST_0, decode_LDST_0, decode_LDSTiiFP_0, decode_LDSTii_0,
 701         decode_LoopSetup_0, decode_LDIMMhalf_0, decode_CALLa_0,
 702         decode_LDSTidxI_0, decode_linkage_0, decode_dsp32alu_0,
 703         decode_dsp32shift_0, decode_dsp32shiftimm_0, decode_pseudodbg_assert_0,
 704         _print_insn_bfin, print_insn_bfin): Likewise.
 705
 706 2008-03-17  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 707
 708         * aclocal.m4: Regenerate.
 709         * configure: Likewise.
 710         * Makefile.in: Likewise.
 711
 712 2008-03-13  Alan Modra  <amodra@bigpond.net.au>
 713
 714         * Makefile.am: Run "make dep-am".
 715         * Makefile.in: Regenerate.
 716         * configure: Regenerate.
 717
 718 2008-03-07  Alan Modra  <amodra@bigpond.net.au>
 719
 720         * ppc-opc.c (powerpc_opcodes): Order and format.
 721
 722 2008-03-01  H.J. Lu  <hongjiu.lu@intel.com>
 723
 724         * i386-opc.tbl: Allow 16-bit near indirect branches for x86-64.
 725         * i386-tbl.h: Regenerated.
 726
 727 2008-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 728
 729         * i386-opc.tbl: Disallow 16-bit near indirect branches for
 730         x86-64.
 731         * i386-tbl.h: Regenerated.
 732
 733 2008-02-21  Jan Beulich  <jbeulich@novell.com>
 734
 735         * i386-opc.tbl: Allow Dword for far indirect call. Allow Dword
 736         and Fword for far indirect jmp. Allow Reg16 and Word for near
 737         indirect jmp on x86-64. Disallow Fword for lcall.
 738         * i386-tbl.h: Re-generate.
 739
 740 2008-02-18  M R Swami Reddy <MR.Swami.Reddy@nsc.com>
 741
 742         * cr16-opc.c  (cr16_num_optab): Defined
 743
 744 2008-02-16  H.J. Lu  <hongjiu.lu@intel.com>
 745
 746         * i386-gen.c  (operand_type_init): Add OPERAND_TYPE_INOUTPORTREG.
 747         * i386-init.h: Regenerated.
 748
 749 2008-02-14  Nick Clifton  <nickc@redhat.com>
 750
 751         PR binutils/5524
 752         * configure.in (SHARED_LIBADD): Select the correct host specific
 753         file extension for shared libraries.
 754         * configure: Regenerate.
 755
 756 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 757
 758         * i386-opc.h (RegFlat): New.
 759         * i386-reg.tbl (flat): Add.
 760         * i386-tbl.h: Re-generate.
 761
 762 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 763
 764         * i386-dis.c (a_mode): New.
 765         (cond_jump_mode): Adjust.
 766         (Ma): Change to a_mode.
 767         (intel_operand_size): Handle a_mode.
 768         * i386-opc.tbl: Allow Dword and Qword for bound.
 769         * i386-tbl.h: Re-generate.
 770
 771 2008-02-13  Jan Beulich  <jbeulich@novell.com>
 772
 773         * i386-gen.c (process_i386_registers): Process new fields.
 774         * i386-opc.h (reg_entry): Shrink reg_flags and reg_num to
 775         unsigned char. Add dw2_regnum and Dw2Inval.
 776         * i386-reg.tbl: Provide initializers for dw2_regnum. Add pseudo
 777         register names.
 778         * i386-tbl.h: Re-generate.
 779
 780 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 781
 782         * i386-gen.c (cpu_flag_init): Add CPU_XSAVE_FLAGS.
 783         * i386-init.h: Updated.
 784
 785 2008-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 786
 787         * i386-gen.c (cpu_flags): Add CpuXsave.
 788
 789         * i386-opc.h (CpuXsave): New.
 790         (CpuLM): Updated.
 791         (i386_cpu_flags): Add cpuxsave.
 792
 793         * i386-dis.c (MOD_0FAE_REG_4): New.
 794         (RM_0F01_REG_2): Likewise.
 795         (MOD_0FAE_REG_5): Updated.
 796         (RM_0F01_REG_3): Likewise.
 797         (reg_table): Use MOD_0FAE_REG_4.
 798         (mod_table): Use RM_0F01_REG_2.  Add MOD_0FAE_REG_4.  Updated
 799         for xrstor.
 800         (rm_table): Add RM_0F01_REG_2.
 801
 802         * i386-opc.tbl: Add xsave, xrstor, xgetbv and xsetbv.
 803         * i386-init.h: Regenerated.
 804         * i386-tbl.h: Likewise.
 805
 806 2008-02-11  Jan Beulich  <jbeulich@novell.com>
 807
 808         * i386-opc.tbl: Remove Disp32S from CpuNo64 opcodes. Remove
 809         Disp16 from Cpu64 non-jump opcodes (including loop and j?cxz).
 810         * i386-tbl.h: Re-generate.
 811
 812 2008-02-04  H.J. Lu  <hongjiu.lu@intel.com>
 813
 814         PR 5715
 815         * configure: Regenerated.
 816
 817 2008-02-04  Adam Nemet  <anemet@caviumnetworks.com>
 818
 819         * mips-dis.c: Update copyright.
 820         (mips_arch_choices): Add Octeon.
 821         * mips-opc.c: Update copyright.
 822         (IOCT): New macro.
 823         (mips_builtin_opcodes): Add Octeon instruction synciobdma.
 824
 825 2008-01-29  Alan Modra  <amodra@bigpond.net.au>
 826
 827         * ppc-opc.c: Support optional L form mtmsr.
 828
 829 2008-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 830
 831         * i386-dis.c (OP_E_extended): Handle r12 like rsp.
 832
 833 2008-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 834
 835         * i386-gen.c (cpu_flag_init): Add CpuLM to CPU_GENERIC64_FLAGS.
 836         * i386-init.h: Regenerated.
 837
 838 2008-01-23  Tristan Gingold  <gingold@adacore.com>
 839
 840         * ia64-dis.c (print_insn_ia64): Display symbolic name of ar.fcr,
 841         ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir and ar.fdr.
 842
 843 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 844
 845         * i386-gen.c (cpu_flag_init): Remove CpuMMX2.
 846         (cpu_flags): Likewise.
 847
 848         * i386-opc.h (CpuMMX2): Removed.
 849         (CpuSSE): Updated.
 850
 851         * i386-opc.tbl: Replace CpuMMX2 with CpuSSE|Cpu3dnowA.
 852         * i386-init.h: Regenerated.
 853         * i386-tbl.h: Likewise.
 854
 855 2008-01-22  H.J. Lu  <hongjiu.lu@intel.com>
 856
 857         * i386-gen.c (cpu_flag_init): Add CPU_VMX_FLAGS and
 858         CPU_SMX_FLAGS.
 859         * i386-init.h: Regenerated.
 860
 861 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 862
 863         * i386-opc.tbl: Use Qword on movddup.
 864         * i386-tbl.h: Regenerated.
 865
 866 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 867
 868         * i386-opc.tbl: Put back 16bit movsx/movzx for AT&T syntax.
 869         * i386-tbl.h: Regenerated.
 870
 871 2008-01-15  H.J. Lu  <hongjiu.lu@intel.com>
 872
 873         * i386-dis.c (Mx): New.
 874         (PREFIX_0FC3): Likewise.
 875         (PREFIX_0FC7_REG_6): Updated.
 876         (dis386_twobyte): Use PREFIX_0FC3.
 877         (prefix_table): Add PREFIX_0FC3.  Use Mq on movntq and movntsd.
 878         Use Mx on movntps, movntpd, movntdq and movntdqa.  Use Md on
 879         movntss.
 880
 881 2008-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 882
 883         * i386-gen.c (opcode_modifiers): Add IntelSyntax.
 884         (operand_types): Add Mem.
 885
 886         * i386-opc.h (IntelSyntax): New.
 887         * i386-opc.h (Mem): New.
 888         (Byte): Updated.
 889         (Opcode_Modifier_Max): Updated.
 890         (i386_opcode_modifier): Add intelsyntax.
 891         (i386_operand_type): Add mem.
 892
 893         * i386-opc.tbl: Remove Reg16 from movnti.  Add sizes to more
 894         instructions.
 895
 896         * i386-reg.tbl: Add size for accumulator.
 897
 898         * i386-init.h: Regenerated.
 899         * i386-tbl.h: Likewise.
 900
 901 2008-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 902
 903         * i386-opc.h (Byte): Fix a typo.
 904
 905 2008-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 906
 907         PR gas/5534
 908         * i386-gen.c (operand_type_init): Add Dword to
 909         OPERAND_TYPE_ACC32.  Add Qword to OPERAND_TYPE_ACC64.
 910         (opcode_modifiers): Remove CheckSize, Byte, Word, Dword,
 911         Qword and Xmmword.
 912         (operand_types): Add Byte, Word, Dword, Fword, Qword, Tbyte,
 913         Xmmword, Unspecified and Anysize.
 914         (set_bitfield): Make Mmword an alias of Qword.  Make Oword
 915         an alias of Xmmword.
 916
 917         * i386-opc.h (CheckSize): Removed.
 918         (Byte): Updated.
 919         (Word): Likewise.
 920         (Dword): Likewise.
 921         (Qword): Likewise.
 922         (Xmmword): Likewise.
 923         (FWait): Updated.
 924         (OTMax): Likewise.
 925         (i386_opcode_modifier): Remove checksize, byte, word, dword,
 926         qword and xmmword.
 927         (Fword): New.
 928         (TBYTE): Likewise.
 929         (Unspecified): Likewise.
 930         (Anysize): Likewise.
 931         (i386_operand_type): Add byte, word, dword, fword, qword,
 932         tbyte xmmword, unspecified and anysize.
 933
 934         * i386-opc.tbl: Updated to use Byte, Word, Dword, Fword, Qword,
 935         Tbyte, Xmmword, Unspecified and Anysize.
 936
 937         * i386-reg.tbl: Add size for accumulator.
 938
 939         * i386-init.h: Regenerated.
 940         * i386-tbl.h: Likewise.
 941
 942 2008-01-10  H.J. Lu  <hongjiu.lu@intel.com>
 943
 944         * i386-dis.c (REG_0F0E): Renamed to REG_0F0D.
 945         (REG_0F18): Updated.
 946         (reg_table): Updated.
 947         (dis386_twobyte): Updated.  Use "nopQ" on 0x19 to 0x1e.
 948         (twobyte_has_modrm): Set 1 for 0x19 to 0x1e.
 949
 950 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 951
 952         * i386-gen.c (set_bitfield): Use fail () on error.
 953
 954 2008-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 955
 956         * i386-gen.c (lineno): New.
 957         (filename): Likewise.
 958         (set_bitfield): Report filename and line numer on error.
 959         (process_i386_opcodes): Set filename and update lineno.
 960         (process_i386_registers): Likewise.
 961
 962 2008-01-05  H.J. Lu  <hongjiu.lu@intel.com>
 963
 964         * i386-gen.c (opcode_modifiers): Rename IntelMnemonic to
 965         ATTSyntax.
 966
 967         * i386-opc.h (IntelMnemonic): Renamed to ..
 968         (ATTSyntax): This
 969         (Opcode_Modifier_Max): Updated.
 970         (i386_opcode_modifier): Remove intelmnemonic. Add attsyntax
 971         and intelsyntax.
 972
 973         * i386-opc.tbl: Remove IntelMnemonic and update with ATTSyntax
 974         on fsub, fubp, fsubr, fsubrp, div, fdivp, fdivr and fdivrp.
 975         * i386-tbl.h: Regenerated.
 976
 977 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 978
 979         * i386-gen.c: Update copyright to 2008.
 980         * i386-opc.h: Likewise.
 981         * i386-opc.tbl: Likewise.
 982
 983         * i386-init.h: Regenerated.
 984         * i386-tbl.h: Likewise.
 985
 986 2008-01-04  H.J. Lu  <hongjiu.lu@intel.com>
 987
 988         * i386-opc.tbl: Add NoRex64 to extractps, movmskpd, movmskps,
 989         pextrb, pextrw, pinsrb, pinsrw and pmovmskb.
 990         * i386-tbl.h: Regenerated.
 991
 992 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
 993
 994         * i386-gen.c (cpu_flag_init): Remove CpuSSE4_1_Or_5 and
 995         CpuSSE4_2_Or_ABM.
 996         (cpu_flags): Likewise.
 997
 998         * i386-opc.h (CpuSSE4_1_Or_5): Removed.
 999         (CpuSSE4_2_Or_ABM): Likewise.
1000         (CpuLM): Updated.
1001         (i386_cpu_flags): Remove cpusse4_1_or_5 and cpusse4_2_or_abm.
1002
1003         * i386-opc.tbl: Replace CpuSSE4_1_Or_5, CpuSSE4_2_Or_ABM and
1004         Cpu686|CpuPadLock with CpuSSE4_1|CpuSSE5, CpuABM|CpuSSE4_2
1005         and CpuPadLock, respectively.
1006         * i386-init.h: Regenerated.
1007         * i386-tbl.h: Likewise.
1008
1009 2008-01-03  H.J. Lu  <hongjiu.lu@intel.com>
1010
1011         * i386-gen.c (opcode_modifiers): Remove No_xSuf.
1012
1013         * i386-opc.h (No_xSuf): Removed.
1014         (CheckSize): Updated.
1015
1016         * i386-tbl.h: Regenerated.
1017
1018 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1019
1020         * i386-gen.c (cpu_flag_init): Add CpuSSE4_2_Or_ABM to
1021         CPU_AMDFAM10_FLAGS, CPU_SSE4_2_FLAGS, CpuABM and
1022         CPU_SSE5_FLAGS.
1023         (cpu_flags): Add CpuSSE4_2_Or_ABM.
1024
1025         * i386-opc.h (CpuSSE4_2_Or_ABM): New.
1026         (CpuLM): Updated.
1027         (i386_cpu_flags): Add cpusse4_2_or_abm.
1028
1029         * i386-opc.tbl: Use CpuSSE4_2_Or_ABM instead of
1030         CpuABM|CpuSSE4_2 on popcnt.
1031         * i386-init.h: Regenerated.
1032         * i386-tbl.h: Likewise.
1033
1034 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1035
1036         * i386-opc.h: Update comments.
1037
1038 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1039
1040         * i386-gen.c (opcode_modifiers): Use Qword instead of QWord.
1041         * i386-opc.h: Likewise.
1042         * i386-opc.tbl: Likewise.
1043
1044 2008-01-02  H.J. Lu  <hongjiu.lu@intel.com>
1045
1046         PR gas/5534
1047         * i386-gen.c (opcode_modifiers): Add No_xSuf, CheckSize,
1048         Byte, Word, Dword, QWord and Xmmword.
1049
1050         * i386-opc.h (No_xSuf): New.
1051         (CheckSize): Likewise.
1052         (Byte): Likewise.
1053         (Word): Likewise.
1054         (Dword): Likewise.
1055         (QWord): Likewise.
1056         (Xmmword): Likewise.
1057         (FWait): Updated.
1058         (i386_opcode_modifier): Add No_xSuf, CheckSize, Byte, Word,
1059         Dword, QWord and Xmmword.
1060
1061         * i386-opc.tbl: Add CheckSize|QWord to movq if IgnoreSize is
1062         used.
1063         * i386-tbl.h: Regenerated.
1064
1065 2008-01-02  Mark Kettenis  <kettenis@gnu.org>
1066
1067         * m88k-dis.c (instructions): Fix fcvt.* instructions.
1068         From Miod Vallat.
1069
1070 For older changes see ChangeLog-2007
1071 \f
1072 Local Variables:
1073 mode: change-log
1074 left-margin: 8
1075 fill-column: 74
1076 version-control: never
1077 End: