opcodes/ChangeLog

   1 2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         * i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
   4         (twobyte_has_modrm): Set 1 for 0x1f.
   5
   6 2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>
   7
   8         * i386-dis.c (NOP_Fixup): Removed.
   9         (NOP_Fixup1): New.
  10         (NOP_Fixup2): Likewise.
  11         (dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
  12
  13 2006-06-12  Julian Brown  <julian@codesourcery.com>
  14
  15         * arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed
  16         on 64-bit hosts.
  17
  18 2006-06-10  H.J. Lu  <hongjiu.lu@intel.com>
  19
  20         * i386.c (GRP10): Renamed to ...
  21         (GRP12): This.
  22         (GRP11): Renamed to ...
  23         (GRP13): This.
  24         (GRP12): Renamed to ...
  25         (GRP14): This.
  26         (GRP13): Renamed to ...
  27         (GRP15): This.
  28         (GRP14): Renamed to ...
  29         (GRP16): This.
  30         (dis386_twobyte): Updated.
  31         (grps): Likewise.
  32
  33 2006-06-09  Nick Clifton  <nickc@redhat.com>
  34
  35         * po/fi.po: Updated Finnish translation.
  36
  37 2006-06-07  Joseph S. Myers  <joseph@codesourcery.com>
  38
  39         * po/Make-in (pdf, ps): New dummy targets.
  40
  41 2006-06-06  Paul Brook  <paul@codesourcery.com>
  42
  43         * arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm
  44         instructions.
  45         (neon_opcodes): Add conditional execution specifiers.
  46         (thumb_opcodes): Ditto.
  47         (thumb32_opcodes): Ditto.
  48         (arm_conditional): Change 0xe to "al" and add "" to end.
  49         (ifthen_state, ifthen_next_state, ifthen_address): New.
  50         (IFTHEN_COND): Define.
  51         (print_insn_coprocessor, print_insn_neon): Print thumb conditions.
  52         (print_insn_arm): Change %c to use new values of arm_conditional.
  53         (print_insn_thumb16): Print thumb conditions.  Add %I.
  54         (print_insn_thumb32): Print thumb conditions.
  55         (find_ifthen_state): New function.
  56         (print_insn): Track IT block state.
  57
  58 2006-06-06  Ben Elliston  <bje@au.ibm.com>
  59             Anton Blanchard  <anton@samba.org>
  60             Peter Bergner  <bergner@vnet.ibm.com>
  61
  62         * ppc-dis.c (powerpc_dialect): Handle power6 option.
  63         (print_ppc_disassembler_options): Mention power6.
  64
  65 2006-06-06  Thiemo Seufer  <ths@mips.com>
  66             Chao-ying Fu  <fu@mips.com>
  67
  68         * mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
  69         * mips-opc.c: Add DSP64 instructions.
  70
  71 2006-06-06  Alan Modra  <amodra@bigpond.net.au>
  72
  73         * m68hc11-dis.c (print_insn): Warning fix.
  74
  75 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
  76
  77         * po/Make-in (top_builddir): Define.
  78
  79 2006-06-05  Alan Modra  <amodra@bigpond.net.au>
  80
  81         * Makefile.am: Run "make dep-am".
  82         * Makefile.in: Regenerate.
  83         * config.in: Regenerate.
  84
  85 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
  86
  87         * Makefile.am (INCLUDES): Use @INCINTL@.
  88         * acinclude.m4: Include new gettext macros.
  89         * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
  90         Remove local code for po/Makefile.
  91         * Makefile.in, aclocal.m4, configure: Regenerated.
  92
  93 2006-05-30  Nick Clifton  <nickc@redhat.com>
  94
  95         * po/es.po: Updated Spanish translation.
  96
  97 2006-05-25  Richard Sandiford  <richard@codesourcery.com>
  98
  99         * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
 100         and fmovem entries.  Put register list entries before immediate
 101         mask entries.  Use "l" rather than "L" in the fmovem entries.
 102         * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
 103         out from INFO.
 104         (m68k_scan_mask): New function, split out from...
 105         (print_insn_m68k): ...here.  If no architecture has been set,
 106         first try printing an m680x0 instruction, then try a Coldfire one.
 107
 108 2006-05-24  Nick Clifton  <nickc@redhat.com>
 109
 110         * po/ga.po: Updated Irish translation.
 111
 112 2006-05-22  Nick Clifton  <nickc@redhat.com>
 113
 114         * crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
 115
 116 2006-05-22  Nick Clifton  <nickc@redhat.com>
 117
 118         * po/nl.po: Updated translation.
 119
 120 2006-05-18  Alan Modra  <amodra@bigpond.net.au>
 121
 122         * avr-dis.c: Formatting fix.
 123
 124 2006-05-14  Thiemo Seufer  <ths@mips.com>
 125
 126         * mips16-opc.c (I1, I32, I64): New shortcut defines.
 127         (mips16_opcodes): Change membership of instructions to their
 128         lowest baseline ISA.
 129
 130 2006-05-09  H.J. Lu  <hongjiu.lu@intel.com>
 131
 132         * i386-dis.c (grps): Update sgdt/sidt for 64bit.
 133
 134 2006-05-05  Julian Brown  <julian@codesourcery.com>
 135
 136         * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
 137         vldm/vstm.
 138
 139 2006-05-05  Thiemo Seufer  <ths@mips.com>
 140             David Ung  <davidu@mips.com>
 141
 142         * mips-opc.c: Add macro for cache instruction.
 143
 144 2006-05-04  Thiemo Seufer  <ths@mips.com>
 145             Nigel Stephens  <nigel@mips.com>
 146             David Ung  <davidu@mips.com>
 147
 148         * mips-dis.c (mips_arch_choices): Add smartmips instruction
 149         decoding to MIPS32 and MIPS32R2.  Limit DSP decoding to release
 150         2 ISAs.  Add MIPS3D decoding to MIPS32R2.  Add MT decoding to
 151         MIPS64R2.
 152         * mips-opc.c: fix random typos in comments.
 153         (INSN_SMARTMIPS): New defines.
 154         (mips_builtin_opcodes): Add paired single support for MIPS32R2.
 155         Move bc3f, bc3fl, bc3t, bc3tl downwards.  Move flushi, flushd,
 156         flushid, wb upwards.  Move cfc3, ctc3 downwards.  Rework the
 157         FP_S and FP_D flags to denote single and double register
 158         accesses separately.  Move dmfc3, dmtc3, mfc3, mtc3 downwards.
 159         Allow jr.hb and jalr.hb for release 1 ISAs.  Allow luxc1, suxc1
 160         for MIPS32R2.  Add SmartMIPS instructions.  Add two-argument
 161         variants of bc2f, bc2fl, bc2t, bc2tl.  Add mfhc2, mthc2 to
 162         release 2 ISAs.
 163         * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
 164
 165 2006-05-03  Thiemo Seufer  <ths@mips.com>
 166
 167         * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
 168
 169 2006-05-02  Thiemo Seufer  <ths@mips.com>
 170             Nigel Stephens  <nigel@mips.com>
 171             David Ung  <davidu@mips.com>
 172
 173         * mips-dis.c (print_insn_args): Force mips16 to odd addresses.
 174         (print_mips16_insn_arg): Force mips16 to odd addresses.
 175
 176 2006-04-30  Thiemo Seufer  <ths@mips.com>
 177             David Ung  <davidu@mips.com>
 178
 179         * mips-opc.c (mips_builtin_opcodes): Add udi instructions
 180         "udi0" to "udi15".
 181         * mips-dis.c (print_insn_args): Adds udi argument handling.
 182
 183 2006-04-28  James E Wilson  <wilson@specifix.com>
 184
 185         * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
 186         error message.
 187
 188 2006-04-28  Thiemo Seufer  <ths@mips.com>
 189             David Ung  <davidu@mips.com>
 190             Nigel Stephens  <nigel@mips.com>
 191
 192         * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
 193         names.
 194
 195 2006-04-28  Thiemo Seufer  <ths@mips.com>
 196             Nigel Stephens  <nigel@mips.com>
 197             David Ung  <davidu@mips.com>
 198
 199         * mips-dis.c (print_insn_args): Add mips_opcode argument.
 200         (print_insn_mips):  Adjust print_insn_args call.
 201
 202 2006-04-28  Thiemo Seufer  <ths@mips.com>
 203             Nigel Stephens  <nigel@mips.com>
 204
 205         * mips-dis.c (print_insn_args): Print $fcc only for FP
 206         instructions, use $cc elsewise.
 207
 208 2006-04-28  Thiemo Seufer  <ths@mips.com>
 209             Nigel Stephens  <nigel@mips.com>
 210
 211         * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
 212         Map MIPS16 registers to O32 names.
 213         (print_mips16_insn_arg): Use mips16_reg_names.
 214
 215 2006-04-26  Julian Brown  <julian@codesourcery.com>
 216
 217         * arm-dis.c (print_insn_neon): Disassemble floating-point constant
 218         VMOV.
 219
 220 2006-04-26  Nathan Sidwell  <nathan@codesourcery.com>
 221             Julian Brown  <julian@codesourcery.com>
 222
 223         * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
 224         %<code>[zy] into %[zy]<code>.  Expand meaning of %<bitfield>['`?].
 225         Add unified load/store instruction names.
 226         (neon_opcode_table): New.
 227         (arm_opcodes): Expand meaning of %<bitfield>['`?].
 228         (arm_decode_bitfield): New.
 229         (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
 230         Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
 231         (print_insn_neon): New.
 232         (print_insn_arm): Adjust print_insn_coprocessor call. Call
 233         print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
 234         (print_insn_thumb32): Likewise.
 235
 236 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 237
 238         * Makefile.am: Run "make dep-am".
 239         * Makefile.in: Regenerate.
 240
 241 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 242
 243         * avr-dis.c (avr_operand): Warning fix.
 244
 245         * configure: Regenerate.
 246
 247 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 248
 249         * po/POTFILES.in: Regenerated.
 250
 251 2006-04-12   Hochstein  <hochstein@algo.informatik.tu-darmstadt.de>
 252
 253         PR binutils/2454
 254         * avr-dis.c (avr_operand): Arrange for a comment to appear before
 255         the symolic form of an address, so that the output of objdump -d
 256         can be reassembled.
 257
 258 2006-04-10  DJ Delorie  <dj@redhat.com>
 259
 260         * m32c-asm.c: Regenerate.
 261
 262 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 263
 264         * Makefile.am: Add install-html target.
 265         * Makefile.in: Regenerate.
 266
 267 2006-04-06  Nick Clifton  <nickc@redhat.com>
 268
 269         * po/vi/po: Updated Vietnamese translation.
 270
 271 2006-03-31  Paul Koning  <ni1d@arrl.net>
 272
 273         * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
 274
 275 2006-03-16  Bernd Schmidt  <bernd.schmidt@analog.com>
 276
 277         * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
 278         logic to identify halfword shifts.
 279
 280 2006-03-16  Paul Brook  <paul@codesourcery.com>
 281
 282         * arm-dis.c (arm_opcodes): Rename swi to svc.
 283         (thumb_opcodes): Ditto.
 284
 285 2006-03-13  DJ Delorie  <dj@redhat.com>
 286
 287         * m32c-asm.c: Regenerate.
 288         * m32c-desc.c: Likewise.
 289         * m32c-desc.h: Likewise.
 290         * m32c-dis.c: Likewise.
 291         * m32c-ibld.c: Likewise.
 292         * m32c-opc.c: Likewise.
 293         * m32c-opc.h: Likewise.
 294
 295 2006-03-10  DJ Delorie  <dj@redhat.com>
 296
 297         * m32c-desc.c: Regenerate with mul.l, mulu.l.
 298         * m32c-opc.c: Likewise.
 299         * m32c-opc.h: Likewise.
 300
 301
 302 2006-03-09  Nick Clifton  <nickc@redhat.com>
 303
 304         * po/sv.po: Updated Swedish translation.
 305
 306 2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>
 307
 308         PR binutils/2428
 309         * i386-dis.c (REP_Fixup): New function.
 310         (AL): Remove duplicate.
 311         (Xbr): New.
 312         (Xvr): Likewise.
 313         (Ybr): Likewise.
 314         (Yvr): Likewise.
 315         (indirDXr): Likewise.
 316         (ALr): Likewise.
 317         (eAXr): Likewise.
 318         (dis386): Updated entries of ins, outs, movs, lods and stos.
 319
 320 2006-03-05  Nick Clifton  <nickc@redhat.com>
 321
 322         * cgen-ibld.in (insert_normal): Cope with attempts to insert a
 323         signed 32-bit value into an unsigned 32-bit field when the host is
 324         a 64-bit machine.
 325         * fr30-ibld.c: Regenerate.
 326         * frv-ibld.c: Regenerate.
 327         * ip2k-ibld.c: Regenerate.
 328         * iq2000-asm.c: Regenerate.
 329         * iq2000-ibld.c: Regenerate.
 330         * m32c-ibld.c: Regenerate.
 331         * m32r-ibld.c: Regenerate.
 332         * openrisc-ibld.c: Regenerate.
 333         * xc16x-ibld.c: Regenerate.
 334         * xstormy16-ibld.c: Regenerate.
 335
 336 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 337
 338         * xc16x-asm.c: Regenerate.
 339         * xc16x-dis.c: Regenerate.
 340
 341 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 342
 343         * po/Make-in: Add html target.
 344
 345 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 346
 347         * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
 348         Intel Merom New Instructions.
 349         (THREE_BYTE_0): Likewise.
 350         (THREE_BYTE_1): Likewise.
 351         (three_byte_table): Likewise.
 352         (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
 353         THREE_BYTE_1 for entry 0x3a.
 354         (twobyte_has_modrm): Updated.
 355         (twobyte_uses_SSE_prefix): Likewise.
 356         (print_insn): Handle 3-byte opcodes used by Intel Merom New
 357         Instructions.
 358
 359 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 360
 361         * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
 362         (v9_hpriv_reg_names): New table.
 363         (print_insn_sparc): Allow values up to 16 for '?' and '!'.
 364         New cases '$' and '%' for read/write hyperprivileged register.
 365         * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
 366         window handling and rdhpr/wrhpr instructions.
 367
 368 2006-02-24  DJ Delorie  <dj@redhat.com>
 369
 370         * m32c-desc.c: Regenerate with linker relaxation attributes.
 371         * m32c-desc.h: Likewise.
 372         * m32c-dis.c: Likewise.
 373         * m32c-opc.c: Likewise.
 374
 375 2006-02-24  Paul Brook  <paul@codesourcery.com>
 376
 377         * arm-dis.c (arm_opcodes): Add V7 instructions.
 378         (thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
 379         (print_arm_address): New function.
 380         (print_insn_arm): Use it.  Add 'P' and 'U' cases.
 381         (psr_name): New function.
 382         (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
 383
 384 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 385
 386         * ia64-opc-i.c (bXc): New.
 387         (mXc): Likewise.
 388         (OpX2TaTbYaXcC): Likewise.
 389         (TF). Likewise.
 390         (TFCM). Likewise.
 391         (ia64_opcodes_i): Add instructions for tf.
 392
 393         * ia64-opc.h (IMMU5b): New.
 394
 395         * ia64-asmtab.c: Regenerated.
 396
 397 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 398
 399         * ia64-gen.c: Update copyright years.
 400         * ia64-opc-b.c: Likewise.
 401
 402 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 403
 404         * ia64-gen.c (lookup_regindex): Handle ".vm".
 405         (print_dependency_table): Handle '\"'.
 406
 407         * ia64-ic.tbl: Updated from SDM 2.2.
 408         * ia64-raw.tbl: Likewise.
 409         * ia64-waw.tbl: Likewise.
 410         * ia64-asmtab.c: Regenerated.
 411
 412         * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
 413
 414 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 415             Anil Paranjape   <anilp1@kpitcummins.com>
 416             Shilin Shakti    <shilins@kpitcummins.com>
 417
 418         * xc16x-desc.h: New file
 419         * xc16x-desc.c: New file
 420         * xc16x-opc.h: New file
 421         * xc16x-opc.c: New file
 422         * xc16x-ibld.c: New file
 423         * xc16x-asm.c: New file
 424         * xc16x-dis.c: New file
 425         * Makefile.am: Entries for xc16x
 426         * Makefile.in: Regenerate
 427         * cofigure.in: Add xc16x target information.
 428         * configure: Regenerate.
 429         * disassemble.c: Add xc16x target information.
 430
 431 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 432
 433         * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
 434         moves.
 435
 436 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 437
 438         * i386-dis.c ('Z'): Add a new macro.
 439         (dis386_twobyte): Use "movZ" for control register moves.
 440
 441 2006-02-10  Nick Clifton  <nickc@redhat.com>
 442
 443         * iq2000-asm.c: Regenerate.
 444
 445 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 446
 447         * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
 448
 449 2006-01-26  David Ung  <davidu@mips.com>
 450
 451         * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
 452         ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
 453         floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
 454         nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
 455         rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
 456
 457 2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>
 458
 459         * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
 460         ld_d_r, pref_xd_cb): Use signed char to hold data to be
 461         disassembled.
 462         * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
 463         buffer overflows when disassembling instructions like
 464         ld (ix+123),0x23
 465         * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
 466         operand, if the offset is negative.
 467
 468 2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>
 469
 470         * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
 471         unsigned char to hold data to be disassembled.
 472
 473 2006-01-17  Andreas Schwab  <schwab@suse.de>
 474
 475         PR binutils/1486
 476         * disassemble.c (disassemble_init_for_target): Set
 477         disassembler_needs_relocs for bfd_arch_arm.
 478
 479 2006-01-16  Paul Brook  <paul@codesourcery.com>
 480
 481         * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
 482         f?add?, and f?sub? instructions.
 483
 484 2006-01-16  Nick Clifton  <nickc@redhat.com>
 485
 486         * po/zh_CN.po: New Chinese (simplified) translation.
 487         * configure.in (ALL_LINGUAS): Add "zh_CH".
 488         * configure: Regenerate.
 489
 490 2006-01-05  Paul Brook  <paul@codesourcery.com>
 491
 492         * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
 493
 494 2006-01-06  DJ Delorie  <dj@redhat.com>
 495
 496         * m32c-desc.c: Regenerate.
 497         * m32c-opc.c: Regenerate.
 498         * m32c-opc.h: Regenerate.
 499
 500 2006-01-03  DJ Delorie  <dj@redhat.com>
 501
 502         * cgen-ibld.in (extract_normal): Avoid memory range errors.
 503         * m32c-ibld.c: Regenerated.
 504
 505 For older changes see ChangeLog-2005
 506 \f
 507 Local Variables:
 508 mode: change-log
 509 left-margin: 8
 510 fill-column: 74
 511 version-control: never
 512 End: