1 2020-09-08 Alex Coplan <alex.coplan@arm.com>
3 * aarch64-dis.c (arch_variant): New.
4 (determine_disassembling_preference): Disassemble according to
6 (select_aarch64_variant): New.
7 (print_insn_aarch64): Set feature set.
9 2020-09-02 Alan Modra <amodra@gmail.com>
11 * v850-opc.c (insert_i5div1, insert_i5div2, insert_i5div3),
12 (insert_d5_4, insert_d8_6, insert_d8_7, insert_v8, insert_d9),
13 (insert_u16_loop, insert_d16_15, insert_d16_16, insert_d17_16),
14 (insert_d22, insert_d23, insert_d23_align1, insert_i9, insert_u9),
15 (insert_spe, insert_r4, insert_POS, insert_WIDTH, insert_SELID),
16 (insert_VECTOR8, insert_VECTOR5, insert_CACHEOP, insert_PREFOP),
17 (nsert_IMM10U, insert_SRSEL1, insert_SRSEL2): Use unsigned long
18 for value parameter and update code to suit.
19 (extract_d9, extract_d16_15, extract_d16_16, extract_d17_16),
20 (extract_d22, extract_d23, extract_i9): Use unsigned long variables.
22 2020-09-02 Alan Modra <amodra@gmail.com>
24 * i386-dis.c (OP_E_memory): Don't cast to signed type when
26 (get32, get32s): Use unsigned types in shift expressions.
28 2020-09-02 Alan Modra <amodra@gmail.com>
30 * csky-dis.c (print_insn_csky): Use unsigned type for "given".
32 2020-09-02 Alan Modra <amodra@gmail.com>
34 * crx-dis.c: Whitespace.
35 (print_arg): Use unsigned type for longdisp and mask variables,
36 and for left shift constant.
38 2020-09-02 Alan Modra <amodra@gmail.com>
40 * cgen-ibld.in (insert_normal, extract_normal): Use 1UL in left shift.
41 * bpf-ibld.c: Regenerate.
42 * epiphany-ibld.c: Regenerate.
43 * fr30-ibld.c: Regenerate.
44 * frv-ibld.c: Regenerate.
45 * ip2k-ibld.c: Regenerate.
46 * iq2000-ibld.c: Regenerate.
47 * lm32-ibld.c: Regenerate.
48 * m32c-ibld.c: Regenerate.
49 * m32r-ibld.c: Regenerate.
50 * mep-ibld.c: Regenerate.
51 * mt-ibld.c: Regenerate.
52 * or1k-ibld.c: Regenerate.
53 * xc16x-ibld.c: Regenerate.
54 * xstormy16-ibld.c: Regenerate.
56 2020-09-02 Alan Modra <amodra@gmail.com>
58 * bfin-dis.c (MASKBITS): Use SIGNBIT.
60 2020-09-02 Cooper Qu <cooper.qu@linux.alibaba.com>
62 * csky-opc.h (csky_v2_opcodes): Move divul and divsl
63 to CSKYV2_ISA_3E3R3 instruction set.
65 2020-09-02 Cooper Qu <cooper.qu@linux.alibaba.com>
67 * csky-opc.h (csky_v2_opcodes): Fix Encode of mulsws.
69 2020-09-01 Alan Modra <amodra@gmail.com>
71 * mep-ibld.c: Regenerate.
73 2020-08-31 Cooper Qu <cooper.qu@linux.alibaba.com>
75 * csky-dis.c (csky_output_operand): Assign dis_info.value for
78 2020-08-30 Alan Modra <amodra@gmail.com>
80 * cr16-dis.c: Formatting.
81 (parameter): Delete struct typedef. Use dwordU instead
83 (make_argument <arg_idxr>): Simplify detection of cbitb, sbitb
85 (make_argument <arg_cr>): Extract 20-bit field not 16-bit.
87 2020-08-29 Alan Modra <amodra@gmail.com>
90 * csky-opc.h (MAX_OPRND_NUM): Define to 5.
91 (union csky_operand): Use MAX_OPRND_NUM to size oprnds array.
93 2020-08-28 Alan Modra <amodra@gmail.com>
97 * cgen-ibld.in (insert_1): Use 1UL in forming mask.
98 (extract_normal): Likewise.
99 (insert_normal): Likewise, and move past zero length test.
100 (put_insn_int_value): Handle mask for zero length, use 1UL.
101 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
102 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
103 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
104 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
106 2020-08-28 Cooper Qu <cooper.qu@linux.alibaba.com>
108 * csky-dis.c (CSKY_DEFAULT_ISA): Define.
109 (csky_dis_info): Add member isa.
110 (csky_find_inst_info): Skip instructions that do not belong to
112 (csky_get_disassembler): Get infomation from attribute section.
113 (print_insn_csky): Set defualt ISA flag.
114 * csky.h (CSKY_ISA_VDSP_2): Rename from CSKY_ISA_VDSP_V2.
115 * csky-opc.h (struct csky_opcode): Change isa_flag16 and
116 isa_flag32'type to unsigned 64 bits.
118 2020-08-26 Jose E. Marchesi <jemarch@gnu.org>
120 * disassemble.c (enum epbf_isa_attr): Add ISA_XBPFBE, ISA_EBPFMAX.
122 2020-08-26 David Faust <david.faust@oracle.com>
124 * bpf-desc.c: Regenerate.
125 * bpf-desc.h: Likewise.
126 * bpf-opc.c: Likewise.
127 * bpf-opc.h: Likewise.
128 * disassemble.c (disassemble_init_for_target): Set bits for xBPF
129 ISA when appropriate.
131 2020-08-25 Alan Modra <amodra@gmail.com>
134 * vax-dis.c (parse_disassembler_options): Always add at least one
135 to entry_addr_total_slots.
137 2020-08-24 Cooper Qu <cooper.qu@linux.alibaba.com>
139 * csky-dis.c (csky_find_inst_info): Skip CK860's instructions
140 in other CPUs to speed up disassembling.
141 * csky-opc.h (csky_v2_opcodes): Add CK860's instructions,
142 Change plsli.u16 to plsli.16, change sync's operand format.
144 2020-08-21 Cooper Qu <cooper.qu@linux.alibaba.com>
146 * csky-opc.h (csky_v2_opcodes): Add instruction bnezad.
148 2020-08-21 Nick Clifton <nickc@redhat.com>
150 * aarch64-dis.c (get_sym_code_type): Return FALSE for non-ELF
153 2020-08-21 Cooper Qu <cooper.qu@linux.alibaba.com>
155 * csky-opc.h (csky_v2_opcodes): Add two operands form for bloop.
157 2020-08-19 Alan Modra <amodra@gmail.com>
159 * ppc-opc.c (powerpc_opcodes): Replace OBF with BF for vcmpsq,
162 2020-08-18 Peter Bergner <bergner@linux.ibm.com>
164 * ppc-opc.c (powerpc_opcodes) <xvcvbf16sp>: Rename from this...
165 <xvcvbf16spn>: ...to this.
167 2020-08-12 Alex Coplan <alex.coplan@arm.com>
169 * aarch64-opc.c (aarch64_sys_regs): Add MPAM registers.
171 2020-08-12 Nick Clifton <nickc@redhat.com>
173 * po/sr.po: Updated Serbian translation.
175 2020-08-11 Alan Modra <amodra@gmail.com>
177 * ppc-opc.c (powerpc_opcodes): Move cctpl, cctpm and cctph.
179 2020-08-10 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
181 * aarch64-opc.c (aarch64_print_operand):
182 (aarch64_sys_reg_deprecated_p): Functions paramaters changed.
183 (aarch64_sys_reg_supported_p): Function removed.
184 (aarch64_sys_ins_reg_supported_p): Functions paramaters changed.
185 (aarch64_sys_ins_reg_supported_p): Merged aarch64_sys_reg_supported_p
188 2020-08-10 Alan Modra <amodra@gmail.com>
190 * ppc-opc.c (powerpc_opcodes): Add many mtspr and mfspr extended
193 2020-08-10 Alan Modra <amodra@gmail.com>
195 * ppc-opc.c (powerpc_opcodes): Add exser, msgsndu, msgclru.
196 Enable icbt for power5, miso for power8.
198 2020-08-10 Alan Modra <amodra@gmail.com>
200 * ppc-opc.c (powerpc_opcodes): Prioritise mtfprd and mtvrd over
201 mtvsrd, and similarly for mfvsrd.
203 2020-08-04 Christian Groessler <chris@groessler.org>
204 Tadashi G. Takaoka <tadashi.g.takaoka@gmail.com>
206 * z8kgen.c (opt): Fix "sout imm16,rs" and "soutb imm16,rbs"
207 opcodes (special "out" to absolute address).
208 * z8k-opc.h: Regenerate.
210 2020-07-30 H.J. Lu <hongjiu.lu@intel.com>
213 * i386-opc.h (Prefix_Disp8): New.
214 (Prefix_Disp16): Likewise.
215 (Prefix_Disp32): Likewise.
216 (Prefix_Load): Likewise.
217 (Prefix_Store): Likewise.
218 (Prefix_VEX): Likewise.
219 (Prefix_VEX3): Likewise.
220 (Prefix_EVEX): Likewise.
221 (Prefix_REX): Likewise.
222 (Prefix_NoOptimize): Likewise.
223 * i386-opc.tbl: Use Prefix_XXX on pseudo prefixes. Add {disp16}.
224 * i386-tbl.h: Regenerated.
226 2020-07-29 Andreas Arnez <arnez@linux.ibm.com>
228 * s390-mkopc.c (insertExpandedMnemonic): Handle unreachable
229 default case with abort() instead of printing an error message and
230 continuing, to avoid a maybe-uninitialized warning.
232 2020-07-24 Nick Clifton <nickc@redhat.com>
234 * po/de.po: Updated German translation.
236 2020-07-21 Jan Beulich <jbeulich@suse.com>
238 * i386-dis.c (OP_E_memory): Revert previous change.
240 2020-07-15 H.J. Lu <hongjiu.lu@intel.com>
243 * i386-dis.c (OP_E_memory): Don't display eiz with no scale
244 without base nor index registers.
246 2020-07-15 Jan Beulich <jbeulich@suse.com>
248 * i386-dis.c (putop): Move 'V' and 'W' handling.
250 2020-07-15 Jan Beulich <jbeulich@suse.com>
252 * i386-dis.c (dis386): Adjust 'V' description. Use P-based
253 construct for push/pop of register.
254 (putop): Honor cond when handling 'P'. Drop handling of plain
257 2020-07-15 Jan Beulich <jbeulich@suse.com>
259 * i386-dis.c (dis386): Adjust 'P', 'T', 'U', and '@'
260 description. Drop '&' description. Use P for push of immediate,
261 pushf/popf, enter, and leave. Use %LP for lret/retf.
262 (dis386_twobyte): Use P for push/pop of fs/gs.
263 (reg_table): Use P for push/pop. Use @ for near call/jmp.
264 (x86_64_table): Use P for far call/jmp.
265 (putop): Drop handling of 'U' and '&'. Move and adjust handling
266 of '@'. Adjust handling of 'P' and 'T'. Drop case_P and case_Q
268 (OP_J): Drop marking of REX_W as used for v_mode (ISA-dependent)
269 and dqw_mode (unconditional).
271 2020-07-14 H.J. Lu <hongjiu.lu@intel.com>
274 * i386-dis.c (OP_E_memory): Without base nor index registers,
275 32-bit displacement to 64 bits.
277 2020-07-14 Claudiu Zissulescu <claziss@gmail.com>
279 * arc-dis.c (print_insn_arc): Detect and emit a warning when a
280 faulty double register pair is detected.
282 2020-07-14 Jan Beulich <jbeulich@suse.com>
284 * i386-dis.c (OP_D): Print dr<N> instead of db<N> in Intel mode.
286 2020-07-14 Jan Beulich <jbeulich@suse.com>
288 * i386-dis.c (OP_R, Rm): Delete.
289 (MOD_0F24, MOD_0F26): Rename to ...
290 (X86_64_0F24, X86_64_0F26): ... respectively.
291 (dis386): Update 'L' and 'Z' comments.
292 (dis386_twobyte): Replace Rm by Em. Change opcode 0F24 and 0F26
294 (mod_table): Move opcode 0F24 and 0F26 entries ...
295 (x86_64_table): ... here.
296 (putop): Drop handling of 'L'. Set modrm.mod to 3 for 'Z'. Move
299 2020-07-14 Jan Beulich <jbeulich@suse.com>
301 * i386-dis.c (Rd, Rdq, MaskR): Delete.
302 (MOD_EVEX_0F3828_P_1, MOD_EVEX_0F382A_P_1_W_1,
303 MOD_EVEX_0F3838_P_1, MOD_EVEX_0F383A_P_1_W_0,
304 MOD_EVEX_0F387A_W_0, MOD_EVEX_0F387B_W_0,
305 MOD_EVEX_0F387C): New enumerators.
306 (reg_table): Use Edq for rdssp.
307 (prefix_table): Use Edq for incssp.
308 (mod_table): Use Rm for move to/from %tr. Use MaskE for kand*,
309 kandn*, knot*, kor*, kxnor*, kxor*, kadd*, kunpck*, kortest*,
310 ktest*, and kshift*. Use Edq / MaskE for kmov*.
311 * i386-dis-evex.h: Reference mod_table[] for opcode 0F387C.
312 * i386-dis-evex-mod.h: New entries for opcodes 0F3828, 0F382A,
313 0F3838, 0F383A, 0F387A, 0F387B, and 0F387C.
314 * i386-dis-evex-prefix.h: Reference mod_table[] for opcodes
315 0F3828_P_1 and 0F3838_P_1.
316 * i386-dis-evex-w.h: Reference mod_table[] for opcodes
317 0F382A_P_1, 0F383A_P_1, 0F387A, and 0F387B.
319 2020-07-14 Jan Beulich <jbeulich@suse.com>
321 * i386-dis.c (PREFIX_0F01_REG_7_MOD_3_RM_3,
322 PREFIX_0FAE_REG_5_MOD_0, PREFIX_0FC3_MOD_0, PREFIX_0F38C8,
323 PREFIX_0F38C9, PREFIX_0F38CA, PREFIX_0F38CB, PREFIX_0F38CC,
324 PREFIX_0F38CD, PREFIX_0F38F9, PREFIX_0F3ACC, PREFIX_VEX_0F77,
325 PREFIX_VEX_0F38F2, PREFIX_VEX_0F38F3_REG_1,
326 PREFIX_VEX_0F38F3_REG_2, PREFIX_VEX_0F38F3_REG_3): Delete.
327 (MOD_0F38F9_PREFIX_0, VEX_LEN_0F77_P_0, VEX_LEN_0F38F2_P_0,
328 VEX_LEN_0F38F3_R_1_P_0, VEX_LEN_0F38F3_R_2_P_0,
329 VEX_LEN_0F38F3_R_3_P_0): Rename to ...
330 (MOD_0F38F9, VEX_LEN_0F77, VEX_LEN_0F38F2, VEX_LEN_0F38F3_R_1,
331 VEX_LEN_0F38F3_R_2, VEX_LEN_0F38F3_R_3): ... these respectively.
332 (reg_table, prefix_table, three_byte_table, vex_table,
333 vex_len_table, mod_table, rm_table): Replace / remove respective
335 (intel_operand_size, OP_E_register, OP_G): Avoid undue setting
336 of PREFIX_DATA in used_prefixes.
338 2020-07-14 Jan Beulich <jbeulich@suse.com>
340 * i386-dis.c (MOD_VEX_0F3A30_L_0_W_0, MOD_VEX_0F3A30_L_0_W_1,
341 MOD_VEX_0F3A31_L_0_W_0, MOD_VEX_0F3A31_L_0_W_1,
342 MOD_VEX_0F3A32_L_0_W_0, MOD_VEX_0F3A32_L_0_W_1,
343 MOD_VEX_0F3A33_L_0_W_0, MOD_VEX_0F3A33_L_0_W_1): Replace by ...
344 (MOD_VEX_0F3A30_L_0, MOD_VEX_0F3A31_L_0,
345 MOD_VEX_0F3A32_L_0, MOD_VEX_0F3A33_L_0): ... these.
346 (VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
347 VEX_W_0F3A33_L_0): Delete.
348 (dis386): Adjust "BW" description.
349 (vex_len_table): Refer to mod_table[] for opcodes 0F3A30,
350 0F3A31, 0F3A32, and 0F3A33.
351 (vex_w_table): Delete opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
353 (mod_table): Replace opcode 0F3A30, 0F3A31, 0F3A32, and 0F3A33
356 2020-07-14 Jan Beulich <jbeulich@suse.com>
358 * i386-dis.c (PREFIX_0F6C, PREFIX_0F6D, PREFIX_0F73_REG_3,
359 PREFIX_0F73_REG_7, PREFIX_0F3810, PREFIX_0F3814, PREFIX_0F3815,
360 PREFIX_0F3817, PREFIX_0F3820, PREFIX_0F3821, PREFIX_0F3822,
361 PREFIX_0F3823, PREFIX_0F3824, PREFIX_0F3825, PREFIX_0F3828,
362 PREFIX_0F3829, PREFIX_0F382A, PREFIX_0F382B, PREFIX_0F3830,
363 PREFIX_0F3831, PREFIX_0F3832, PREFIX_0F3833, PREFIX_0F3834,
364 PREFIX_0F3835, PREFIX_0F3837, PREFIX_0F3838, PREFIX_0F3839,
365 PREFIX_0F383A, PREFIX_0F383B, PREFIX_0F383C, PREFIX_0F383D,
366 PREFIX_0F383E, PREFIX_0F383F, PREFIX_0F3840, PREFIX_0F3841,
367 PREFIX_0F3880, PREFIX_0F3881, PREFIX_0F3882, PREFIX_0F38CF,
368 PREFIX_0F38DB, PREFIX_0F38DC, PREFIX_0F38DD, PREFIX_0F38DE,
369 PREFIX_0F38DF, PREFIX_0F38F5, PREFIX_0F3A08, PREFIX_0F3A09,
370 PREFIX_0F3A0A, PREFIX_0F3A0B, PREFIX_0F3A0C, PREFIX_0F3A0D,
371 PREFIX_0F3A0E, PREFIX_0F3A14, PREFIX_0F3A15, PREFIX_0F3A16,
372 PREFIX_0F3A17, PREFIX_0F3A20, PREFIX_0F3A21, PREFIX_0F3A22,
373 PREFIX_0F3A40, PREFIX_0F3A41, PREFIX_0F3A42, PREFIX_0F3A44,
374 PREFIX_0F3A60, PREFIX_0F3A61, PREFIX_0F3A62, PREFIX_0F3A63,
375 PREFIX_0F3ACE, PREFIX_0F3ACF, PREFIX_0F3ADF, PREFIX_VEX_0F60,
376 PREFIX_VEX_0F61, PREFIX_VEX_0F62, PREFIX_VEX_0F63,
377 PREFIX_VEX_0F64, PREFIX_VEX_0F65, PREFIX_VEX_0F66,
378 PREFIX_VEX_0F67, PREFIX_VEX_0F68, PREFIX_VEX_0F69,
379 PREFIX_VEX_0F6A, PREFIX_VEX_0F6B, PREFIX_VEX_0F6C,
380 PREFIX_VEX_0F6D, PREFIX_VEX_0F6E, PREFIX_VEX_0F71_REG_2,
381 PREFIX_VEX_0F71_REG_4, PREFIX_VEX_0F71_REG_6,
382 PREFIX_VEX_0F72_REG_2, PREFIX_VEX_0F72_REG_4,
383 PREFIX_VEX_0F72_REG_6, PREFIX_VEX_0F73_REG_2,
384 PREFIX_VEX_0F73_REG_3, PREFIX_VEX_0F73_REG_6,
385 PREFIX_VEX_0F73_REG_7, PREFIX_VEX_0F74,
386 PREFIX_VEX_0F75, PREFIX_VEX_0F76, PREFIX_VEX_0FC4,
387 PREFIX_VEX_0FC5, PREFIX_VEX_0FD1, PREFIX_VEX_0FD2,
388 PREFIX_VEX_0FD3, PREFIX_VEX_0FD4, PREFIX_VEX_0FD5,
389 PREFIX_VEX_0FD6, PREFIX_VEX_0FD7, PREFIX_VEX_0FD8,
390 PREFIX_VEX_0FD9, PREFIX_VEX_0FDA, PREFIX_VEX_0FDB,
391 PREFIX_VEX_0FDC, PREFIX_VEX_0FDD, PREFIX_VEX_0FDE,
392 PREFIX_VEX_0FDF, PREFIX_VEX_0FE0, PREFIX_VEX_0FE1,
393 PREFIX_VEX_0FE2, PREFIX_VEX_0FE3, PREFIX_VEX_0FE4,
394 PREFIX_VEX_0FE5, PREFIX_VEX_0FE7, PREFIX_VEX_0FE8,
395 PREFIX_VEX_0FE9, PREFIX_VEX_0FEA, PREFIX_VEX_0FEB,
396 PREFIX_VEX_0FEC, PREFIX_VEX_0FED, PREFIX_VEX_0FEE,
397 PREFIX_VEX_0FEF, PREFIX_VEX_0FF1, PREFIX_VEX_0FF2,
398 PREFIX_VEX_0FF3, PREFIX_VEX_0FF4, PREFIX_VEX_0FF5,
399 PREFIX_VEX_0FF6, PREFIX_VEX_0FF7, PREFIX_VEX_0FF8,
400 PREFIX_VEX_0FF9, PREFIX_VEX_0FFA, PREFIX_VEX_0FFB,
401 PREFIX_VEX_0FFC, PREFIX_VEX_0FFD, PREFIX_VEX_0FFE,
402 PREFIX_VEX_0F3800, PREFIX_VEX_0F3801, PREFIX_VEX_0F3802,
403 PREFIX_VEX_0F3803, PREFIX_VEX_0F3804, PREFIX_VEX_0F3805,
404 PREFIX_VEX_0F3806, PREFIX_VEX_0F3807, PREFIX_VEX_0F3808,
405 PREFIX_VEX_0F3809, PREFIX_VEX_0F380A, PREFIX_VEX_0F380B,
406 PREFIX_VEX_0F380C, PREFIX_VEX_0F380D, PREFIX_VEX_0F380E,
407 PREFIX_VEX_0F380F, PREFIX_VEX_0F3813, PREFIX_VEX_0F3816,
408 PREFIX_VEX_0F3817, PREFIX_VEX_0F3818, PREFIX_VEX_0F3819,
409 PREFIX_VEX_0F381A, PREFIX_VEX_0F381C, PREFIX_VEX_0F381D,
410 PREFIX_VEX_0F381E, PREFIX_VEX_0F3820, PREFIX_VEX_0F3821,
411 PREFIX_VEX_0F3822, PREFIX_VEX_0F3823, PREFIX_VEX_0F3824,
412 PREFIX_VEX_0F3825, PREFIX_VEX_0F3828, PREFIX_VEX_0F3829,
413 PREFIX_VEX_0F382A, PREFIX_VEX_0F382B, PREFIX_VEX_0F382C,
414 PREFIX_VEX_0F382D, PREFIX_VEX_0F382E, PREFIX_VEX_0F382F,
415 PREFIX_VEX_0F3830, PREFIX_VEX_0F3831, PREFIX_VEX_0F3832,
416 PREFIX_VEX_0F3833, PREFIX_VEX_0F3834, PREFIX_VEX_0F3835,
417 PREFIX_VEX_0F3836, PREFIX_VEX_0F3837, PREFIX_VEX_0F3838,
418 PREFIX_VEX_0F3839, PREFIX_VEX_0F383A, PREFIX_VEX_0F383B,
419 PREFIX_VEX_0F383C, PREFIX_VEX_0F383D, PREFIX_VEX_0F383E,
420 PREFIX_VEX_0F383F, PREFIX_VEX_0F3840, PREFIX_VEX_0F3841,
421 PREFIX_VEX_0F3845, PREFIX_VEX_0F3846, PREFIX_VEX_0F3847,
422 PREFIX_VEX_0F3858, PREFIX_VEX_0F3859, PREFIX_VEX_0F385A,
423 PREFIX_VEX_0F3878, PREFIX_VEX_0F3879, PREFIX_VEX_0F388C,
424 PREFIX_VEX_0F388E, PREFIX_VEX_0F3890, PREFIX_VEX_0F3891,
425 PREFIX_VEX_0F3892, PREFIX_VEX_0F3893, PREFIX_VEX_0F3896,
426 PREFIX_VEX_0F3897, PREFIX_VEX_0F3898, PREFIX_VEX_0F3899,
427 PREFIX_VEX_0F389A, PREFIX_VEX_0F389B, PREFIX_VEX_0F389C,
428 PREFIX_VEX_0F389D, PREFIX_VEX_0F389E, PREFIX_VEX_0F389F,
429 PREFIX_VEX_0F38A6, PREFIX_VEX_0F38A7, PREFIX_VEX_0F38A8,
430 PREFIX_VEX_0F38A9, PREFIX_VEX_0F38AA, PREFIX_VEX_0F38AB,
431 PREFIX_VEX_0F38AC, PREFIX_VEX_0F38AD, PREFIX_VEX_0F38AE,
432 PREFIX_VEX_0F38AF, PREFIX_VEX_0F38B6, PREFIX_VEX_0F38B7,
433 PREFIX_VEX_0F38B8, PREFIX_VEX_0F38B9, PREFIX_VEX_0F38BA,
434 PREFIX_VEX_0F38BB, PREFIX_VEX_0F38BC, PREFIX_VEX_0F38BD,
435 PREFIX_VEX_0F38BE, PREFIX_VEX_0F38BF, PREFIX_VEX_0F38CF,
436 PREFIX_VEX_0F38DB, PREFIX_VEX_0F38DC, PREFIX_VEX_0F38DD,
437 PREFIX_VEX_0F38DE, PREFIX_VEX_0F38DF, PREFIX_VEX_0F3A00,
438 PREFIX_VEX_0F3A01, PREFIX_VEX_0F3A02, PREFIX_VEX_0F3A04,
439 PREFIX_VEX_0F3A05, PREFIX_VEX_0F3A06, PREFIX_VEX_0F3A08,
440 PREFIX_VEX_0F3A09, PREFIX_VEX_0F3A0A, PREFIX_VEX_0F3A0B,
441 PREFIX_VEX_0F3A0C, PREFIX_VEX_0F3A0D, PREFIX_VEX_0F3A0E,
442 PREFIX_VEX_0F3A0F, PREFIX_VEX_0F3A14, PREFIX_VEX_0F3A15,
443 PREFIX_VEX_0F3A16, PREFIX_VEX_0F3A17, PREFIX_VEX_0F3A18,
444 PREFIX_VEX_0F3A19, PREFIX_VEX_0F3A1D, PREFIX_VEX_0F3A20,
445 PREFIX_VEX_0F3A21, PREFIX_VEX_0F3A22, PREFIX_VEX_0F3A30,
446 PREFIX_VEX_0F3A31, PREFIX_VEX_0F3A32, PREFIX_VEX_0F3A33,
447 PREFIX_VEX_0F3A38, PREFIX_VEX_0F3A39, PREFIX_VEX_0F3A40,
448 PREFIX_VEX_0F3A41, PREFIX_VEX_0F3A42, PREFIX_VEX_0F3A44,
449 PREFIX_VEX_0F3A46, PREFIX_VEX_0F3A48, PREFIX_VEX_0F3A49,
450 PREFIX_VEX_0F3A4A, PREFIX_VEX_0F3A4B, PREFIX_VEX_0F3A4C,
451 PREFIX_VEX_0F3A5C, PREFIX_VEX_0F3A5D, PREFIX_VEX_0F3A5E,
452 PREFIX_VEX_0F3A5F, PREFIX_VEX_0F3A60, PREFIX_VEX_0F3A61,
453 PREFIX_VEX_0F3A62, PREFIX_VEX_0F3A63, PREFIX_VEX_0F3A68,
454 PREFIX_VEX_0F3A69, PREFIX_VEX_0F3A6A, PREFIX_VEX_0F3A6B,
455 PREFIX_VEX_0F3A6C, PREFIX_VEX_0F3A6D, PREFIX_VEX_0F3A6E,
456 PREFIX_VEX_0F3A6F, PREFIX_VEX_0F3A78, PREFIX_VEX_0F3A79,
457 PREFIX_VEX_0F3A7A, PREFIX_VEX_0F3A7B, PREFIX_VEX_0F3A7C,
458 PREFIX_VEX_0F3A7D, PREFIX_VEX_0F3A7E, PREFIX_VEX_0F3A7F,
459 PREFIX_VEX_0F3ACE, PREFIX_VEX_0F3ACF, PREFIX_VEX_0F3ADF,
460 PREFIX_EVEX_0F64, PREFIX_EVEX_0F65, PREFIX_EVEX_0F66,
461 PREFIX_EVEX_0F6E, PREFIX_EVEX_0F71_REG_2,
462 PREFIX_EVEX_0F71_REG_4, PREFIX_EVEX_0F71_REG_6,
463 PREFIX_EVEX_0F72_REG_0, PREFIX_EVEX_0F72_REG_1,
464 PREFIX_EVEX_0F72_REG_2, PREFIX_EVEX_0F72_REG_4,
465 PREFIX_EVEX_0F72_REG_6, PREFIX_EVEX_0F73_REG_2,
466 PREFIX_EVEX_0F73_REG_3, PREFIX_EVEX_0F73_REG_6,
467 PREFIX_EVEX_0F73_REG_7, PREFIX_EVEX_0F74, PREFIX_EVEX_0F75,
468 PREFIX_EVEX_0F76, PREFIX_EVEX_0FC4, PREFIX_EVEX_0FC5,
469 PREFIX_EVEX_0FD6, PREFIX_EVEX_0FDB, PREFIX_EVEX_0FDF,
470 PREFIX_EVEX_0FE2, PREFIX_EVEX_0FE7, PREFIX_EVEX_0FEB,
471 PREFIX_EVEX_0FEF, PREFIX_EVEX_0F380D, PREFIX_EVEX_0F3816,
472 PREFIX_EVEX_0F3819, PREFIX_EVEX_0F381A, PREFIX_EVEX_0F381B,
473 PREFIX_EVEX_0F381E, PREFIX_EVEX_0F381F, PREFIX_EVEX_0F382C,
474 PREFIX_EVEX_0F382D, PREFIX_EVEX_0F3836, PREFIX_EVEX_0F3837,
475 PREFIX_EVEX_0F383B, PREFIX_EVEX_0F383D, PREFIX_EVEX_0F383F,
476 PREFIX_EVEX_0F3840, PREFIX_EVEX_0F3842, PREFIX_EVEX_0F3843,
477 PREFIX_EVEX_0F3844, PREFIX_EVEX_0F3845, PREFIX_EVEX_0F3846,
478 PREFIX_EVEX_0F3847, PREFIX_EVEX_0F384C, PREFIX_EVEX_0F384D,
479 PREFIX_EVEX_0F384E, PREFIX_EVEX_0F384F, PREFIX_EVEX_0F3850,
480 PREFIX_EVEX_0F3851, PREFIX_EVEX_0F3854, PREFIX_EVEX_0F3855,
481 PREFIX_EVEX_0F3859, PREFIX_EVEX_0F385A, PREFIX_EVEX_0F385B,
482 PREFIX_EVEX_0F3862, PREFIX_EVEX_0F3863, PREFIX_EVEX_0F3864,
483 PREFIX_EVEX_0F3865, PREFIX_EVEX_0F3866, PREFIX_EVEX_0F3870,
484 PREFIX_EVEX_0F3871, PREFIX_EVEX_0F3873, PREFIX_EVEX_0F3875,
485 PREFIX_EVEX_0F3876, PREFIX_EVEX_0F3877, PREFIX_EVEX_0F387A,
486 PREFIX_EVEX_0F387B, PREFIX_EVEX_0F387C, PREFIX_EVEX_0F387D,
487 PREFIX_EVEX_0F387E, PREFIX_EVEX_0F387F, PREFIX_EVEX_0F3883,
488 PREFIX_EVEX_0F3888, PREFIX_EVEX_0F3889, PREFIX_EVEX_0F388A,
489 PREFIX_EVEX_0F388B, PREFIX_EVEX_0F388D, PREFIX_EVEX_0F388F,
490 PREFIX_EVEX_0F3890, PREFIX_EVEX_0F3891, PREFIX_EVEX_0F3892,
491 PREFIX_EVEX_0F3893, PREFIX_EVEX_0F38A0, PREFIX_EVEX_0F38A1,
492 PREFIX_EVEX_0F38A2, PREFIX_EVEX_0F38A3, PREFIX_EVEX_0F38B4,
493 PREFIX_EVEX_0F38B5, PREFIX_EVEX_0F38C4,
494 PREFIX_EVEX_0F38C6_REG_1, PREFIX_EVEX_0F38C6_REG_2,
495 PREFIX_EVEX_0F38C6_REG_5, PREFIX_EVEX_0F38C6_REG_6,
496 PREFIX_EVEX_0F38C7_REG_1, PREFIX_EVEX_0F38C7_REG_2,
497 PREFIX_EVEX_0F38C7_REG_5, PREFIX_EVEX_0F38C7_REG_6,
498 PREFIX_EVEX_0F38C8, PREFIX_EVEX_0F38CA, PREFIX_EVEX_0F38CB,
499 PREFIX_EVEX_0F38CC, PREFIX_EVEX_0F38CD, PREFIX_EVEX_0F3A00,
500 PREFIX_EVEX_0F3A01, PREFIX_EVEX_0F3A03, PREFIX_EVEX_0F3A05,
501 PREFIX_EVEX_0F3A08, PREFIX_EVEX_0F3A09, PREFIX_EVEX_0F3A0A,
502 PREFIX_EVEX_0F3A0B, PREFIX_EVEX_0F3A14, PREFIX_EVEX_0F3A15,
503 PREFIX_EVEX_0F3A16, PREFIX_EVEX_0F3A17, PREFIX_EVEX_0F3A18,
504 PREFIX_EVEX_0F3A19, PREFIX_EVEX_0F3A1A, PREFIX_EVEX_0F3A1B,
505 PREFIX_EVEX_0F3A1E, PREFIX_EVEX_0F3A1F, PREFIX_EVEX_0F3A20,
506 PREFIX_EVEX_0F3A21, PREFIX_EVEX_0F3A22, PREFIX_EVEX_0F3A23,
507 PREFIX_EVEX_0F3A25, PREFIX_EVEX_0F3A26, PREFIX_EVEX_0F3A27,
508 PREFIX_EVEX_0F3A38, PREFIX_EVEX_0F3A39, PREFIX_EVEX_0F3A3A,
509 PREFIX_EVEX_0F3A3B, PREFIX_EVEX_0F3A3E, PREFIX_EVEX_0F3A3F,
510 PREFIX_EVEX_0F3A42, PREFIX_EVEX_0F3A43, PREFIX_EVEX_0F3A50,
511 PREFIX_EVEX_0F3A51, PREFIX_EVEX_0F3A54, PREFIX_EVEX_0F3A55,
512 PREFIX_EVEX_0F3A56, PREFIX_EVEX_0F3A57, PREFIX_EVEX_0F3A66,
513 PREFIX_EVEX_0F3A67, PREFIX_EVEX_0F3A70, PREFIX_EVEX_0F3A71,
514 PREFIX_EVEX_0F3A72, PREFIX_EVEX_0F3A73): Delete.
515 (MOD_0F382A_PREFIX_2, MOD_0F38F5_PREFIX_2,
516 MOD_VEX_0FD7_PREFIX_2, MOD_VEX_0FE7_PREFIX_2,
517 MOD_VEX_0F381A_PREFIX_2, MOD_VEX_0F382A_PREFIX_2,
518 MOD_VEX_0F382C_PREFIX_2, MOD_VEX_0F382D_PREFIX_2,
519 MOD_VEX_0F382E_PREFIX_2, MOD_VEX_0F382F_PREFIX_2,
520 MOD_VEX_0F385A_PREFIX_2, MOD_VEX_0F388C_PREFIX_2,
521 MOD_VEX_0F388E_PREFIX_2, MOD_VEX_W_0_0F3A30_P_2_LEN_0,
522 MOD_VEX_W_1_0F3A30_P_2_LEN_0, MOD_VEX_W_0_0F3A31_P_2_LEN_0,
523 MOD_VEX_W_1_0F3A31_P_2_LEN_0, MOD_VEX_W_0_0F3A32_P_2_LEN_0,
524 MOD_VEX_W_1_0F3A32_P_2_LEN_0, MOD_VEX_W_0_0F3A33_P_2_LEN_0,
525 MOD_VEX_W_1_0F3A33_P_2_LEN_0, MOD_EVEX_0F381A_P_2_W_0,
526 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
527 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
528 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0,
529 MOD_EVEX_0F385B_P_2_W_1, VEX_LEN_0F6E_P_2,
530 VEX_LEN_0FC4_P_2, VEX_LEN_0FC5_P_2, VEX_LEN_0FD6_P_2,
531 VEX_LEN_0FF7_P_2, VEX_LEN_0F3816_P_2, VEX_LEN_0F3819_P_2,
532 VEX_LEN_0F381A_P_2_M_0, VEX_LEN_0F3836_P_2,
533 VEX_LEN_0F3841_P_2, VEX_LEN_0F385A_P_2_M_0,
534 VEX_LEN_0F38DB_P_2, VEX_LEN_0F3A00_P_2, VEX_LEN_0F3A01_P_2,
535 VEX_LEN_0F3A06_P_2, VEX_LEN_0F3A14_P_2, VEX_LEN_0F3A15_P_2,
536 VEX_LEN_0F3A16_P_2, VEX_LEN_0F3A17_P_2, VEX_LEN_0F3A18_P_2,
537 VEX_LEN_0F3A19_P_2, VEX_LEN_0F3A20_P_2, VEX_LEN_0F3A21_P_2,
538 VEX_LEN_0F3A22_P_2, VEX_LEN_0F3A30_P_2, VEX_LEN_0F3A31_P_2,
539 VEX_LEN_0F3A32_P_2, VEX_LEN_0F3A33_P_2, VEX_LEN_0F3A38_P_2,
540 VEX_LEN_0F3A39_P_2, VEX_LEN_0F3A41_P_2, VEX_LEN_0F3A46_P_2,
541 VEX_LEN_0F3A60_P_2, VEX_LEN_0F3A61_P_2, VEX_LEN_0F3A62_P_2,
542 VEX_LEN_0F3A63_P_2, VEX_LEN_0F3ADF_P_2, EVEX_LEN_0F6E_P_2,
543 EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2, EVEX_LEN_0FD6_P_2,
544 EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3819_P_2_W_0,
545 EVEX_LEN_0F3819_P_2_W_1, EVEX_LEN_0F381A_P_2_W_0_M_0,
546 EVEX_LEN_0F381A_P_2_W_1_M_0, EVEX_LEN_0F381B_P_2_W_0_M_0,
547 EVEX_LEN_0F381B_P_2_W_1_M_0, EVEX_LEN_0F3836_P_2,
548 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
549 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0,
550 EVEX_LEN_0F38C6_REG_1_PREFIX_2, EVEX_LEN_0F38C6_REG_2_PREFIX_2,
551 EVEX_LEN_0F38C6_REG_5_PREFIX_2, EVEX_LEN_0F38C6_REG_6_PREFIX_2,
552 EVEX_LEN_0F38C7_R_1_P_2_W_0, EVEX_LEN_0F38C7_R_1_P_2_W_1,
553 EVEX_LEN_0F38C7_R_2_P_2_W_0, EVEX_LEN_0F38C7_R_2_P_2_W_1,
554 EVEX_LEN_0F38C7_R_5_P_2_W_0, EVEX_LEN_0F38C7_R_5_P_2_W_1,
555 EVEX_LEN_0F38C7_R_6_P_2_W_0, EVEX_LEN_0F38C7_R_6_P_2_W_1,
556 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1,
557 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
558 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A18_P_2_W_0,
559 EVEX_LEN_0F3A18_P_2_W_1, EVEX_LEN_0F3A19_P_2_W_0,
560 EVEX_LEN_0F3A19_P_2_W_1, EVEX_LEN_0F3A1A_P_2_W_0,
561 EVEX_LEN_0F3A1A_P_2_W_1, EVEX_LEN_0F3A1B_P_2_W_0,
562 EVEX_LEN_0F3A1B_P_2_W_1, EVEX_LEN_0F3A20_P_2,
563 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2,
564 EVEX_LEN_0F3A23_P_2_W_0, EVEX_LEN_0F3A23_P_2_W_1,
565 EVEX_LEN_0F3A38_P_2_W_0, EVEX_LEN_0F3A38_P_2_W_1,
566 EVEX_LEN_0F3A39_P_2_W_0, EVEX_LEN_0F3A39_P_2_W_1,
567 EVEX_LEN_0F3A3A_P_2_W_0, EVEX_LEN_0F3A3A_P_2_W_1,
568 EVEX_LEN_0F3A3B_P_2_W_0, EVEX_LEN_0F3A3B_P_2_W_1,
569 EVEX_LEN_0F3A43_P_2_W_0, EVEX_LEN_0F3A43_P_2_W_1
570 VEX_W_0F380C_P_2, VEX_W_0F380D_P_2, VEX_W_0F380E_P_2,
571 VEX_W_0F380F_P_2, VEX_W_0F3813_P_2, VEX_W_0F3816_P_2,
572 VEX_W_0F3818_P_2, VEX_W_0F3819_P_2,
573 VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F382C_P_2_M_0,
574 VEX_W_0F382D_P_2_M_0, VEX_W_0F382E_P_2_M_0,
575 VEX_W_0F382F_P_2_M_0, VEX_W_0F3836_P_2,
576 VEX_W_0F3846_P_2, VEX_W_0F3858_P_2, VEX_W_0F3859_P_2,
577 VEX_W_0F385A_P_2_M_0_L_0, VEX_W_0F3878_P_2,
578 VEX_W_0F3879_P_2, VEX_W_0F38CF_P_2, VEX_W_0F3A00_P_2,
579 VEX_W_0F3A01_P_2, VEX_W_0F3A02_P_2, VEX_W_0F3A04_P_2,
580 VEX_W_0F3A05_P_2, VEX_W_0F3A06_P_2_L_0,
581 VEX_W_0F3A18_P_2_L_0, VEX_W_0F3A19_P_2_L_0,
582 VEX_W_0F3A1D_P_2, VEX_W_0F3A30_P_2_LEN_0,
583 VEX_W_0F3A31_P_2_LEN_0, VEX_W_0F3A32_P_2_LEN_0,
584 VEX_W_0F3A33_P_2_LEN_0, VEX_W_0F3A38_P_2_L_0,
585 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0,
586 VEX_W_0F3A4A_P_2, VEX_W_0F3A4B_P_2, VEX_W_0F3A4C_P_2,
587 VEX_W_0F3ACE_P_2, VEX_W_0F3ACF_P_2, EVEX_W_0F66_P_2,
588 EVEX_W_0F72_R_2_P_2, EVEX_W_0F72_R_6_P_2,
589 EVEX_W_0F73_R_2_P_2, EVEX_W_0F73_R_6_P_2,
590 EVEX_W_0F76_P_2, EVEX_W_0FD6_P_2, EVEX_W_0FE7_P_2,
591 EVEX_W_0F380D_P_2, EVEX_W_0F3819_P_2,
592 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2,
593 EVEX_W_0F381E_P_2, EVEX_W_0F381F_P_2,
594 EVEX_W_0F3837_P_2, EVEX_W_0F3859_P_2,
595 EVEX_W_0F385A_P_2, EVEX_W_0F385B_P_2,
596 EVEX_W_0F3870_P_2, EVEX_W_0F387A_P_2,
597 EVEX_W_0F387B_P_2, EVEX_W_0F3883_P_2,
598 EVEX_W_0F3891_P_2, EVEX_W_0F3893_P_2,
599 EVEX_W_0F38A1_P_2, EVEX_W_0F38A3_P_2,
600 EVEX_W_0F38C7_R_1_P_2, EVEX_W_0F38C7_R_2_P_2,
601 EVEX_W_0F38C7_R_5_P_2, EVEX_W_0F38C7_R_6_P_2,
602 EVEX_W_0F3A00_P_2, EVEX_W_0F3A01_P_2,
603 EVEX_W_0F3A05_P_2, EVEX_W_0F3A08_P_2,
604 EVEX_W_0F3A09_P_2, EVEX_W_0F3A0A_P_2,
605 EVEX_W_0F3A0B_P_2, EVEX_W_0F3A18_P_2,
606 EVEX_W_0F3A19_P_2, EVEX_W_0F3A1A_P_2,
607 EVEX_W_0F3A1B_P_2, EVEX_W_0F3A21_P_2,
608 EVEX_W_0F3A23_P_2, EVEX_W_0F3A38_P_2,
609 EVEX_W_0F3A39_P_2, EVEX_W_0F3A3A_P_2,
610 EVEX_W_0F3A3B_P_2, EVEX_W_0F3A42_P_2,
611 EVEX_W_0F3A43_P_2, EVEX_W_0F3A70_P_2,
612 EVEX_W_0F3A72_P_2): Rename to ...
613 (MOD_0F382A, MOD_0F38F5, MOD_VEX_0FD7, MOD_VEX_0FE7,
614 MOD_VEX_0F381A, MOD_VEX_0F382A, MOD_VEX_0F382C, MOD_VEX_0F382D,
615 MOD_VEX_0F382E, MOD_VEX_0F382F, MOD_VEX_0F385A, MOD_VEX_0F388C,
616 MOD_VEX_0F388E, MOD_VEX_0F3A30_L_0_W_0,
617 MOD_VEX_0F3A30_L_0_W_1, MOD_VEX_0F3A31_L_0_W_0,
618 MOD_VEX_0F3A31_L_0_W_1, MOD_VEX_0F3A32_L_0_W_0,
619 MOD_VEX_0F3A32_L_0_W_1, MOD_VEX_0F3A33_L_0_W_0,
620 MOD_VEX_0F3A33_L_0_W_1, MOD_EVEX_0F381A_W_0,
621 MOD_EVEX_0F381A_W_1, MOD_EVEX_0F381B_W_0, MOD_EVEX_0F381B_W_1,
622 MOD_EVEX_0F385A_W_0, MOD_EVEX_0F385A_W_1, MOD_EVEX_0F385B_W_0,
623 MOD_EVEX_0F385B_W_1, VEX_LEN_0F6E, VEX_LEN_0FC4, VEX_LEN_0FC5,
624 VEX_LEN_0FD6, VEX_LEN_0FF7, VEX_LEN_0F3816, VEX_LEN_0F3819,
625 VEX_LEN_0F381A_M_0, VEX_LEN_0F3836, VEX_LEN_0F3841,
626 VEX_LEN_0F385A_M_0, VEX_LEN_0F38DB, VEX_LEN_0F3A00,
627 VEX_LEN_0F3A01, VEX_LEN_0F3A06, VEX_LEN_0F3A14, VEX_LEN_0F3A15,
628 VEX_LEN_0F3A16, VEX_LEN_0F3A17, VEX_LEN_0F3A18, VEX_LEN_0F3A19,
629 VEX_LEN_0F3A20, VEX_LEN_0F3A21, VEX_LEN_0F3A22, VEX_LEN_0F3A30,
630 VEX_LEN_0F3A31, VEX_LEN_0F3A32, VEX_LEN_0F3A33, VEX_LEN_0F3A38,
631 VEX_LEN_0F3A39, VEX_LEN_0F3A41, VEX_LEN_0F3A46, VEX_LEN_0F3A60,
632 VEX_LEN_0F3A61, VEX_LEN_0F3A62, VEX_LEN_0F3A63, VEX_LEN_0F3ADF,
633 EVEX_LEN_0F6E, EVEX_LEN_0FC4, EVEX_LEN_0FC5, EVEX_LEN_0FD6,
634 EVEX_LEN_0F3816, EVEX_LEN_0F3819_W_0, EVEX_LEN_0F3819_W_1,
635 EVEX_LEN_0F381A_W_0_M_0, EVEX_LEN_0F381A_W_1_M_0,
636 EVEX_LEN_0F381B_W_0_M_0, EVEX_LEN_0F381B_W_1_M_0,
637 EVEX_LEN_0F3836, EVEX_LEN_0F385A_W_0_M_0,
638 EVEX_LEN_0F385A_W_1_M_0, EVEX_LEN_0F385B_W_0_M_0,
639 EVEX_LEN_0F385B_W_1_M_0, EVEX_LEN_0F38C6_R_1_M_0,
640 EVEX_LEN_0F38C6_R_2_M_0, EVEX_LEN_0F38C6_R_5_M_0,
641 EVEX_LEN_0F38C6_R_6_M_0, EVEX_LEN_0F38C7_R_1_M_0_W_0,
642 EVEX_LEN_0F38C7_R_1_M_0_W_1, EVEX_LEN_0F38C7_R_2_M_0_W_0,
643 EVEX_LEN_0F38C7_R_2_M_0_W_1, EVEX_LEN_0F38C7_R_5_M_0_W_0,
644 EVEX_LEN_0F38C7_R_5_M_0_W_1, EVEX_LEN_0F38C7_R_6_M_0_W_0,
645 EVEX_LEN_0F38C7_R_6_M_0_W_1, EVEX_LEN_0F3A00_W_1,
646 EVEX_LEN_0F3A01_W_1, EVEX_LEN_0F3A14, EVEX_LEN_0F3A15,
647 EVEX_LEN_0F3A16, EVEX_LEN_0F3A17, EVEX_LEN_0F3A18_W_0,
648 EVEX_LEN_0F3A18_W_1, EVEX_LEN_0F3A19_W_0,
649 EVEX_LEN_0F3A19_W_1, EVEX_LEN_0F3A1A_W_0,
650 EVEX_LEN_0F3A1A_W_1, EVEX_LEN_0F3A1B_W_0,
651 EVEX_LEN_0F3A1B_W_1, EVEX_LEN_0F3A20, EVEX_LEN_0F3A21_W_0,
652 EVEX_LEN_0F3A22, EVEX_LEN_0F3A23_W_0, EVEX_LEN_0F3A23_W_1,
653 EVEX_LEN_0F3A38_W_0, EVEX_LEN_0F3A38_W_1,
654 EVEX_LEN_0F3A39_W_0, EVEX_LEN_0F3A39_W_1,
655 EVEX_LEN_0F3A3A_W_0, EVEX_LEN_0F3A3A_W_1,
656 EVEX_LEN_0F3A3B_W_0, EVEX_LEN_0F3A3B_W_1,
657 EVEX_LEN_0F3A43_W_0, EVEX_LEN_0F3A43_W_1
658 VEX_W_0F380C, VEX_W_0F380D, VEX_W_0F380E, VEX_W_0F380F,
659 VEX_W_0F3813, VEX_W_0F3816_L_1, VEX_W_0F3818,
660 VEX_W_0F3819_L_1, VEX_W_0F381A_M_0_L_1, VEX_W_0F382C_M_0,
661 VEX_W_0F382D_M_0, VEX_W_0F382E_M_0, VEX_W_0F382F_M_0,
662 VEX_W_0F3836, VEX_W_0F3846, VEX_W_0F3858, VEX_W_0F3859,
663 VEX_W_0F385A_M_0_L_0, VEX_W_0F3878, VEX_W_0F3879,
664 VEX_W_0F38CF, VEX_W_0F3A00_L_1, VEX_W_0F3A01_L_1,
665 VEX_W_0F3A02, VEX_W_0F3A04, VEX_W_0F3A05, VEX_W_0F3A06_L_1,
666 VEX_W_0F3A18_L_1, VEX_W_0F3A19_L_1, VEX_W_0F3A1D,
667 VEX_W_0F3A30_L_0, VEX_W_0F3A31_L_0, VEX_W_0F3A32_L_0,
668 VEX_W_0F3A33_L_0, VEX_W_0F3A38_L_1, VEX_W_0F3A39_L_1,
669 VEX_W_0F3A46_L_1, VEX_W_0F3A4A, VEX_W_0F3A4B, VEX_W_0F3A4C,
670 VEX_W_0F3ACE, VEX_W_0F3ACF, EVEX_W_0F66, EVEX_W_0F72_R_2,
671 EVEX_W_0F72_R_6, EVEX_W_0F73_R_2, EVEX_W_0F73_R_6,
672 EVEX_W_0F76, EVEX_W_0FD6_L_0, EVEX_W_0FE7, EVEX_W_0F380D,
673 EVEX_W_0F3819, EVEX_W_0F381A, EVEX_W_0F381B, EVEX_W_0F381E,
674 EVEX_W_0F381F, EVEX_W_0F3837, EVEX_W_0F3859, EVEX_W_0F385A,
675 EVEX_W_0F385B, EVEX_W_0F3870, EVEX_W_0F387A, EVEX_W_0F387B,
676 EVEX_W_0F3883, EVEX_W_0F3891, EVEX_W_0F3893, EVEX_W_0F38A1,
677 EVEX_W_0F38A3, EVEX_W_0F38C7_R_1_M_0,
678 EVEX_W_0F38C7_R_2_M_0, EVEX_W_0F38C7_R_5_M_0,
679 EVEX_W_0F38C7_R_6_M_0, EVEX_W_0F3A00, EVEX_W_0F3A01,
680 EVEX_W_0F3A05, EVEX_W_0F3A08, EVEX_W_0F3A09, EVEX_W_0F3A0A,
681 EVEX_W_0F3A0B, EVEX_W_0F3A18, EVEX_W_0F3A19, EVEX_W_0F3A1A,
682 EVEX_W_0F3A1B, EVEX_W_0F3A21, EVEX_W_0F3A23, EVEX_W_0F3A38,
683 EVEX_W_0F3A39, EVEX_W_0F3A3A, EVEX_W_0F3A3B, EVEX_W_0F3A42,
684 EVEX_W_0F3A43, EVEX_W_0F3A70, EVEX_W_0F3A72): ... these
686 (dis386_twobyte, three_byte_table, vex_table, vex_len_table,
687 vex_w_table, mod_table): Replace / remove respective entries.
688 (print_insn): Move up dp->prefix_requirement handling. Handle
690 * i386-dis-evex.h, i386-dis-evex-len.h, i386-dis-evex-mod.h,
691 i386-dis-evex-prefix.h, i386-dis-evex-reg.h, i386-dis-evex-w.h:
692 Replace / remove respective entries.
694 2020-07-14 Jan Beulich <jbeulich@suse.com>
696 * i386-dis.c (PREFIX_EVEX_0F2C, PREFIX_EVEX_0F2D,
697 PREFIX_EVEX_0F2E, PREFIX_EVEX_0F2F): Delete.
698 (prefix_table): Add EXxEVexS operand to vcvttss2si, vcvttsd2si,
699 vcvtss2si, vcvtsd2si, vucomiss, and vucomisd table entries.
700 Retain X macro and PREFIX_OPCODE use from tjhe EVEX table for
702 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
703 0F2C, 0F2D, 0F2E, and 0F2F.
704 * i386-dis-evex-prefix.h: Delete opcode 0F2C, 0F2D, 0F2E, and
707 2020-07-14 Jan Beulich <jbeulich@suse.com>
709 * i386-dis.c (OP_VexR, VexScalarR): New.
710 (OP_EX_Vex, OP_XMM_Vex, EXdVexScalarS, EXqVexScalarS,
711 XMVexScalar, d_scalar_swap_mode, q_scalar_swap_mode,
712 need_vex_reg): Delete.
713 (prefix_table): Replace VexScalar by VexScalarR and
714 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
715 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
716 (vex_len_table): Replace EXqVexScalarS by EXqS.
717 (get_valid_dis386): Don't set need_vex_reg.
718 (print_insn): Don't initialize need_vex_reg.
719 (intel_operand_size, OP_E_memory): Drop d_scalar_swap_mode and
720 q_scalar_swap_mode cases.
721 (OP_EX): Don't check for d_scalar_swap_mode and
723 (OP_VEX): Done check need_vex_reg.
724 * i386-dis-evex-w.h: Replace VexScalar by VexScalarR and
725 XMVexScalar by XMScalar for vmovss and vmovsd. Replace
726 EXdVexScalarS by EXdS and EXqVexScalarS by EXqS.
728 2020-07-14 Jan Beulich <jbeulich@suse.com>
730 * i386-dis.c (Vex128, Vex256, vex128_mode, vex256_mode): Delete.
731 (VEX_W_0F381A_P_2_M_0, VEX_W_0F385A_P_2_M_0, VEX_W_0F3A06_P_2,
732 VEX_W_0F3A18_P_2, VEX_W_0F3A19_P_2, VEX_W_0F3A38_P_2,
733 VEX_W_0F3A39_P_2, VEX_W_0F3A46_P_2): Rename to ...
734 (VEX_W_0F381A_P_2_M_0_L_0, VEX_W_0F385A_P_2_M_0_L_0,
735 VEX_W_0F3A06_P_2_L_0, VEX_W_0F3A18_P_2_L_0,
736 VEX_W_0F3A19_P_2_L_0, VEX_W_0F3A38_P_2_L_0,
737 VEX_W_0F3A39_P_2_L_0, VEX_W_0F3A46_P_2_L_0): ... respectively.
738 (vex_table): Replace Vex128 by Vex.
739 (vex_len_table): Likewise. Adjust referenced enum names.
740 (vex_w_table): Replace Vex128 and Vex256 by Vex. Adjust
741 referenced enum names.
742 (OP_VEX): Drop vex128_mode and vex256_mode cases.
743 * i386-dis-evex-len.h (evex_len_table): Replace Vex128 by Vex.
745 2020-07-14 Jan Beulich <jbeulich@suse.com>
747 * i386-dis.c (dis386): "LW" description now applies to "DQ".
748 (putop): Handle "DQ". Don't handle "LW" anymore.
749 (prefix_table, mod_table): Replace %LW by %DQ.
750 * i386-dis-evex-len.h, i386-dis-evex-prefix.h: Likewise.
752 2020-07-14 Jan Beulich <jbeulich@suse.com>
754 * i386-dis.c (OP_E_memory): Move xmm_mw_mode, xmm_mb_mode,
755 dqd_mode, xmm_md_mode, d_mode, d_swap_mode, and
756 d_scalar_swap_mode case handling. Move shift adjsutment into
757 the case its applicable to.
759 2020-07-14 Jan Beulich <jbeulich@suse.com>
761 * i386-dis.c (EVEX_W_0F3862_P_2, EVEX_W_0F3863_P_2): Delete.
762 (EXbScalar, EXwScalar): Fold to ...
763 (EXbwUnit): ... this.
764 (b_scalar_mode, w_scalar_mode): Fold to ...
765 (bw_unit_mode): ... this.
766 (intel_operand_size, OP_E_memory): Replace b_scalar_mode /
767 w_scalar_mode handling by bw_unit_mode one.
768 * i386-dis-evex-w.h: Move entries for opcodes 0F3862 and 0F3863
770 * i386-dis-evex-prefix.h: ... here.
772 2020-07-14 Jan Beulich <jbeulich@suse.com>
774 * i386-dis.c (PCMPESTR_Fixup): Delete.
775 (dis386): Adjust "LQ" description.
776 (prefix_table): Make %LQ apply to AT&T case only for cvtsi2ss,
777 cvtsi2sd, ptwrite, vcvtsi2ss, and vcvtsi2sd. Replace use of
778 PCMPESTR_Fixup by !%LQ and EXx for pcmpestrm, pcmpestri,
779 vpcmpestrm, and vpcmpestri.
780 (putop): Honor "cond" when handling LQ.
781 * i386-dis-evex-prefix.h: Make %LQ apply to AT&T case only for
782 vcvtsi2ss and vcvtusi2ss.
783 * i386-dis-evex-w.h: Make %LQ apply to AT&T case only for
784 vcvtsi2sd and vcvtusi2sd.
786 2020-07-14 Jan Beulich <jbeulich@suse.com>
788 * i386-dis.c (VCMP_Fixup, VCMP): Delete.
789 (simd_cmp_op): Add const.
790 (vex_cmp_op): Move up and drop initial 8 entries. Add const.
791 (CMP_Fixup): Handle VEX case.
792 (prefix_table): Replace VCMP by CMP.
793 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Likewise.
795 2020-07-14 Jan Beulich <jbeulich@suse.com>
797 * i386-dis.c (MOVBE_Fixup): Delete.
799 (prefix_table): Use Mv for movbe entries.
801 2020-07-14 Jan Beulich <jbeulich@suse.com>
803 * i386-dis.c (CRC32_Fixup): Delete.
804 (prefix_table): Use Eb/Ev for crc32 entries.
806 2020-07-14 Jan Beulich <jbeulich@suse.com>
808 * i386-dis.c (OP_E_register, OP_G, OP_REG, CRC32_Fixup):
809 Conditionalize invocations of "USED_REX (0)".
811 2020-07-14 Jan Beulich <jbeulich@suse.com>
813 * i386-dis.c (eBX, eCX, eDX, eSP, eBP, eSI, eDI, DL, BL, AH,
814 CH, DH, BH, AX, DX): Delete.
815 (OP_IMREG): Drop handling of eBX_reg, eCX_reg, eDX_reg, eSP_reg,
816 eBP_reg, eSI_reg, eDI_reg, dl_reg, bl_reg, ah_reg, ch_reg,
817 dh_reg, bh_reg, ax_reg, and dx_reg. Simplify what's left.
819 2020-07-10 Lili Cui <lili.cui@intel.com>
821 * i386-dis.c (TMM): New.
824 (MVexSIBMEM): Likewise.
825 (tmm_mode): Likewise.
826 (vex_sibmem_mode): Likewise.
827 (REG_VEX_0F3849_X86_64_P_0_W_0_M_1): Likewise.
828 (MOD_VEX_0F3849_X86_64_P_0_W_0): Likewise.
829 (MOD_VEX_0F3849_X86_64_P_2_W_0): Likewise.
830 (MOD_VEX_0F3849_X86_64_P_3_W_0): Likewise.
831 (MOD_VEX_0F384B_X86_64_P_1_W_0): Likewise.
832 (MOD_VEX_0F384B_X86_64_P_2_W_0): Likewise.
833 (MOD_VEX_0F384B_X86_64_P_3_W_0): Likewise.
834 (MOD_VEX_0F385C_X86_64_P_1_W_0): Likewise.
835 (MOD_VEX_0F385E_X86_64_P_0_W_0): Likewise.
836 (MOD_VEX_0F385E_X86_64_P_1_W_0): Likewise.
837 (MOD_VEX_0F385E_X86_64_P_2_W_0): Likewise.
838 (MOD_VEX_0F385E_X86_64_P_3_W_0): Likewise.
839 (RM_VEX_0F3849_X86_64_P_0_W_0_M_1_R_0): Likewise.
840 (PREFIX_VEX_0F3849_X86_64): Likewise.
841 (PREFIX_VEX_0F384B_X86_64): Likewise.
842 (PREFIX_VEX_0F385C_X86_64): Likewise.
843 (PREFIX_VEX_0F385E_X86_64): Likewise.
844 (X86_64_VEX_0F3849): Likewise.
845 (X86_64_VEX_0F384B): Likewise.
846 (X86_64_VEX_0F385C): Likewise.
847 (X86_64_VEX_0F385E): Likewise.
848 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_0): Likewise.
849 (VEX_LEN_0F3849_X86_64_P_0_W_0_M_1_REG_0_RM_0): Likewise.
850 (VEX_LEN_0F3849_X86_64_P_2_W_0_M_0): Likewise.
851 (VEX_LEN_0F3849_X86_64_P_3_W_0_M_0): Likewise.
852 (VEX_LEN_0F384B_X86_64_P_1_W_0_M_0): Likewise.
853 (VEX_LEN_0F384B_X86_64_P_2_W_0_M_0): Likewise.
854 (VEX_LEN_0F384B_X86_64_P_3_W_0_M_0): Likewise.
855 (VEX_LEN_0F385C_X86_64_P_1_W_0_M_0): Likewise.
856 (VEX_LEN_0F385E_X86_64_P_0_W_0_M_0): Likewise.
857 (VEX_LEN_0F385E_X86_64_P_1_W_0_M_0): Likewise.
858 (VEX_LEN_0F385E_X86_64_P_2_W_0_M_0): Likewise.
859 (VEX_LEN_0F385E_X86_64_P_3_W_0_M_0): Likewise.
860 (VEX_W_0F3849_X86_64_P_0): Likewise.
861 (VEX_W_0F3849_X86_64_P_2): Likewise.
862 (VEX_W_0F3849_X86_64_P_3): Likewise.
863 (VEX_W_0F384B_X86_64_P_1): Likewise.
864 (VEX_W_0F384B_X86_64_P_2): Likewise.
865 (VEX_W_0F384B_X86_64_P_3): Likewise.
866 (VEX_W_0F385C_X86_64_P_1): Likewise.
867 (VEX_W_0F385E_X86_64_P_0): Likewise.
868 (VEX_W_0F385E_X86_64_P_1): Likewise.
869 (VEX_W_0F385E_X86_64_P_2): Likewise.
870 (VEX_W_0F385E_X86_64_P_3): Likewise.
871 (names_tmm): Likewise.
872 (att_names_tmm): Likewise.
873 (intel_operand_size): Handle void_mode.
874 (OP_XMM): Handle tmm_mode.
877 * i386-gen.c (cpu_flag_init): Add entries for CpuAMX_INT8,
878 CpuAMX_BF16 and CpuAMX_TILE.
879 (operand_type_shorthands): Add RegTMM.
880 (operand_type_init): Likewise.
881 (operand_types): Add Tmmword.
882 (cpu_flag_init): Add CPU_AMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
883 (cpu_flags): Add CpuAMX_INT8, CpuAMX_BF16 and CpuAMX_TILE.
884 * i386-opc.h (CpuAMX_INT8): New.
885 (CpuAMX_BF16): Likewise.
886 (CpuAMX_TILE): Likewise.
889 (i386_cpu_flags): Add cpuamx_int8, cpuamx_bf16 and cpuamx_tile.
890 (i386_opcode_modifier): Extend width of fields vexvvvv and sib.
891 (i386_operand_type): Add tmmword.
892 * i386-opc.tbl: Add AMX instructions.
893 * i386-reg.tbl: Add AMX registers.
894 * i386-init.h: Regenerated.
895 * i386-tbl.h: Likewise.
897 2020-07-08 Jan Beulich <jbeulich@suse.com>
899 * i386-dis.c (OP_LWPCB_E, OP_LWP_E): Delete.
900 (REG_XOP_LWPCB, REG_XOP_LWP, REG_XOP_TBM_01, REG_XOP_TBM_02):
902 (REG_0FXOP_09_12_M_1_L_0, REG_0FXOP_0A_12_L_0,
903 REG_0FXOP_09_01_L_0, REG_0FXOP_09_02_L_0): ... these
905 (MOD_VEX_0FXOP_09_12, VEX_LEN_0FXOP_08_85, VEX_LEN_0FXOP_08_86,
906 VEX_LEN_0FXOP_08_87, VEX_LEN_0FXOP_08_8E, VEX_LEN_0FXOP_08_8F,
907 VEX_LEN_0FXOP_08_95, VEX_LEN_0FXOP_08_96, VEX_LEN_0FXOP_08_97,
908 VEX_LEN_0FXOP_08_9E, VEX_LEN_0FXOP_08_9F, VEX_LEN_0FXOP_08_A3,
909 VEX_LEN_0FXOP_08_A6, VEX_LEN_0FXOP_08_B6, VEX_LEN_0FXOP_08_C0,
910 VEX_LEN_0FXOP_08_C1, VEX_LEN_0FXOP_08_C2, VEX_LEN_0FXOP_08_C3,
911 VEX_LEN_0FXOP_09_01, VEX_LEN_0FXOP_09_02, VEX_LEN_0FXOP_09_12_M_1,
912 VEX_LEN_0FXOP_09_90, VEX_LEN_0FXOP_09_91, VEX_LEN_0FXOP_09_92,
913 VEX_LEN_0FXOP_09_93, VEX_LEN_0FXOP_09_94, VEX_LEN_0FXOP_09_95,
914 VEX_LEN_0FXOP_09_96, VEX_LEN_0FXOP_09_97, VEX_LEN_0FXOP_09_98,
915 VEX_LEN_0FXOP_09_99, VEX_LEN_0FXOP_09_9A, VEX_LEN_0FXOP_09_9B,
916 VEX_LEN_0FXOP_09_C1, VEX_LEN_0FXOP_09_C2, VEX_LEN_0FXOP_09_C3,
917 VEX_LEN_0FXOP_09_C6, VEX_LEN_0FXOP_09_C7, VEX_LEN_0FXOP_09_CB,
918 VEX_LEN_0FXOP_09_D1, VEX_LEN_0FXOP_09_D2, VEX_LEN_0FXOP_09_D3,
919 VEX_LEN_0FXOP_09_D6, VEX_LEN_0FXOP_09_D7, VEX_LEN_0FXOP_09_DB,
920 VEX_LEN_0FXOP_09_E1, VEX_LEN_0FXOP_09_E2, VEX_LEN_0FXOP_09_E3,
921 VEX_LEN_0FXOP_0A_12, VEX_W_0FXOP_08_85_L_0,
922 VEX_W_0FXOP_08_86_L_0, VEX_W_0FXOP_08_87_L_0,
923 VEX_W_0FXOP_08_8E_L_0, VEX_W_0FXOP_08_8F_L_0,
924 VEX_W_0FXOP_08_95_L_0, VEX_W_0FXOP_08_96_L_0,
925 VEX_W_0FXOP_08_97_L_0, VEX_W_0FXOP_08_9E_L_0,
926 VEX_W_0FXOP_08_9F_L_0, VEX_W_0FXOP_08_A6_L_0,
927 VEX_W_0FXOP_08_B6_L_0, VEX_W_0FXOP_08_C0_L_0,
928 VEX_W_0FXOP_08_C1_L_0, VEX_W_0FXOP_08_C2_L_0,
929 VEX_W_0FXOP_08_C3_L_0, VEX_W_0FXOP_08_CC_L_0,
930 VEX_W_0FXOP_08_CD_L_0, VEX_W_0FXOP_08_CE_L_0,
931 VEX_W_0FXOP_08_CF_L_0, VEX_W_0FXOP_08_EC_L_0,
932 VEX_W_0FXOP_08_ED_L_0, VEX_W_0FXOP_08_EE_L_0,
933 VEX_W_0FXOP_08_EF_L_0, VEX_W_0FXOP_09_C1_L_0,
934 VEX_W_0FXOP_09_C2_L_0, VEX_W_0FXOP_09_C3_L_0,
935 VEX_W_0FXOP_09_C6_L_0, VEX_W_0FXOP_09_C7_L_0,
936 VEX_W_0FXOP_09_CB_L_0, VEX_W_0FXOP_09_D1_L_0,
937 VEX_W_0FXOP_09_D2_L_0, VEX_W_0FXOP_09_D3_L_0,
938 VEX_W_0FXOP_09_D6_L_0, VEX_W_0FXOP_09_D7_L_0,
939 VEX_W_0FXOP_09_DB_L_0, VEX_W_0FXOP_09_E1_L_0,
940 VEX_W_0FXOP_09_E2_L_0, VEX_W_0FXOP_09_E3_L_0): New enumerators.
941 (reg_table): Re-order XOP entries. Adjust their operands.
942 (xop_table): Replace 08_85, 08_86, 08_87, 08_8E, 08_8F, 08_95,
943 08_96, 08_97, 08_9E, 08_9F, 08_A3, 08_A6, 08_B6, 08_C0, 08_C1,
944 08_C2, 08_C3, 09_01, 09_02, 09_12, 09_90, 09_91, 09_92, 09_93,
945 09_94, 09_95, 09_96, 09_97, 09_98, 09_99, 09_9A, 09_9B, 09_C1,
946 09_C2, 09_C3, 09_C6, 09_C7, 09_CB, 09_D1, 09_D2, 09_D3, 09_D6,
947 09_D7, 09_DB, 09_E1, 09_E2, 09_E3, and VEX_LEN_0FXOP_0A_12
948 entries by references ...
949 (vex_len_table): ... to resepctive new entries here. For several
950 new and existing entries reference ...
951 (vex_w_table): ... new entries here.
952 (mod_table): New MOD_VEX_0FXOP_09_12 entry.
954 2020-07-08 Jan Beulich <jbeulich@suse.com>
956 * i386-dis.c (XMVexScalarI4): Define.
957 (VEX_LEN_0F3A6A_P_2, VEX_LEN_0F3A6B_P_2, VEX_LEN_0F3A6E_P_2,
958 VEX_LEN_0F3A6F_P_2, VEX_LEN_0F3A7A_P_2, VEX_LEN_0F3A7B_P_2,
959 VEX_LEN_0F3A7E_P_2, VEX_LEN_0F3A7F_P_2): Delete.
960 (vex_len_table): Move scalar FMA4 entries ...
961 (prefix_table): ... here.
962 (OP_REG_VexI4): Handle scalar_mode.
963 * i386-opc.tbl: Use VexLIG for scalar FMA4 insns.
964 * i386-tbl.h: Re-generate.
966 2020-07-08 Jan Beulich <jbeulich@suse.com>
968 * i386-dis.c (OP_Vex_2src_1, OP_Vex_2src_2, Vex_2src_1,
970 (OP_VexW, VexW): New.
971 (xop_table): Use EXx for rotates by immediate. Use EXx and VexW
972 for shifts and rotates by register.
974 2020-07-08 Jan Beulich <jbeulich@suse.com>
976 * i386-dis.c (OP_EX_VexImmW, OP_XMM_VexW, EXVexImmW, XMVexW,
977 VEX_W_0F3A48_P_2, VEX_W_0F3A49_P_2, vex_w_done, get_vex_imm8,
978 OP_EX_VexReg): Delete.
979 (OP_VexI4, VexI4): New.
980 (vex_w_table): Move vpermil2ps and vpermil2pd entries ...
981 (prefix_table): ... here.
982 (print_insn): Drop setting of vex_w_done.
984 2020-07-08 Jan Beulich <jbeulich@suse.com>
986 * i386-dis.c (OP_EX_VexW, EXVexW, EXdVexW, EXqVexW): Delete.
987 (prefix_table, vex_len_table): Replace operands for FMA4 insns.
988 (xop_table): Replace operands of 4-operand insns.
989 (OP_REG_VexI4): Move VEX.W based operand swaping here.
991 2020-07-07 Claudiu Zissulescu <claziss@synopsys.com>
993 * arc-opc.c (insert_rbd): New function.
996 * arc-tbl.h (vadd2, vadd4h, vmac2h, vmpy2h, vsub4h): Update
999 2020-07-07 Jan Beulich <jbeulich@suse.com>
1001 * i386-dis.c (EVEX_W_0F3826_P_1, EVEX_W_0F3826_P_2,
1002 EVEX_W_0F3828_P_1, EVEX_W_0F3829_P_1, EVEX_W_0F3854_P_2,
1003 EVEX_W_0F3866_P_2, EVEX_W_0F3875_P_2, EVEX_W_0F387D_P_2,
1004 EVEX_W_0F388D_P_2, EVEX_W_0F3A3E_P_2, EVEX_W_0F3A3F_P_2):
1006 (putop): Handle "BW".
1007 * i386-dis-evex-w.h: Move entries for opcodes 0F3826, 0F3826,
1008 0F3828, 0F3829, 0F3854, 0F3866, 0F3875, 0F387D, 0F388D, 0F3A3E,
1010 * i386-dis-evex-prefix.h: ... here.
1012 2020-07-06 Jan Beulich <jbeulich@suse.com>
1014 * i386-dis.c (VEX_LEN_0FXOP_09_80, VEX_LEN_0FXOP_09_81): Delete.
1015 (VEX_LEN_0FXOP_09_82_W_0, VEX_LEN_0FXOP_09_83_W_0,
1016 VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81, VEX_W_0FXOP_09_82,
1017 VEX_W_0FXOP_09_83): New enumerators.
1018 (xop_table): Reference the above.
1019 (vex_len_table): Replace vfrczp* entries by vfrczs* ones.
1020 (vex_w_table): New VEX_W_0FXOP_09_80, VEX_W_0FXOP_09_81,
1021 VEX_W_0FXOP_09_82, and VEX_W_0FXOP_09_83 entries.
1022 (get_valid_dis386): Return bad_opcode for XOP.PP != 0.
1024 2020-07-06 Jan Beulich <jbeulich@suse.com>
1026 * i386-dis.c (EVEX_W_0F3838_P_1,
1027 EVEX_W_0F3839_P_1, EVEX_W_0F3840_P_2, EVEX_W_0F3855_P_2,
1028 EVEX_W_0F3868_P_3, EVEX_W_0F3871_P_2, EVEX_W_0F3873_P_2,
1029 EVEX_W_0F3A50_P_2, EVEX_W_0F3A51_P_2, EVEX_W_0F3A56_P_2,
1030 EVEX_W_0F3A57_P_2, EVEX_W_0F3A66_P_2, EVEX_W_0F3A67_P_2,
1031 EVEX_W_0F3A71_P_2, EVEX_W_0F3A73_P_2): Delete.
1032 (putop): Centralize management of last[]. Delete SAVE_LAST.
1033 * i386-dis-evex-w.h: Move entries for opcodes 0F3838, 0F3839,
1034 0F3840, 0F3855, 0F3868, 0F3871, 0F3873, 0F3A50, 0F3A51, 0F3A56,
1035 0F3A57, 0F3A66, 0F3A67, 0F3A71, and 0F3A73 ...
1036 * i386-dis-evex-prefix.h: here.
1038 2020-07-06 Jan Beulich <jbeulich@suse.com>
1040 * i386-dis.c (MOD_EVEX_0F381A_P_2_W_0, MOD_EVEX_0F381A_P_2_W_1,
1041 MOD_EVEX_0F381B_P_2_W_0, MOD_EVEX_0F381B_P_2_W_1,
1042 MOD_EVEX_0F385A_P_2_W_0, MOD_EVEX_0F385A_P_2_W_1,
1043 MOD_EVEX_0F385B_P_2_W_0, MOD_EVEX_0F385B_P_2_W_1): New
1045 (EVEX_LEN_0F381A_P_2_W_0, EVEX_LEN_0F381A_P_2_W_1,
1046 EVEX_LEN_0F381B_P_2_W_0, EVEX_LEN_0F381B_P_2_W_1,
1047 EVEX_LEN_0F385A_P_2_W_0, EVEX_LEN_0F385A_P_2_W_1,
1048 EVEX_LEN_0F385B_P_2_W_0, EVEX_LEN_0F385B_P_2_W_1): Rename to ...
1049 (EVEX_LEN_0F381A_P_2_W_0_M_0, EVEX_LEN_0F381A_P_2_W_1_M_0,
1050 EVEX_LEN_0F381B_P_2_W_0_M_0, EVEX_LEN_0F381B_P_2_W_1_M_0,
1051 EVEX_LEN_0F385A_P_2_W_0_M_0, EVEX_LEN_0F385A_P_2_W_1_M_0,
1052 EVEX_LEN_0F385B_P_2_W_0_M_0, EVEX_LEN_0F385B_P_2_W_1_M_0): ...
1053 these, respectively.
1054 * i386-dis-evex-len.h: Adjust comments.
1055 * i386-dis-evex-mod.h: New MOD_EVEX_0F381A_P_2_W_0,
1056 MOD_EVEX_0F381A_P_2_W_1, MOD_EVEX_0F381B_P_2_W_0,
1057 MOD_EVEX_0F381B_P_2_W_1, MOD_EVEX_0F385A_P_2_W_0,
1058 MOD_EVEX_0F385A_P_2_W_1, MOD_EVEX_0F385B_P_2_W_0, and
1059 MOD_EVEX_0F385B_P_2_W_1 table entries.
1060 * i386-dis-evex-w.h: Reference mod_table[] for
1061 EVEX_W_0F381A_P_2, EVEX_W_0F381B_P_2, EVEX_W_0F385A_P_2, and
1064 2020-07-06 Jan Beulich <jbeulich@suse.com>
1066 * i386-dis-evex-len.h (vbroadcastf32x8, vbroadcasti32x8,
1067 vinsertf32x8, vinsertf64x4, vextractf32x8, vextractf64x4): Use
1069 (vinserti32x8, vinserti64x4, vextracti32x8, vextracti64x4):
1070 Likewise. Mark 256-bit entries invalid.
1072 2020-07-06 Jan Beulich <jbeulich@suse.com>
1074 * i386-dis.c (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
1075 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
1076 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
1077 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
1078 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
1079 PREFIX_EVEX_0F382B): Delete.
1080 (EVEX_W_0F62_P_2, EVEX_W_0F6A_P_2, EVEX_W_0F6B_P_2,
1081 EVEX_W_0F6C_P_2, EVEX_W_0F6D_P_2, EVEX_W_0FD2_P_2,
1082 EVEX_W_0FD3_P_2, EVEX_W_0FD4_P_2, EVEX_W_0FF2_P_2,
1083 EVEX_W_0FF3_P_2, EVEX_W_0FF4_P_2, EVEX_W_0FFA_P_2,
1084 EVEX_W_0FFB_P_2, EVEX_W_0FFE_P_2, EVEX_W_0F382B_P_2): Rename
1086 (EVEX_W_0F62, EVEX_W_0F6A, EVEX_W_0F6B, EVEX_W_0F6C,
1087 EVEX_W_0F6D, EVEX_W_0FD2, EVEX_W_0FD3, EVEX_W_0FD4,
1088 EVEX_W_0FF2, EVEX_W_0FF3, EVEX_W_0FF4, EVEX_W_0FFA,
1089 EVEX_W_0FFB, EVEX_W_0FFE, EVEX_W_0F382B): ... these
1091 * i386-dis-evex.h (evex_table): Reference VEX_W table entries
1092 for opcodes 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4,
1093 0FF2, 0FF3, 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
1094 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F62, PREFIX_EVEX_0F6A,
1095 PREFIX_EVEX_0F6B, PREFIX_EVEX_0F6C, PREFIX_EVEX_0F6D,
1096 PREFIX_EVEX_0FD2, PREFIX_EVEX_0FD3, PREFIX_EVEX_0FD4,
1097 PREFIX_EVEX_0FF2, PREFIX_EVEX_0FF3, PREFIX_EVEX_0FF4,
1098 PREFIX_EVEX_0FFA, PREFIX_EVEX_0FFB, PREFIX_EVEX_0FFE,
1099 PREFIX_EVEX_0F382B): Remove table entries.
1100 * i386-dis-evex-w.h: Reference VEX table entries for opcodes
1101 0F62, 0F6A, 0F6B, 0F6C, 0F6D, 0FD2, 0FD3, 0FD4, 0FF2, 0FF3,
1102 0FF4, 0FFA, 0FFB, 0FFE, 0F382B.
1104 2020-07-06 Jan Beulich <jbeulich@suse.com>
1106 * i386-dis.c (EVEX_LEN_0F3816_P_2, EVEX_LEN_0F3836_P_2,
1107 EVEX_LEN_0F3A00_P_2_W_1, EVEX_LEN_0F3A01_P_2_W_1): New
1109 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0F3816_P_2,
1110 EVEX_LEN_0F3836_P_2, EVEX_LEN_0F3A00_P_2_W_1, and
1111 EVEX_LEN_0F3A01_P_2_W_1 table entries.
1112 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
1115 2020-07-06 Jan Beulich <jbeulich@suse.com>
1117 * i386-dis.c (EVEX_LEN_0FC4_P_2, EVEX_LEN_0FC5_P_2,
1118 EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2, EVEX_LEN_0F3A16_P_2,
1119 EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
1120 EVEX_LEN_0F3A21_P_2_W_0, EVEX_LEN_0F3A22_P_2): New enumerators.
1121 * i386-dis-evex-len.h (evex_len_table): New EVEX_LEN_0FC4_P_2,
1122 EVEX_LEN_0FC5_P_2, EVEX_LEN_0F3A14_P_2, EVEX_LEN_0F3A15_P_2,
1123 EVEX_LEN_0F3A16_P_2, EVEX_LEN_0F3A17_P_2, EVEX_LEN_0F3A20_P_2,
1124 EVEX_LEN_0F3A21_P_2_W_0, and EVEX_LEN_0F3A22_P_2 table entries.
1125 * i386-dis-evex-prefix.h, i386-dis-evex-w.h: Reference the above
1128 2020-07-06 Jan Beulich <jbeulich@suse.com>
1130 * i386-dis.c (PREFIX_EVEX_0F3A1D, EVEX_W_0F3A1D_P_2): Delete.
1131 (VEX_W_0F3813_P_2, VEX_W_0F3A1D_P_2): New enumerators.
1132 (prefix_table): Reference VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2
1134 (vex_w_table): New VEX_W_0F3813_P_2 and VEX_W_0F3A1D_P_2 table
1136 * i386-dis-evex.h (evex_table): Reference VEX table entry for
1138 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F3A1D): Delete table
1140 * i386-dis-evex-w.h (EVEX_W_0F3A1D_P_2): Likewise.
1142 2020-07-06 Jan Beulich <jbeulich@suse.com>
1144 * i386-dis.c (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1145 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1146 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1147 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1148 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1149 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1150 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1151 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1152 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1153 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1154 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1155 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1156 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1157 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1158 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1159 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1160 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1161 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1162 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1163 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1164 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1165 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1166 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1167 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1168 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1169 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1170 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF,
1171 EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2, EVEX_W_0F3858_P_2,
1172 EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2, EVEX_W_0F3A04_P_2,
1173 EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2): Delete.
1174 (prefix_table): Add EXxEVexR to FMA table entries.
1175 (OP_Rounding): Move abort() invocation.
1176 * i386-dis-evex.h (evex_table): Reference VEX table for opcodes
1177 0F60, 0F61, 0F63, 0F67, 0F68, 0F69, 0FD1, 0FD5, 0FD8, 0FD9,
1178 0FDA, 0FDC, 0FDD, 0FDE, 0FE0, 0FE1, 0FE3, 0FE4, 0FE5, 0FE8,
1179 0FE9, 0FEA, 0FEC, 0FED, 0FEE, 0FF1, 0FF5, 0FF6, 0FF8, 0FF9,
1180 0FFC, 0FFD, 0F3800, 0F3804, 0F380B, 0F380C, 0F3818, 0F381C,
1181 0F381D, 0F383C, 0F383E, 0F3858, 0F3878, 0F3879, 0F3896, 0F3897,
1182 0F3898, 0F3899, 0F389C, 0F389D, 0F389E, 0F389F, 0F38A6, 0F38A7,
1183 0F38A8, 0F38A9, 0F38AC, 0F38AD, 0F38AE, 0F38AF, 0F38B6, 0F38B7,
1184 0F38B8, 0F38B9, 0F38BA, 0F38BB, 0F38BC, 0F38BD, 0F38BE, 0F38BF,
1185 0F38CF, 0F38DC, 0F38DD, 0F38DE, 0F38DF, 0F3A04, 0F3A0F, 0F3A44,
1187 * i386-dis-evex-prefix.h (PREFIX_EVEX_0F60, PREFIX_EVEX_0F61,
1188 PREFIX_EVEX_0F63, PREFIX_EVEX_0F67, PREFIX_EVEX_0F68,
1189 PREFIX_EVEX_0F69, PREFIX_EVEX_0FD1, PREFIX_EVEX_0FD5,
1190 PREFIX_EVEX_0FD8, PREFIX_EVEX_0FD9, PREFIX_EVEX_0FDA,
1191 PREFIX_EVEX_0FDC, PREFIX_EVEX_0FDD, PREFIX_EVEX_0FDE,
1192 PREFIX_EVEX_0FE0, PREFIX_EVEX_0FE1, PREFIX_EVEX_0FE3,
1193 PREFIX_EVEX_0FE4, PREFIX_EVEX_0FE5, PREFIX_EVEX_0FE8,
1194 PREFIX_EVEX_0FE9, PREFIX_EVEX_0FEA, PREFIX_EVEX_0FEC,
1195 PREFIX_EVEX_0FED, PREFIX_EVEX_0FEE, PREFIX_EVEX_0FF1,
1196 PREFIX_EVEX_0FF5, PREFIX_EVEX_0FF6, PREFIX_EVEX_0FF8,
1197 PREFIX_EVEX_0FF9, PREFIX_EVEX_0FFC, PREFIX_EVEX_0FFD,
1198 PREFIX_EVEX_0F3800, PREFIX_EVEX_0F3804, PREFIX_EVEX_0F380B,
1199 PREFIX_EVEX_0F380C, PREFIX_EVEX_0F3818, PREFIX_EVEX_0F381C,
1200 PREFIX_EVEX_0F381D, PREFIX_EVEX_0F383C, PREFIX_EVEX_0F383E,
1201 PREFIX_EVEX_0F3858, PREFIX_EVEX_0F3878, PREFIX_EVEX_0F3879,
1202 PREFIX_EVEX_0F3896, PREFIX_EVEX_0F3897, PREFIX_EVEX_0F3898,
1203 PREFIX_EVEX_0F3899, PREFIX_EVEX_0F389C, PREFIX_EVEX_0F389D,
1204 PREFIX_EVEX_0F389E, PREFIX_EVEX_0F389F, PREFIX_EVEX_0F38A6,
1205 PREFIX_EVEX_0F38A7, PREFIX_EVEX_0F38A8, PREFIX_EVEX_0F38A9,
1206 PREFIX_EVEX_0F38AC, PREFIX_EVEX_0F38AD, PREFIX_EVEX_0F38AE,
1207 PREFIX_EVEX_0F38AF, PREFIX_EVEX_0F38B6, PREFIX_EVEX_0F38B7,
1208 PREFIX_EVEX_0F38B8, PREFIX_EVEX_0F38B9, PREFIX_EVEX_0F38BA,
1209 PREFIX_EVEX_0F38BB, PREFIX_EVEX_0F38BC, PREFIX_EVEX_0F38BD,
1210 PREFIX_EVEX_0F38BE, PREFIX_EVEX_0F38BF, PREFIX_EVEX_0F38CF,
1211 PREFIX_EVEX_0F38DC, PREFIX_EVEX_0F38DD, PREFIX_EVEX_0F38DE,
1212 PREFIX_EVEX_0F38DF, PREFIX_EVEX_0F3A04, PREFIX_EVEX_0F3A0F,
1213 PREFIX_EVEX_0F3A44, PREFIX_EVEX_0F3ACE, PREFIX_EVEX_0F3ACF):
1214 Delete table entries.
1215 * i386-dis-evex-w.h (EVEX_W_0F380C_P_2, EVEX_W_0F3818_P_2,
1216 EVEX_W_0F3858_P_2, EVEX_W_0F3878_P_2, EVEX_W_0F3879_P_2,
1217 EVEX_W_0F3A04_P_2, EVEX_W_0F3ACE_P_2, EVEX_W_0F3ACF_P_2):
1220 2020-07-06 Jan Beulich <jbeulich@suse.com>
1222 * i386-dis.c (EXqScalarS): Delete.
1223 (vex_len_table): Replace EXqScalarS by EXqVexScalarS.
1224 * i386-dis-evex-w.h (vmovq): Use EXqVexScalarS.
1226 2020-07-06 Jan Beulich <jbeulich@suse.com>
1228 * i386-dis.c (safe-ctype.h): Include.
1229 (EXdScalar, EXqScalar): Delete.
1230 (d_scalar_mode, q_scalar_mode): Delete.
1231 (prefix_table, vex_len_table): Use EXxmm_md in place of
1232 EXdScalar and EXxmm_mq in place of EXqScalar.
1233 (intel_operand_size, OP_E_memory, OP_EX): Remove uses of
1234 d_scalar_mode and q_scalar_mode.
1235 * i386-dis-evex-w.h (vmovss): Use EXxmm_md.
1236 (vmovsd): Use EXxmm_mq.
1238 2020-07-06 Yuri Chornoivan <yurchor@ukr.net>
1241 * arc-dis.c: Fix spelling mistake.
1242 * po/opcodes.pot: Regenerate.
1244 2020-07-06 Nick Clifton <nickc@redhat.com>
1246 * po/pt_BR.po: Updated Brazilian Portugugese translation.
1247 * po/uk.po: Updated Ukranian translation.
1249 2020-07-04 Nick Clifton <nickc@redhat.com>
1251 * configure: Regenerate.
1252 * po/opcodes.pot: Regenerate.
1254 2020-07-04 Nick Clifton <nickc@redhat.com>
1256 Binutils 2.35 branch created.
1258 2020-07-02 H.J. Lu <hongjiu.lu@intel.com>
1260 * i386-gen.c (opcode_modifiers): Add VexSwapSources.
1261 * i386-opc.h (VexSwapSources): New.
1262 (i386_opcode_modifier): Add vexswapsources.
1263 * i386-opc.tbl: Add VexSwapSources to BMI2 and BMI instructions
1264 with two source operands swapped.
1265 * i386-tbl.h: Regenerated.
1267 2020-06-30 Nelson Chu <nelson.chu@sifive.com>
1269 * riscv-dis.c (print_insn_args, case 'E'): Updated. Let the
1270 unprivileged CSR can also be initialized.
1272 2020-06-29 Alan Modra <amodra@gmail.com>
1274 * arm-dis.c: Use C style comments.
1275 * cr16-opc.c: Likewise.
1276 * ft32-dis.c: Likewise.
1277 * moxie-opc.c: Likewise.
1278 * tic54x-dis.c: Likewise.
1279 * s12z-opc.c: Remove useless comment.
1280 * xgate-dis.c: Likewise.
1282 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1284 * i386-opc.tbl: Add a blank line.
1286 2020-06-26 H.J. Lu <hongjiu.lu@intel.com>
1288 * i386-gen.c (opcode_modifiers): Replace VecSIB with SIB.
1289 (VecSIB128): Renamed to ...
1291 (VecSIB256): Renamed to ...
1293 (VecSIB512): Renamed to ...
1295 (VecSIB): Renamed to ...
1297 (i386_opcode_modifier): Replace vecsib with sib.
1298 * i386-opc.tbl (VecSIB128): New.
1299 (VecSIB256): Likewise.
1300 (VecSIB512): Likewise.
1301 Replace VecSIB=1, VecSIB=2 and VecSIB=3 with VecSIB128, VecSIB256
1302 and VecSIB512, respectively.
1304 2020-06-26 Jan Beulich <jbeulich@suse.com>
1306 * i386-dis.c: Adjust description of I macro.
1307 (x86_64_table): Drop use of I.
1308 (float_mem): Replace use of I.
1309 (putop): Remove handling of I. Adjust setting/clearing of "alt".
1311 2020-06-26 Jan Beulich <jbeulich@suse.com>
1313 * i386-dis.c: (print_insn): Avoid straight assignment to
1314 priv.orig_sizeflag when processing -M sub-options.
1316 2020-06-25 Jan Beulich <jbeulich@suse.com>
1318 * i386-dis.c: Adjust description of J macro.
1319 (dis386, x86_64_table, mod_table): Replace J.
1320 (putop): Remove handling of J.
1322 2020-06-25 Jan Beulich <jbeulich@suse.com>
1324 * i386-dis.c: (float_mem): Reduce alternatives for fstpt and fldpt.
1326 2020-06-25 Jan Beulich <jbeulich@suse.com>
1328 * i386-dis.c: Adjust description of "LQ" macro.
1329 (dis386_twobyte): Use LQ for sysret.
1330 (putop): Adjust handling of LQ.
1332 2020-06-22 Nelson Chu <nelson.chu@sifive.com>
1334 * riscv-opc.c: Move the structures and functions to bfd/elfxx-riscv.c.
1335 * riscv-dis.c: Include elfxx-riscv.h.
1337 2020-06-18 H.J. Lu <hongjiu.lu@intel.com>
1339 * i386-dis.c (prefix_table): Revert the last vmgexit change.
1341 2020-06-17 Lili Cui <lili.cui@intel.com>
1343 * i386-dis.c (prefix_table): Delete the incorrect vmgexit.
1345 2020-06-14 H.J. Lu <hongjiu.lu@intel.com>
1348 * i386-dis.c (prefix_table): Replace xsuspldtrk with xsusldtrk.
1349 * i386-opc.tbl: Likewise.
1350 * i386-tbl.h: Regenerated.
1352 2020-06-12 Nelson Chu <nelson.chu@sifive.com>
1354 * riscv-opc.c (priv_specs): Remove v1.9 and PRIV_SPEC_CLASS_1P9.
1356 2020-06-11 Alex Coplan <alex.coplan@arm.com>
1358 * aarch64-opc.c (SYSREG): New macro for describing system registers.
1359 (SR_CORE): Likewise.
1360 (SR_FEAT): Likewise.
1362 (SR_V8_1): Likewise.
1363 (SR_V8_2): Likewise.
1364 (SR_V8_3): Likewise.
1365 (SR_V8_4): Likewise.
1368 (SR_SSBS): Likewise.
1370 (SR_ID_PFR2): Likewise.
1371 (SR_PROFILE): Likewise.
1372 (SR_MEMTAG): Likewise.
1373 (SR_SCXTNUM): Likewise.
1374 (aarch64_sys_regs): Refactor to store feature information in the table.
1375 (aarch64_sys_reg_supported_p): Collapse logic for system registers
1376 that now describe their own features.
1377 (aarch64_pstatefield_supported_p): Likewise.
1379 2020-06-09 H.J. Lu <hongjiu.lu@intel.com>
1381 * i386-dis.c (prefix_table): Fix a typo in comments.
1383 2020-06-09 Jan Beulich <jbeulich@suse.com>
1385 * i386-dis.c (rex_ignored): Delete.
1386 (ckprefix): Drop rex_ignored initialization.
1387 (get_valid_dis386): Drop setting of rex_ignored.
1388 (print_insn): Drop checking of rex_ignored. Don't record data
1389 size prefix as used with VEX-and-alike encodings.
1391 2020-06-09 Jan Beulich <jbeulich@suse.com>
1393 * i386-dis.c (MOD_0F12_PREFIX_2, MOD_0F16_PREFIX_2,
1394 MOD_VEX_0F12_PREFIX_2, MOD_VEX_0F16_PREFIX_2): New enumerators.
1395 (VEX_LEN_0F12_P_2, VEX_LEN_0F16_P_2): Delete.
1396 (VEX_LEN_0F12_P_2_M_0, VEX_LEN_0F16_P_2_M_0): Define.
1397 (prefix_table): Decode MOD for cases 2 of opcodes 0F12, 0F16,
1398 VEX_0F12, and VEX_0F16.
1399 (vex_len_table): Use X for vmovlp* and vmovh*s. Drop
1400 VEX_LEN_0F12_P_2 and VEX_LEN_0F16_P_2 entries.
1401 (mod_table): Use X for movlpX and movhpX. Drop PREFIX_OPCODE
1402 from movlps and movhlps. New MOD_0F12_PREFIX_2,
1403 MOD_0F16_PREFIX_2, MOD_VEX_0F12_PREFIX_2, and
1404 MOD_VEX_0F16_PREFIX_2 entries.
1406 2020-06-09 Jan Beulich <jbeulich@suse.com>
1408 * i386-dis.c (MOD_EVEX_0F12_PREFIX_2, MOD_EVEX_0F13,
1409 MOD_EVEX_0F16_PREFIX_2, MOD_EVEX_0F17, MOD_EVEX_0F2B): New enumerators.
1410 (PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1411 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F29,
1412 PREFIX_EVEX_0F2B, PREFIX_EVEX_0F54, PREFIX_EVEX_0F55,
1413 PREFIX_EVEX_0F56, PREFIX_EVEX_0F57, PREFIX_EVEX_0FC6,
1414 EVEX_W_0F10_P_0, EVEX_W_0F10_P_2, EVEX_W_0F11_P_0,
1415 EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0, EVEX_W_0F12_P_2,
1416 EVEX_W_0F13_P_0, EVEX_W_0F13_P_2, EVEX_W_0F14_P_0,
1417 EVEX_W_0F14_P_2, EVEX_W_0F15_P_0, EVEX_W_0F15_P_2,
1418 EVEX_W_0F16_P_0_M_0, EVEX_W_0F16_P_2, EVEX_W_0F17_P_0,
1419 EVEX_W_0F17_P_2, EVEX_W_0F28_P_0, EVEX_W_0F28_P_2,
1420 EVEX_W_0F29_P_0, EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0,
1421 EVEX_W_0F2B_P_2, EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2,
1422 EVEX_W_0F2F_P_0, EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0,
1423 EVEX_W_0F51_P_2, EVEX_W_0F54_P_0, EVEX_W_0F54_P_2,
1424 EVEX_W_0F55_P_0, EVEX_W_0F55_P_2, EVEX_W_0F56_P_0,
1425 EVEX_W_0F56_P_2, EVEX_W_0F57_P_0, EVEX_W_0F57_P_2,
1426 EVEX_W_0F58_P_0, EVEX_W_0F58_P_2, EVEX_W_0F59_P_0,
1427 EVEX_W_0F59_P_2, EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2,
1428 EVEX_W_0F5D_P_0, EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0,
1429 EVEX_W_0F5E_P_2, EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2,
1430 EVEX_W_0FC2_P_0, EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0,
1431 EVEX_W_0FC6_P_2): Delete.
1432 (print_insn): Add EVEX.W vs embedded prefix consistency check
1433 to prefix validation.
1434 * i386-dis-evex.h (evex_table): Don't further descend for
1435 vunpcklpX, vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX,
1436 and vshufpX. Continue with MOD decoding for opcodes 0F13, 0F17,
1438 * i386-dis-evex-mod.h: Add/adjust vmovlpX/vmovhpX entries.
1439 * i386-dis-evex-prefix.h: Don't further descend for vmovupX,
1440 vucomisX, vcomisX, vsqrtpX, vaddpX, vmulpX, vsubpX, vminpX,
1441 vdivpX, vmaxpX, and vcmppX. Continue with MOD decoding for cases
1442 2 of PREFIX_EVEX_0F12, PREFIX_EVEX_0F16, and PREFIX_EVEX_0F29.
1443 Drop PREFIX_EVEX_0F13, PREFIX_EVEX_0F14, PREFIX_EVEX_0F15,
1444 PREFIX_EVEX_0F17, PREFIX_EVEX_0F28, PREFIX_EVEX_0F2B,
1445 PREFIX_EVEX_0F54, PREFIX_EVEX_0F55, PREFIX_EVEX_0F56,
1446 PREFIX_EVEX_0F57, and PREFIX_EVEX_0FC6 entries.
1447 * i386-dis-evex-w.h: Drop EVEX_W_0F10_P_0, EVEX_W_0F10_P_2,
1448 EVEX_W_0F11_P_0, EVEX_W_0F11_P_2, EVEX_W_0F12_P_0_M_0,
1449 EVEX_W_0F12_P_2, EVEX_W_0F12_P_3, EVEX_W_0F13_P_0,
1450 EVEX_W_0F13_P_2, EVEX_W_0F14_P_0, EVEX_W_0F14_P_2,
1451 EVEX_W_0F15_P_0, EVEX_W_0F15_P_2, EVEX_W_0F16_P_0_M_0,
1452 EVEX_W_0F16_P_2, EVEX_W_0F17_P_0, EVEX_W_0F17_P_2,
1453 EVEX_W_0F28_P_0, EVEX_W_0F28_P_2, EVEX_W_0F29_P_0,
1454 EVEX_W_0F29_P_2, EVEX_W_0F2B_P_0, EVEX_W_0F2B_P_2,
1455 EVEX_W_0F2E_P_0, EVEX_W_0F2E_P_2, EVEX_W_0F2F_P_0,
1456 EVEX_W_0F2F_P_2, EVEX_W_0F51_P_0, EVEX_W_0F51_P_2,
1457 EVEX_W_0F54_P_0, EVEX_W_0F54_P_2, EVEX_W_0F55_P_0,
1458 EVEX_W_0F55_P_2, EVEX_W_0F56_P_0, EVEX_W_0F56_P_2,
1459 EVEX_W_0F57_P_0, EVEX_W_0F57_P_2, EVEX_W_0F58_P_0,
1460 EVEX_W_0F58_P_2, EVEX_W_0F59_P_0, EVEX_W_0F59_P_2,
1461 EVEX_W_0F5C_P_0, EVEX_W_0F5C_P_2, EVEX_W_0F5D_P_0,
1462 EVEX_W_0F5D_P_2, EVEX_W_0F5E_P_0, EVEX_W_0F5E_P_2,
1463 EVEX_W_0F5F_P_0, EVEX_W_0F5F_P_2, EVEX_W_0FC2_P_0,
1464 EVEX_W_0FC2_P_2, EVEX_W_0FC6_P_0, and EVEX_W_0FC6_P_2 entries.
1466 2020-06-09 Jan Beulich <jbeulich@suse.com>
1468 * i386-dis.c (vex_table): Use PREFIX_OPCODE for vunpcklpX,
1469 vunpckhpX, vmovapX, vandpX, vandnpX, vorpX, vxorpX and vshufpX.
1470 (vex_len_table) : Likewise for vmovlpX, vmovhpX, vmovntpX, and
1472 (print_insn): Drop pointless check against bad_opcode. Split
1473 prefix validation into legacy and VEX-and-alike parts.
1474 (putop): Re-work 'X' macro handling.
1476 2020-06-09 Jan Beulich <jbeulich@suse.com>
1478 * i386-dis.c (MOD_0F51): Rename to ...
1479 (MOD_0F50): ... this.
1481 2020-06-08 Alex Coplan <alex.coplan@arm.com>
1483 * arm-dis.c (arm_opcodes): Add dfb.
1484 (thumb32_opcodes): Add dfb.
1486 2020-06-08 Jan Beulich <jbeulich@suse.com>
1488 * i386-opc.h (reg_entry): Const-qualify reg_name field.
1490 2020-06-06 Alan Modra <amodra@gmail.com>
1492 * ppc-dis.c (ppc_opts): Accept -mpwr10/-Mpwr10.
1494 2020-06-05 Alan Modra <amodra@gmail.com>
1496 * cgen-dis.c (hash_insn_array): Increase size of buf. Assert
1497 size is large enough.
1499 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com>
1501 * disassemble.c (disassemble_init_for_target): Set endian_code for
1503 * bpf-desc.c: Regenerate.
1504 * bpf-opc.c: Likewise.
1505 * bpf-dis.c: Likewise.
1507 2020-06-03 Jose E. Marchesi <jose.marchesi@oracle.com>
1509 * cgen-opc.c (cgen_get_insn_value): Get an `endian' argument.
1510 (cgen_put_insn_value): Likewise.
1511 (cgen_lookup_insn): Pass endianness to cgen_{get,put}_insn_value.
1512 * cgen-dis.in (print_insn): Likewise.
1513 * cgen-ibld.in (insert_1): Likewise.
1514 (insert_1): Likewise.
1515 (insert_insn_normal): Likewise.
1516 (extract_1): Likewise.
1517 * bpf-dis.c: Regenerate.
1518 * bpf-ibld.c: Likewise.
1519 * bpf-ibld.c: Likewise.
1520 * cgen-dis.in: Likewise.
1521 * cgen-ibld.in: Likewise.
1522 * cgen-opc.c: Likewise.
1523 * epiphany-dis.c: Likewise.
1524 * epiphany-ibld.c: Likewise.
1525 * fr30-dis.c: Likewise.
1526 * fr30-ibld.c: Likewise.
1527 * frv-dis.c: Likewise.
1528 * frv-ibld.c: Likewise.
1529 * ip2k-dis.c: Likewise.
1530 * ip2k-ibld.c: Likewise.
1531 * iq2000-dis.c: Likewise.
1532 * iq2000-ibld.c: Likewise.
1533 * lm32-dis.c: Likewise.
1534 * lm32-ibld.c: Likewise.
1535 * m32c-dis.c: Likewise.
1536 * m32c-ibld.c: Likewise.
1537 * m32r-dis.c: Likewise.
1538 * m32r-ibld.c: Likewise.
1539 * mep-dis.c: Likewise.
1540 * mep-ibld.c: Likewise.
1541 * mt-dis.c: Likewise.
1542 * mt-ibld.c: Likewise.
1543 * or1k-dis.c: Likewise.
1544 * or1k-ibld.c: Likewise.
1545 * xc16x-dis.c: Likewise.
1546 * xc16x-ibld.c: Likewise.
1547 * xstormy16-dis.c: Likewise.
1548 * xstormy16-ibld.c: Likewise.
1550 2020-06-04 Jose E. Marchesi <jemarch@gnu.org>
1552 * cgen-dis.in (cpu_desc_list): New field `insn_endian'.
1553 (print_insn_): Handle instruction endian.
1554 * bpf-dis.c: Regenerate.
1555 * bpf-desc.c: Regenerate.
1556 * epiphany-dis.c: Likewise.
1557 * epiphany-desc.c: Likewise.
1558 * fr30-dis.c: Likewise.
1559 * fr30-desc.c: Likewise.
1560 * frv-dis.c: Likewise.
1561 * frv-desc.c: Likewise.
1562 * ip2k-dis.c: Likewise.
1563 * ip2k-desc.c: Likewise.
1564 * iq2000-dis.c: Likewise.
1565 * iq2000-desc.c: Likewise.
1566 * lm32-dis.c: Likewise.
1567 * lm32-desc.c: Likewise.
1568 * m32c-dis.c: Likewise.
1569 * m32c-desc.c: Likewise.
1570 * m32r-dis.c: Likewise.
1571 * m32r-desc.c: Likewise.
1572 * mep-dis.c: Likewise.
1573 * mep-desc.c: Likewise.
1574 * mt-dis.c: Likewise.
1575 * mt-desc.c: Likewise.
1576 * or1k-dis.c: Likewise.
1577 * or1k-desc.c: Likewise.
1578 * xc16x-dis.c: Likewise.
1579 * xc16x-desc.c: Likewise.
1580 * xstormy16-dis.c: Likewise.
1581 * xstormy16-desc.c: Likewise.
1583 2020-06-03 Nick Clifton <nickc@redhat.com>
1585 * po/sr.po: Updated Serbian translation.
1587 2020-06-03 Nelson Chu <nelson.chu@sifive.com>
1589 * riscv-opc.c (riscv_get_isa_spec_class): Change bfd_boolean to int.
1590 (riscv_get_priv_spec_class): Likewise.
1592 2020-06-01 Alan Modra <amodra@gmail.com>
1594 * bpf-desc.c: Regenerate.
1596 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
1597 David Faust <david.faust@oracle.com>
1599 * bpf-desc.c: Regenerate.
1600 * bpf-opc.h: Likewise.
1601 * bpf-opc.c: Likewise.
1602 * bpf-dis.c: Likewise.
1604 2020-05-28 Alan Modra <amodra@gmail.com>
1606 * nios2-dis.c (nios2_print_insn_arg): Avoid shift left of negative
1609 2020-05-28 Alan Modra <amodra@gmail.com>
1611 * ns32k-dis.c (print_insn_arg): Handle d value of 'f' for
1613 (print_insn_ns32k): Revert last change.
1615 2020-05-28 Nick Clifton <nickc@redhat.com>
1617 * ns32k-dis.c (print_insn_ns32k): Change the arg_bufs array to
1620 2020-05-26 Sandra Loosemore <sandra@codesourcery.com>
1622 Fix extraction of signed constants in nios2 disassembler (again).
1624 * nios2-dis.c (nios2_print_insn_arg): Add explicit casts to
1625 extractions of signed fields.
1627 2020-05-26 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1629 * s390-opc.txt: Relocate vector load/store instructions with
1630 additional alignment parameter and change architecture level
1631 constraint from z14 to z13.
1633 2020-05-21 Alan Modra <amodra@gmail.com>
1635 * arc-ext.c: Replace "if (x) free (x)" with "free (x)" throughout.
1636 * sparc-dis.c: Likewise.
1637 * tic4x-dis.c: Likewise.
1638 * xtensa-dis.c: Likewise.
1639 * bpf-desc.c: Regenerate.
1640 * epiphany-desc.c: Regenerate.
1641 * fr30-desc.c: Regenerate.
1642 * frv-desc.c: Regenerate.
1643 * ip2k-desc.c: Regenerate.
1644 * iq2000-desc.c: Regenerate.
1645 * lm32-desc.c: Regenerate.
1646 * m32c-desc.c: Regenerate.
1647 * m32r-desc.c: Regenerate.
1648 * mep-asm.c: Regenerate.
1649 * mep-desc.c: Regenerate.
1650 * mt-desc.c: Regenerate.
1651 * or1k-desc.c: Regenerate.
1652 * xc16x-desc.c: Regenerate.
1653 * xstormy16-desc.c: Regenerate.
1655 2020-05-20 Nelson Chu <nelson.chu@sifive.com>
1657 * riscv-opc.c (riscv_ext_version_table): The table used to store
1658 all information about the supported spec and the corresponding ISA
1659 versions. Currently, only Zicsr is supported to verify the
1660 correctness of Z sub extension settings. Others will be supported
1661 in the future patches.
1662 (struct isa_spec_t, isa_specs): List for all supported ISA spec
1663 classes and the corresponding strings.
1664 (riscv_get_isa_spec_class): New function. Get the corresponding ISA
1665 spec class by giving a ISA spec string.
1666 * riscv-opc.c (struct priv_spec_t): New structure.
1667 (struct priv_spec_t priv_specs): List for all supported privilege spec
1668 classes and the corresponding strings.
1669 (riscv_get_priv_spec_class): New function. Get the corresponding
1670 privilege spec class by giving a spec string.
1671 (riscv_get_priv_spec_name): New function. Get the corresponding
1672 privilege spec string by giving a CSR version class.
1673 * riscv-dis.c: Updated since DECLARE_CSR is changed.
1674 * riscv-dis.c: Add new disassembler option -Mpriv-spec to dump the CSR
1675 according to the chosen version. Build a hash table riscv_csr_hash to
1676 store the valid CSR for the chosen pirv verison. Dump the direct
1677 CSR address rather than it's name if it is invalid.
1678 (parse_riscv_dis_option_without_args): New function. Parse the options
1680 (parse_riscv_dis_option): Call parse_riscv_dis_option_without_args to
1681 parse the options without arguments first, and then handle the options
1682 with arguments. Add the new option -Mpriv-spec, which has argument.
1683 * riscv-dis.c (print_riscv_disassembler_options): Add description
1684 about the new OBJDUMP option.
1686 2020-05-19 Peter Bergner <bergner@linux.ibm.com>
1688 * ppc-opc.c (insert_ls, extract_ls): Handle 3-bit L fields and new
1689 WC values on POWER10 sync, dcbf and wait instructions.
1690 (insert_pl, extract_pl): New functions.
1691 (L2OPT, LS, WC): Use insert_ls and extract_ls.
1692 (LS3): New , 3-bit L for sync.
1693 (LS3, L3OPT): New, 3-bit L for sync and dcbf.
1694 (SC2, PL): New, 2-bit SC and PL for sync and wait.
1695 (XWCPL_MASK, XL3RT_MASK, XSYNCLS_MASK): New instruction masks.
1696 (XOPL3, XWCPL, XSYNCLS): New opcode macros.
1697 (powerpc_opcodes) <dcbflp, dcbfps, dcbstps pause_short, phwsync,
1698 plwsync, stcisync, stncisync, stsync, waitrsv>: New extended mnemonics.
1699 <wait>: Enable PL operand on POWER10.
1700 <dcbf>: Enable L3OPT operand on POWER10.
1701 <sync>: Enable SC2 operand on POWER10.
1703 2020-05-19 Stafford Horne <shorne@gmail.com>
1706 * or1k-asm.c: Regenerate.
1707 * or1k-desc.c: Regenerate.
1708 * or1k-desc.h: Regenerate.
1709 * or1k-dis.c: Regenerate.
1710 * or1k-ibld.c: Regenerate.
1711 * or1k-opc.c: Regenerate.
1712 * or1k-opc.h: Regenerate.
1713 * or1k-opinst.c: Regenerate.
1715 2020-05-11 Alan Modra <amodra@gmail.com>
1717 * ppc-opc (powerpc_opcodes): Add xscmpeqqp, xscmpgeqp, xscmpgtqp,
1720 2020-05-11 Alan Modra <amodra@gmail.com>
1722 * ppc-opc.c (powerpc_opcodes): Add lxvrbx, lxvrhx, lxvrwx, lxvrdx,
1723 stxvrbx, stxvrhx, stxvrwx, stxvrdx.
1725 2020-05-11 Alan Modra <amodra@gmail.com>
1727 * ppc-opc.c (powerpc_opcodes): Add xvtlsbb.
1729 2020-05-11 Alan Modra <amodra@gmail.com>
1731 * ppc-opc.c (powerpc_opcodes): Add vstribl, vstribr, vstrihl, vstrihr,
1732 vclrlb, vclrrb, vstribl., vstribr., vstrihl., vstrihr..
1734 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1736 * ppc-opc.c (powerpc_opcodes) <setbc, setbcr, setnbc, setnbcr>: New
1739 2020-05-11 Alan Modra <amodra@gmail.com>
1741 * ppc-opc.c (UIM8, P_U8XX4_MASK): Define.
1742 (powerpc_opcodes): Add vgnb, vcfuged, vpextd, vpdepd, vclzdm,
1743 vctzdm, cntlzdm, pdepd, pextd, cfuged, cnttzdm.
1744 (prefix_opcodes): Add xxeval.
1746 2020-05-11 Alan Modra <amodra@gmail.com>
1748 * ppc-opc.c (powerpc_opcodes): Add xxgenpcvbm, xxgenpcvhm,
1749 xxgenpcvwm, xxgenpcvdm.
1751 2020-05-11 Alan Modra <amodra@gmail.com>
1753 * ppc-opc.c (MP, VXVAM_MASK): Define.
1754 (VXVAPS_MASK): Use VXVA_MASK.
1755 (powerpc_opcodes): Add mtvsrbmi, vexpandbm, vexpandhm, vexpandwm,
1756 vexpanddm, vexpandqm, vextractbm, vextracthm, vextractwm,
1757 vextractdm, vextractqm, mtvsrbm, mtvsrhm, mtvsrwm, mtvsrdm, mtvsrqm,
1758 vcntmbb, vcntmbh, vcntmbw, vcntmbd.
1760 2020-05-11 Alan Modra <amodra@gmail.com>
1761 Peter Bergner <bergner@linux.ibm.com>
1763 * ppc-opc.c (insert_xa6a, extract_xa6a, insert_xb6a, extract_xb6a):
1765 (powerpc_operands): Define ACC, PMSK8, PMSK4, PMSK2, XMSK, YMSK,
1766 YMSK2, XA6a, XA6ap, XB6a entries.
1767 (PMMIRR, P_X_MASK, P_XX1_MASK, P_GER_MASK): Define
1768 (P_GER2_MASK, P_GER4_MASK, P_GER8_MASK, P_GER64_MASK): Define.
1770 (powerpc_opcodes): Add xxmfacc, xxmtacc, xxsetaccz,
1771 xvi8ger4pp, xvi8ger4, xvf16ger2pp, xvf16ger2, xvf32gerpp, xvf32ger,
1772 xvi4ger8pp, xvi4ger8, xvi16ger2spp, xvi16ger2s, xvbf16ger2pp,
1773 xvbf16ger2, xvf64gerpp, xvf64ger, xvi16ger2, xvf16ger2np,
1774 xvf32gernp, xvi8ger4spp, xvi16ger2pp, xvbf16ger2np, xvf64gernp,
1775 xvf16ger2pn, xvf32gerpn, xvbf16ger2pn, xvf64gerpn, xvf16ger2nn,
1776 xvf32gernn, xvbf16ger2nn, xvf64gernn, xvcvbf16sp, xvcvspbf16.
1777 (prefix_opcodes): Add pmxvi8ger4pp, pmxvi8ger4, pmxvf16ger2pp,
1778 pmxvf16ger2, pmxvf32gerpp, pmxvf32ger, pmxvi4ger8pp, pmxvi4ger8,
1779 pmxvi16ger2spp, pmxvi16ger2s, pmxvbf16ger2pp, pmxvbf16ger2,
1780 pmxvf64gerpp, pmxvf64ger, pmxvi16ger2, pmxvf16ger2np, pmxvf32gernp,
1781 pmxvi8ger4spp, pmxvi16ger2pp, pmxvbf16ger2np, pmxvf64gernp,
1782 pmxvf16ger2pn, pmxvf32gerpn, pmxvbf16ger2pn, pmxvf64gerpn,
1783 pmxvf16ger2nn, pmxvf32gernn, pmxvbf16ger2nn, pmxvf64gernn.
1785 2020-05-11 Alan Modra <amodra@gmail.com>
1787 * ppc-opc.c (insert_imm32, extract_imm32): New functions.
1788 (insert_xts, extract_xts): New functions.
1789 (IMM32, UIM3, IX, UIM5, SH3, XTS, P8RR): Define.
1790 (P_XX4_MASK, P_UXX4_MASK, VSOP, P_VS_MASK, P_VSI_MASK): Define.
1791 (VXRC_MASK, VXSH_MASK): Define.
1792 (powerpc_opcodes): Add vinsbvlx, vsldbi, vextdubvlx, vextdubvrx,
1793 vextduhvlx, vextduhvrx, vextduwvlx, vextduwvrx, vextddvlx,
1794 vextddvrx, vinshvlx, vinswvlx, vinsw, vinsbvrx, vinshvrx,
1795 vinswvrx, vinsd, vinsblx, vsrdbi, vinshlx, vinswlx, vinsdlx,
1796 vinsbrx, vinshrx, vinswrx, vinsdrx, lxvkq.
1797 (prefix_opcodes): Add xxsplti32dx, xxspltidp, xxspltiw, xxblendvb,
1798 xxblendvh, xxblendvw, xxblendvd, xxpermx.
1800 2020-05-11 Alan Modra <amodra@gmail.com>
1802 * ppc-opc.c (powerpc_opcodes): Add vrlq, vdivuq, vmsumcud, vrlqmi,
1803 vmuloud, vcmpuq, vslq, vdivsq, vcmpsq, vrlqnm, vcmpequq, vmulosd,
1804 vsrq, vdiveuq, vcmpgtuq, vmuleud, vsraq, vdivesq, vcmpgtsq, vmulesd,
1805 vcmpequq., vextsd2q, vmoduq, vcmpgtuq., vmodsq, vcmpgtsq., xscvqpuqz,
1806 xscvuqqp, xscvqpsqz, xscvsqqp, dcffixqq, dctfixqq.
1808 2020-05-11 Alan Modra <amodra@gmail.com>
1810 * ppc-opc.c (insert_xtp, extract_xtp): New functions.
1811 (XTP, DQXP, DQXP_MASK): Define.
1812 (powerpc_opcodes): Add lxvp, stxvp, lxvpx, stxvpx.
1813 (prefix_opcodes): Add plxvp and pstxvp.
1815 2020-05-11 Alan Modra <amodra@gmail.com>
1817 * ppc-opc.c (powerpc_opcodes): Add vdivuw, vdivud, vdivsw, vmulld,
1818 vdivsd, vmulhuw, vdiveuw, vmulhud, vdiveud, vmulhsw, vdivesw,
1819 vmulhsd, vdivesd, vmoduw, vmodud, vmodsw, vmodsd.
1821 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1823 * ppc-opc.c (powerpc_opcodes) <brd, brh, brw>: New mnemonics.
1825 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1827 * ppc-opc.c (insert_l1opt, extract_l1opt): New functions.
1829 (powerpc_opcodes) <paste.>: Add L operand for cpu POWER10.
1831 2020-05-11 Peter Bergner <bergner@linux.ibm.com>
1833 * ppc-opc.c (powerpc_opcodes) <slbiag>: Add variant with L operand.
1835 2020-05-11 Alan Modra <amodra@gmail.com>
1837 * ppc-dis.c (powerpc_init_dialect): Default to "power10".
1839 2020-05-11 Alan Modra <amodra@gmail.com>
1841 * ppc-dis.c (ppc_opts): Add "power10" entry.
1842 (print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
1843 * ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
1845 2020-05-11 Nick Clifton <nickc@redhat.com>
1847 * po/fr.po: Updated French translation.
1849 2020-04-30 Alex Coplan <alex.coplan@arm.com>
1851 * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
1852 * aarch64-opc.c (fields): Add entry for FLD_imm16_2.
1853 (operand_general_constraint_met_p): validate
1854 AARCH64_OPND_UNDEFINED.
1855 * aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry
1857 * aarch64-asm-2.c: Regenerated.
1858 * aarch64-dis-2.c: Regenerated.
1859 * aarch64-opc-2.c: Regenerated.
1861 2020-04-29 Nick Clifton <nickc@redhat.com>
1864 * sh-opc.h: Also use unsigned 8-bit immediate values for the LDRC
1867 2020-04-29 Nick Clifton <nickc@redhat.com>
1869 * po/sv.po: Updated Swedish translation.
1871 2020-04-29 Nick Clifton <nickc@redhat.com>
1874 * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U. Use
1875 IMM0_8S for arithmetic insns and IMM0_8U for logical insns.
1876 * sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add
1879 2020-04-21 Andreas Schwab <schwab@linux-m68k.org>
1882 * m68k-opc.c (m68k_opcodes): Allow pc-rel for second operand of
1883 cmpi only on m68020up and cpu32.
1885 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1887 * aarch64-asm.c (aarch64_ins_none): New.
1888 * aarch64-asm.h (ins_none): New declaration.
1889 * aarch64-dis.c (aarch64_ext_none): New.
1890 * aarch64-dis.h (ext_none): New declaration.
1891 * aarch64-opc.c (aarch64_print_operand): Update case for
1892 AARCH64_OPND_BARRIER_PSB.
1893 * aarch64-tbl.h (aarch64_opcode_table): Add tsb.
1894 (AARCH64_OPERANDS): Update inserter/extracter for
1895 AARCH64_OPND_BARRIER_PSB to use new dummy functions.
1896 * aarch64-asm-2.c: Regenerated.
1897 * aarch64-dis-2.c: Regenerated.
1898 * aarch64-opc-2.c: Regenerated.
1900 2020-04-20 Sudakshina Das <sudi.das@arm.com>
1902 * aarch64-tbl.h (aarch64_feature_bti, BTI, BTI_INSN): Remove.
1903 (aarch64_feature_ras, RAS): Likewise.
1904 (aarch64_feature_stat_profile, STAT_PROFILE): Likewise.
1905 (aarch64_opcode_table): Update bti, xpaclri, pacia1716, pacib1716,
1906 autia1716, autib1716, esb, psb, dgh, paciaz, paciasp, pacibz, pacibsp,
1907 autiaz, autiasp, autibz, autibsp to be CORE_INSN.
1908 * aarch64-asm-2.c: Regenerated.
1909 * aarch64-dis-2.c: Regenerated.
1910 * aarch64-opc-2.c: Regenerated.
1912 2020-04-17 Fredrik Strupe <fredrik@strupe.net>
1914 * arm-dis.c (neon_opcodes): Fix VDUP instruction masks.
1915 (print_insn_neon): Support disassembly of conditional
1918 2020-02-16 David Faust <david.faust@oracle.com>
1920 * bpf-desc.c: Regenerate.
1921 * bpf-desc.h: Likewise.
1922 * bpf-opc.c: Regenerate.
1923 * bpf-opc.h: Likewise.
1925 2020-04-07 Lili Cui <lili.cui@intel.com>
1927 * i386-dis.c (enum): Add PREFIX_0F01_REG_5_MOD_3_RM_1,
1928 (prefix_table): New instructions (see prefixes above).
1929 (rm_table): Likewise
1930 * i386-gen.c (cpu_flag_init): Add CPU_TSXLDTRK_FLAGS,
1931 CPU_ANY_TSXLDTRK_FLAGS.
1932 (cpu_flags): Add CpuTSXLDTRK.
1933 * i386-opc.h (enum): Add CpuTSXLDTRK.
1934 (i386_cpu_flags): Add cputsxldtrk.
1935 * i386-opc.tbl: Add XSUSPLDTRK insns.
1936 * i386-init.h: Regenerate.
1937 * i386-tbl.h: Likewise.
1939 2020-04-02 Lili Cui <lili.cui@intel.com>
1941 * i386-dis.c (prefix_table): New instructions serialize.
1942 * i386-gen.c (cpu_flag_init): Add CPU_SERIALIZE_FLAGS,
1943 CPU_ANY_SERIALIZE_FLAGS.
1944 (cpu_flags): Add CpuSERIALIZE.
1945 * i386-opc.h (enum): Add CpuSERIALIZE.
1946 (i386_cpu_flags): Add cpuserialize.
1947 * i386-opc.tbl: Add SERIALIZE insns.
1948 * i386-init.h: Regenerate.
1949 * i386-tbl.h: Likewise.
1951 2020-03-26 Alan Modra <amodra@gmail.com>
1953 * disassemble.h (opcodes_assert): Declare.
1954 (OPCODES_ASSERT): Define.
1955 * disassemble.c: Don't include assert.h. Include opintl.h.
1956 (opcodes_assert): New function.
1957 * h8300-dis.c (bfd_h8_disassemble_init): Use OPCODES_ASSERT.
1958 (bfd_h8_disassemble): Reduce size of data array. Correctly
1959 calculate maxlen. Omit insn decoding when insn length exceeds
1960 maxlen. Exit from nibble loop when looking for E, before
1961 accessing next data byte. Move processing of E outside loop.
1962 Replace tests of maxlen in loop with assertions.
1964 2020-03-26 Alan Modra <amodra@gmail.com>
1966 * arc-dis.c (find_format): Init needs_limm. Simplify use of limm.
1968 2020-03-25 Alan Modra <amodra@gmail.com>
1970 * z80-dis.c (suffix): Init mybuf.
1972 2020-03-22 Alan Modra <amodra@gmail.com>
1974 * h8300-dis.c (bfd_h8_disassemble): Limit data[] access to that
1975 successflly read from section.
1977 2020-03-22 Alan Modra <amodra@gmail.com>
1979 * arc-dis.c (find_format): Use ISO C string concatenation rather
1980 than line continuation within a string. Don't access needs_limm
1981 before testing opcode != NULL.
1983 2020-03-22 Alan Modra <amodra@gmail.com>
1985 * ns32k-dis.c (print_insn_arg): Update comment.
1986 (print_insn_ns32k): Reduce size of index_offset array, and
1987 initialize, passing -1 to print_insn_arg for args that are not
1988 an index. Don't exit arg loop early. Abort on bad arg number.
1990 2020-03-22 Alan Modra <amodra@gmail.com>
1992 * s12z-dis.c (abstract_read_memory): Don't print error on EOI.
1993 * s12z-opc.c: Formatting.
1994 (operands_f): Return an int.
1995 (opr_n_bytes_p1): Return -1 on reaching buffer memory limit.
1996 (opr_n_bytes2, bfextins_n_bytes, mul_n_bytes, bm_n_bytes),
1997 (shift_n_bytes, mov_imm_opr_n_bytes, loop_prim_n_bytes),
1998 (exg_sex_discrim): Likewise.
1999 (create_immediate_operand, create_bitfield_operand),
2000 (create_register_operand_with_size, create_register_all_operand),
2001 (create_register_all16_operand, create_simple_memory_operand),
2002 (create_memory_operand, create_memory_auto_operand): Don't
2003 segfault on malloc failure.
2004 (z_ext24_decode): Return an int status, negative on fail, zero
2006 (x_imm1, imm1_decode, trap_decode, z_opr_decode, z_opr_decode2),
2007 (imm1234, reg_s_imm, reg_s_opr, z_imm1234_8base, z_imm1234_0base),
2008 (z_tfr, z_reg, reg_xy, lea_reg_xys_opr, lea_reg_xys, rel_15_7),
2009 (decode_rel_15_7, cmp_xy, sub_d6_x_y, sub_d6_y_x),
2010 (ld_18bit_decode, mul_decode, bm_decode, bm_rel_decode),
2011 (mov_imm_opr, ld_18bit_decode, exg_sex_decode),
2012 (loop_primitive_decode, shift_decode, psh_pul_decode),
2013 (bit_field_decode): Similarly.
2014 (z_decode_signed_value, decode_signed_value): Similarly. Add arg
2015 to return value, update callers.
2016 (x_opr_decode_with_size): Check all reads, returning NULL on fail.
2017 Don't segfault on NULL operand.
2018 (decode_operation): Return OP_INVALID on first fail.
2019 (decode_s12z): Check all reads, returning -1 on fail.
2021 2020-03-20 Alan Modra <amodra@gmail.com>
2023 * metag-dis.c (print_insn_metag): Don't ignore status from
2026 2020-03-20 Alan Modra <amodra@gmail.com>
2028 * nds32-dis.c (print_insn_nds32): Remove unnecessary casts.
2029 Initialize parts of buffer not written when handling a possible
2030 2-byte insn at end of section. Don't attempt decoding of such
2031 an insn by the 4-byte machinery.
2033 2020-03-20 Alan Modra <amodra@gmail.com>
2035 * ppc-dis.c (print_insn_powerpc): Only clear needed bytes of
2036 partially filled buffer. Prevent lookup of 4-byte insns when
2037 only VLE 2-byte insns are possible due to section size. Print
2038 ".word" rather than ".long" for 2-byte leftovers.
2040 2020-03-17 Sergey Belyashov <sergey.belyashov@gmail.com>
2043 * z80-dis.c: Fix disassembling ED+A4/AC/B4/BC opcodes.
2045 2020-03-13 Jan Beulich <jbeulich@suse.com>
2047 * i386-dis.c (X86_64_0D): Rename to ...
2048 (X86_64_0E): ... this.
2050 2020-03-09 H.J. Lu <hongjiu.lu@intel.com>
2052 * Makefile.am ($(srcdir)/i386-init.h): Also pass -P to $(CPP).
2053 * Makefile.in: Regenerated.
2055 2020-03-09 Jan Beulich <jbeulich@suse.com>
2057 * i386-opc.tbl (avx_irel): New. Use is for AVX512 vpcmp*
2059 * i386-tbl.h: Re-generate.
2061 2020-03-09 Jan Beulich <jbeulich@suse.com>
2063 * i386-opc.tbl (xop_elem, xop_irel, xop_sign): New. Use them for XOP vpcom*,
2064 vprot*, vpsha*, and vpshl*.
2065 * i386-tbl.h: Re-generate.
2067 2020-03-09 Jan Beulich <jbeulich@suse.com>
2069 * i386-opc.tbl (avx_frel): New. Use it for AVX/AVX512 vcmpps,
2070 vcmpss, vcmppd, and vcmpsd 3-operand pseudo-ops.
2071 * i386-tbl.h: Re-generate.
2073 2020-03-09 Jan Beulich <jbeulich@suse.com>
2075 * i386-gen.c (set_bitfield): Ignore zero-length field names.
2076 * i386-opc.tbl (sse_frel): New. Use it for SSE/SSE2 cmpps,
2077 cmpss, cmppd, and cmpsd 2-operand pseudo-ops.
2078 * i386-tbl.h: Re-generate.
2080 2020-03-09 Jan Beulich <jbeulich@suse.com>
2082 * i386-gen.c (struct template_arg, struct template_instance,
2083 struct template_param, struct template, templates,
2084 parse_template, expand_templates): New.
2085 (process_i386_opcodes): Various local variables moved to
2086 expand_templates. Call parse_template and expand_templates.
2087 * i386-opc.tbl (cc): New. Use it for Jcc, SETcc, and CMOVcc.
2088 * i386-tbl.h: Re-generate.
2090 2020-03-06 Jan Beulich <jbeulich@suse.com>
2092 * i386-opc.tbl (vcvtdq2pd, vcvtps2pd, vcvtudq2pd, vcvtps2ph,
2093 vcvtps2qq, vcvtps2uqq, vcvttps2qq, vcvttps2uqq): Fold separate
2094 register and memory source templates. Replace VexW= by VexW*
2096 * i386-tbl.h: Re-generate.
2098 2020-03-06 Jan Beulich <jbeulich@suse.com>
2100 * i386-opc.tbl: Drop IgnoreSize from various SIMD insns. Replace
2101 VexW= by VexW* and VexVVVV=1 by just VexVVVV where applicable.
2102 * i386-tbl.h: Re-generate.
2104 2020-03-06 Jan Beulich <jbeulich@suse.com>
2106 * i386-opc.tbl (fildll, fistpll, fisttpll): Add ATTSyntax.
2107 * i386-tbl.h: Re-generate.
2109 2020-03-06 Jan Beulich <jbeulich@suse.com>
2111 * i386-opc.tbl (movq): Drop NoRex64 from XMM/XMM SSE2AVX variants.
2112 (movmskps, pextrw, pinsrw, pmovmskb, movmskpd, extractps,
2113 pextrb, pinsrb, roundsd): Drop NoRex64 and where applicable use
2114 VexW0 on SSE2AVX variants.
2115 (vmovq): Drop NoRex64 from XMM/XMM variants.
2116 (vextractps, vmovmskpd, vmovmskps, vpextrb, vpextrw, vpinsrb,
2117 vpinsrw, vpmovmskb, vroundsd, vpmovmskb): Drop NoRex64 and where
2118 applicable use VexW0.
2119 * i386-tbl.h: Re-generate.
2121 2020-03-06 Jan Beulich <jbeulich@suse.com>
2123 * i386-gen.c (opcode_modifiers): Remove Rex64 field.
2124 * i386-opc.h (Rex64): Delete.
2125 (struct i386_opcode_modifier): Remove rex64 field.
2126 * i386-opc.tbl (crc32): Drop Rex64.
2127 Replace Rex64 with Size64 everywhere else.
2128 * i386-tbl.h: Re-generate.
2130 2020-03-06 Jan Beulich <jbeulich@suse.com>
2132 * i386-dis.c (OP_E_memory): Exclude recording of used address
2133 prefix for "bnd" modes only in 64-bit mode. Don't decode 16-bit
2134 addressed memory operands for MPX insns.
2136 2020-03-06 Jan Beulich <jbeulich@suse.com>
2138 * i386-opc.tbl (movmskps, mwait, vmread, vmwrite, invept,
2139 invvpid, invpcid, rdfsbase, rdgsbase, wrfsbase, wrgsbase, adcx,
2140 adox, mwaitx, rdpid, movdiri): Add IgnoreSize.
2141 (ptwrite): Split into non-64-bit and 64-bit forms.
2142 * i386-tbl.h: Re-generate.
2144 2020-03-06 Jan Beulich <jbeulich@suse.com>
2146 * i386-opc.tbl (tpause, umwait): Add IgnoreSize. Add 3-operand
2148 * i386-tbl.h: Re-generate.
2150 2020-03-04 Jan Beulich <jbeulich@suse.com>
2152 * i386-dis.c (PREFIX_0F01_REG_3_RM_1): New.
2153 (prefix_table): Move vmmcall here. Add vmgexit.
2154 (rm_table): Replace vmmcall entry by prefix_table[] escape.
2155 * i386-gen.c (cpu_flag_init): Add CPU_SEV_ES_FLAGS entry.
2156 (cpu_flags): Add CpuSEV_ES entry.
2157 * i386-opc.h (CpuSEV_ES): New.
2158 (union i386_cpu_flags): Add cpusev_es field.
2159 * i386-opc.tbl (vmgexit): New.
2160 * i386-init.h, i386-tbl.h: Re-generate.
2162 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
2164 * i386-gen.c (opcode_modifiers): Replace IgnoreSize/DefaultSize
2166 * i386-opc.h (IGNORESIZE): New.
2167 (DEFAULTSIZE): Likewise.
2168 (IgnoreSize): Removed.
2169 (DefaultSize): Likewise.
2170 (MnemonicSize): New.
2171 (i386_opcode_modifier): Replace ignoresize/defaultsize with
2173 * i386-opc.tbl (IgnoreSize): New.
2174 (DefaultSize): Likewise.
2175 * i386-tbl.h: Regenerated.
2177 2020-03-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2180 * z80-dis.c: Fix disassembly of LD IY,(HL) and D (HL),IX
2183 2020-03-03 H.J. Lu <hongjiu.lu@intel.com>
2186 * i386-opc.tbl: Add IgnoreSize to cvtsi2sd, cvtsi2ss, vcvtsi2sd,
2187 vcvtsi2ss, vcvtusi2sd and vcvtusi2ss for AT&T syntax.
2188 * i386-tbl.h: Regenerated.
2190 2020-02-26 Alan Modra <amodra@gmail.com>
2192 * aarch64-asm.c: Indent labels correctly.
2193 * aarch64-dis.c: Likewise.
2194 * aarch64-gen.c: Likewise.
2195 * aarch64-opc.c: Likewise.
2196 * alpha-dis.c: Likewise.
2197 * i386-dis.c: Likewise.
2198 * nds32-asm.c: Likewise.
2199 * nfp-dis.c: Likewise.
2200 * visium-dis.c: Likewise.
2202 2020-02-25 Claudiu Zissulescu <claziss@gmail.com>
2204 * arc-regs.h (int_vector_base): Make it available for all ARC
2207 2020-02-20 Nelson Chu <nelson.chu@sifive.com>
2209 * riscv-dis.c (print_insn_args): Updated since the DECLARE_CSR is
2212 2020-02-19 Nelson Chu <nelson.chu@sifive.com>
2214 * riscv-opc.c (riscv_opcodes): Convert add/addi to the compressed
2215 c.mv/c.li if rs1 is zero.
2217 2020-02-17 H.J. Lu <hongjiu.lu@intel.com>
2219 * i386-gen.c (cpu_flag_init): Replace CpuABM with
2220 CpuLZCNT|CpuPOPCNT. Add CpuPOPCNT to CPU_SSE4_2_FLAGS. Add
2222 (cpu_flags): Remove CpuABM. Add CpuPOPCNT.
2223 * i386-opc.h (CpuABM): Removed.
2225 (i386_cpu_flags): Remove cpuabm. Add cpupopcnt.
2226 * i386-opc.tbl: Replace CpuABM|CpuSSE4_2 with CpuPOPCNT on
2227 popcnt. Remove CpuABM from lzcnt.
2228 * i386-init.h: Regenerated.
2229 * i386-tbl.h: Likewise.
2231 2020-02-17 Jan Beulich <jbeulich@suse.com>
2233 * i386-opc.tbl (vcvtsi2sd, vcvtsi2ss, vcvtusi2sd, vcvtusi2ss):
2234 Fold CpuNo64 and Cpu64 templates. Use VexLIG/EVexLIG and VexW0/
2235 VexW1 instead of open-coding them.
2236 * i386-tbl.h: Re-generate.
2238 2020-02-17 Jan Beulich <jbeulich@suse.com>
2240 * i386-opc.tbl (AddrPrefixOpReg): Define.
2241 (monitor, invlpga, vmload, vmrun, vmsave, clzero, monitorx,
2242 umonitor, movdir64b, enqcmd, enqcmds): Fold Cpu64 and CpuNo64
2243 templates. Drop NoRex64.
2244 * i386-tbl.h: Re-generate.
2246 2020-02-17 Jan Beulich <jbeulich@suse.com>
2249 * i386-opc.tbl (vcvtpd2dq, vcvtpd2ps, vcvttpd2dq, vcvtpd2udq,
2250 vcvttpd2udq, vcvtqq2ps, vcvtuqq2ps): Split XMM/YMM source forms
2251 into Intel syntax instance (with Unpsecified) and AT&T one
2253 (vcvtneps2bf16): Likewise, along with folding the two so far
2255 * i386-tbl.h: Re-generate.
2257 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2259 * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from
2260 CPU_ANY_SSE4A_FLAGS.
2262 2020-02-17 Alan Modra <amodra@gmail.com>
2264 * i386-gen.c (cpu_flag_init): Correct last change.
2266 2020-02-16 H.J. Lu <hongjiu.lu@intel.com>
2268 * i386-gen.c (cpu_flag_init): Add CPU_ANY_SSE4A_FLAGS. Remove
2271 2020-02-14 H.J. Lu <hongjiu.lu@intel.com>
2273 * i386-opc.tbl (movsx): Remove Intel syntax comments.
2276 2020-02-14 Jan Beulich <jbeulich@suse.com>
2279 * i386-opc.tbl (movsx): Fold patterns. Also allow Reg32 as
2280 destination for Cpu64-only variant.
2281 (movzx): Fold patterns.
2282 * i386-tbl.h: Re-generate.
2284 2020-02-13 Jan Beulich <jbeulich@suse.com>
2286 * i386-gen.c (cpu_flag_init): Move CpuSSE4a from
2287 CPU_ANY_SSE_FLAGS entry to CPU_ANY_SSE3_FLAGS one. Add
2288 CPU_ANY_SSE4_FLAGS entry.
2289 * i386-init.h: Re-generate.
2291 2020-02-12 Jan Beulich <jbeulich@suse.com>
2293 * i386-opc.tbl (vfpclasspd, vfpclassps): Add Intel sytax form
2294 with Unspecified, making the present one AT&T syntax only.
2295 * i386-tbl.h: Re-generate.
2297 2020-02-12 Jan Beulich <jbeulich@suse.com>
2299 * i386-opc.tbl (jmp): Fold CpuNo64 and Amd64 direct variants.
2300 * i386-tbl.h: Re-generate.
2302 2020-02-12 Jan Beulich <jbeulich@suse.com>
2305 * i386-dis.c (putop): Handle REX.W in '^' case for Intel64 mode.
2306 * i386-opc.tbl (lfs, lgs, lss, lcall, ljmp): Split into
2307 Amd64 and Intel64 templates.
2308 (call, jmp): Likewise for far indirect variants. Dro
2310 * i386-tbl.h: Re-generate.
2312 2020-02-11 Jan Beulich <jbeulich@suse.com>
2314 * i386-gen.c (opcode_modifiers): Remove ShortForm entry.
2315 * i386-opc.h (ShortForm): Delete.
2316 (struct i386_opcode_modifier): Remove shortform field.
2317 * i386-opc.tbl (mov, movabs, push, pop, xchg, inc, dec, fld,
2318 fst, fstp, fxch, fcom, fcomp, fucom, fucomp, fadd, faddp, fsub,
2319 fsubp, fsubr, fsubrp, fmul, fmulp, fdiv, fdivp, fdivr, fdivrp,
2320 ffreep, bswap, fcmov*, fcomi, fcomip, fucomi, fucomip, movq):
2322 * i386-tbl.h: Re-generate.
2324 2020-02-11 Jan Beulich <jbeulich@suse.com>
2326 * i386-opc.tbl (fcomi, fucomi, fcomip, fcompi, fucomip,
2327 fucompi): Drop ShortForm from operand-less templates.
2328 * i386-tbl.h: Re-generate.
2330 2020-02-11 Alan Modra <amodra@gmail.com>
2332 * cgen-ibld.in (extract_normal): Set *valuep on all return paths.
2333 * bpf-ibld.c, * epiphany-ibld.c, * fr30-ibld.c, * frv-ibld.c,
2334 * ip2k-ibld.c, * iq2000-ibld.c, * lm32-ibld.c, * m32c-ibld.c,
2335 * m32r-ibld.c, * mep-ibld.c, * mt-ibld.c, * or1k-ibld.c,
2336 * xc16x-ibld.c, * xstormy16-ibld.c: Regenerate.
2338 2020-02-10 Matthew Malcomson <matthew.malcomson@arm.com>
2340 * arm-dis.c (print_insn_cde): Define 'V' parse character.
2341 (cde_opcodes): Add VCX* instructions.
2343 2020-02-10 Stam Markianos-Wright <stam.markianos-wright@arm.com>
2344 Matthew Malcomson <matthew.malcomson@arm.com>
2346 * arm-dis.c (struct cdeopcode32): New.
2347 (CDE_OPCODE): New macro.
2348 (cde_opcodes): New disassembly table.
2349 (regnames): New option to table.
2350 (cde_coprocs): New global variable.
2351 (print_insn_cde): New
2352 (print_insn_thumb32): Use print_insn_cde.
2353 (parse_arm_disassembler_options): Parse coprocN args.
2355 2020-02-10 H.J. Lu <hongjiu.lu@intel.com>
2358 * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
2360 * i386-opc.h (AMD64): Removed.
2361 (Intel64): Likewose.
2363 (INTEL64): Likewise.
2364 (INTEL64ONLY): Likewise.
2365 (i386_opcode_modifier): Replace amd64 and intel64 with isa64.
2366 * i386-opc.tbl (Amd64): New.
2367 (Intel64): Likewise.
2368 (Intel64Only): Likewise.
2369 Replace AMD64 with Amd64. Update sysenter/sysenter with
2370 Cpu64 and Intel64Only. Remove AMD64 from sysenter/sysenter.
2371 * i386-tbl.h: Regenerated.
2373 2020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
2376 * z80-dis.c: Add support for GBZ80 opcodes.
2378 2020-02-04 Alan Modra <amodra@gmail.com>
2380 * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
2382 2020-02-03 Alan Modra <amodra@gmail.com>
2384 * m32c-ibld.c: Regenerate.
2386 2020-02-01 Alan Modra <amodra@gmail.com>
2388 * frv-ibld.c: Regenerate.
2390 2020-01-31 Jan Beulich <jbeulich@suse.com>
2392 * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
2393 (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
2394 (OP_E_memory): Replace xmm_mdq_mode case label by
2395 vex_scalar_w_dq_mode one.
2396 * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
2398 2020-01-31 Jan Beulich <jbeulich@suse.com>
2400 * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
2401 (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
2402 vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
2403 (intel_operand_size): Drop vex_w_dq_mode case label.
2405 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
2407 * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
2408 Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
2410 2020-01-30 Alan Modra <amodra@gmail.com>
2412 * m32c-ibld.c: Regenerate.
2414 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
2416 * bpf-opc.c: Regenerate.
2418 2020-01-30 Jan Beulich <jbeulich@suse.com>
2420 * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
2421 (dis386): Use them to replace C2/C3 table entries.
2422 (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
2423 * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
2424 ones. Use Size64 instead of DefaultSize on Intel64 ones.
2425 * i386-tbl.h: Re-generate.
2427 2020-01-30 Jan Beulich <jbeulich@suse.com>
2429 * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
2431 (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
2433 * i386-tbl.h: Re-generate.
2435 2020-01-30 Alan Modra <amodra@gmail.com>
2437 * tic4x-dis.c (tic4x_dp): Make unsigned.
2439 2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
2440 Jan Beulich <jbeulich@suse.com>
2443 * i386-dis.c (MOVSXD_Fixup): New function.
2444 (movsxd_mode): New enum.
2445 (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
2446 (intel_operand_size): Handle movsxd_mode.
2447 (OP_E_register): Likewise.
2449 * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
2450 register on movsxd. Add movsxd with 16-bit destination register
2451 for AMD64 and Intel64 ISAs.
2452 * i386-tbl.h: Regenerated.
2454 2020-01-27 Tamar Christina <tamar.christina@arm.com>
2457 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
2458 * aarch64-asm-2.c: Regenerate
2459 * aarch64-dis-2.c: Likewise.
2460 * aarch64-opc-2.c: Likewise.
2462 2020-01-21 Jan Beulich <jbeulich@suse.com>
2464 * i386-opc.tbl (sysret): Drop DefaultSize.
2465 * i386-tbl.h: Re-generate.
2467 2020-01-21 Jan Beulich <jbeulich@suse.com>
2469 * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
2471 (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
2472 * i386-tbl.h: Re-generate.
2474 2020-01-20 Nick Clifton <nickc@redhat.com>
2476 * po/de.po: Updated German translation.
2477 * po/pt_BR.po: Updated Brazilian Portuguese translation.
2478 * po/uk.po: Updated Ukranian translation.
2480 2020-01-20 Alan Modra <amodra@gmail.com>
2482 * hppa-dis.c (fput_const): Remove useless cast.
2484 2020-01-20 Alan Modra <amodra@gmail.com>
2486 * arm-dis.c (print_insn_arm): Wrap 'T' value.
2488 2020-01-18 Nick Clifton <nickc@redhat.com>
2490 * configure: Regenerate.
2491 * po/opcodes.pot: Regenerate.
2493 2020-01-18 Nick Clifton <nickc@redhat.com>
2495 Binutils 2.34 branch created.
2497 2020-01-17 Christian Biesinger <cbiesinger@google.com>
2499 * opintl.h: Fix spelling error (seperate).
2501 2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
2503 * i386-opc.tbl: Add {vex} pseudo prefix.
2504 * i386-tbl.h: Regenerated.
2506 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
2509 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
2510 (neon_opcodes): Likewise.
2511 (select_arm_features): Make sure we enable MVE bits when selecting
2512 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
2515 2020-01-16 Jan Beulich <jbeulich@suse.com>
2517 * i386-opc.tbl: Drop stale comment from XOP section.
2519 2020-01-16 Jan Beulich <jbeulich@suse.com>
2521 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
2522 (extractps): Add VexWIG to SSE2AVX forms.
2523 * i386-tbl.h: Re-generate.
2525 2020-01-16 Jan Beulich <jbeulich@suse.com>
2527 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
2528 Size64 from and use VexW1 on SSE2AVX forms.
2529 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
2530 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
2531 * i386-tbl.h: Re-generate.
2533 2020-01-15 Alan Modra <amodra@gmail.com>
2535 * tic4x-dis.c (tic4x_version): Make unsigned long.
2536 (optab, optab_special, registernames): New file scope vars.
2537 (tic4x_print_register): Set up registernames rather than
2538 malloc'd registertable.
2539 (tic4x_disassemble): Delete optable and optable_special. Use
2540 optab and optab_special instead. Throw away old optab,
2541 optab_special and registernames when info->mach changes.
2543 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
2546 * z80-dis.c (suffix): Use .db instruction to generate double
2549 2020-01-14 Alan Modra <amodra@gmail.com>
2551 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
2552 values to unsigned before shifting.
2554 2020-01-13 Thomas Troeger <tstroege@gmx.de>
2556 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
2558 (print_insn_thumb16, print_insn_thumb32): Likewise.
2559 (print_insn): Initialize the insn info.
2560 * i386-dis.c (print_insn): Initialize the insn info fields, and
2563 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2565 * arc-opc.c (C_NE): Make it required.
2567 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
2569 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
2570 reserved register name.
2572 2020-01-13 Alan Modra <amodra@gmail.com>
2574 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
2575 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
2577 2020-01-13 Alan Modra <amodra@gmail.com>
2579 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
2580 result of wasm_read_leb128 in a uint64_t and check that bits
2581 are not lost when copying to other locals. Use uint32_t for
2582 most locals. Use PRId64 when printing int64_t.
2584 2020-01-13 Alan Modra <amodra@gmail.com>
2586 * score-dis.c: Formatting.
2587 * score7-dis.c: Formatting.
2589 2020-01-13 Alan Modra <amodra@gmail.com>
2591 * score-dis.c (print_insn_score48): Use unsigned variables for
2592 unsigned values. Don't left shift negative values.
2593 (print_insn_score32): Likewise.
2594 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
2596 2020-01-13 Alan Modra <amodra@gmail.com>
2598 * tic4x-dis.c (tic4x_print_register): Remove dead code.
2600 2020-01-13 Alan Modra <amodra@gmail.com>
2602 * fr30-ibld.c: Regenerate.
2604 2020-01-13 Alan Modra <amodra@gmail.com>
2606 * xgate-dis.c (print_insn): Don't left shift signed value.
2607 (ripBits): Formatting, use 1u.
2609 2020-01-10 Alan Modra <amodra@gmail.com>
2611 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
2612 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
2614 2020-01-10 Alan Modra <amodra@gmail.com>
2616 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
2617 and XRREG value earlier to avoid a shift with negative exponent.
2618 * m10200-dis.c (disassemble): Similarly.
2620 2020-01-09 Nick Clifton <nickc@redhat.com>
2623 * z80-dis.c (ld_ii_ii): Use correct cast.
2625 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
2628 * z80-dis.c (ld_ii_ii): Use character constant when checking
2631 2020-01-09 Jan Beulich <jbeulich@suse.com>
2633 * i386-dis.c (SEP_Fixup): New.
2635 (dis386_twobyte): Use it for sysenter/sysexit.
2636 (enum x86_64_isa): Change amd64 enumerator to value 1.
2637 (OP_J): Compare isa64 against intel64 instead of amd64.
2638 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
2640 * i386-tbl.h: Re-generate.
2642 2020-01-08 Alan Modra <amodra@gmail.com>
2644 * z8k-dis.c: Include libiberty.h
2645 (instr_data_s): Make max_fetched unsigned.
2646 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
2647 Don't exceed byte_info bounds.
2648 (output_instr): Make num_bytes unsigned.
2649 (unpack_instr): Likewise for nibl_count and loop.
2650 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
2652 * z8k-opc.h: Regenerate.
2654 2020-01-07 Shahab Vahedi <shahab@synopsys.com>
2656 * arc-tbl.h (llock): Use 'LLOCK' as class.
2658 (scond): Use 'SCOND' as class.
2660 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
2663 2020-01-06 Alan Modra <amodra@gmail.com>
2665 * m32c-ibld.c: Regenerate.
2667 2020-01-06 Alan Modra <amodra@gmail.com>
2670 * z80-dis.c (suffix): Don't use a local struct buffer copy.
2671 Peek at next byte to prevent recursion on repeated prefix bytes.
2672 Ensure uninitialised "mybuf" is not accessed.
2673 (print_insn_z80): Don't zero n_fetch and n_used here,..
2674 (print_insn_z80_buf): ..do it here instead.
2676 2020-01-04 Alan Modra <amodra@gmail.com>
2678 * m32r-ibld.c: Regenerate.
2680 2020-01-04 Alan Modra <amodra@gmail.com>
2682 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
2684 2020-01-04 Alan Modra <amodra@gmail.com>
2686 * crx-dis.c (match_opcode): Avoid shift left of signed value.
2688 2020-01-04 Alan Modra <amodra@gmail.com>
2690 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
2692 2020-01-03 Jan Beulich <jbeulich@suse.com>
2694 * aarch64-tbl.h (aarch64_opcode_table): Use
2695 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
2697 2020-01-03 Jan Beulich <jbeulich@suse.com>
2699 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
2700 forms of SUDOT and USDOT.
2702 2020-01-03 Jan Beulich <jbeulich@suse.com>
2704 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
2706 * opcodes/aarch64-dis-2.c: Re-generate.
2708 2020-01-03 Jan Beulich <jbeulich@suse.com>
2710 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
2712 * opcodes/aarch64-dis-2.c: Re-generate.
2714 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
2716 * z80-dis.c: Add support for eZ80 and Z80 instructions.
2718 2020-01-01 Alan Modra <amodra@gmail.com>
2720 Update year range in copyright notice of all files.
2722 For older changes see ChangeLog-2019
2724 Copyright (C) 2020 Free Software Foundation, Inc.
2726 Copying and distribution of this file, with or without modification,
2727 are permitted in any medium without royalty provided the copyright
2728 notice and this notice are preserved.
2734 version-control: never
projects / deliverable / binutils-gdb.git / blob