ld/testsuite/ld-elf/flags1.d: Update the xfail list
[deliverable/binutils-gdb.git] / opcodes / ChangeLog
1 2016-05-13 Peter Bergner <bergner@vnet.ibm.com>
2
3 * ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
4
5 2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
6
7 * mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
8 mips64r6.
9 * mips-opc.c (D34): New macro.
10 (mips_builtin_opcodes): Define bposge32c for DSPr3.
11
12 2016-05-10 Alexander Fomin <alexander.fomin@intel.com>
13
14 * i386-dis.c (prefix_table): Add RDPID instruction.
15 * i386-gen.c (cpu_flag_init): Add RDPID flag.
16 (cpu_flags): Add RDPID bitfield.
17 * i386-opc.h (enum): Add RDPID element.
18 (i386_cpu_flags): Add RDPID field.
19 * i386-opc.tbl: Add RDPID instruction.
20 * i386-init.h: Regenerate.
21 * i386-tbl.h: Regenerate.
22
23 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
24
25 * arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
26 branch type of a symbol.
27 (print_insn): Likewise.
28
29 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
30
31 * arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
32 Mainline Security Extensions instructions.
33 (thumb_opcodes): Add entries for narrow ARMv8-M Security
34 Extensions instructions.
35 (thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
36 instructions.
37 (psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
38 special registers.
39
40 2016-05-09 Jose E. Marchesi <jose.marchesi@oracle.com>
41
42 * sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
43
44 2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
45
46 * arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
47 (arcExtMap_genOpcode): Likewise.
48 * arc-opc.c (arg_32bit_rc): Define new variable.
49 (arg_32bit_u6): Likewise.
50 (arg_32bit_limm): Likewise.
51
52 2016-05-03 Szabolcs Nagy <szabolcs.nagy@arm.com>
53
54 * aarch64-gen.c (VERIFIER): Define.
55 * aarch64-opc.c (VERIFIER): Define.
56 (verify_ldpsw): Use static linkage.
57 * aarch64-opc.h (verify_ldpsw): Remove.
58 * aarch64-tbl.h: Use VERIFIER for verifiers.
59
60 2016-04-28 Nick Clifton <nickc@redhat.com>
61
62 PR target/19722
63 * aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
64 * aarch64-opc.c (verify_ldpsw): New function.
65 * aarch64-opc.h (verify_ldpsw): New prototype.
66 * aarch64-tbl.h: Add initialiser for verifier field.
67 (LDPSW): Set verifier to verify_ldpsw.
68
69 2016-04-23 H.J. Lu <hongjiu.lu@intel.com>
70
71 PR binutils/19983
72 PR binutils/19984
73 * i386-dis.c (print_insn): Return -1 if size of bfd_vma is
74 smaller than address size.
75
76 2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
77
78 * alpha-dis.c: Regenerate.
79 * crx-dis.c: Likewise.
80 * disassemble.c: Likewise.
81 * epiphany-opc.c: Likewise.
82 * fr30-opc.c: Likewise.
83 * frv-opc.c: Likewise.
84 * ip2k-opc.c: Likewise.
85 * iq2000-opc.c: Likewise.
86 * lm32-opc.c: Likewise.
87 * lm32-opinst.c: Likewise.
88 * m32c-opc.c: Likewise.
89 * m32r-opc.c: Likewise.
90 * m32r-opinst.c: Likewise.
91 * mep-opc.c: Likewise.
92 * mt-opc.c: Likewise.
93 * or1k-opc.c: Likewise.
94 * or1k-opinst.c: Likewise.
95 * tic80-opc.c: Likewise.
96 * xc16x-opc.c: Likewise.
97 * xstormy16-opc.c: Likewise.
98
99 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
100
101 * arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
102 fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
103 calcsd, and calcxd instructions.
104 * arc-opc.c (insert_nps_bitop_size): Delete.
105 (extract_nps_bitop_size): Delete.
106 (MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
107 (extract_nps_qcmp_m3): Define.
108 (extract_nps_qcmp_m2): Define.
109 (extract_nps_qcmp_m1): Define.
110 (arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
111 (arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
112 (arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
113 NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
114 NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
115 NPS_QCMP_M3.
116
117 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
118
119 * arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
120
121 2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
122
123 * Makefile.in: Regenerated with automake 1.11.6.
124 * aclocal.m4: Likewise.
125
126 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
127
128 * arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
129 instructions.
130 * arc-opc.c (insert_nps_cmem_uimm16): New function.
131 (extract_nps_cmem_uimm16): New function.
132 (arc_operands): Add NPS_XLDST_UIMM16 operand.
133
134 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
135
136 * arc-dis.c (arc_insn_length): New function.
137 (print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
138 (find_format): Change insnLen parameter to unsigned.
139
140 2016-04-13 Nick Clifton <nickc@redhat.com>
141
142 PR target/19937
143 * v850-opc.c (v850_opcodes): Correct masks for long versions of
144 the LD.B and LD.BU instructions.
145
146 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
147
148 * arc-dis.c (find_format): Check for extension flags.
149 (print_flags): New function.
150 (print_insn_arc): Update for .extCondCode, .extCoreRegister and
151 .extAuxRegister.
152 * arc-ext.c (arcExtMap_coreRegName): Use
153 LAST_EXTENSION_CORE_REGISTER.
154 (arcExtMap_coreReadWrite): Likewise.
155 (dump_ARC_extmap): Update printing.
156 * arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
157 (arc_aux_regs): Add cpu field.
158 * arc-regs.h: Add cpu field, lower case name aux registers.
159
160 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
161
162 * arc-tbl.h: Add rtsc, sleep with no arguments.
163
164 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
165
166 * arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
167 Initialize.
168 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
169 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
170 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
171 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
172 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
173 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
174 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
175 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
176 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
177 (arc_opcode arc_opcodes): Null terminate the array.
178 (arc_num_opcodes): Remove.
179 * arc-ext.h (INSERT_XOP): Define.
180 (extInstruction_t): Likewise.
181 (arcExtMap_instName): Delete.
182 (arcExtMap_insn): New function.
183 (arcExtMap_genOpcode): Likewise.
184 * arc-ext.c (ExtInstruction): Remove.
185 (create_map): Zero initialize instruction fields.
186 (arcExtMap_instName): Remove.
187 (arcExtMap_insn): New function.
188 (dump_ARC_extmap): More info while debuging.
189 (arcExtMap_genOpcode): New function.
190 * arc-dis.c (find_format): New function.
191 (print_insn_arc): Use find_format.
192 (arc_get_disassembler): Enable dump_ARC_extmap only when
193 debugging.
194
195 2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
196
197 * mips-dis.c (print_mips16_insn_arg): Mask unused extended
198 instruction bits out.
199
200 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
201
202 * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
203 * arc-opc.c (arc_flag_operands): Add new flags.
204 (arc_flag_classes): Add new classes.
205
206 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
207
208 * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
209
210 2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
211
212 * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
213 encode1, rflt, crc16, and crc32 instructions.
214 * arc-opc.c (arc_flag_operands): Add F_NPS_R.
215 (arc_flag_classes): Add C_NPS_R.
216 (insert_nps_bitop_size_2b): New function.
217 (extract_nps_bitop_size_2b): Likewise.
218 (insert_nps_bitop_uimm8): Likewise.
219 (extract_nps_bitop_uimm8): Likewise.
220 (arc_operands): Add new operand entries.
221
222 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
223
224 * arc-regs.h: Add a new subclass field. Add double assist
225 accumulator register values.
226 * arc-tbl.h: Use DPA subclass to mark the double assist
227 instructions. Use DPX/SPX subclas to mark the FPX instructions.
228 * arc-opc.c (RSP): Define instead of SP.
229 (arc_aux_regs): Add the subclass field.
230
231 2016-04-05 Jiong Wang <jiong.wang@arm.com>
232
233 * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
234
235 2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
236
237 * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
238 NPS_R_SRC1.
239
240 2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
241
242 * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
243 issues. No functional changes.
244
245 2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
246
247 * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
248 (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
249 (RTT): Remove duplicate.
250 (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
251 (PCT_CONFIG*): Remove.
252 (D1L, D1H, D2H, D2L): Define.
253
254 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
255
256 * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
257
258 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
259
260 * arc-tbl.h (invld07): Remove.
261 * arc-ext-tbl.h: New file.
262 * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
263 * arc-opc.c (arc_opcodes): Add ext-tbl include.
264
265 2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
266
267 Fix -Wstack-usage warnings.
268 * aarch64-dis.c (print_operands): Substitute size.
269 * aarch64-opc.c (print_register_offset_address): Substitute tblen.
270
271 2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
272
273 * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
274 to get a proper diagnostic when an invalid ASR register is used.
275
276 2016-03-22 Nick Clifton <nickc@redhat.com>
277
278 * configure: Regenerate.
279
280 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
281
282 * arc-nps400-tbl.h: New file.
283 * arc-opc.c: Add top level comment.
284 (insert_nps_3bit_dst): New function.
285 (extract_nps_3bit_dst): New function.
286 (insert_nps_3bit_src2): New function.
287 (extract_nps_3bit_src2): New function.
288 (insert_nps_bitop_size): New function.
289 (extract_nps_bitop_size): New function.
290 (arc_flag_operands): Add nps400 entries.
291 (arc_flag_classes): Add nps400 entries.
292 (arc_operands): Add nps400 entries.
293 (arc_opcodes): Add nps400 include.
294
295 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
296
297 * arc-opc.c (arc_flag_classes): Convert all flag classes to use
298 the new class enum values.
299
300 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
301
302 * arc-dis.c (print_insn_arc): Handle nps400.
303
304 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
305
306 * arc-opc.c (BASE): Delete.
307
308 2016-03-18 Nick Clifton <nickc@redhat.com>
309
310 PR target/19721
311 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
312 of MOV insn that aliases an ORR insn.
313
314 2016-03-16 Jiong Wang <jiong.wang@arm.com>
315
316 * arm-dis.c (neon_opcodes): Support new FP16 instructions.
317
318 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
319
320 * mcore-opc.h: Add const qualifiers.
321 * microblaze-opc.h (struct op_code_struct): Likewise.
322 * sh-opc.h: Likewise.
323 * tic4x-dis.c (tic4x_print_indirect): Likewise.
324 (tic4x_print_op): Likewise.
325
326 2016-03-02 Alan Modra <amodra@gmail.com>
327
328 * or1k-desc.h: Regenerate.
329 * fr30-ibld.c: Regenerate.
330 * rl78-decode.c: Regenerate.
331
332 2016-03-01 Nick Clifton <nickc@redhat.com>
333
334 PR target/19747
335 * rl78-dis.c (print_insn_rl78_common): Fix typo.
336
337 2016-02-24 Renlin Li <renlin.li@arm.com>
338
339 * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
340 (print_insn_coprocessor): Support fp16 instructions.
341
342 2016-02-24 Renlin Li <renlin.li@arm.com>
343
344 * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
345 vminnm, vrint(mpna).
346
347 2016-02-24 Renlin Li <renlin.li@arm.com>
348
349 * arm-dis.c (print_insn_coprocessor): Check co-processor number for
350 cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
351
352 2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
353
354 * i386-dis.c (print_insn): Parenthesize expression to prevent
355 truncated addresses.
356 (OP_J): Likewise.
357
358 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
359 Janek van Oirschot <jvanoirs@synopsys.com>
360
361 * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
362 variable.
363
364 2016-02-04 Nick Clifton <nickc@redhat.com>
365
366 PR target/19561
367 * msp430-dis.c (print_insn_msp430): Add a special case for
368 decoding an RRC instruction with the ZC bit set in the extension
369 word.
370
371 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
372
373 * cgen-ibld.in (insert_normal): Rework calculation of shift.
374 * epiphany-ibld.c: Regenerate.
375 * fr30-ibld.c: Regenerate.
376 * frv-ibld.c: Regenerate.
377 * ip2k-ibld.c: Regenerate.
378 * iq2000-ibld.c: Regenerate.
379 * lm32-ibld.c: Regenerate.
380 * m32c-ibld.c: Regenerate.
381 * m32r-ibld.c: Regenerate.
382 * mep-ibld.c: Regenerate.
383 * mt-ibld.c: Regenerate.
384 * or1k-ibld.c: Regenerate.
385 * xc16x-ibld.c: Regenerate.
386 * xstormy16-ibld.c: Regenerate.
387
388 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
389
390 * epiphany-dis.c: Regenerated from latest cpu files.
391
392 2016-02-01 Michael McConville <mmcco@mykolab.com>
393
394 * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
395 test bit.
396
397 2016-01-25 Renlin Li <renlin.li@arm.com>
398
399 * arm-dis.c (mapping_symbol_for_insn): New function.
400 (find_ifthen_state): Call mapping_symbol_for_insn().
401
402 2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
403
404 * aarch64-opc.c (operand_general_constraint_met_p): Check validity
405 of MSR UAO immediate operand.
406
407 2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
408
409 * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
410 instruction support.
411
412 2016-01-17 Alan Modra <amodra@gmail.com>
413
414 * configure: Regenerate.
415
416 2016-01-14 Nick Clifton <nickc@redhat.com>
417
418 * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
419 instructions that can support stack pointer operations.
420 * rl78-decode.c: Regenerate.
421 * rl78-dis.c: Fix display of stack pointer in MOVW based
422 instructions.
423
424 2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
425
426 * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
427 testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
428 erxtatus_el1 and erxaddr_el1.
429
430 2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
431
432 * arm-dis.c (arm_opcodes): Add "esb".
433 (thumb_opcodes): Likewise.
434
435 2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
436
437 * ppc-opc.c <xscmpnedp>: Delete.
438 <xvcmpnedp>: Likewise.
439 <xvcmpnedp.>: Likewise.
440 <xvcmpnesp>: Likewise.
441 <xvcmpnesp.>: Likewise.
442
443 2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
444
445 PR gas/13050
446 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
447 addition to ISA_A.
448
449 2016-01-01 Alan Modra <amodra@gmail.com>
450
451 Update year range in copyright notice of all files.
452
453 For older changes see ChangeLog-2015
454 \f
455 Copyright (C) 2016 Free Software Foundation, Inc.
456
457 Copying and distribution of this file, with or without modification,
458 are permitted in any medium without royalty provided the copyright
459 notice and this notice are preserved.
460
461 Local Variables:
462 mode: change-log
463 left-margin: 8
464 fill-column: 74
465 version-control: never
466 End:
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