opcodes/ChangeLog

   1 2006-12-27  Kazu Hirata  <kazu@codesourcery.com>
   2
   3         * m68k-opc.c (m68k_opcodes): Add sleep and trapx.
   4
   5 2006-12-15  H.J. Lu  <hongjiu.lu@intel.com>
   6
   7         * i386-dis.c (o_mode): New for 16-byte operand.
   8         (intel_operand_size): Generate "OWORD PTR " for o_mode.
   9         (CMPXCHG8B_Fixup): Set bytemode to o_mode instead of x_mode.
  10
  11 2006-12-14  H.J. Lu  <hongjiu.lu@intel.com>
  12
  13         * i386-dis.c (CMPXCHG8B_Fixup): New.
  14         (grps): Use CMPXCHG8B_Fixup for cmpxchg8b.
  15
  16 2006-12-11  H.J. Lu  <hongjiu.lu@intel.com>
  17
  18         * i386-dis.c (Eq): Replaced by ...
  19         (Mq): New. This.
  20         (Ma): Defined with OP_M instead of OP_E.
  21         (grps): Updated cmpxchg8b and vmptrst for Eq -> Mq.
  22         (OP_M): Added bound, cmpxchg8b and vmptrst to bad modrm list.
  23
  24 2006-12-11  Daniel Jacobowitz  <dan@codesourcery.com>
  25
  26         * po/Make-in (.po.gmo): Put gmo files in objdir.
  27
  28 2006-12-09  H.J. Lu  <hongjiu.lu@intel.com>
  29
  30         * i386-dis.c (X86_64_1): New.
  31         (X86_64_2): Likewise.
  32         (X86_64_3): Likewise.
  33         (dis386): Replace 0x60, 0x61 and 0x62 entries with x86-64
  34         tables.
  35         (x86_64_table): Add entries for 0x60, 0x61 and 0x62.
  36
  37 2006-12-09  H.J. Lu  <hongjiu.lu@intel.com>
  38
  39         * i386-dis.c: Adjust white spaces.
  40
  41 2006-12-04  Jan Beulich  <jbeulich@novell.com>
  42
  43         * i386-dis.c (OP_J): Update used_prefixes in v_mode.
  44
  45 2006-11-30  Jan Beulich  <jbeulich@novell.com>
  46
  47         * i386-dis.c (SEG_Fixup): Delete.
  48         (Sv): Use OP_SEG.
  49         (putop): New suffix character 'D'.
  50         (dis386): Use it.
  51         (grps): Likewise.
  52         (OP_SEG): Handle bytemode other than w_mode.
  53
  54 2006-11-30  Jan Beulich  <jbeulich@novell.com>
  55
  56         * i386-dis.c (zAX): New.
  57         (Xz): New.
  58         (Yzr): New.
  59         (z_mode): New.
  60         (z_mode_ax_reg): New.
  61         (putop): New suffix character 'G'.
  62         (dis386): Use it for in, out, ins, and outs.
  63         (intel_operand_size): Handle z_mode.
  64         (OP_REG): Delete unreachable case indir_dx_reg.
  65         (OP_IMREG): Fix Intel syntax output for case indir_dx_reg. Handle
  66         z_mode_ax_reg.
  67         (OP_ESreg): Fix Intel syntax operand size handling.
  68         (OP_DSreg): Likewise.
  69
  70 2006-11-30  Jan Beulich  <jbeulich@novell.com>
  71
  72         * i386-dis.c (dis386): Use 'R' and 'O' for cbw/cwd unconditionally.
  73         (putop): For 'O' suffix, print 'q' in Intel mode, and mark data prefix
  74         used. For 'R' and 'W' suffix, simplify and fix Intel mode.
  75
  76 2006-11-29  Paul Brook  <paul@codesourcery.com>
  77
  78         * arm-dis.c (coprocessor_opcodes): Fix bitfields for fconstd/fconstd.
  79
  80 2006-11-22  Daniel Jacobowitz  <dan@codesourcery.com>
  81
  82         * arm-dis.c (last_is_thumb): Delete.
  83         (enum map_type, last_type): New.
  84         (print_insn_data): New.
  85         (get_sym_code_type): Take MAP_TYPE argument.  Check the type of
  86         the right symbol.  Handle $d.
  87         (print_insn): Check for mapping symbols even without a normal
  88         symbol.  Adjust searching.  If $d is found see how much data
  89         to print.  Handle data.
  90
  91 2006-11-16  Nathan Sidwell  <nathan@codesourcery.com>
  92
  93         * m68k-opc.c (m68k_opcodes): Place trap instructions before set
  94         conditionals.  Add tpf coldfire instruction as alias for trapf.
  95
  96 2006-11-09  H.J. Lu  <hongjiu.lu@intel.com>
  97
  98         * i386-dis.c (print_insn): Check PREFIX_REPNZ before
  99         PREFIX_DATA when prefix user table is used.
 100
 101 2006-11-09  H.J. Lu  <hongjiu.lu@intel.com>
 102
 103         * i386-dis.c (twobyte_uses_SSE_prefix): Renamed to ...
 104         (twobyte_uses_DATA_prefix): This.
 105         (twobyte_uses_REPNZ_prefix): New.
 106         (twobyte_uses_REPZ_prefix): Likewise.
 107         (threebyte_0x38_uses_DATA_prefix): Likewise.
 108         (threebyte_0x38_uses_REPNZ_prefix): Likewise.
 109         (threebyte_0x38_uses_REPZ_prefix): Likewise.
 110         (threebyte_0x3a_uses_DATA_prefix): Likewise.
 111         (threebyte_0x3a_uses_REPNZ_prefix): Likewise.
 112         (threebyte_0x3a_uses_REPZ_prefix): Likewise.
 113         (print_insn): Updated checking usages of DATA/REPNZ/REPZ
 114         prefixes.
 115
 116 2006-11-06  Troy Rollo  <troy@corvu.com.au>
 117
 118         * ppc-opc.c: Restore COM to mfcr wrongly removed 2003-07-04.
 119
 120 2006-11-01  Mei Ligang  <ligang@sunnorth.com.cn>
 121
 122         * score-opc.h (score_opcodes): Delete modifier '0x'.
 123
 124 2006-10-30  Paul Brook  <paul@codesourcery.com>
 125
 126         * arm-dis.c (last_is_thumb, last_mapping_sym, last_mapping_addr): New.
 127         (get_sym_code_type): New function.
 128         (print_insn): Search for mapping symbols.
 129
 130 2006-10-31  Mei Ligang  <ligang@sunnorth.com.cn>
 131
 132         * score-dis.c (print_insn): Correct the error code to print
 133         correct PCE instruction disassembly.
 134
 135 2006-10-26  Ben Elliston  <bje@au.ibm.com>
 136             Anton Blanchard  <anton@samba.org>
 137             Peter Bergner  <bergner@vnet.ibm.com>
 138
 139         * ppc-opc.c (A_L, DCM, DGM, TE, RMC, R, SP, S, SH16, XRT_L, EH,
 140         AFRALFRC_MASK, Z, ZRC, Z_MASK, XLRT_MASK, XEH_MASK): Define.
 141         (POWER6): Define.
 142         (powerpc_opcodes): Extend "lwarx", "ldarx", "dcbf", "fres", "fres.",
 143         "frsqrtes", "frsqrtes." "fre", "fre.", "frsqrte" and "frsqrte.".
 144         Add "doze", "nap", "sleep", "rvwinkle", "dcbfl", "prtyw", "prtyd",
 145         "mfcfar", "cmpb", "lfdpx", "stfdpx", "mtcfar", "mffgpr", "mftgpr",
 146         "lwzcix", "lhzcix", "lbzcix", "ldcix", "lfiwax", "stwcix", "sthcix",
 147         "stbcix", "stdcix", "lfdp", "dadd", "dadd.", "dqua", "dqua.", "dmul",
 148         "dmul.", "drrnd", "drrnd.", "dscli", "dscli.", "dquai", "dquai.",
 149         "dscri", "dscri.", "drintx", "drintx.", "dcmpo", "dtstex", "dtstdc",
 150         "dtstdg", "dtstsf", "drintn", "drintn.", "dctdp", "dctdp.", "dctfix",
 151         "dctfix.", "ddedpd", "ddedpd.", "dxex", "dxex.", "dsub", "dsub.",
 152         "ddiv", "ddiv.", "dcmpu", "drsp", "drsp.", "dcffix", "dcffix.",
 153         "denbcd", "denbcd.", "diex", "diex.", "stfdp", "daddq", "daddq.",
 154         "dquaq", "dquaq.", "fcpsgn", "fcpsgn.", "dmulq", "dmulq.",
 155         "drrndq", "drrndq.", "dscliq", "dscliq.", "dquaiq", "dquaiq.",
 156         "dscriq", "dscriq.", "drintxq", "drintxq.", "dcmpoq", "dtstexq",
 157         "dtstdcq", "dtstdgq", "dtstsfq", "drintnq", "drintnq.",
 158         "dctqpq", "dctqpq.", "dctfixq", "dctfixq.", "ddedpdq", "ddedpdq.",
 159         "dxexq", "dxexq.", "dsubq", "dsubq.", "ddivq", "ddivq.", "dcmpuq",
 160         "drdpq", "drdpq.", "dcffixq", "dcffixq.", "denbcdq", "denbcdq.",
 161         "diexq" and "diexq." opcodes.
 162
 163 2006-10-26  Daniel Jacobowitz  <dan@codesourcery.com>
 164
 165         * h8300-dis.c (bfd_h8_disassemble): Add missing consts.
 166
 167 2006-10-25  Trevor Smigiel  <Trevor_Smigiel@playstation.sony.com>
 168             Yukishige Shibata  <shibata@rd.scei.sony.co.jp>
 169             Nobuhisa Fujinami  <fnami@rd.scei.sony.co.jp>
 170             Takeaki Fukuoka  <fukuoka@rd.scei.sony.co.jp>
 171             Alan Modra  <amodra@bigpond.net.au>
 172
 173         * spu-dis.c: New file.
 174         * spu-opc.c: New file.
 175         * configure.in: Add SPU support.
 176         * disassemble.c: Likewise.
 177         * Makefile.am: Likewise.  Run "make dep-am".
 178         * Makefile.in: Regenerate.
 179         * configure: Regenerate.
 180         * po/POTFILES.in: Regenerate.
 181
 182 2006-10-24  Andrew Pinski  <andrew_pinski@playstation.sony.com>
 183
 184         * ppc-opc.c (CELL): New define.
 185         (powerpc_opcodes): Enable hrfid for Cell.  Add ldbrx and stdbrx,
 186         cell specific instructions.  Add {st,l}x{r,l}{,l} cell specific
 187         VMX instructions.
 188         * ppc-dis.c (powerpc_dialect): Handle cell.
 189
 190 2006-10-23  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 191
 192         * i386-dis.c (dis386): Add support for the change in POPCNT opcode in
 193         amdfam10 architecture.
 194         (PREGRP37): NEW.
 195         (print_insn): Disallow REP prefix for POPCNT.
 196
 197 2006-10-20  Andrew Stubbs  <andrew.stubbs@st.com>
 198
 199         * sh-dis.c (print_insn_sh): Remove 0x from output to prevent GDB
 200         duplicating it.
 201
 202 2006-10-18  Dave Brolley  <brolley@redhat.com>
 203
 204         * configure.in (BFD_MACHINES): Add cgen-bitset.lo for bfd_sh_arch.
 205         * configure: Regenerated.
 206
 207 2006-09-29  Alan Modra  <amodra@bigpond.net.au>
 208
 209         * po/POTFILES.in: Regenerate.
 210
 211 2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
 212             Joseph Myers  <joseph@codesourcery.com>
 213             Ian Lance Taylor  <ian@wasabisystems.com>
 214             Ben Elliston  <bje@wasabisystems.com>
 215
 216         * arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
 217         only be used with the default multiply-add operation, so if N is
 218         set, don't bother printing X.  Add new iwmmxt instructions.
 219         (IWMMXT_INSN_COUNT): Update.
 220         (iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
 221         with a 'c' suffix.
 222         (print_insn_coprocessor): Check for iWMMXt2.  Handle format
 223         specifiers 'r', 'i'.
 224
 225 2006-09-24  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 226
 227         PR binutils/3100
 228         * i386-dis.c (prefix_user_table): Fix the second operand of
 229         maskmovdqu instruction to allow only %xmm register instead of
 230         both %xmm register and memory.
 231
 232 2006-09-23  H.J. Lu  <hongjiu.lu@intel.com>
 233
 234         PR binutils/3235
 235         * i386-dis.c (OP_OFF64): Get 32bit offset if there is an
 236         address size prefix.
 237
 238 2006-09-17  Mei Ligang  <ligang@sunnorth.com.cn>
 239
 240         * score-dis.c: New file.
 241         * score-opc.h: New file.
 242         * Makefile.am: Add Score files.
 243         * Makefile.in: Regenerate.
 244         * configure.in: Add support for Score target.
 245         * configure: Regenerate.
 246         * disassemble.c: Add support for Score target.
 247
 248 2006-09-16  Nick Clifton  <nickc@redhat.com>
 249             Pedro Alves  <pedro_alves@portugalmail.pt>
 250
 251         * arm-dis.c: Make use of new STRING_COMMA_LEN and CONST_STRNEQ
 252         macros defined in bfd.h.
 253         * cris-dis.c: Likewise.
 254         * h8300-dis.c: Likewise.
 255         * i386-dis.c: Likewise.
 256         * ia64-gen.c: Likewise.
 257         * mips-dis: Likewise.
 258
 259 2006-09-04  Paul Brook  <paul@codesourcery.com>
 260
 261         * arm-dis.c (neon_opcode): Fix suffix on VMOVN.
 262
 263 2006-08-23  H.J. Lu  <hongjiu.lu@intel.com>
 264
 265         * i386-dis.c (three_byte_table): Expand to 256 elements.
 266
 267 2006-08-04  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 268
 269         PR binutils/3000
 270         * i386-dis.c (MXC,EMC): Define.
 271         (OP_MXC): New function to handle cvt* (convert instructions) between
 272         %xmm and %mm register correctly.
 273         (OP_EMC): ditto.
 274         (prefix_user_table): Modified cvtpi2pd,cvtpd2pi and cvttpd2pi
 275         instruction operands in PREGRP2,PREGRP3,PREGRP4 appropriately
 276         with EMC/MXC.
 277
 278 2006-07-29  Richard Sandiford  <richard@codesourcery.com>
 279
 280         * m68k-opc.c (m68k_opcodes): Fix operand specificer in the Coldfire
 281         "fdaddl" entry.
 282
 283 2006-07-19  Paul Brook  <paul@codesourcery.com>
 284
 285         * armd-dis.c (arm_opcodes): Fix rbit opcode.
 286
 287 2006-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 288
 289         * i386-dis.c (grps): Change "sldtQ", "strQ" and "smswQ" to
 290         "sldt", "str" and "smsw".
 291
 292 2006-07-15  H.J. Lu  <hongjiu.lu@intel.com>
 293
 294         PR binutils/2829
 295         * i386-dis.c (GRP11_C6): NEW.
 296         (GRP11_C7): Likewise.
 297         (GRP12): Updated.
 298         (GRP13): Likewise.
 299         (GRP14): Likewise.
 300         (GRP15): Likewise.
 301         (GRP16): Likewise.
 302         (GRPAMD): Likewise.
 303         (GRPPADLCK1): Likewise.
 304         (GRPPADLCK2): Likewise.
 305         (dis386): Use GRP11_C6 and GRP11_C7 for entres 0xc6 and 0xc7,
 306         respectively.
 307         (grps): Add entries for GRP11_C6 and GRP11_C7.
 308
 309 2006-07-10 Dwarakanath Rajagopal        <dwarak.rajagopal@amd.com>
 310            Michael Meissner             <michael.meissner@amd.com>
 311
 312         * i386-dis.c (dis386): Add support for 4 operand instructions. Add
 313         support for amdfam10 SSE4a/ABM instructions. Modify all
 314         initializer macros to have additional arguments. Disallow REP
 315         prefix for non-string instructions.
 316         (print_insn): Ditto.
 317
 318 2006-07-05  Julian Brown  <julian@codesourcery.com>
 319
 320         * arm-dis.c (coprocessor): Alter fmsrr disassembly syntax.
 321
 322 2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>
 323
 324         * i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
 325         (twobyte_has_modrm): Set 1 for 0x1f.
 326
 327 2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>
 328
 329         * i386-dis.c (NOP_Fixup): Removed.
 330         (NOP_Fixup1): New.
 331         (NOP_Fixup2): Likewise.
 332         (dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
 333
 334 2006-06-12  Julian Brown  <julian@codesourcery.com>
 335
 336         * arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed
 337         on 64-bit hosts.
 338
 339 2006-06-10  H.J. Lu  <hongjiu.lu@intel.com>
 340
 341         * i386.c (GRP10): Renamed to ...
 342         (GRP12): This.
 343         (GRP11): Renamed to ...
 344         (GRP13): This.
 345         (GRP12): Renamed to ...
 346         (GRP14): This.
 347         (GRP13): Renamed to ...
 348         (GRP15): This.
 349         (GRP14): Renamed to ...
 350         (GRP16): This.
 351         (dis386_twobyte): Updated.
 352         (grps): Likewise.
 353
 354 2006-06-09  Nick Clifton  <nickc@redhat.com>
 355
 356         * po/fi.po: Updated Finnish translation.
 357
 358 2006-06-07  Joseph S. Myers  <joseph@codesourcery.com>
 359
 360         * po/Make-in (pdf, ps): New dummy targets.
 361
 362 2006-06-06  Paul Brook  <paul@codesourcery.com>
 363
 364         * arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm
 365         instructions.
 366         (neon_opcodes): Add conditional execution specifiers.
 367         (thumb_opcodes): Ditto.
 368         (thumb32_opcodes): Ditto.
 369         (arm_conditional): Change 0xe to "al" and add "" to end.
 370         (ifthen_state, ifthen_next_state, ifthen_address): New.
 371         (IFTHEN_COND): Define.
 372         (print_insn_coprocessor, print_insn_neon): Print thumb conditions.
 373         (print_insn_arm): Change %c to use new values of arm_conditional.
 374         (print_insn_thumb16): Print thumb conditions.  Add %I.
 375         (print_insn_thumb32): Print thumb conditions.
 376         (find_ifthen_state): New function.
 377         (print_insn): Track IT block state.
 378
 379 2006-06-06  Ben Elliston  <bje@au.ibm.com>
 380             Anton Blanchard  <anton@samba.org>
 381             Peter Bergner  <bergner@vnet.ibm.com>
 382
 383         * ppc-dis.c (powerpc_dialect): Handle power6 option.
 384         (print_ppc_disassembler_options): Mention power6.
 385
 386 2006-06-06  Thiemo Seufer  <ths@mips.com>
 387             Chao-ying Fu  <fu@mips.com>
 388
 389         * mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
 390         * mips-opc.c: Add DSP64 instructions.
 391
 392 2006-06-06  Alan Modra  <amodra@bigpond.net.au>
 393
 394         * m68hc11-dis.c (print_insn): Warning fix.
 395
 396 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 397
 398         * po/Make-in (top_builddir): Define.
 399
 400 2006-06-05  Alan Modra  <amodra@bigpond.net.au>
 401
 402         * Makefile.am: Run "make dep-am".
 403         * Makefile.in: Regenerate.
 404         * config.in: Regenerate.
 405
 406 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 407
 408         * Makefile.am (INCLUDES): Use @INCINTL@.
 409         * acinclude.m4: Include new gettext macros.
 410         * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
 411         Remove local code for po/Makefile.
 412         * Makefile.in, aclocal.m4, configure: Regenerated.
 413
 414 2006-05-30  Nick Clifton  <nickc@redhat.com>
 415
 416         * po/es.po: Updated Spanish translation.
 417
 418 2006-05-25  Richard Sandiford  <richard@codesourcery.com>
 419
 420         * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
 421         and fmovem entries.  Put register list entries before immediate
 422         mask entries.  Use "l" rather than "L" in the fmovem entries.
 423         * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
 424         out from INFO.
 425         (m68k_scan_mask): New function, split out from...
 426         (print_insn_m68k): ...here.  If no architecture has been set,
 427         first try printing an m680x0 instruction, then try a Coldfire one.
 428
 429 2006-05-24  Nick Clifton  <nickc@redhat.com>
 430
 431         * po/ga.po: Updated Irish translation.
 432
 433 2006-05-22  Nick Clifton  <nickc@redhat.com>
 434
 435         * crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
 436
 437 2006-05-22  Nick Clifton  <nickc@redhat.com>
 438
 439         * po/nl.po: Updated translation.
 440
 441 2006-05-18  Alan Modra  <amodra@bigpond.net.au>
 442
 443         * avr-dis.c: Formatting fix.
 444
 445 2006-05-14  Thiemo Seufer  <ths@mips.com>
 446
 447         * mips16-opc.c (I1, I32, I64): New shortcut defines.
 448         (mips16_opcodes): Change membership of instructions to their
 449         lowest baseline ISA.
 450
 451 2006-05-09  H.J. Lu  <hongjiu.lu@intel.com>
 452
 453         * i386-dis.c (grps): Update sgdt/sidt for 64bit.
 454
 455 2006-05-05  Julian Brown  <julian@codesourcery.com>
 456
 457         * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
 458         vldm/vstm.
 459
 460 2006-05-05  Thiemo Seufer  <ths@mips.com>
 461             David Ung  <davidu@mips.com>
 462
 463         * mips-opc.c: Add macro for cache instruction.
 464
 465 2006-05-04  Thiemo Seufer  <ths@mips.com>
 466             Nigel Stephens  <nigel@mips.com>
 467             David Ung  <davidu@mips.com>
 468
 469         * mips-dis.c (mips_arch_choices): Add smartmips instruction
 470         decoding to MIPS32 and MIPS32R2.  Limit DSP decoding to release
 471         2 ISAs.  Add MIPS3D decoding to MIPS32R2.  Add MT decoding to
 472         MIPS64R2.
 473         * mips-opc.c: fix random typos in comments.
 474         (INSN_SMARTMIPS): New defines.
 475         (mips_builtin_opcodes): Add paired single support for MIPS32R2.
 476         Move bc3f, bc3fl, bc3t, bc3tl downwards.  Move flushi, flushd,
 477         flushid, wb upwards.  Move cfc3, ctc3 downwards.  Rework the
 478         FP_S and FP_D flags to denote single and double register
 479         accesses separately.  Move dmfc3, dmtc3, mfc3, mtc3 downwards.
 480         Allow jr.hb and jalr.hb for release 1 ISAs.  Allow luxc1, suxc1
 481         for MIPS32R2.  Add SmartMIPS instructions.  Add two-argument
 482         variants of bc2f, bc2fl, bc2t, bc2tl.  Add mfhc2, mthc2 to
 483         release 2 ISAs.
 484         * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
 485
 486 2006-05-03  Thiemo Seufer  <ths@mips.com>
 487
 488         * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
 489
 490 2006-05-02  Thiemo Seufer  <ths@mips.com>
 491             Nigel Stephens  <nigel@mips.com>
 492             David Ung  <davidu@mips.com>
 493
 494         * mips-dis.c (print_insn_args): Force mips16 to odd addresses.
 495         (print_mips16_insn_arg): Force mips16 to odd addresses.
 496
 497 2006-04-30  Thiemo Seufer  <ths@mips.com>
 498             David Ung  <davidu@mips.com>
 499
 500         * mips-opc.c (mips_builtin_opcodes): Add udi instructions
 501         "udi0" to "udi15".
 502         * mips-dis.c (print_insn_args): Adds udi argument handling.
 503
 504 2006-04-28  James E Wilson  <wilson@specifix.com>
 505
 506         * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
 507         error message.
 508
 509 2006-04-28  Thiemo Seufer  <ths@mips.com>
 510             David Ung  <davidu@mips.com>
 511             Nigel Stephens  <nigel@mips.com>
 512
 513         * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
 514         names.
 515
 516 2006-04-28  Thiemo Seufer  <ths@mips.com>
 517             Nigel Stephens  <nigel@mips.com>
 518             David Ung  <davidu@mips.com>
 519
 520         * mips-dis.c (print_insn_args): Add mips_opcode argument.
 521         (print_insn_mips):  Adjust print_insn_args call.
 522
 523 2006-04-28  Thiemo Seufer  <ths@mips.com>
 524             Nigel Stephens  <nigel@mips.com>
 525
 526         * mips-dis.c (print_insn_args): Print $fcc only for FP
 527         instructions, use $cc elsewise.
 528
 529 2006-04-28  Thiemo Seufer  <ths@mips.com>
 530             Nigel Stephens  <nigel@mips.com>
 531
 532         * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
 533         Map MIPS16 registers to O32 names.
 534         (print_mips16_insn_arg): Use mips16_reg_names.
 535
 536 2006-04-26  Julian Brown  <julian@codesourcery.com>
 537
 538         * arm-dis.c (print_insn_neon): Disassemble floating-point constant
 539         VMOV.
 540
 541 2006-04-26  Nathan Sidwell  <nathan@codesourcery.com>
 542             Julian Brown  <julian@codesourcery.com>
 543
 544         * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
 545         %<code>[zy] into %[zy]<code>.  Expand meaning of %<bitfield>['`?].
 546         Add unified load/store instruction names.
 547         (neon_opcode_table): New.
 548         (arm_opcodes): Expand meaning of %<bitfield>['`?].
 549         (arm_decode_bitfield): New.
 550         (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
 551         Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
 552         (print_insn_neon): New.
 553         (print_insn_arm): Adjust print_insn_coprocessor call. Call
 554         print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
 555         (print_insn_thumb32): Likewise.
 556
 557 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 558
 559         * Makefile.am: Run "make dep-am".
 560         * Makefile.in: Regenerate.
 561
 562 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 563
 564         * avr-dis.c (avr_operand): Warning fix.
 565
 566         * configure: Regenerate.
 567
 568 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 569
 570         * po/POTFILES.in: Regenerated.
 571
 572 2006-04-12   Hochstein  <hochstein@algo.informatik.tu-darmstadt.de>
 573
 574         PR binutils/2454
 575         * avr-dis.c (avr_operand): Arrange for a comment to appear before
 576         the symolic form of an address, so that the output of objdump -d
 577         can be reassembled.
 578
 579 2006-04-10  DJ Delorie  <dj@redhat.com>
 580
 581         * m32c-asm.c: Regenerate.
 582
 583 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 584
 585         * Makefile.am: Add install-html target.
 586         * Makefile.in: Regenerate.
 587
 588 2006-04-06  Nick Clifton  <nickc@redhat.com>
 589
 590         * po/vi/po: Updated Vietnamese translation.
 591
 592 2006-03-31  Paul Koning  <ni1d@arrl.net>
 593
 594         * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
 595
 596 2006-03-16  Bernd Schmidt  <bernd.schmidt@analog.com>
 597
 598         * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
 599         logic to identify halfword shifts.
 600
 601 2006-03-16  Paul Brook  <paul@codesourcery.com>
 602
 603         * arm-dis.c (arm_opcodes): Rename swi to svc.
 604         (thumb_opcodes): Ditto.
 605
 606 2006-03-13  DJ Delorie  <dj@redhat.com>
 607
 608         * m32c-asm.c: Regenerate.
 609         * m32c-desc.c: Likewise.
 610         * m32c-desc.h: Likewise.
 611         * m32c-dis.c: Likewise.
 612         * m32c-ibld.c: Likewise.
 613         * m32c-opc.c: Likewise.
 614         * m32c-opc.h: Likewise.
 615
 616 2006-03-10  DJ Delorie  <dj@redhat.com>
 617
 618         * m32c-desc.c: Regenerate with mul.l, mulu.l.
 619         * m32c-opc.c: Likewise.
 620         * m32c-opc.h: Likewise.
 621
 622
 623 2006-03-09  Nick Clifton  <nickc@redhat.com>
 624
 625         * po/sv.po: Updated Swedish translation.
 626
 627 2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>
 628
 629         PR binutils/2428
 630         * i386-dis.c (REP_Fixup): New function.
 631         (AL): Remove duplicate.
 632         (Xbr): New.
 633         (Xvr): Likewise.
 634         (Ybr): Likewise.
 635         (Yvr): Likewise.
 636         (indirDXr): Likewise.
 637         (ALr): Likewise.
 638         (eAXr): Likewise.
 639         (dis386): Updated entries of ins, outs, movs, lods and stos.
 640
 641 2006-03-05  Nick Clifton  <nickc@redhat.com>
 642
 643         * cgen-ibld.in (insert_normal): Cope with attempts to insert a
 644         signed 32-bit value into an unsigned 32-bit field when the host is
 645         a 64-bit machine.
 646         * fr30-ibld.c: Regenerate.
 647         * frv-ibld.c: Regenerate.
 648         * ip2k-ibld.c: Regenerate.
 649         * iq2000-asm.c: Regenerate.
 650         * iq2000-ibld.c: Regenerate.
 651         * m32c-ibld.c: Regenerate.
 652         * m32r-ibld.c: Regenerate.
 653         * openrisc-ibld.c: Regenerate.
 654         * xc16x-ibld.c: Regenerate.
 655         * xstormy16-ibld.c: Regenerate.
 656
 657 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 658
 659         * xc16x-asm.c: Regenerate.
 660         * xc16x-dis.c: Regenerate.
 661
 662 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 663
 664         * po/Make-in: Add html target.
 665
 666 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 667
 668         * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
 669         Intel Merom New Instructions.
 670         (THREE_BYTE_0): Likewise.
 671         (THREE_BYTE_1): Likewise.
 672         (three_byte_table): Likewise.
 673         (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
 674         THREE_BYTE_1 for entry 0x3a.
 675         (twobyte_has_modrm): Updated.
 676         (twobyte_uses_SSE_prefix): Likewise.
 677         (print_insn): Handle 3-byte opcodes used by Intel Merom New
 678         Instructions.
 679
 680 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 681
 682         * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
 683         (v9_hpriv_reg_names): New table.
 684         (print_insn_sparc): Allow values up to 16 for '?' and '!'.
 685         New cases '$' and '%' for read/write hyperprivileged register.
 686         * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
 687         window handling and rdhpr/wrhpr instructions.
 688
 689 2006-02-24  DJ Delorie  <dj@redhat.com>
 690
 691         * m32c-desc.c: Regenerate with linker relaxation attributes.
 692         * m32c-desc.h: Likewise.
 693         * m32c-dis.c: Likewise.
 694         * m32c-opc.c: Likewise.
 695
 696 2006-02-24  Paul Brook  <paul@codesourcery.com>
 697
 698         * arm-dis.c (arm_opcodes): Add V7 instructions.
 699         (thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
 700         (print_arm_address): New function.
 701         (print_insn_arm): Use it.  Add 'P' and 'U' cases.
 702         (psr_name): New function.
 703         (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
 704
 705 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 706
 707         * ia64-opc-i.c (bXc): New.
 708         (mXc): Likewise.
 709         (OpX2TaTbYaXcC): Likewise.
 710         (TF). Likewise.
 711         (TFCM). Likewise.
 712         (ia64_opcodes_i): Add instructions for tf.
 713
 714         * ia64-opc.h (IMMU5b): New.
 715
 716         * ia64-asmtab.c: Regenerated.
 717
 718 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 719
 720         * ia64-gen.c: Update copyright years.
 721         * ia64-opc-b.c: Likewise.
 722
 723 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 724
 725         * ia64-gen.c (lookup_regindex): Handle ".vm".
 726         (print_dependency_table): Handle '\"'.
 727
 728         * ia64-ic.tbl: Updated from SDM 2.2.
 729         * ia64-raw.tbl: Likewise.
 730         * ia64-waw.tbl: Likewise.
 731         * ia64-asmtab.c: Regenerated.
 732
 733         * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
 734
 735 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 736             Anil Paranjape   <anilp1@kpitcummins.com>
 737             Shilin Shakti    <shilins@kpitcummins.com>
 738
 739         * xc16x-desc.h: New file
 740         * xc16x-desc.c: New file
 741         * xc16x-opc.h: New file
 742         * xc16x-opc.c: New file
 743         * xc16x-ibld.c: New file
 744         * xc16x-asm.c: New file
 745         * xc16x-dis.c: New file
 746         * Makefile.am: Entries for xc16x
 747         * Makefile.in: Regenerate
 748         * cofigure.in: Add xc16x target information.
 749         * configure: Regenerate.
 750         * disassemble.c: Add xc16x target information.
 751
 752 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 753
 754         * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
 755         moves.
 756
 757 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 758
 759         * i386-dis.c ('Z'): Add a new macro.
 760         (dis386_twobyte): Use "movZ" for control register moves.
 761
 762 2006-02-10  Nick Clifton  <nickc@redhat.com>
 763
 764         * iq2000-asm.c: Regenerate.
 765
 766 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 767
 768         * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
 769
 770 2006-01-26  David Ung  <davidu@mips.com>
 771
 772         * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
 773         ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
 774         floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
 775         nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
 776         rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
 777
 778 2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>
 779
 780         * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
 781         ld_d_r, pref_xd_cb): Use signed char to hold data to be
 782         disassembled.
 783         * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
 784         buffer overflows when disassembling instructions like
 785         ld (ix+123),0x23
 786         * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
 787         operand, if the offset is negative.
 788
 789 2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>
 790
 791         * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
 792         unsigned char to hold data to be disassembled.
 793
 794 2006-01-17  Andreas Schwab  <schwab@suse.de>
 795
 796         PR binutils/1486
 797         * disassemble.c (disassemble_init_for_target): Set
 798         disassembler_needs_relocs for bfd_arch_arm.
 799
 800 2006-01-16  Paul Brook  <paul@codesourcery.com>
 801
 802         * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
 803         f?add?, and f?sub? instructions.
 804
 805 2006-01-16  Nick Clifton  <nickc@redhat.com>
 806
 807         * po/zh_CN.po: New Chinese (simplified) translation.
 808         * configure.in (ALL_LINGUAS): Add "zh_CH".
 809         * configure: Regenerate.
 810
 811 2006-01-05  Paul Brook  <paul@codesourcery.com>
 812
 813         * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
 814
 815 2006-01-06  DJ Delorie  <dj@redhat.com>
 816
 817         * m32c-desc.c: Regenerate.
 818         * m32c-opc.c: Regenerate.
 819         * m32c-opc.h: Regenerate.
 820
 821 2006-01-03  DJ Delorie  <dj@redhat.com>
 822
 823         * cgen-ibld.in (extract_normal): Avoid memory range errors.
 824         * m32c-ibld.c: Regenerated.
 825
 826 For older changes see ChangeLog-2005
 827 \f
 828 Local Variables:
 829 mode: change-log
 830 left-margin: 8
 831 fill-column: 74
 832 version-control: never
 833 End: