opcodes/ChangeLog

   1 2006-07-19  Paul Brook  <paul@codesourcery.com>
   2
   3         * armd-dis.c (arm_opcodes): Fix rbit opcode.
   4
   5 2006-07-18  H.J. Lu  <hongjiu.lu@intel.com>
   6
   7         * i386-dis.c (grps): Change "sldtQ", "strQ" and "smswQ" to
   8         "sldt", "str" and "smsw".
   9
  10 2006-07-15  H.J. Lu  <hongjiu.lu@intel.com>
  11
  12         PR binutils/2829
  13         * i386-dis.c (GRP11_C6): NEW.
  14         (GRP11_C7): Likewise.
  15         (GRP12): Updated.
  16         (GRP13): Likewise.
  17         (GRP14): Likewise.
  18         (GRP15): Likewise.
  19         (GRP16): Likewise.
  20         (GRPAMD): Likewise.
  21         (GRPPADLCK1): Likewise.
  22         (GRPPADLCK2): Likewise.
  23         (dis386): Use GRP11_C6 and GRP11_C7 for entres 0xc6 and 0xc7,
  24         respectively.
  25         (grps): Add entries for GRP11_C6 and GRP11_C7.
  26
  27 2006-07-10 Dwarakanath Rajagopal        <dwarak.rajagopal@amd.com>
  28            Michael Meissner             <michael.meissner@amd.com>
  29
  30         * i386-dis.c (dis386): Add support for 4 operand instructions. Add
  31         support for amdfam10 SSE4a/ABM instructions. Modify all
  32         initializer macros to have additional arguments. Disallow REP
  33         prefix for non-string instructions.
  34         (print_insn): Ditto.
  35
  36
  37 2006-07-05  Julian Brown  <julian@codesourcery.com>
  38
  39         * arm-dis.c (coprocessor): Alter fmsrr disassembly syntax.
  40
  41 2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>
  42
  43         * i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
  44         (twobyte_has_modrm): Set 1 for 0x1f.
  45
  46 2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>
  47
  48         * i386-dis.c (NOP_Fixup): Removed.
  49         (NOP_Fixup1): New.
  50         (NOP_Fixup2): Likewise.
  51         (dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
  52
  53 2006-06-12  Julian Brown  <julian@codesourcery.com>
  54
  55         * arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed
  56         on 64-bit hosts.
  57
  58 2006-06-10  H.J. Lu  <hongjiu.lu@intel.com>
  59
  60         * i386.c (GRP10): Renamed to ...
  61         (GRP12): This.
  62         (GRP11): Renamed to ...
  63         (GRP13): This.
  64         (GRP12): Renamed to ...
  65         (GRP14): This.
  66         (GRP13): Renamed to ...
  67         (GRP15): This.
  68         (GRP14): Renamed to ...
  69         (GRP16): This.
  70         (dis386_twobyte): Updated.
  71         (grps): Likewise.
  72
  73 2006-06-09  Nick Clifton  <nickc@redhat.com>
  74
  75         * po/fi.po: Updated Finnish translation.
  76
  77 2006-06-07  Joseph S. Myers  <joseph@codesourcery.com>
  78
  79         * po/Make-in (pdf, ps): New dummy targets.
  80
  81 2006-06-06  Paul Brook  <paul@codesourcery.com>
  82
  83         * arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm
  84         instructions.
  85         (neon_opcodes): Add conditional execution specifiers.
  86         (thumb_opcodes): Ditto.
  87         (thumb32_opcodes): Ditto.
  88         (arm_conditional): Change 0xe to "al" and add "" to end.
  89         (ifthen_state, ifthen_next_state, ifthen_address): New.
  90         (IFTHEN_COND): Define.
  91         (print_insn_coprocessor, print_insn_neon): Print thumb conditions.
  92         (print_insn_arm): Change %c to use new values of arm_conditional.
  93         (print_insn_thumb16): Print thumb conditions.  Add %I.
  94         (print_insn_thumb32): Print thumb conditions.
  95         (find_ifthen_state): New function.
  96         (print_insn): Track IT block state.
  97
  98 2006-06-06  Ben Elliston  <bje@au.ibm.com>
  99             Anton Blanchard  <anton@samba.org>
 100             Peter Bergner  <bergner@vnet.ibm.com>
 101
 102         * ppc-dis.c (powerpc_dialect): Handle power6 option.
 103         (print_ppc_disassembler_options): Mention power6.
 104
 105 2006-06-06  Thiemo Seufer  <ths@mips.com>
 106             Chao-ying Fu  <fu@mips.com>
 107
 108         * mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
 109         * mips-opc.c: Add DSP64 instructions.
 110
 111 2006-06-06  Alan Modra  <amodra@bigpond.net.au>
 112
 113         * m68hc11-dis.c (print_insn): Warning fix.
 114
 115 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 116
 117         * po/Make-in (top_builddir): Define.
 118
 119 2006-06-05  Alan Modra  <amodra@bigpond.net.au>
 120
 121         * Makefile.am: Run "make dep-am".
 122         * Makefile.in: Regenerate.
 123         * config.in: Regenerate.
 124
 125 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 126
 127         * Makefile.am (INCLUDES): Use @INCINTL@.
 128         * acinclude.m4: Include new gettext macros.
 129         * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
 130         Remove local code for po/Makefile.
 131         * Makefile.in, aclocal.m4, configure: Regenerated.
 132
 133 2006-05-30  Nick Clifton  <nickc@redhat.com>
 134
 135         * po/es.po: Updated Spanish translation.
 136
 137 2006-05-25  Richard Sandiford  <richard@codesourcery.com>
 138
 139         * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
 140         and fmovem entries.  Put register list entries before immediate
 141         mask entries.  Use "l" rather than "L" in the fmovem entries.
 142         * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
 143         out from INFO.
 144         (m68k_scan_mask): New function, split out from...
 145         (print_insn_m68k): ...here.  If no architecture has been set,
 146         first try printing an m680x0 instruction, then try a Coldfire one.
 147
 148 2006-05-24  Nick Clifton  <nickc@redhat.com>
 149
 150         * po/ga.po: Updated Irish translation.
 151
 152 2006-05-22  Nick Clifton  <nickc@redhat.com>
 153
 154         * crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
 155
 156 2006-05-22  Nick Clifton  <nickc@redhat.com>
 157
 158         * po/nl.po: Updated translation.
 159
 160 2006-05-18  Alan Modra  <amodra@bigpond.net.au>
 161
 162         * avr-dis.c: Formatting fix.
 163
 164 2006-05-14  Thiemo Seufer  <ths@mips.com>
 165
 166         * mips16-opc.c (I1, I32, I64): New shortcut defines.
 167         (mips16_opcodes): Change membership of instructions to their
 168         lowest baseline ISA.
 169
 170 2006-05-09  H.J. Lu  <hongjiu.lu@intel.com>
 171
 172         * i386-dis.c (grps): Update sgdt/sidt for 64bit.
 173
 174 2006-05-05  Julian Brown  <julian@codesourcery.com>
 175
 176         * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
 177         vldm/vstm.
 178
 179 2006-05-05  Thiemo Seufer  <ths@mips.com>
 180             David Ung  <davidu@mips.com>
 181
 182         * mips-opc.c: Add macro for cache instruction.
 183
 184 2006-05-04  Thiemo Seufer  <ths@mips.com>
 185             Nigel Stephens  <nigel@mips.com>
 186             David Ung  <davidu@mips.com>
 187
 188         * mips-dis.c (mips_arch_choices): Add smartmips instruction
 189         decoding to MIPS32 and MIPS32R2.  Limit DSP decoding to release
 190         2 ISAs.  Add MIPS3D decoding to MIPS32R2.  Add MT decoding to
 191         MIPS64R2.
 192         * mips-opc.c: fix random typos in comments.
 193         (INSN_SMARTMIPS): New defines.
 194         (mips_builtin_opcodes): Add paired single support for MIPS32R2.
 195         Move bc3f, bc3fl, bc3t, bc3tl downwards.  Move flushi, flushd,
 196         flushid, wb upwards.  Move cfc3, ctc3 downwards.  Rework the
 197         FP_S and FP_D flags to denote single and double register
 198         accesses separately.  Move dmfc3, dmtc3, mfc3, mtc3 downwards.
 199         Allow jr.hb and jalr.hb for release 1 ISAs.  Allow luxc1, suxc1
 200         for MIPS32R2.  Add SmartMIPS instructions.  Add two-argument
 201         variants of bc2f, bc2fl, bc2t, bc2tl.  Add mfhc2, mthc2 to
 202         release 2 ISAs.
 203         * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
 204
 205 2006-05-03  Thiemo Seufer  <ths@mips.com>
 206
 207         * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
 208
 209 2006-05-02  Thiemo Seufer  <ths@mips.com>
 210             Nigel Stephens  <nigel@mips.com>
 211             David Ung  <davidu@mips.com>
 212
 213         * mips-dis.c (print_insn_args): Force mips16 to odd addresses.
 214         (print_mips16_insn_arg): Force mips16 to odd addresses.
 215
 216 2006-04-30  Thiemo Seufer  <ths@mips.com>
 217             David Ung  <davidu@mips.com>
 218
 219         * mips-opc.c (mips_builtin_opcodes): Add udi instructions
 220         "udi0" to "udi15".
 221         * mips-dis.c (print_insn_args): Adds udi argument handling.
 222
 223 2006-04-28  James E Wilson  <wilson@specifix.com>
 224
 225         * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
 226         error message.
 227
 228 2006-04-28  Thiemo Seufer  <ths@mips.com>
 229             David Ung  <davidu@mips.com>
 230             Nigel Stephens  <nigel@mips.com>
 231
 232         * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
 233         names.
 234
 235 2006-04-28  Thiemo Seufer  <ths@mips.com>
 236             Nigel Stephens  <nigel@mips.com>
 237             David Ung  <davidu@mips.com>
 238
 239         * mips-dis.c (print_insn_args): Add mips_opcode argument.
 240         (print_insn_mips):  Adjust print_insn_args call.
 241
 242 2006-04-28  Thiemo Seufer  <ths@mips.com>
 243             Nigel Stephens  <nigel@mips.com>
 244
 245         * mips-dis.c (print_insn_args): Print $fcc only for FP
 246         instructions, use $cc elsewise.
 247
 248 2006-04-28  Thiemo Seufer  <ths@mips.com>
 249             Nigel Stephens  <nigel@mips.com>
 250
 251         * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
 252         Map MIPS16 registers to O32 names.
 253         (print_mips16_insn_arg): Use mips16_reg_names.
 254
 255 2006-04-26  Julian Brown  <julian@codesourcery.com>
 256
 257         * arm-dis.c (print_insn_neon): Disassemble floating-point constant
 258         VMOV.
 259
 260 2006-04-26  Nathan Sidwell  <nathan@codesourcery.com>
 261             Julian Brown  <julian@codesourcery.com>
 262
 263         * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
 264         %<code>[zy] into %[zy]<code>.  Expand meaning of %<bitfield>['`?].
 265         Add unified load/store instruction names.
 266         (neon_opcode_table): New.
 267         (arm_opcodes): Expand meaning of %<bitfield>['`?].
 268         (arm_decode_bitfield): New.
 269         (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
 270         Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
 271         (print_insn_neon): New.
 272         (print_insn_arm): Adjust print_insn_coprocessor call. Call
 273         print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
 274         (print_insn_thumb32): Likewise.
 275
 276 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 277
 278         * Makefile.am: Run "make dep-am".
 279         * Makefile.in: Regenerate.
 280
 281 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 282
 283         * avr-dis.c (avr_operand): Warning fix.
 284
 285         * configure: Regenerate.
 286
 287 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 288
 289         * po/POTFILES.in: Regenerated.
 290
 291 2006-04-12   Hochstein  <hochstein@algo.informatik.tu-darmstadt.de>
 292
 293         PR binutils/2454
 294         * avr-dis.c (avr_operand): Arrange for a comment to appear before
 295         the symolic form of an address, so that the output of objdump -d
 296         can be reassembled.
 297
 298 2006-04-10  DJ Delorie  <dj@redhat.com>
 299
 300         * m32c-asm.c: Regenerate.
 301
 302 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 303
 304         * Makefile.am: Add install-html target.
 305         * Makefile.in: Regenerate.
 306
 307 2006-04-06  Nick Clifton  <nickc@redhat.com>
 308
 309         * po/vi/po: Updated Vietnamese translation.
 310
 311 2006-03-31  Paul Koning  <ni1d@arrl.net>
 312
 313         * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
 314
 315 2006-03-16  Bernd Schmidt  <bernd.schmidt@analog.com>
 316
 317         * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
 318         logic to identify halfword shifts.
 319
 320 2006-03-16  Paul Brook  <paul@codesourcery.com>
 321
 322         * arm-dis.c (arm_opcodes): Rename swi to svc.
 323         (thumb_opcodes): Ditto.
 324
 325 2006-03-13  DJ Delorie  <dj@redhat.com>
 326
 327         * m32c-asm.c: Regenerate.
 328         * m32c-desc.c: Likewise.
 329         * m32c-desc.h: Likewise.
 330         * m32c-dis.c: Likewise.
 331         * m32c-ibld.c: Likewise.
 332         * m32c-opc.c: Likewise.
 333         * m32c-opc.h: Likewise.
 334
 335 2006-03-10  DJ Delorie  <dj@redhat.com>
 336
 337         * m32c-desc.c: Regenerate with mul.l, mulu.l.
 338         * m32c-opc.c: Likewise.
 339         * m32c-opc.h: Likewise.
 340
 341
 342 2006-03-09  Nick Clifton  <nickc@redhat.com>
 343
 344         * po/sv.po: Updated Swedish translation.
 345
 346 2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>
 347
 348         PR binutils/2428
 349         * i386-dis.c (REP_Fixup): New function.
 350         (AL): Remove duplicate.
 351         (Xbr): New.
 352         (Xvr): Likewise.
 353         (Ybr): Likewise.
 354         (Yvr): Likewise.
 355         (indirDXr): Likewise.
 356         (ALr): Likewise.
 357         (eAXr): Likewise.
 358         (dis386): Updated entries of ins, outs, movs, lods and stos.
 359
 360 2006-03-05  Nick Clifton  <nickc@redhat.com>
 361
 362         * cgen-ibld.in (insert_normal): Cope with attempts to insert a
 363         signed 32-bit value into an unsigned 32-bit field when the host is
 364         a 64-bit machine.
 365         * fr30-ibld.c: Regenerate.
 366         * frv-ibld.c: Regenerate.
 367         * ip2k-ibld.c: Regenerate.
 368         * iq2000-asm.c: Regenerate.
 369         * iq2000-ibld.c: Regenerate.
 370         * m32c-ibld.c: Regenerate.
 371         * m32r-ibld.c: Regenerate.
 372         * openrisc-ibld.c: Regenerate.
 373         * xc16x-ibld.c: Regenerate.
 374         * xstormy16-ibld.c: Regenerate.
 375
 376 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 377
 378         * xc16x-asm.c: Regenerate.
 379         * xc16x-dis.c: Regenerate.
 380
 381 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 382
 383         * po/Make-in: Add html target.
 384
 385 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 386
 387         * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
 388         Intel Merom New Instructions.
 389         (THREE_BYTE_0): Likewise.
 390         (THREE_BYTE_1): Likewise.
 391         (three_byte_table): Likewise.
 392         (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
 393         THREE_BYTE_1 for entry 0x3a.
 394         (twobyte_has_modrm): Updated.
 395         (twobyte_uses_SSE_prefix): Likewise.
 396         (print_insn): Handle 3-byte opcodes used by Intel Merom New
 397         Instructions.
 398
 399 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 400
 401         * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
 402         (v9_hpriv_reg_names): New table.
 403         (print_insn_sparc): Allow values up to 16 for '?' and '!'.
 404         New cases '$' and '%' for read/write hyperprivileged register.
 405         * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
 406         window handling and rdhpr/wrhpr instructions.
 407
 408 2006-02-24  DJ Delorie  <dj@redhat.com>
 409
 410         * m32c-desc.c: Regenerate with linker relaxation attributes.
 411         * m32c-desc.h: Likewise.
 412         * m32c-dis.c: Likewise.
 413         * m32c-opc.c: Likewise.
 414
 415 2006-02-24  Paul Brook  <paul@codesourcery.com>
 416
 417         * arm-dis.c (arm_opcodes): Add V7 instructions.
 418         (thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
 419         (print_arm_address): New function.
 420         (print_insn_arm): Use it.  Add 'P' and 'U' cases.
 421         (psr_name): New function.
 422         (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
 423
 424 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 425
 426         * ia64-opc-i.c (bXc): New.
 427         (mXc): Likewise.
 428         (OpX2TaTbYaXcC): Likewise.
 429         (TF). Likewise.
 430         (TFCM). Likewise.
 431         (ia64_opcodes_i): Add instructions for tf.
 432
 433         * ia64-opc.h (IMMU5b): New.
 434
 435         * ia64-asmtab.c: Regenerated.
 436
 437 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 438
 439         * ia64-gen.c: Update copyright years.
 440         * ia64-opc-b.c: Likewise.
 441
 442 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 443
 444         * ia64-gen.c (lookup_regindex): Handle ".vm".
 445         (print_dependency_table): Handle '\"'.
 446
 447         * ia64-ic.tbl: Updated from SDM 2.2.
 448         * ia64-raw.tbl: Likewise.
 449         * ia64-waw.tbl: Likewise.
 450         * ia64-asmtab.c: Regenerated.
 451
 452         * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
 453
 454 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 455             Anil Paranjape   <anilp1@kpitcummins.com>
 456             Shilin Shakti    <shilins@kpitcummins.com>
 457
 458         * xc16x-desc.h: New file
 459         * xc16x-desc.c: New file
 460         * xc16x-opc.h: New file
 461         * xc16x-opc.c: New file
 462         * xc16x-ibld.c: New file
 463         * xc16x-asm.c: New file
 464         * xc16x-dis.c: New file
 465         * Makefile.am: Entries for xc16x
 466         * Makefile.in: Regenerate
 467         * cofigure.in: Add xc16x target information.
 468         * configure: Regenerate.
 469         * disassemble.c: Add xc16x target information.
 470
 471 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 472
 473         * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
 474         moves.
 475
 476 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 477
 478         * i386-dis.c ('Z'): Add a new macro.
 479         (dis386_twobyte): Use "movZ" for control register moves.
 480
 481 2006-02-10  Nick Clifton  <nickc@redhat.com>
 482
 483         * iq2000-asm.c: Regenerate.
 484
 485 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 486
 487         * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
 488
 489 2006-01-26  David Ung  <davidu@mips.com>
 490
 491         * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
 492         ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
 493         floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
 494         nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
 495         rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
 496
 497 2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>
 498
 499         * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
 500         ld_d_r, pref_xd_cb): Use signed char to hold data to be
 501         disassembled.
 502         * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
 503         buffer overflows when disassembling instructions like
 504         ld (ix+123),0x23
 505         * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
 506         operand, if the offset is negative.
 507
 508 2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>
 509
 510         * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
 511         unsigned char to hold data to be disassembled.
 512
 513 2006-01-17  Andreas Schwab  <schwab@suse.de>
 514
 515         PR binutils/1486
 516         * disassemble.c (disassemble_init_for_target): Set
 517         disassembler_needs_relocs for bfd_arch_arm.
 518
 519 2006-01-16  Paul Brook  <paul@codesourcery.com>
 520
 521         * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
 522         f?add?, and f?sub? instructions.
 523
 524 2006-01-16  Nick Clifton  <nickc@redhat.com>
 525
 526         * po/zh_CN.po: New Chinese (simplified) translation.
 527         * configure.in (ALL_LINGUAS): Add "zh_CH".
 528         * configure: Regenerate.
 529
 530 2006-01-05  Paul Brook  <paul@codesourcery.com>
 531
 532         * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
 533
 534 2006-01-06  DJ Delorie  <dj@redhat.com>
 535
 536         * m32c-desc.c: Regenerate.
 537         * m32c-opc.c: Regenerate.
 538         * m32c-opc.h: Regenerate.
 539
 540 2006-01-03  DJ Delorie  <dj@redhat.com>
 541
 542         * cgen-ibld.in (extract_normal): Avoid memory range errors.
 543         * m32c-ibld.c: Regenerated.
 544
 545 For older changes see ChangeLog-2005
 546 \f
 547 Local Variables:
 548 mode: change-log
 549 left-margin: 8
 550 fill-column: 74
 551 version-control: never
 552 End: