1 2020-02-10 H.J. Lu <hongjiu.lu@intel.com>
4 * i386-gen.c (opcode_modifiers): Replace AMD64 and Intel64
6 * i386-opc.h (AMD64): Removed.
10 (INTEL64ONLY): Likewise.
11 (i386_opcode_modifier): Replace amd64 and intel64 with isa64.
12 * i386-opc.tbl (Amd64): New.
14 (Intel64Only): Likewise.
15 Replace AMD64 with Amd64. Update sysenter/sysenter with
16 Cpu64 and Intel64Only. Remove AMD64 from sysenter/sysenter.
17 * i386-tbl.h: Regenerated.
19 2020-02-07 Sergey Belyashov <sergey.belyashov@gmail.com>
22 * z80-dis.c: Add support for GBZ80 opcodes.
24 2020-02-04 Alan Modra <amodra@gmail.com>
26 * d30v-dis.c (print_insn): Make "val" and "opnum" unsigned.
28 2020-02-03 Alan Modra <amodra@gmail.com>
30 * m32c-ibld.c: Regenerate.
32 2020-02-01 Alan Modra <amodra@gmail.com>
34 * frv-ibld.c: Regenerate.
36 2020-01-31 Jan Beulich <jbeulich@suse.com>
38 * i386-dis.c (EXxmm_mdq, xmm_mdq_mode): Delete.
39 (intel_operand_size, OP_EX): Drop xmm_mdq_mode case label.
40 (OP_E_memory): Replace xmm_mdq_mode case label by
41 vex_scalar_w_dq_mode one.
42 * i386-dis-evex-prefix.h: Replace EXxmm_mdq by EXVexWdqScalar.
44 2020-01-31 Jan Beulich <jbeulich@suse.com>
46 * i386-dis.c (EXVexWdq, vex_w_dq_mode): Delete.
47 (vex_vsib_d_w_dq_mode, vex_vsib_q_w_dq_mode,
48 vex_scalar_w_dq_mode): Don't refer to vex_w_dq_mode in comments.
49 (intel_operand_size): Drop vex_w_dq_mode case label.
51 2020-01-31 Richard Sandiford <richard.sandiford@arm.com>
53 * aarch64-tbl.h (aarch64_opcode): Set C_MAX_ELEM for SVE bfcvt.
54 Remove C_SCAN_MOVPRFX for SVE bfcvtnt.
56 2020-01-30 Alan Modra <amodra@gmail.com>
58 * m32c-ibld.c: Regenerate.
60 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
62 * bpf-opc.c: Regenerate.
64 2020-01-30 Jan Beulich <jbeulich@suse.com>
66 * i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
67 (dis386): Use them to replace C2/C3 table entries.
68 (x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
69 * i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
70 ones. Use Size64 instead of DefaultSize on Intel64 ones.
71 * i386-tbl.h: Re-generate.
73 2020-01-30 Jan Beulich <jbeulich@suse.com>
75 * i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
77 (fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
79 * i386-tbl.h: Re-generate.
81 2020-01-30 Alan Modra <amodra@gmail.com>
83 * tic4x-dis.c (tic4x_dp): Make unsigned.
85 2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
86 Jan Beulich <jbeulich@suse.com>
89 * i386-dis.c (MOVSXD_Fixup): New function.
90 (movsxd_mode): New enum.
91 (x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
92 (intel_operand_size): Handle movsxd_mode.
93 (OP_E_register): Likewise.
95 * i386-opc.tbl: Remove Rex64 and allow 32-bit destination
96 register on movsxd. Add movsxd with 16-bit destination register
97 for AMD64 and Intel64 ISAs.
98 * i386-tbl.h: Regenerated.
100 2020-01-27 Tamar Christina <tamar.christina@arm.com>
103 * aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
104 * aarch64-asm-2.c: Regenerate
105 * aarch64-dis-2.c: Likewise.
106 * aarch64-opc-2.c: Likewise.
108 2020-01-21 Jan Beulich <jbeulich@suse.com>
110 * i386-opc.tbl (sysret): Drop DefaultSize.
111 * i386-tbl.h: Re-generate.
113 2020-01-21 Jan Beulich <jbeulich@suse.com>
115 * i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
117 (vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
118 * i386-tbl.h: Re-generate.
120 2020-01-20 Nick Clifton <nickc@redhat.com>
122 * po/de.po: Updated German translation.
123 * po/pt_BR.po: Updated Brazilian Portuguese translation.
124 * po/uk.po: Updated Ukranian translation.
126 2020-01-20 Alan Modra <amodra@gmail.com>
128 * hppa-dis.c (fput_const): Remove useless cast.
130 2020-01-20 Alan Modra <amodra@gmail.com>
132 * arm-dis.c (print_insn_arm): Wrap 'T' value.
134 2020-01-18 Nick Clifton <nickc@redhat.com>
136 * configure: Regenerate.
137 * po/opcodes.pot: Regenerate.
139 2020-01-18 Nick Clifton <nickc@redhat.com>
141 Binutils 2.34 branch created.
143 2020-01-17 Christian Biesinger <cbiesinger@google.com>
145 * opintl.h: Fix spelling error (seperate).
147 2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
149 * i386-opc.tbl: Add {vex} pseudo prefix.
150 * i386-tbl.h: Regenerated.
152 2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
155 * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
156 (neon_opcodes): Likewise.
157 (select_arm_features): Make sure we enable MVE bits when selecting
158 armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
161 2020-01-16 Jan Beulich <jbeulich@suse.com>
163 * i386-opc.tbl: Drop stale comment from XOP section.
165 2020-01-16 Jan Beulich <jbeulich@suse.com>
167 * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
168 (extractps): Add VexWIG to SSE2AVX forms.
169 * i386-tbl.h: Re-generate.
171 2020-01-16 Jan Beulich <jbeulich@suse.com>
173 * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
174 Size64 from and use VexW1 on SSE2AVX forms.
175 (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
176 VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
177 * i386-tbl.h: Re-generate.
179 2020-01-15 Alan Modra <amodra@gmail.com>
181 * tic4x-dis.c (tic4x_version): Make unsigned long.
182 (optab, optab_special, registernames): New file scope vars.
183 (tic4x_print_register): Set up registernames rather than
184 malloc'd registertable.
185 (tic4x_disassemble): Delete optable and optable_special. Use
186 optab and optab_special instead. Throw away old optab,
187 optab_special and registernames when info->mach changes.
189 2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
192 * z80-dis.c (suffix): Use .db instruction to generate double
195 2020-01-14 Alan Modra <amodra@gmail.com>
197 * z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
198 values to unsigned before shifting.
200 2020-01-13 Thomas Troeger <tstroege@gmx.de>
202 * arm-dis.c (print_insn_arm): Fill in insn info fields for control
204 (print_insn_thumb16, print_insn_thumb32): Likewise.
205 (print_insn): Initialize the insn info.
206 * i386-dis.c (print_insn): Initialize the insn info fields, and
209 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
211 * arc-opc.c (C_NE): Make it required.
213 2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
215 * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
216 reserved register name.
218 2020-01-13 Alan Modra <amodra@gmail.com>
220 * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
221 (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
223 2020-01-13 Alan Modra <amodra@gmail.com>
225 * wasm32-dis.c (print_insn_wasm32): Localise variables. Store
226 result of wasm_read_leb128 in a uint64_t and check that bits
227 are not lost when copying to other locals. Use uint32_t for
228 most locals. Use PRId64 when printing int64_t.
230 2020-01-13 Alan Modra <amodra@gmail.com>
232 * score-dis.c: Formatting.
233 * score7-dis.c: Formatting.
235 2020-01-13 Alan Modra <amodra@gmail.com>
237 * score-dis.c (print_insn_score48): Use unsigned variables for
238 unsigned values. Don't left shift negative values.
239 (print_insn_score32): Likewise.
240 * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
242 2020-01-13 Alan Modra <amodra@gmail.com>
244 * tic4x-dis.c (tic4x_print_register): Remove dead code.
246 2020-01-13 Alan Modra <amodra@gmail.com>
248 * fr30-ibld.c: Regenerate.
250 2020-01-13 Alan Modra <amodra@gmail.com>
252 * xgate-dis.c (print_insn): Don't left shift signed value.
253 (ripBits): Formatting, use 1u.
255 2020-01-10 Alan Modra <amodra@gmail.com>
257 * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
258 * tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
260 2020-01-10 Alan Modra <amodra@gmail.com>
262 * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
263 and XRREG value earlier to avoid a shift with negative exponent.
264 * m10200-dis.c (disassemble): Similarly.
266 2020-01-09 Nick Clifton <nickc@redhat.com>
269 * z80-dis.c (ld_ii_ii): Use correct cast.
271 2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
274 * z80-dis.c (ld_ii_ii): Use character constant when checking
277 2020-01-09 Jan Beulich <jbeulich@suse.com>
279 * i386-dis.c (SEP_Fixup): New.
281 (dis386_twobyte): Use it for sysenter/sysexit.
282 (enum x86_64_isa): Change amd64 enumerator to value 1.
283 (OP_J): Compare isa64 against intel64 instead of amd64.
284 * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
286 * i386-tbl.h: Re-generate.
288 2020-01-08 Alan Modra <amodra@gmail.com>
290 * z8k-dis.c: Include libiberty.h
291 (instr_data_s): Make max_fetched unsigned.
292 (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
293 Don't exceed byte_info bounds.
294 (output_instr): Make num_bytes unsigned.
295 (unpack_instr): Likewise for nibl_count and loop.
296 * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
298 * z8k-opc.h: Regenerate.
300 2020-01-07 Shahab Vahedi <shahab@synopsys.com>
302 * arc-tbl.h (llock): Use 'LLOCK' as class.
304 (scond): Use 'SCOND' as class.
306 (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
309 2020-01-06 Alan Modra <amodra@gmail.com>
311 * m32c-ibld.c: Regenerate.
313 2020-01-06 Alan Modra <amodra@gmail.com>
316 * z80-dis.c (suffix): Don't use a local struct buffer copy.
317 Peek at next byte to prevent recursion on repeated prefix bytes.
318 Ensure uninitialised "mybuf" is not accessed.
319 (print_insn_z80): Don't zero n_fetch and n_used here,..
320 (print_insn_z80_buf): ..do it here instead.
322 2020-01-04 Alan Modra <amodra@gmail.com>
324 * m32r-ibld.c: Regenerate.
326 2020-01-04 Alan Modra <amodra@gmail.com>
328 * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
330 2020-01-04 Alan Modra <amodra@gmail.com>
332 * crx-dis.c (match_opcode): Avoid shift left of signed value.
334 2020-01-04 Alan Modra <amodra@gmail.com>
336 * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
338 2020-01-03 Jan Beulich <jbeulich@suse.com>
340 * aarch64-tbl.h (aarch64_opcode_table): Use
341 SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
343 2020-01-03 Jan Beulich <jbeulich@suse.com>
345 * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
346 forms of SUDOT and USDOT.
348 2020-01-03 Jan Beulich <jbeulich@suse.com>
350 * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
352 * opcodes/aarch64-dis-2.c: Re-generate.
354 2020-01-03 Jan Beulich <jbeulich@suse.com>
356 * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
358 * opcodes/aarch64-dis-2.c: Re-generate.
360 2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
362 * z80-dis.c: Add support for eZ80 and Z80 instructions.
364 2020-01-01 Alan Modra <amodra@gmail.com>
366 Update year range in copyright notice of all files.
368 For older changes see ChangeLog-2019
370 Copyright (C) 2020 Free Software Foundation, Inc.
372 Copying and distribution of this file, with or without modification,
373 are permitted in any medium without royalty provided the copyright
374 notice and this notice are preserved.
380 version-control: never