opcodes/ChangeLog

   1 2005-03-20  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         * mmix-opc.c (O): Revert the last change.
   4         (Z): Likewise.
   5
   6 2005-03-19  H.J. Lu  <hongjiu.lu@intel.com>
   7
   8         * mmix-opc.c (O): Use 24UL instead of 24 for unsigned long.
   9         (Z): Likewise.
  10
  11 2005-03-19  Hans-Peter Nilsson  <hp@bitrange.com>
  12
  13         * mmix-opc.c (O, Z): Force expression as unsigned long.
  14
  15 2005-03-18  Nick Clifton  <nickc@redhat.com>
  16
  17         * ip2k-asm.c: Regenerate.
  18         * op/opcodes.pot: Regenerate.
  19
  20 2005-03-16  Nick Clifton  <nickc@redhat.com>
  21             Ben Elliston  <bje@au.ibm.com>
  22
  23         * configure.in (werror): New switch: Add -Werror to the
  24         compiler command line.  Enabled by default.  Disable via
  25         --disable-werror.
  26         * configure: Regenerate.
  27
  28 2005-03-16  Alan Modra  <amodra@bigpond.net.au>
  29
  30         * ppc-dis.c (powerpc_dialect): Don't set PPC_OPCODE_ALTIVEC when
  31         BOOKE.
  32
  33 2005-03-15  Alan Modra  <amodra@bigpond.net.au>
  34
  35         * po/es.po: Commit new Spanish translation.
  36
  37         * po/fr.po: Commit new French translation.
  38
  39 2005-03-14  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
  40
  41         * vax-dis.c: Fix spelling error
  42         (print_insn_vax): Use ".word 0x0012 # Entry mask: r1 r2 >" instead
  43         of just "Entry mask: < r1 ... >"
  44
  45 2005-03-12  Zack Weinberg  <zack@codesourcery.com>
  46
  47         * arm-dis.c (arm_opcodes): Document %E and %V.
  48         Add entries for v6T2 ARM instructions:
  49         bfc bfi mls strht ldrht ldrsht ldrsbt movw movt rbit ubfx sbfx.
  50         (print_insn_arm): Add support for %E and %V.
  51         (thumb_opcodes): Add ARMv6K instructions nop, sev, wfe, wfi, yield.
  52
  53 2005-03-10  Jeff Baker  <jbaker@qnx.com>
  54             Alan Modra  <amodra@bigpond.net.au>
  55
  56         * ppc-opc.c (insert_sprg, extract_sprg): New Functions.
  57         (powerpc_operands <SPRG>): Call the above.  Bit field is 5 bits.
  58         (SPRG_MASK): Delete.
  59         (XSPRG_MASK): Mask off extra bits now part of sprg field.
  60         (powerpc_opcodes): Asjust mfsprg and mtsprg to suit new mask.  Move
  61         mfsprg4..7 after msprg and consolidate.
  62
  63 2005-03-09  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
  64
  65         * vax-dis.c (entry_mask_bit): New array.
  66         (print_insn_vax): Decode function entry mask.
  67
  68 2005-03-07  Aldy Hernandez  <aldyh@redhat.com>
  69
  70         * ppc-opc.c (powerpc_opcodes): Fix encoding of efscfd.
  71
  72 2005-03-05  Alan Modra  <amodra@bigpond.net.au>
  73
  74         * po/opcodes.pot: Regenerate.
  75
  76 2005-03-03  Ramana Radhakrishnan  <ramana.radhakrishnan@codito.com>
  77
  78         * arc-dis.c (a4_decoding_class): New enum.
  79         (dsmOneArcInst): Use the enum values for the decoding class.
  80         Remove redundant case in the switch for decodingClass value 11.
  81
  82 2005-03-02  Jan Beulich  <jbeulich@novell.com>
  83
  84         * i386-dis.c (print_insn): Suppress lock prefix printing for cr8...15
  85         accesses.
  86         (OP_C): Consider lock prefix in non-64-bit modes.
  87
  88 2005-02-24  Alan Modra  <amodra@bigpond.net.au>
  89
  90         * cris-dis.c (format_hex): Remove ineffective warning fix.
  91         * crx-dis.c (make_instruction): Warning fix.
  92         * frv-asm.c: Regenerate.
  93
  94 2005-02-23  Nick Clifton  <nickc@redhat.com>
  95
  96         * cgen-dis.in: Use bfd_byte for buffers that are passed to
  97         read_memory.
  98
  99         * ia64-opc.c (locate_opcode_ent): Initialise opval array.
 100
 101         * crx-dis.c (make_instruction): Move argument structure into inner
 102         scope and ensure that all of its fields are initialised before
 103         they are used.
 104
 105         * fr30-asm.c: Regenerate.
 106         * fr30-dis.c: Regenerate.
 107         * frv-asm.c: Regenerate.
 108         * frv-dis.c: Regenerate.
 109         * ip2k-asm.c: Regenerate.
 110         * ip2k-dis.c: Regenerate.
 111         * iq2000-asm.c: Regenerate.
 112         * iq2000-dis.c: Regenerate.
 113         * m32r-asm.c: Regenerate.
 114         * m32r-dis.c: Regenerate.
 115         * openrisc-asm.c: Regenerate.
 116         * openrisc-dis.c: Regenerate.
 117         * xstormy16-asm.c: Regenerate.
 118         * xstormy16-dis.c: Regenerate.
 119
 120 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 121
 122         * arc-ext.c: Warning fixes.
 123         * arc-ext.h: Likewise.
 124         * cgen-opc.c: Likewise.
 125         * ia64-gen.c: Likewise.
 126         * maxq-dis.c: Likewise.
 127         * ns32k-dis.c: Likewise.
 128         * w65-dis.c: Likewise.
 129         * ia64-asmtab.c: Regenerate.
 130
 131 2005-02-22  Alan Modra  <amodra@bigpond.net.au>
 132
 133         * fr30-desc.c: Regenerate.
 134         * fr30-desc.h: Regenerate.
 135         * fr30-opc.c: Regenerate.
 136         * fr30-opc.h: Regenerate.
 137         * frv-desc.c: Regenerate.
 138         * frv-desc.h: Regenerate.
 139         * frv-opc.c: Regenerate.
 140         * frv-opc.h: Regenerate.
 141         * ip2k-desc.c: Regenerate.
 142         * ip2k-desc.h: Regenerate.
 143         * ip2k-opc.c: Regenerate.
 144         * ip2k-opc.h: Regenerate.
 145         * iq2000-desc.c: Regenerate.
 146         * iq2000-desc.h: Regenerate.
 147         * iq2000-opc.c: Regenerate.
 148         * iq2000-opc.h: Regenerate.
 149         * m32r-desc.c: Regenerate.
 150         * m32r-desc.h: Regenerate.
 151         * m32r-opc.c: Regenerate.
 152         * m32r-opc.h: Regenerate.
 153         * m32r-opinst.c: Regenerate.
 154         * openrisc-desc.c: Regenerate.
 155         * openrisc-desc.h: Regenerate.
 156         * openrisc-opc.c: Regenerate.
 157         * openrisc-opc.h: Regenerate.
 158         * xstormy16-desc.c: Regenerate.
 159         * xstormy16-desc.h: Regenerate.
 160         * xstormy16-opc.c: Regenerate.
 161         * xstormy16-opc.h: Regenerate.
 162
 163 2005-02-21  Alan Modra  <amodra@bigpond.net.au>
 164
 165         * Makefile.am: Run "make dep-am"
 166         * Makefile.in: Regenerate.
 167
 168 2005-02-15  Nick Clifton  <nickc@redhat.com>
 169
 170         * cgen-dis.in (print_address): Add an ATTRIBUTE_UNUSED to prevent
 171         compile time warnings.
 172         (print_keyword): Likewise.
 173         (default_print_insn): Likewise.
 174
 175         * fr30-desc.c: Regenerated.
 176         * fr30-desc.h: Regenerated.
 177         * fr30-dis.c: Regenerated.
 178         * fr30-opc.c: Regenerated.
 179         * fr30-opc.h: Regenerated.
 180         * frv-desc.c: Regenerated.
 181         * frv-dis.c: Regenerated.
 182         * frv-opc.c: Regenerated.
 183         * ip2k-asm.c: Regenerated.
 184         * ip2k-desc.c: Regenerated.
 185         * ip2k-desc.h: Regenerated.
 186         * ip2k-dis.c: Regenerated.
 187         * ip2k-opc.c: Regenerated.
 188         * ip2k-opc.h: Regenerated.
 189         * iq2000-desc.c: Regenerated.
 190         * iq2000-dis.c: Regenerated.
 191         * iq2000-opc.c: Regenerated.
 192         * m32r-asm.c: Regenerated.
 193         * m32r-desc.c: Regenerated.
 194         * m32r-desc.h: Regenerated.
 195         * m32r-dis.c: Regenerated.
 196         * m32r-opc.c: Regenerated.
 197         * m32r-opc.h: Regenerated.
 198         * m32r-opinst.c: Regenerated.
 199         * openrisc-desc.c: Regenerated.
 200         * openrisc-desc.h: Regenerated.
 201         * openrisc-dis.c: Regenerated.
 202         * openrisc-opc.c: Regenerated.
 203         * openrisc-opc.h: Regenerated.
 204         * xstormy16-desc.c: Regenerated.
 205         * xstormy16-desc.h: Regenerated.
 206         * xstormy16-dis.c: Regenerated.
 207         * xstormy16-opc.c: Regenerated.
 208         * xstormy16-opc.h: Regenerated.
 209
 210 2005-02-14  H.J. Lu  <hongjiu.lu@intel.com>
 211
 212         * dis-buf.c (perror_memory): Use sprintf_vma to print out
 213         address.
 214
 215 2005-02-11  Nick Clifton  <nickc@redhat.com>
 216
 217         * iq2000-asm.c: Regenerate.
 218
 219         * frv-dis.c: Regenerate.
 220
 221 2005-02-07  Jim Blandy  <jimb@redhat.com>
 222
 223         * Makefile.am (CGEN): Load guile.scm before calling the main
 224         application script.
 225         * Makefile.in: Regenerated.
 226         * cgen.sh: Be prepared for the 'cgen' argument to contain spaces.
 227         Simply pass the cgen-opc.scm path to ${cgen} as its first
 228         argument; ${cgen} itself now contains the '-s', or whatever is
 229         appropriate for the Scheme being used.
 230
 231 2005-01-31  Andrew Cagney  <cagney@gnu.org>
 232
 233         * configure: Regenerate to track ../gettext.m4.
 234
 235 2005-01-31  Jan Beulich  <jbeulich@novell.com>
 236
 237         * ia64-gen.c (NELEMS): Define.
 238         (shrink): Generate alias with missing second predicate register when
 239         opcode has two outputs and these are both predicates.
 240         * ia64-opc-i.c (FULL17): Define.
 241         (ia64_opcodes_i): Add mov-to-pr alias without second input. Use FULL17
 242         here to generate output template.
 243         (TBITCM, TNATCM): Undefine after use.
 244         * ia64-opc-m.c (ia64_opcodes_i): Add alloc alias without ar.pfs as
 245         first input. Add ld16 aliases without ar.csd as second output. Add
 246         st16 aliases without ar.csd as second input. Add cmpxchg aliases
 247         without ar.ccv as third input. Add cmp8xchg16 aliases without ar.csd/
 248         ar.ccv as third/fourth inputs. Consolidate through...
 249         (CMPXCHG_acq, CMPXCHG_rel, CMPXCHG_1, CMPXCHG_2, CMPXCHG_4, CMPXCHG_8,
 250         CMPXCHGn, CMP8XCHG16, CMPXCHG_ALL): Define.
 251         * ia64-asmtab.c: Regenerate.
 252
 253 2005-01-27  Andrew Cagney  <cagney@gnu.org>
 254
 255         * configure: Regenerate to track ../gettext.m4 change.
 256
 257 2005-01-25  Alexandre Oliva  <aoliva@redhat.com>
 258
 259         2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
 260         * frv-asm.c: Rebuilt.
 261         * frv-desc.c: Rebuilt.
 262         * frv-desc.h: Rebuilt.
 263         * frv-dis.c: Rebuilt.
 264         * frv-ibld.c: Rebuilt.
 265         * frv-opc.c: Rebuilt.
 266         * frv-opc.h: Rebuilt.
 267
 268 2005-01-24  Andrew Cagney  <cagney@gnu.org>
 269
 270         * configure: Regenerate, ../gettext.m4 was updated.
 271
 272 2005-01-21  Fred Fish  <fnf@specifixinc.com>
 273
 274         * mips-opc.c:  Change INSN_ALIAS to INSN2_ALIAS.
 275         Change INSN_WRITE_MDMX_ACC to INSN2_WRITE_MDMX_ACC.
 276         Change INSN_READ_MDMX_ACC to INSN2_READ_MDMX_ACC.
 277         * mips-dis.c: Ditto.
 278
 279 2005-01-20  Alan Modra  <amodra@bigpond.net.au>
 280
 281         * ppc-opc.c (powerpc_opcodes): Add optional 'l' arg to tlbiel.
 282
 283 2005-01-19  Fred Fish  <fnf@specifixinc.com>
 284
 285         * mips-dis.c (no_aliases): New disassembly option flag.
 286         (set_default_mips_dis_options): Init no_aliases to zero.
 287         (parse_mips_dis_option): Handle no-aliases option.
 288         (print_insn_mips): Ignore table entries that are aliases
 289         if no_aliases is set.
 290         (print_insn_mips16): Ditto.
 291         * mips-opc.c (mips_builtin_opcodes): Add initializer column for
 292         new pinfo2 member and add INSN_ALIAS initializers as needed.  Also
 293         move WR_MACC and RD_MACC initializers from pinfo to pinfo2.
 294         * mips16-opc.c (mips16_opcodes): Ditto.
 295
 296 2005-01-17  Andrew Stubbs  <andrew.stubbs@st.com>
 297
 298         * sh-opc.h (arch_sh2a_or_sh3e,arch_sh2a_or_sh4): Correct definition.
 299         (inheritance diagram): Add missing edge.
 300         (arch_sh1_up): Rename arch_sh_up to match external name to make life
 301         easier for the testsuite.
 302         (arch_sh4_nofp_up): Likewise, rename arch_sh4_nofpu_up.
 303         (arch_sh4a_nofp_up): Likewise, rename arch_sh4a_nofpu_up.
 304         (arch_sh2a_nofpu_or_sh4_nommu_nofpu_up): Add missing
 305         arch_sh2a_or_sh4_up child.
 306         (sh_table): Do renaming as above.
 307         Correct comment for ldc.l for gas testsuite to read.
 308         Remove rogue mul.l from sh1 (duplicate of the one for sh2).
 309         Correct comments for movy.w and movy.l for gas testsuite to read.
 310         Correct comments for fmov.d and fmov.s for gas testsuite to read.
 311
 312 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 313
 314         * i386-dis.c (OP_E): Don't ignore scale in SIB for 64 bit mode.
 315
 316 2005-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 317
 318         * i386-dis.c (OP_E): Ignore scale when index == 0x4 in SIB.
 319
 320 2005-01-10  Andreas Schwab  <schwab@suse.de>
 321
 322         * disassemble.c (disassemble_init_for_target) <case
 323         bfd_arch_ia64>: Set skip_zeroes to 16.
 324         <case bfd_arch_tic4x>: Set skip_zeroes to 32.
 325
 326 2004-12-23  Tomer Levi  <Tomer.Levi@nsc.com>
 327
 328         * crx-opc.c: Mark 'bcop' instruction as RELAXABLE.
 329
 330 2004-12-14  Svein E. Seldal  <Svein.Seldal@solidas.com>
 331
 332         * avr-dis.c: Prettyprint. Added printing of symbol names in all
 333         memory references. Convert avr_operand() to C90 formatting.
 334
 335 2004-12-05  Tomer Levi  <Tomer.Levi@nsc.com>
 336
 337         * crx-dis.c (print_arg): Use 'info->print_address_func' for address printing.
 338
 339 2004-11-29  Tomer Levi  <Tomer.Levi@nsc.com>
 340
 341         * crx-opc.c (crx_optab): Mark all rbase_disps* operands as signed.
 342         (no_op_insn): Initialize array with instructions that have no
 343         operands.
 344         * crx-dis.c (make_instruction): Get rid of COP_BRANCH_INS operand swapping.
 345
 346 2004-11-29  Richard Earnshaw  <rearnsha@arm.com>
 347
 348         * arm-dis.c: Correct top-level comment.
 349
 350 2004-11-27  Richard Earnshaw  <rearnsha@arm.com>
 351
 352         * arm-opc.h (arm_opcode, thumb_opcode): Add extra field for the
 353         architecuture defining the insn.
 354         (arm_opcodes, thumb_opcodes): Delete.  Move to ...
 355         * arm-dis.c (arm_opcodes, thumb_opcodes): Here.  Add architecutre
 356         field.
 357         Also include opcode/arm.h.
 358         * Makefile.am (arm-dis.lo): Update dependency list.
 359         * Makefile.in: Regenerate.
 360
 361 2004-11-22  Ravi Ramaseshan  <ravi.ramaseshan@codito.com>
 362
 363         * opcode/arc-opc.c (insert_base): Modify ls_operand[LS_OFFSET] to
 364         reflect the change to the short immediate syntax.
 365
 366 2004-11-19  Alan Modra  <amodra@bigpond.net.au>
 367
 368         * or32-opc.c (debug): Warning fix.
 369         * po/POTFILES.in: Regenerate.
 370
 371         * maxq-dis.c: Formatting.
 372         (print_insn): Warning fix.
 373
 374 2004-11-17  Daniel Jacobowitz  <dan@codesourcery.com>
 375
 376         * arm-dis.c (WORD_ADDRESS): Define.
 377         (print_insn): Use it.  Correct big-endian end-of-section handling.
 378
 379 2004-11-08  Inderpreet Singh   <inderpreetb@nioda.hcltech.com>
 380             Vineet Sharma      <vineets@noida.hcltech.com>
 381
 382         * maxq-dis.c: New file.
 383         * disassemble.c (ARCH_maxq): Define.
 384         (disassembler): Add 'print_insn_maxq_little' for handling maxq
 385         instructions..
 386         * configure.in: Add case for bfd_maxq_arch.
 387         * configure: Regenerate.
 388         * Makefile.am: Add support for maxq-dis.c
 389         * Makefile.in: Regenerate.
 390         * aclocal.m4: Regenerate.
 391
 392 2004-11-05  Tomer Levi  <Tomer.Levi@nsc.com>
 393
 394         * crx-opc.c (crx_optab): Rename 'arg_icr' to 'arg_idxr' for Index register
 395         mode.
 396         * crx-dis.c: Likewise.
 397
 398 2004-11-04  Hans-Peter Nilsson  <hp@axis.com>
 399
 400         Generally, handle CRISv32.
 401         * cris-dis.c (TRACE_CASE): Define as (disdata->trace_case).
 402         (struct cris_disasm_data): New type.
 403         (format_reg, format_hex, cris_constraint, print_flags)
 404         (get_opcode_entry): Add struct cris_disasm_data * parameter.  All
 405         callers changed.
 406         (format_sup_reg, print_insn_crisv32_with_register_prefix)
 407         (print_insn_crisv32_without_register_prefix)
 408         (print_insn_crisv10_v32_with_register_prefix)
 409         (print_insn_crisv10_v32_without_register_prefix)
 410         (cris_parse_disassembler_options): New functions.
 411         (bytes_to_skip, cris_spec_reg): Add enum cris_disass_family
 412         parameter.  All callers changed.
 413         (get_opcode_entry): Call malloc, not xmalloc.  Return NULL on
 414         failure.
 415         (cris_constraint) <case 'Y', 'U'>: New cases.
 416         (bytes_to_skip): Handle 'Y' and 'N' as 's'.  Skip size is 4 bytes
 417         for constraint 'n'.
 418         (print_with_operands) <case 'Y'>: New case.
 419         (print_with_operands) <case 'T', 'A', '[', ']', 'd', 'n', 'u'>
 420         <case 'N', 'Y', 'Q'>: New cases.
 421         (print_insn_cris_generic): Emit "bcc ." for zero and CRISv32.
 422         (print_insn_cris_with_register_prefix)
 423         (print_insn_cris_without_register_prefix): Call
 424         cris_parse_disassembler_options.
 425         * cris-opc.c (cris_spec_regs): Mention that this table isn't used
 426         for CRISv32 and the size of immediate operands.  New v32-only
 427         entries for bz, pid, srs, wz, exs, eda, dz, ebp, erp, nrp, ccs and
 428         spc.  Add v32-only 4-byte entries for p2, p3, p5 and p6.  Change
 429         ccr, ibr, irp to be v0..v10.  Change bar, dccr to be v8..v10.
 430         Change brp to be v3..v10.
 431         (cris_support_regs): New vector.
 432         (cris_opcodes): Update head comment.  New format characters '[',
 433         ']', space, 'A', 'd', 'N', 'n', 'Q', 'T', 'u', 'U', 'Y'.
 434         Add new opcodes for v32 and adjust existing opcodes to accommodate
 435         differences to earlier variants.
 436         (cris_cond15s): New vector.
 437
 438 2004-11-04 Jan Beulich <jbeulich@novell.com>
 439
 440         * i386-dis.c (Eq, Edqw, indirEp, Gdq, I1): Define.
 441         (indirEb): Remove.
 442         (Mp): Use f_mode rather than none at all.
 443         (t_mode, dq_mode, dqw_mode, f_mode, const_1_mode): Define. t_mode
 444         replaces what previously was x_mode; x_mode now means 128-bit SSE
 445         operands.
 446         (dis386): Make far jumps and calls have an 'l' prefix only in AT&T
 447         mode. movmskpX's, pextrw's, and pmovmskb's first operands are Gdq.
 448         pinsrw's second operand is Edqw.
 449         (grps): 1-bit shifts' and rotates' second operands are I1. cmpxchg8b's
 450         operand is Eq. movntq's and movntdq's first operands are EM. s[gi]dt,
 451         fldenv, frstor, fsave, fstenv all should also have suffixes in Intel
 452         mode when an operand size override is present or always suffixing.
 453         More instructions will need to be added to this group.
 454         (putop): Handle new macro chars 'C' (short/long suffix selector),
 455         'I' (Intel mode override for following macro char), and 'J' (for
 456         adding the 'l' prefix to far branches in AT&T mode). When an
 457         alternative was specified in the template, honor macro character when
 458         specified for Intel mode.
 459         (OP_E): Handle new *_mode values. Correct pointer specifications for
 460         memory operands. Consolidate output of index register.
 461         (OP_G): Handle new *_mode values.
 462         (OP_I): Handle const_1_mode.
 463         (OP_ESreg, OP_DSreg): Generate pointer specifications. Indicate
 464         respective opcode prefix bits have been consumed.
 465         (OP_EM, OP_EX): Provide some default handling for generating pointer
 466         specifications.
 467
 468 2004-10-28  Tomer Levi  <Tomer.Levi@nsc.com>
 469
 470         * crx-opc.c (REV_COP_INST): New macro, reverse operand order of
 471         COP_INST macro.
 472
 473 2004-10-27  Tomer Levi  <Tomer.Levi@nsc.com>
 474
 475         * crx-dis.c (enum REG_ARG_TYPE): New, replacing COP_ARG_TYPE.
 476         (getregliststring): Support HI/LO and user registers.
 477         * crx-opc.c (crx_instruction): Update data structure according to the
 478         rearrangement done in CRX opcode header file.
 479         (crx_regtab):  Likewise.
 480         (crx_optab):  Likewise.
 481         (crx_instruction): Reorder load/stor instructions, remove unsupported
 482         formats.
 483         support new Co-Processor instruction 'cpi'.
 484
 485 2004-10-27  Nick Clifton  <nickc@redhat.com>
 486
 487         * opcodes/iq2000-asm.c: Regenerate.
 488         * opcodes/iq2000-desc.c: Regenerate.
 489         * opcodes/iq2000-desc.h: Regenerate.
 490         * opcodes/iq2000-dis.c: Regenerate.
 491         * opcodes/iq2000-ibld.c: Regenerate.
 492         * opcodes/iq2000-opc.c: Regenerate.
 493         * opcodes/iq2000-opc.h: Regenerate.
 494
 495 2004-10-21  Tomer Levi  <Tomer.Levi@nsc.com>
 496
 497         * crx-opc.c (crx_instruction): Replace i3, i4, i5 with us3,
 498         us4, us5 (respectively).
 499         Remove unsupported 'popa' instruction.
 500         Reverse operands order in store co-processor instructions.
 501
 502 2004-10-15  Alan Modra  <amodra@bigpond.net.au>
 503
 504         * Makefile.am: Run "make dep-am"
 505         * Makefile.in: Regenerate.
 506
 507 2004-10-12  Bob Wilson  <bob.wilson@acm.org>
 508
 509         * xtensa-dis.c: Use ISO C90 formatting.
 510
 511 2004-10-09  Alan Modra  <amodra@bigpond.net.au>
 512
 513         * ppc-opc.c: Revert 2004-09-09 change.
 514
 515 2004-10-07  Bob Wilson  <bob.wilson@acm.org>
 516
 517         * xtensa-dis.c (state_names): Delete.
 518         (fetch_data): Use xtensa_isa_maxlength.
 519         (print_xtensa_operand): Replace operand parameter with opcode/operand
 520         pair.  Remove print_sr_name parameter.  Use new xtensa-isa.h functions.
 521         (print_insn_xtensa): Use new xtensa-isa.h functions.  Handle multislot
 522         instruction bundles.  Use xmalloc instead of malloc.
 523
 524 2004-10-07  David Gibson  <david@gibson.dropbear.id.au>
 525
 526         * ppc-opc.c: Replace literal "0"s with NULLs in pointer
 527         initializers.
 528
 529 2004-10-07  Tomer Levi  <Tomer.Levi@nsc.com>
 530
 531         * crx-opc.c (crx_instruction): Support Co-processor insns.
 532         * crx-dis.c (COP_ARG_TYPE): New enum for CO-Processor arguments.
 533         (getregliststring): Change function to use the above enum.
 534         (print_arg): Handle CO-Processor insns.
 535         (crx_cinvs): Add 'b' option to invalidate the branch-target
 536         cache.
 537
 538 2004-10-06  Aldy Hernandez  <aldyh@redhat.com>
 539
 540         * ppc-opc.c (powerpc_opcodes): Add efscfd, efdabs, efdnabs,
 541         efdneg, efdadd, efdsub, efdmul, efddiv, efdcmpgt, efdcmplt,
 542         efdcmpeq, efdtstgt, efdtstlt, efdtsteq, efdcfsi, efdcfsid,
 543         efdcfui, efdcfuid, efdcfsf, efdcfuf, efdctsi, efdctsidz, efdctsiz,
 544         efdctui, efdctuidz, efdctuiz, efdctsf, efdctuf, efdctuf, efdcfs.
 545
 546 2004-10-01  Bill Farmer  <Bill@the-farmers.freeserve.co.uk>
 547
 548         * pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
 549         rather than add it.
 550
 551 2004-09-30  Paul Brook  <paul@codesourcery.com>
 552
 553         * arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
 554         * arm-opc.h: Document %e.  Add ARMv6ZK instructions.
 555
 556 2004-09-17  H.J. Lu  <hongjiu.lu@intel.com>
 557
 558         * Makefile.am (AUTOMAKE_OPTIONS): Require 1.9.
 559         (CONFIG_STATUS_DEPENDENCIES): New.
 560         (Makefile): Removed.
 561         (config.status): Likewise.
 562         * Makefile.in: Regenerated.
 563
 564 2004-09-17  Alan Modra  <amodra@bigpond.net.au>
 565
 566         * Makefile.am: Run "make dep-am".
 567         * Makefile.in: Regenerate.
 568         * aclocal.m4: Regenerate.
 569         * configure: Regenerate.
 570         * po/POTFILES.in: Regenerate.
 571         * po/opcodes.pot: Regenerate.
 572
 573 2004-09-11  Andreas Schwab  <schwab@suse.de>
 574
 575         * configure: Rebuild.
 576
 577 2004-09-09  Segher Boessenkool  <segher@kernel.crashing.org>
 578
 579         * ppc-opc.c (L): Make this field not optional.
 580
 581 2004-09-03  Tomer Levi  <Tomer.Levi@nsc.com>
 582
 583         * opc-crx.c: Rename 'popma' to 'popa', remove 'pushma'.
 584         Fix parameter to 'm[t|f]csr' insns.
 585
 586 2004-08-30  Nathanael Nerode  <neroden@gcc.gnu.org>
 587
 588         * configure.in: Autoupdate to autoconf 2.59.
 589         * aclocal.m4: Rebuild with aclocal 1.4p6.
 590         * configure: Rebuild with autoconf 2.59.
 591         * Makefile.in: Rebuild with automake 1.4p6 (picking up
 592         bfd changes for autoconf 2.59 on the way).
 593         * config.in: Rebuild with autoheader 2.59.
 594
 595 2004-08-27  Richard Sandiford  <rsandifo@redhat.com>
 596
 597         * frv-desc.[ch], frv-opc.[ch]: Regenerated.
 598
 599 2004-07-30  Michal Ludvig  <mludvig@suse.cz>
 600
 601         * i386-dis.c (GRPPADLCK): Renamed to GRPPADLCK1
 602         (GRPPADLCK2): New define.
 603         (twobyte_has_modrm): True for 0xA6.
 604         (grps): GRPPADLCK2 for opcode 0xA6.
 605
 606 2004-07-29  Alexandre Oliva  <aoliva@redhat.com>
 607
 608         Introduce SH2a support.
 609         * sh-opc.h (arch_sh2a_base): Renumber.
 610         (arch_sh2a_nofpu_base): Remove.
 611         (arch_sh_base_mask): Adjust.
 612         (arch_opann_mask): New.
 613         (arch_sh2a, arch_sh2a_nofpu): Adjust.
 614         (arch_sh2a_up, arch_sh2a_nofpu_up): Likewise.
 615         (sh_table): Adjust whitespace.
 616         2004-02-24  Corinna Vinschen  <vinschen@redhat.com>
 617         * sh-opc.h (arch_sh2a_nofpu_up): New.  Use instead of arch_sh2a_up in
 618         instruction list throughout.
 619         (arch_sh2a_up): Redefine to include fpu instruction set.  Use instead
 620         of arch_sh2a in instruction list throughout.
 621         (arch_sh2e_up): Accomodate above changes.
 622         (arch_sh2_up): Ditto.
 623         2004-02-20  Corinna Vinschen  <vinschen@redhat.com>
 624         * sh-opc.h: Add arch_sh2a_nofpu to arch_sh2_up.
 625         2004-02-18  Corinna Vinschen  <vinschen@redhat.com>
 626         * sh-dis.c (print_insn_sh): Add bfd_mach_sh2a_nofpu handling.
 627         * sh-opc.h (arch_sh2a_nofpu): New.
 628         (arch_sh2a_up): New, defines sh2a and sh2a_nofpu.
 629         (sh_table): Change all arch_sh2a to arch_sh2a_up unless FPU
 630         instruction.
 631         2004-01-20  DJ Delorie  <dj@redhat.com>
 632         * sh-dis.c (print_insn_sh): SH2A does not have 'X' fp regs.
 633         2003-12-29  DJ Delorie  <dj@redhat.com>
 634         * sh-opc.c (sh_nibble_type, sh_arg_type, arch_2a, arch_2e_up,
 635         sh_opcode_info, sh_table): Add sh2a support.
 636         (arch_op32): New, to tag 32-bit opcodes.
 637         * sh-dis.c (print_insn_sh): Support sh2a opcodes.
 638         2003-12-02  Michael Snyder  <msnyder@redhat.com>
 639         * sh-opc.h (arch_sh2a): Add.
 640         * sh-dis.c (arch_sh2a): Handle.
 641         * sh-opc.h (arch_sh2_up): Fix up to include arch_sh2a.
 642
 643 2004-07-27  Tomer Levi  <Tomer.Levi@nsc.com>
 644
 645         * crx-opc.c: Add popx,pushx insns. Indent code, fix comments.
 646
 647 2004-07-22  Nick Clifton  <nickc@redhat.com>
 648
 649         PR/280
 650         * h8300-dis.c (bfd_h8_disassemble): Do not dump raw bytes for the
 651         insns - this is done by objdump itself.
 652         * h8500-dis.c (print_insn_h8500): Likewise.
 653
 654 2004-07-21  Jan Beulich <jbeulich@novell.com>
 655
 656         * i386-dis.c (OP_E): Show rip-relative addressing in 64-bit mode
 657         regardless of address size prefix in effect.
 658         (ptr_reg): Size or address registers does not depend on rex64, but
 659         on the presence of an address size override.
 660         (OP_MMX): Use rex.x only for xmm registers.
 661         (OP_EM): Use rex.z only for xmm registers.
 662
 663 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 664
 665         * mips-opc.c (mips_builtin_opcodes): Move coprocessor 2
 666         move/branch operations to the bottom so that VR5400 multimedia
 667         instructions take precedence in disassembly.
 668
 669 2004-07-20  Maciej W. Rozycki  <macro@linux-mips.org>
 670
 671         * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
 672         ISA-specific "break" encoding.
 673
 674 2004-07-13  Elvis Chiang  <elvisfb@gmail.com>
 675
 676         * arm-opc.h: Fix typo in comment.
 677
 678 2004-07-11  Andreas Schwab  <schwab@suse.de>
 679
 680         * m68k-dis.c (m68k_valid_ea): Fix typos in last change.
 681
 682 2004-07-09  Andreas Schwab  <schwab@suse.de>
 683
 684         * m68k-dis.c (m68k_valid_ea): Check validity of all codes.
 685
 686 2004-07-07  Tomer Levi  <Tomer.Levi@nsc.com>
 687
 688         * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c.
 689         (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo.
 690         (crx-dis.lo): New target.
 691         (crx-opc.lo): Likewise.
 692         * Makefile.in: Regenerate.
 693         * configure.in: Handle bfd_crx_arch.
 694         * configure: Regenerate.
 695         * crx-dis.c: New file.
 696         * crx-opc.c: New file.
 697         * disassemble.c (ARCH_crx): Define.
 698         (disassembler): Handle ARCH_crx.
 699
 700 2004-06-29  James E Wilson  <wilson@specifixinc.com>
 701
 702         * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds.
 703         * ia64-asmtab.c: Regnerate.
 704
 705 2004-06-28  Alan Modra  <amodra@bigpond.net.au>
 706
 707         * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf.
 708         (extract_fxm): Don't test dialect.
 709         (XFXFXM_MASK): Include the power4 bit.
 710         (XFXM): Add p4 param.
 711         (powerpc_opcodes): Add mfocrf and mtocrf.  Adjust mtcr.
 712
 713 2004-06-27  Alexandre Oliva  <aoliva@redhat.com>
 714
 715         2003-07-21  Richard Sandiford  <rsandifo@redhat.com>
 716         * disassemble.c (disassembler): Handle bfd_mach_h8300sxn.
 717
 718 2004-06-26  Alan Modra  <amodra@bigpond.net.au>
 719
 720         * ppc-opc.c (BH, XLBH_MASK): Define.
 721         (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl.
 722
 723 2004-06-24  Alan Modra  <amodra@bigpond.net.au>
 724
 725         * i386-dis.c (x_mode): Comment.
 726         (two_source_ops): File scope.
 727         (float_mem): Correct fisttpll and fistpll.
 728         (float_mem_mode): New table.
 729         (dofloat): Use it.
 730         (OP_E): Correct intel mode PTR output.
 731         (ptr_reg): Use open_char and close_char.
 732         (PNI_Fixup): Handle possible suffix on sidt.  Use op1out etc. for
 733         operands.  Set two_source_ops.
 734
 735 2004-06-15  Alan Modra  <amodra@bigpond.net.au>
 736
 737         * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size
 738         instead of _raw_size.
 739
 740 2004-06-08  Jakub Jelinek  <jakub@redhat.com>
 741
 742         * ia64-gen.c (in_iclass): Handle more postinc st
 743         and ld variants.
 744         * ia64-asmtab.c: Rebuilt.
 745
 746 2004-06-01  Martin Schwidefsky  <schwidefsky@de.ibm.com>
 747
 748         * s390-opc.txt: Correct architecture mask for some opcodes.
 749         lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available
 750         in the esa mode as well.
 751
 752 2004-05-28  Andrew Stubbs <andrew.stubbs@superh.com>
 753
 754         * sh-dis.c (target_arch): Make unsigned.
 755         (print_insn_sh): Replace (most of) switch with a call to
 756         sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
 757         * sh-opc.h: Redefine architecture flags values.
 758         Add sh3-nommu architecture.
 759         Reorganise <arch>_up macros so they make more visual sense.
 760         (SH_MERGE_ARCH_SET): Define new macro.
 761         (SH_VALID_BASE_ARCH_SET): Likewise.
 762         (SH_VALID_MMU_ARCH_SET): Likewise.
 763         (SH_VALID_CO_ARCH_SET): Likewise.
 764         (SH_VALID_ARCH_SET): Likewise.
 765         (SH_MERGE_ARCH_SET_VALID): Likewise.
 766         (SH_ARCH_SET_HAS_FPU): Likewise.
 767         (SH_ARCH_SET_HAS_DSP): Likewise.
 768         (SH_ARCH_UNKNOWN_ARCH): Likewise.
 769         (sh_get_arch_from_bfd_mach): Add prototype.
 770         (sh_get_arch_up_from_bfd_mach): Likewise.
 771         (sh_get_bfd_mach_from_arch_set): Likewise.
 772         (sh_merge_bfd_arc): Likewise.
 773
 774 2004-05-24  Peter Barada  <peter@the-baradas.com>
 775
 776         * m68k-dis.c(print_insn_m68k): Strip body of diassembly out
 777         into new match_insn_m68k function.  Loop over canidate
 778         matches and select first that completely matches.
 779         * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit.
 780         * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea
 781         to verify addressing for MAC/EMAC.
 782         * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC
 783         reigster halves since 'fpu' and 'spl' look misleading.
 784         * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases.
 785         * m68k-opc.c: Rearragne mac/emac cases to use longest for
 786         first, tighten up match masks.
 787         * m68k-opc.c: Add 'size' field to struct m68k_opcode.  Produce
 788         'size' from special case code in print_insn_m68k to
 789         determine decode size of insns.
 790
 791 2004-05-19  Alan Modra  <amodra@bigpond.net.au>
 792
 793         * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as
 794         well as when -mpower4.
 795
 796 2004-05-13  Nick Clifton  <nickc@redhat.com>
 797
 798         * po/fr.po: Updated French translation.
 799
 800 2004-05-05  Peter Barada  <peter@the-baradas.com>
 801
 802         * m68k-dis.c(print_insn_m68k): Add new chips, use core
 803         variants in arch_mask.  Only set m68881/68851 for 68k chips.
 804         * m68k-op.c: Switch from ColdFire chips to core variants.
 805
 806 2004-05-05  Alan Modra  <amodra@bigpond.net.au>
 807
 808         PR 147.
 809         * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC.
 810
 811 2004-04-29  Ben Elliston  <bje@au.ibm.com>
 812
 813         * ppc-opc.c (XCMPL): Renmame to XOPL. Update users.
 814         (powerpc_opcodes): Add "dbczl" instruction for PPC970.
 815
 816 2004-04-22  Kaz Kojima  <kkojima@rr.iij4u.or.jp>
 817
 818         * sh-dis.c (print_insn_sh): Print the value in constant pool
 819         as a symbol if it looks like a symbol.
 820
 821 2004-04-22  Peter Barada <peter@the-baradas.com>
 822
 823         * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on
 824         appropriate ColdFire architectures.
 825         (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC
 826         mask addressing.
 827         Add EMAC instructions, fix MAC instructions. Remove
 828         macmw/macml/msacmw/msacml instructions since mask addressing now
 829         supported.
 830
 831 2004-04-20  Jakub Jelinek  <jakub@redhat.com>
 832
 833         * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define.
 834         (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to
 835         suffix.  Use fmov*x macros, create all 3 fpsize variants in one
 836         macro.  Adjust all users.
 837
 838 2004-04-15  Anil Paranjpe  <anilp1@kpitcummins.com>
 839
 840         * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs"
 841         separately.
 842
 843 2004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
 844
 845         * m32r-asm.c: Regenerate.
 846
 847 2004-03-29  Stan Shebs  <shebs@apple.com>
 848
 849         * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer
 850         used.
 851
 852 2004-03-19  Alan Modra  <amodra@bigpond.net.au>
 853
 854         * aclocal.m4: Regenerate.
 855         * config.in: Regenerate.
 856         * configure: Regenerate.
 857         * po/POTFILES.in: Regenerate.
 858         * po/opcodes.pot: Regenerate.
 859
 860 2004-03-16  Alan Modra  <amodra@bigpond.net.au>
 861
 862         * ppc-dis.c (print_insn_powerpc): Don't print tabs.  Handle
 863         PPC_OPERANDS_GPR_0.
 864         * ppc-opc.c (RA0): Define.
 865         (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0.
 866         (RAOPT): Rename from RAO.  Update all uses.
 867         (powerpc_opcodes): Use RA0 as appropriate.
 868
 869 2004-03-15  Aldy Hernandez  <aldyh@redhat.com>
 870
 871         * ppc-opc.c (powerpc_opcodes): Add BOOKE versions of mfsprg.
 872
 873 2004-03-15  Alan Modra  <amodra@bigpond.net.au>
 874
 875         * sparc-dis.c (print_insn_sparc): Update getword prototype.
 876
 877 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 878
 879         * i386-dis.c (GRPPLOCK): Delete.
 880         (grps): Delete GRPPLOCK entry.
 881
 882 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 883
 884         * i386-dis.c (OP_M, OP_0f0e, OP_0fae, NOP_Fixup): New functions.
 885         (M, Mp): Use OP_M.
 886         (None, PADLOCK_SPECIAL, PADLOCK_0): Delete.
 887         (GRPPADLCK): Define.
 888         (dis386): Use NOP_Fixup on "nop".
 889         (dis386_twobyte): Use GRPPADLCK on opcode 0xa7.
 890         (twobyte_has_modrm): Set for 0xa7.
 891         (padlock_table): Delete.  Move to..
 892         (grps): ..here, using OP_0f07.  Use OP_Ofae on lfence, mfence
 893         and clflush.
 894         (print_insn): Revert PADLOCK_SPECIAL code.
 895         (OP_E): Delete sfence, lfence, mfence checks.
 896
 897 2004-03-12  Jakub Jelinek  <jakub@redhat.com>
 898
 899         * i386-dis.c (grps): Use INVLPG_Fixup instead of OP_E for invlpg.
 900         (INVLPG_Fixup): New function.
 901         (PNI_Fixup): Remove ATTRIBUTE_UNUSED from sizeflag.
 902
 903 2004-03-12  Michal Ludvig  <mludvig@suse.cz>
 904
 905         * i386-dis.c (PADLOCK_SPECIAL, PADLOCK_0): New defines.
 906         (dis386_twobyte): Opcode 0xa7 is PADLOCK_0.
 907         (padlock_table): New struct with PadLock instructions.
 908         (print_insn): Handle PADLOCK_SPECIAL.
 909
 910 2004-03-12  Alan Modra  <amodra@bigpond.net.au>
 911
 912         * i386-dis.c (grps): Use clflush by default for 0x0fae/7.
 913         (OP_E): Twiddle clflush to sfence here.
 914
 915 2004-03-08  Nick Clifton  <nickc@redhat.com>
 916
 917         * po/de.po: Updated German translation.
 918
 919 2003-03-03  Andrew Stubbs  <andrew.stubbs@superh.com>
 920
 921         * sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
 922         nofpu mode.  Add BFD type bfd_mach_sh4_nommu_nofpu.
 923         * sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
 924         accordingly.
 925
 926 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 927
 928         * frv-asm.c: Regenerate.
 929         * frv-desc.c: Regenerate.
 930         * frv-desc.h: Regenerate.
 931         * frv-dis.c: Regenerate.
 932         * frv-ibld.c: Regenerate.
 933         * frv-opc.c: Regenerate.
 934         * frv-opc.h: Regenerate.
 935
 936 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 937
 938         * frv-desc.c, frv-opc.c: Regenerate.
 939
 940 2004-03-01  Richard Sandiford  <rsandifo@redhat.com>
 941
 942         * frv-desc.c, frv-opc.c, frv-opc.h: Regenerate.
 943
 944 2004-02-26  Andrew Stubbs  <andrew.stubbs@superh.com>
 945
 946         * sh-opc.h: Move fsca and fsrra instructions from sh4a to sh4.
 947         Also correct mistake in the comment.
 948
 949 2004-02-26  Andrew Stubbs <andrew.stubbs@superh.com>
 950
 951         * sh-dis.c (print_insn_sh): Add REG_N_D nibble type to
 952         ensure that double registers have even numbers.
 953         Add REG_N_B01 for nn01 (binary 01) nibble to ensure
 954         that reserved instruction 0xfffd does not decode the same
 955         as 0xfdfd (ftrv).
 956         * sh-opc.h: Add REG_N_D nibble type and use it whereever
 957         REG_N refers to a double register.
 958         Add REG_N_B01 nibble type and use it instead of REG_NM
 959         in ftrv.
 960         Adjust the bit patterns in a few comments.
 961
 962 2004-02-25  Aldy Hernandez  <aldyh@redhat.com>
 963
 964         * ppc-opc.c (powerpc_opcodes): Change mask for dcbt and dcbtst.
 965
 966 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 967
 968         * ppc-opc.c (powerpc_opcodes): Move mfmcsrr0 before mfdc_dat.
 969
 970 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 971
 972         * ppc-opc.c (powerpc_opcodes): Add m*ivor35.
 973
 974 2004-02-20  Aldy Hernandez  <aldyh@redhat.com>
 975
 976         * ppc-opc.c (powerpc_opcodes): Add mfivor32, mfivor33, mfivor34,
 977         mtivor32, mtivor33, mtivor34.
 978
 979 2004-02-19  Aldy Hernandez  <aldyh@redhat.com>
 980
 981         * ppc-opc.c (powerpc_opcodes): Add mfmcar.
 982
 983 2004-02-10  Petko Manolov  <petkan@nucleusys.com>
 984
 985         * arm-opc.h Maverick accumulator register opcode fixes.
 986
 987 2004-02-13  Ben Elliston  <bje@wasabisystems.com>
 988
 989         * m32r-dis.c: Regenerate.
 990
 991 2004-01-27  Michael Snyder  <msnyder@redhat.com>
 992
 993         * sh-opc.h (sh_table): "fsrra", not "fssra".
 994
 995 2004-01-23  Andrew Over <andrew.over@cs.anu.edu.au>
 996
 997         * sparc-opc.c (fdtox, fstox, fqtox, fxtod, fxtos, fxtoq): Tighten
 998         contraints.
 999
1000 2004-01-19  Andrew Over  <andrew.over@cs.anu.edu.au>
1001
1002         * sparc-opc.c (sparc_opcodes) <f[dsq]tox, fxto[dsq]>: Fix args.
1003
1004 2004-01-19  Alan Modra  <amodra@bigpond.net.au>
1005
1006         * i386-dis.c (OP_E): Print scale factor on intel mode sib when not
1007         1.  Don't print scale factor on AT&T mode when index missing.
1008
1009 2004-01-16  Alexandre Oliva  <aoliva@redhat.com>
1010
1011         * m10300-opc.c (mov): 8- and 24-bit immediates are zero-extended
1012         when loaded into XR registers.
1013
1014 2004-01-14  Richard Sandiford  <rsandifo@redhat.com>
1015
1016         * frv-desc.h: Regenerate.
1017         * frv-desc.c: Regenerate.
1018         * frv-opc.c: Regenerate.
1019
1020 2004-01-13  Michael Snyder  <msnyder@redhat.com>
1021
1022         * sh-dis.c (print_insn_sh): Allocate 4 bytes for insn.
1023
1024 2004-01-09  Paul Brook  <paul@codesourcery.com>
1025
1026         * arm-opc.h (arm_opcodes): Move generic mcrr after known
1027         specific opcodes.
1028
1029 2004-01-07  Daniel Jacobowitz  <drow@mvista.com>
1030
1031         * Makefile.am (libopcodes_la_DEPENDENCIES)
1032         (libopcodes_la_LIBADD): Revert 2003-05-17 change.  Add explanatory
1033         comment about the problem.
1034         * Makefile.in: Regenerate.
1035
1036 2004-01-06  Alexandre Oliva  <aoliva@redhat.com>
1037
1038         2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
1039         * frv-asm.c (parse_ulo16, parse_uhi16, parse_d12): Fix some
1040         cut&paste errors in shifting/truncating numerical operands.
1041         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1042         * frv-asm.c (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1043         (parse_uslo16): Likewise.
1044         (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1045         (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1046         (parse_s12): Likewise.
1047         2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
1048         * frv-asm.c (parse_ulo16): Parse gotlo and gotfuncdesclo.
1049         (parse_uslo16): Likewise.
1050         (parse_uhi16): Parse gothi and gotfuncdeschi.
1051         (parse_d12): Parse got12 and gotfuncdesc12.
1052         (parse_s12): Likewise.
1053
1054 2004-01-02  Albert Bartoszko  <albar@nt.kegel.com.pl>
1055
1056         * msp430-dis.c (msp430_doubleoperand): Check for an 'add'
1057         instruction which looks similar to an 'rla' instruction.
1058
1059 For older changes see ChangeLog-0203
1060 \f
1061 Local Variables:
1062 mode: change-log
1063 left-margin: 8
1064 fill-column: 74
1065 version-control: never
1066 End: