opcodes/ChangeLog

   1 2010-09-27  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
   2
   3         * s390-mkopc.c (enum s390_opcde_cpu_val): Add S390_OPCODE_Z196.
   4         (main): Recognize the new CPU string.
   5         * s390-opc.c: Add new instruction formats and masks.
   6         * s390-opc.txt: Add new z196 instructions.
   7
   8 2010-09-27  Andreas Krebbel  <Andreas.Krebbel@de.ibm.com>
   9
  10         * s390-dis.c (print_insn_s390): Pick instruction with most
  11         specific mask.
  12         * s390-opc.c: Add unused bits to the insn mask.
  13         * s390-opc.txt: Reorder some instructions to prefer more recent
  14         versions.
  15
  16 2010-09-27  Tejas Belagod  <tejas.belagod@arm.com>
  17
  18         * arm_dis.c (print_insn_coprocessor): Apply off-by-alignment
  19         correction to unaligned PCs while printing comment.
  20
  21 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  22
  23         * arm-dis.c (arm_opcodes): Add Virtualiztion Extensions support.
  24         (thumb32_opcodes): Likewise.
  25         (banked_regname): New function.
  26         (print_insn_arm): Add Virtualization Extensions support.
  27         (print_insn_thumb32): Likewise.
  28
  29 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  30
  31         * arm-dis.c (arm_opcodes): Support disassembly of UDIV and SDIV in
  32         ARM state.
  33
  34 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  35
  36         * arm-dis.c (arm_opcodes): SMC implies Security Extensions.
  37         (thumb32_opcodes): Likewise.
  38
  39 2010-09-23  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
  40
  41         * arm-dis.c (arm_opcodes): Add support for pldw.
  42         (thumb32_opcodes): Likewise.
  43
  44 2010-09-22  Robin Getz  <robin.getz@analog.com>
  45
  46         * bfin-dis.c (fmtconst): Cast address to 32bits.
  47
  48 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  49
  50         * bfin-dis.c (decode_REGMV_0): Rewrite valid combo checks.
  51
  52 2010-09-22  Robin Getz  <robin.getz@analog.com>
  53
  54         * bfin-dis.c (decode_ProgCtrl_0): Check for parallel insns.
  55         Reject P6/P7 to TESTSET.
  56         (decode_PushPopReg_0): Check for parallel insns.  Reject pushing
  57         SP onto the stack.
  58         (decode_PushPopMultiple_0): Check for parallel insns.  Make sure
  59         P/D fields match all the time.
  60         (decode_CCflag_0): Check for parallel insns.  Verify x/y fields
  61         are 0 for accumulator compares.
  62         (decode_CC2stat_0): Check for parallel insns.  Reject CC<op>CC.
  63         (decode_CaCTRL_0, decode_ccMV_0, decode_CC2dreg_0, decode_BRCC_0,
  64         decode_UJUMP_0, decode_LOGI2op_0, decode_COMPI2opD_0,
  65         decode_COMPI2opP_0, decode_LoopSetup_0, decode_LDIMMhalf_0,
  66         decode_CALLa_0, decode_linkage_0, decode_pseudoDEBUG_0,
  67         decode_pseudoOChar_0, decode_pseudodbg_assert_0): Check for parallel
  68         insns.
  69         (decode_dagMODim_0): Verify br field for IREG ops.
  70         (decode_LDST_0): Reject preg load into same preg.
  71         (_print_insn_bfin): Handle returns for ILLEGAL decodes.
  72         (print_insn_bfin): Likewise.
  73
  74 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  75
  76         * bfin-dis.c (decode_PushPopMultiple_0): Return 0 when pr > 5.
  77
  78 2010-09-22  Robin Getz  <robin.getz@analog.com>
  79
  80         * bfin-dis.c (decode_dsp32shiftimm_0): Add missing "S" flag.
  81
  82 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  83
  84         * bfin-dis.c (decode_CC2stat_0): Decode all ASTAT bits.
  85
  86 2010-09-22  Robin Getz  <robin.getz@analog.com>
  87
  88         * bfin-dis.c (IS_DREG, IS_PREG, IS_GENREG, IS_DAGREG): Reject
  89         register values greater than 8.
  90         (IS_RESERVEDREG, allreg, mostreg): New helpers.
  91         (decode_ProgCtrl_0): Call IS_DREG/IS_PREG as appropriate.
  92         (decode_PushPopReg_0): Call mostreg/allreg as appropriate.
  93         (decode_CC2dreg_0): Check valid CC register number.
  94
  95 2010-09-22  Robin Getz  <robin.getz@analog.com>
  96
  97         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after DBG.
  98
  99 2010-09-22  Robin Getz  <robin.getz@analog.com>
 100
 101         * bfin-dis.c (machine_registers): Add AC0_COPY, V_COPY, and RND_MOD.
 102         (reg_names): Likewise.
 103         (decode_statbits): Likewise; while reformatting to make manageable.
 104
 105 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 106
 107         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after OUTC.
 108         (decode_pseudoOChar_0): New function.
 109         (_print_insn_bfin): Remove #if 0 and call new decode_pseudoOChar_0.
 110
 111 2010-09-22  Robin Getz  <robin.getz@analog.com>
 112
 113         * bfin-dis.c (decode_dsp32shift_0): Decode sub opcodes 2/2 as
 114         LSHIFT instead of SHIFT.
 115
 116 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 117
 118         * bfin-dis.c (constant_formats): Constify the whole structure.
 119         (fmtconst): Add const to return value.
 120         (reg_names): Mark const.
 121         (decode_multfunc): Mark s0/s1 as const.
 122         (decode_macfunc): Mark a/sop as const.
 123
 124 2010-09-17  Tejas Belagod  <tejas.belagod@arm.com>
 125
 126         * arm_dis.c (coprocessor_opcodes): Add MRC entry for APSR_nzcv.
 127
 128 2010-09-14  Maciej W. Rozycki  <macro@codesourcery.com>
 129
 130         * mips-opc.c (mips_builtin_opcodes): Add "sync_acquire",
 131         "sync_mb", "sync_release", "sync_rmb" and "sync_wmb".
 132
 133 2010-09-10  Pierre Muller  <muller@ics.u-strasbg.fr>
 134
 135         * src/opcodes/dlx-dis.c (print_insn_dlx): Use dlx_insn type for
 136         dlx_insn_type array.
 137
 138 2010-08-31  H.J. Lu  <hongjiu.lu@intel.com>
 139
 140         PR binutils/11960
 141         * i386-dis.c (sIv): New.
 142         (dis386): Replace Iq with sIv on "pushT".
 143         (reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT.
 144         (x86_64_table): Replace {T|}/{P|} with P.
 145         (putop): Add 'w' to 'T'/'P' if needed for Intel syntax.
 146         (OP_sI): Update v_mode.  Remove w_mode.
 147
 148 2010-08-27  Nathan Froyd  <froydnj@codesourcery.com>
 149
 150         * ppc-opc.c (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate
 151         on E500 and E500MC.
 152
 153 2010-08-17  H.J. Lu  <hongjiu.lu@intel.com>
 154
 155         * i386-dis.c (reg_table): Replace Eb with Mb on prefetch and
 156         prefetchw.
 157
 158 2010-08-06  Quentin Neill <quentin.neill@amd.com>
 159
 160         * i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
 161         to processor flags for PENTIUMPRO processors and later.
 162         * i386-opc.h (enum): Add CpuNop.
 163         (i386_cpu_flags): Add cpunop bit.
 164         * i386-opc.tbl: Change nop cpu_flags.
 165         * i386-init.h: Regenerated.
 166         * i386-tbl.h: Likewise.
 167
 168 2010-08-06  Quentin Neill <quentin.neill@amd.com>
 169
 170         * i386-opc.h (enum): Fix typos in comments.
 171
 172 2010-08-06  Alan Modra  <amodra@gmail.com>
 173
 174         * disassemble.c: Formatting.
 175         (disassemble_init_for_target <ARCH_m32c>): Comment on endian.
 176
 177 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
 178
 179         * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
 180         * i386-tbl.h: Regenerated.
 181
 182 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
 183
 184         * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
 185
 186         * i386-opc.tbl: Add ud1.  Remove Cpu686 from ud2/ud2a/ud2b.
 187         * i386-tbl.h: Regenerated.
 188
 189 2010-07-29  DJ Delorie  <dj@redhat.com>
 190
 191         * rx-decode.opc (SRR): New.
 192         (rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
 193         r0,r0) and NOP3 (max r0,r0) special cases.
 194         * rx-decode.c: Regenerate.
 195
 196 2010-07-28  H.J. Lu  <hongjiu.lu@intel.com>
 197
 198         * i386-dis.c: Add 0F to VEX opcode enums.
 199
 200 2010-07-27  DJ Delorie  <dj@redhat.com>
 201
 202         * rx-decode.opc (store_flags): Remove, replace with F_* macros.
 203         (rx_decode_opcode): Likewise.
 204         * rx-decode.c: Regenerate.
 205
 206 2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
 207             Ina Pandit  <ina.pandit@kpitcummins.com>
 208
 209         * v850-dis.c (v850_sreg_names): Updated structure for system
 210         registers.
 211         (float_cc_names): new structure for condition codes.
 212         (print_value): Update the function that prints value.
 213         (get_operand_value): New function to get the operand value.
 214         (disassemble): Updated to handle the disassembly of instructions.
 215         (print_insn_v850): Updated function to print instruction for different
 216         families.
 217         * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
 218         extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
 219         extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
 220         insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
 221         extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
 222         extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
 223         extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
 224         insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
 225         (insert_d8_7, insert_d5_4, insert_i5div): Remove.
 226         (v850_operands): Update with the relocation name. Also update
 227         the instructions with specific set of processors.
 228
 229 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
 230
 231         * arm-dis.c (print_insn_arm): Add cases for printing more
 232         symbolic operands.
 233         (print_insn_thumb32): Likewise.
 234
 235 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 236
 237         * mips-dis.c (print_insn_mips): Correct branch instruction type
 238         determination.
 239
 240 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 241
 242         * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
 243         type and delay slot determination.
 244         (print_insn_mips16): Extend branch instruction type and delay
 245         slot determination to cover all instructions.
 246         * mips16-opc.c (BR): Remove macro.
 247         (UBR, CBR): New macros.
 248         (mips16_opcodes): Update branch annotation for "b", "beqz",
 249         "bnez", "bteqz" and "btnez".  Add branch annotation for "jalrc"
 250         and "jrc".
 251
 252 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 253
 254         AVX Programming Reference (June, 2010)
 255         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
 256         * i386-opc.tbl: Likewise.
 257         * i386-tbl.h: Regenerated.
 258
 259 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 260
 261         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
 262
 263 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
 264
 265         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
 266         ppc_cpu_t before inverting.
 267         (ppc_parse_cpu): Likewise.
 268         (print_insn_powerpc): Likewise.
 269
 270 2010-07-03  Alan Modra  <amodra@gmail.com>
 271
 272         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
 273         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
 274         (PPC64, MFDEC2): Update.
 275         (NON32, NO371): Define.
 276         (powerpc_opcode): Update to not use old opcode flags, and avoid
 277         -m601 duplicates.
 278
 279 2010-07-03  DJ Delorie  <dj@delorie.com>
 280
 281         * m32c-ibld.c: Regenerate.
 282
 283 2010-07-03  Alan Modra  <amodra@gmail.com>
 284
 285         * ppc-opc.c (PWR2COM): Define.
 286         (PPCPWR2): Add PPC_OPCODE_COMMON.
 287         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
 288         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
 289         "rac" from -mcom.
 290
 291 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
 292
 293         AVX Programming Reference (June, 2010)
 294         * i386-dis.c (PREFIX_0FAE_REG_0): New.
 295         (PREFIX_0FAE_REG_1): Likewise.
 296         (PREFIX_0FAE_REG_2): Likewise.
 297         (PREFIX_0FAE_REG_3): Likewise.
 298         (PREFIX_VEX_3813): Likewise.
 299         (PREFIX_VEX_3A1D): Likewise.
 300         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 301         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
 302         PREFIX_VEX_3A1D.
 303         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
 304         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 305         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
 306
 307         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
 308         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
 309         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
 310
 311         * i386-opc.h (CpuXsaveopt): New.
 312         (CpuFSGSBase): Likewise.
 313         (CpuRdRnd): Likewise.
 314         (CpuF16C): Likewise.
 315         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
 316         cpuf16c.
 317
 318         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
 319         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
 320         * i386-init.h: Regenerated.
 321         * i386-tbl.h: Likewise.
 322
 323 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 324
 325         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
 326         and mtocrf on EFS.
 327
 328 2010-06-29  Alan Modra  <amodra@gmail.com>
 329
 330         * maxq-dis.c: Delete file.
 331         * Makefile.am: Remove references to maxq.
 332         * configure.in: Likewise.
 333         * disassemble.c: Likewise.
 334         * Makefile.in: Regenerate.
 335         * configure: Regenerate.
 336         * po/POTFILES.in: Regenerate.
 337
 338 2010-06-29  Alan Modra  <amodra@gmail.com>
 339
 340         * mep-dis.c: Regenerate.
 341
 342 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 343
 344         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
 345
 346 2010-06-27  Alan Modra  <amodra@gmail.com>
 347
 348         * arc-dis.c (arc_sprintf): Delete set but unused variables.
 349         (decodeInstr): Likewise.
 350         * dlx-dis.c (print_insn_dlx): Likewise.
 351         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 352         * maxq-dis.c (check_move, print_insn): Likewise.
 353         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 354         * msp430-dis.c (msp430_branchinstr): Likewise.
 355         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 356         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 357         * sparc-dis.c (print_insn_sparc): Likewise.
 358         * fr30-asm.c: Regenerate.
 359         * frv-asm.c: Regenerate.
 360         * ip2k-asm.c: Regenerate.
 361         * iq2000-asm.c: Regenerate.
 362         * lm32-asm.c: Regenerate.
 363         * m32c-asm.c: Regenerate.
 364         * m32r-asm.c: Regenerate.
 365         * mep-asm.c: Regenerate.
 366         * mt-asm.c: Regenerate.
 367         * openrisc-asm.c: Regenerate.
 368         * xc16x-asm.c: Regenerate.
 369         * xstormy16-asm.c: Regenerate.
 370
 371 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 372
 373         PR gas/11673
 374         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 375
 376 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 377
 378         PR binutils/11676
 379         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 380
 381 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 382
 383         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 384         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 385         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 386         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 387         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 388         Treat lwsync as msync on e500.
 389
 390 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 391
 392         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 393
 394 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 395
 396         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 397         constants is the same on 32-bit and 64-bit hosts.
 398
 399 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 400
 401         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 402         .short directives so that they can be reassembled.
 403
 404 2010-05-26  Catherine Moore <clm@codesourcery.com>
 405             David Ung  <davidu@mips.com>
 406
 407         * mips-opc.c: Change membership to I1 for instructions ssnop and
 408         ehb.
 409
 410 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 411
 412         * i386-dis.c (sib): New.
 413         (get_sib): Likewise.
 414         (print_insn): Call get_sib.
 415         OP_E_memory): Use sib.
 416
 417 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 418
 419         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 420         * mips-opc.c (I16): Remove.
 421         (mips_builtin_op): Reclassify jalx.
 422
 423 2010-05-19  Alan Modra  <amodra@gmail.com>
 424
 425         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 426         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 427
 428 2010-05-13  Alan Modra  <amodra@gmail.com>
 429
 430         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 431
 432 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 433
 434         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 435         format.
 436         (print_insn_thumb16): Add support for new %W format.
 437
 438 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 439
 440         * Makefile.in: Regenerate with automake 1.11.1.
 441         * aclocal.m4: Ditto.
 442
 443 2010-05-05  Nick Clifton  <nickc@redhat.com>
 444
 445         * po/es.po: Updated Spanish translation.
 446
 447 2010-04-22  Nick Clifton  <nickc@redhat.com>
 448
 449         * po/opcodes.pot: Updated by the Translation project.
 450         * po/vi.po: Updated Vietnamese translation.
 451
 452 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 453
 454         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 455         bits in opcode.
 456
 457 2010-04-09  Nick Clifton  <nickc@redhat.com>
 458
 459         * i386-dis.c (print_insn): Remove unused variable op.
 460         (OP_sI): Remove unused variable mask.
 461
 462 2010-04-07  Alan Modra  <amodra@gmail.com>
 463
 464         * configure: Regenerate.
 465
 466 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 467
 468         * ppc-opc.c (RBOPT): New define.
 469         ("dccci"): Enable for PPCA2.  Make operands optional.
 470         ("iccci"): Likewise.  Do not deprecate for PPC476.
 471
 472 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 473
 474         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 475
 476 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 477
 478         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 479         * Makefile.in: Regenerate.
 480         * configure.in (bfd_tic6x_arch): New.
 481         * configure: Regenerate.
 482         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 483         (disassembler): Handle TI C6X.
 484         * tic6x-dis.c: New.
 485
 486 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 487
 488         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 489
 490 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 491
 492         * dis-buf.c (buffer_read_memory): Give error for reading just
 493         before the start of memory.
 494
 495 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 496             Quentin Neill <quentin.neill@amd.com>
 497
 498         * i386-dis.c (OP_LWP_I): Removed.
 499         (reg_table): Do not use OP_LWP_I, use Iq.
 500         (OP_LWPCB_E): Remove use of names16.
 501         (OP_LWP_E): Same.
 502         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 503         should not set the Vex.length bit.
 504         * i386-tbl.h: Regenerated.
 505
 506 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 507
 508         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 509
 510 2010-02-24  Nick Clifton  <nickc@redhat.com>
 511
 512         PR binutils/6773
 513         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 514         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 515         (thumb32_opcodes): Likewise.
 516
 517 2010-02-15  Nick Clifton  <nickc@redhat.com>
 518
 519         * po/vi.po: Updated Vietnamese translation.
 520
 521 2010-02-12  Doug Evans  <dje@sebabeach.org>
 522
 523         * lm32-opinst.c: Regenerate.
 524
 525 2010-02-11  Doug Evans  <dje@sebabeach.org>
 526
 527         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 528         (print_address): Delete CGEN_PRINT_ADDRESS.
 529         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 530         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 531         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 532         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 533
 534         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 535         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 536         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 537         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 538         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 539         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 540         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 541         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 542         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 543         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 544         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 545         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 546
 547 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 548
 549         * i386-dis.c: Update copyright.
 550         * i386-gen.c: Likewise.
 551         * i386-opc.h: Likewise.
 552         * i386-opc.tbl: Likewise.
 553
 554 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 555             Sebastian Pop  <sebastian.pop@amd.com>
 556
 557         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 558         function to handle 5th imm8 operand.
 559         (PREFIX_VEX_3A48): Added.
 560         (PREFIX_VEX_3A49): Added.
 561         (VEX_W_3A48_P_2): Added.
 562         (VEX_W_3A49_P_2): Added.
 563         (prefix table): Added entries for PREFIX_VEX_3A48
 564         and PREFIX_VEX_3A49.
 565         (vex table): Added entries for VEX_W_3A48_P_2 and
 566         and VEX_W_3A49_P_2.
 567         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 568         for Vec_Imm4 operands.
 569         * i386-opc.h (enum): Added Vec_Imm4.
 570         (i386_operand_type): Added vec_imm4.
 571         * i386-opc.tbl: Add entries for vpermilp[ds].
 572         * i386-init.h: Regenerated.
 573         * i386-tbl.h: Regenerated.
 574
 575 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 576
 577         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 578         and "pwr7".  Move "a2" into alphabetical order.
 579
 580 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 581
 582         * ppc-dis.c (ppc_opts): Add titan entry.
 583         * ppc-opc.c (TITAN, MULHW): Define.
 584         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 585
 586 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 587
 588         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 589         to CPU_BDVER1_FLAGS
 590         * i386-init.h: Regenerated.
 591
 592 2010-02-03  Anthony Green  <green@moxielogic.com>
 593
 594         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 595         0x0f, and make 0x00 an illegal instruction.
 596
 597 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 598
 599         * opcodes/arm-dis.c (struct arm_private_data): New.
 600         (print_insn_coprocessor, print_insn_arm): Update to use struct
 601         arm_private_data.
 602         (is_mapping_symbol, get_map_sym_type): New functions.
 603         (get_sym_code_type): Check the symbol's section.  Do not check
 604         mapping symbols.
 605         (print_insn): Default to disassembling ARM mode code.  Check
 606         for mapping symbols separately from other symbols.  Use
 607         struct arm_private_data.
 608
 609 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 610
 611         * i386-dis.c (EXVexWdqScalar): New.
 612         (vex_scalar_w_dq_mode): Likewise.
 613         (prefix_table): Update entries for PREFIX_VEX_3899,
 614         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 615         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 616         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 617         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 618         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 619         (OP_EX): Likewise.
 620
 621 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 622
 623         * i386-dis.c (XMScalar): New.
 624         (EXdScalar): Likewise.
 625         (EXqScalar): Likewise.
 626         (EXqScalarS): Likewise.
 627         (VexScalar): Likewise.
 628         (EXdVexScalarS): Likewise.
 629         (EXqVexScalarS): Likewise.
 630         (XMVexScalar): Likewise.
 631         (scalar_mode): Likewise.
 632         (d_scalar_mode): Likewise.
 633         (d_scalar_swap_mode): Likewise.
 634         (q_scalar_mode): Likewise.
 635         (q_scalar_swap_mode): Likewise.
 636         (vex_scalar_mode): Likewise.
 637         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 638         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 639         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 640         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 641         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 642         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 643         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 644         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 645         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 646         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 647         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 648         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 649         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 650         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 651         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 652         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 653         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 654         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 655         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 656         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 657         q_scalar_mode, q_scalar_swap_mode.
 658         (OP_XMM): Handle scalar_mode.
 659         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 660         and q_scalar_swap_mode.
 661         (OP_VEX): Handle vex_scalar_mode.
 662
 663 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 664
 665         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 666
 667 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 668
 669         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 670
 671 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 672
 673         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 674
 675 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 676
 677         * i386-dis.c (Bad_Opcode): New.
 678         (bad_opcode): Likewise.
 679         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 680         (dis386_twobyte): Likewise.
 681         (reg_table): Likewise.
 682         (prefix_table): Likewise.
 683         (x86_64_table): Likewise.
 684         (vex_len_table): Likewise.
 685         (vex_w_table): Likewise.
 686         (mod_table): Likewise.
 687         (rm_table): Likewise.
 688         (float_reg): Likewise.
 689         (reg_table): Remove trailing "(bad)" entries.
 690         (prefix_table): Likewise.
 691         (x86_64_table): Likewise.
 692         (vex_len_table): Likewise.
 693         (vex_w_table): Likewise.
 694         (mod_table): Likewise.
 695         (rm_table): Likewise.
 696         (get_valid_dis386): Handle bytemode 0.
 697
 698 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 699
 700         * i386-opc.h (VEXScalar): New.
 701
 702         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 703         instructions.
 704         * i386-tbl.h: Regenerated.
 705
 706 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 707
 708         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 709
 710         * i386-opc.tbl: Add xsave64 and xrstor64.
 711         * i386-tbl.h: Regenerated.
 712
 713 2010-01-20  Nick Clifton  <nickc@redhat.com>
 714
 715         PR 11170
 716         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 717         based post-indexed addressing.
 718
 719 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 720
 721         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 722         * i386-tbl.h: Regenerated.
 723
 724 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 725
 726         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 727         comments.
 728
 729 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 730
 731         * i386-dis.c (names_mm): New.
 732         (intel_names_mm): Likewise.
 733         (att_names_mm): Likewise.
 734         (names_xmm): Likewise.
 735         (intel_names_xmm): Likewise.
 736         (att_names_xmm): Likewise.
 737         (names_ymm): Likewise.
 738         (intel_names_ymm): Likewise.
 739         (att_names_ymm): Likewise.
 740         (print_insn): Set names_mm, names_xmm and names_ymm.
 741         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 742         (OP_XMM): Likewise.
 743         (OP_EM): Likewise.
 744         (OP_EMC): Likewise.
 745         (OP_MXC): Likewise.
 746         (OP_EX): Likewise.
 747         (XMM_Fixup): Likewise.
 748         (OP_VEX): Likewise.
 749         (OP_EX_VexReg): Likewise.
 750         (OP_Vex_2src): Likewise.
 751         (OP_Vex_2src_1): Likewise.
 752         (OP_Vex_2src_2): Likewise.
 753         (OP_REG_VexI4): Likewise.
 754
 755 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 756
 757         * i386-dis.c (print_insn): Update comments.
 758
 759 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 760
 761         * i386-dis.c (rex_original): Removed.
 762         (ckprefix): Remove rex_original.
 763         (print_insn): Update comments.
 764
 765 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 766
 767         * Makefile.in: Regenerate.
 768         * configure: Regenerate.
 769
 770 2010-01-07  Doug Evans  <dje@sebabeach.org>
 771
 772         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 773         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 774         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 775         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 776         * xstormy16-ibld.c: Regenerate.
 777
 778 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 779
 780         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 781         * i386-init.h: Regenerated.
 782
 783 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 784
 785         * arm-dis.c (print_insn): Fixed search for next symbol and data
 786         dumping condition, and the initial mapping symbol state.
 787
 788 2010-01-05  Doug Evans  <dje@sebabeach.org>
 789
 790         * cgen-ibld.in: #include "cgen/basic-modes.h".
 791         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 792         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 793         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 794         * xstormy16-ibld.c: Regenerate.
 795
 796 2010-01-04  Nick Clifton  <nickc@redhat.com>
 797
 798         PR 11123
 799         * arm-dis.c (print_insn_coprocessor): Initialise value.
 800
 801 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 802
 803         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 804
 805 2010-01-02  Doug Evans  <dje@sebabeach.org>
 806
 807         * cgen-asm.in: Update copyright year.
 808         * cgen-dis.in: Update copyright year.
 809         * cgen-ibld.in: Update copyright year.
 810         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 811         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 812         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 813         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 814         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 815         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 816         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 817         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 818         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 819         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 820         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 821         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 822         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 823         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 824         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 825         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 826         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 827         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 828         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 829         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 830         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 831
 832 For older changes see ChangeLog-2009
 833 \f
 834 Local Variables:
 835 mode: change-log
 836 left-margin: 8
 837 fill-column: 74
 838 version-control: never
 839 End: