opcodes/ChangeLog

   1 2020-01-17  H.J. Lu  <hongjiu.lu@intel.com>
   2
   3         * i386-opc.tbl: Add {vex} pseudo prefix.
   4         * i386-tbl.h: Regenerated.
   5
   6 2020-01-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
   7
   8         PR 25376
   9         * opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
  10         (neon_opcodes): Likewise.
  11         (select_arm_features): Make sure we enable MVE bits when selecting
  12         armv8.1-m.main.  Make sure we do not enable MVE bits when not selecting
  13         any architecture.
  14
  15 2020-01-16  Jan Beulich  <jbeulich@suse.com>
  16
  17         * i386-opc.tbl: Drop stale comment from XOP section.
  18
  19 2020-01-16  Jan Beulich  <jbeulich@suse.com>
  20
  21         * i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
  22         (extractps): Add VexWIG to SSE2AVX forms.
  23         * i386-tbl.h: Re-generate.
  24
  25 2020-01-16  Jan Beulich  <jbeulich@suse.com>
  26
  27         * i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
  28         Size64 from and use VexW1 on SSE2AVX forms.
  29         (vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
  30         VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
  31         * i386-tbl.h: Re-generate.
  32
  33 2020-01-15  Alan Modra  <amodra@gmail.com>
  34
  35         * tic4x-dis.c (tic4x_version): Make unsigned long.
  36         (optab, optab_special, registernames): New file scope vars.
  37         (tic4x_print_register): Set up registernames rather than
  38         malloc'd registertable.
  39         (tic4x_disassemble): Delete optable and optable_special.  Use
  40         optab and optab_special instead.  Throw away old optab,
  41         optab_special and registernames when info->mach changes.
  42
  43 2020-01-14  Sergey Belyashov  <sergey.belyashov@gmail.com>
  44
  45         PR 25377
  46         * z80-dis.c (suffix): Use .db instruction to generate double
  47         prefix.
  48
  49 2020-01-14  Alan Modra  <amodra@gmail.com>
  50
  51         * z8k-dis.c (unpack_instr): Formatting.  Cast unsigned short
  52         values to unsigned before shifting.
  53
  54 2020-01-13  Thomas Troeger  <tstroege@gmx.de>
  55
  56         * arm-dis.c (print_insn_arm): Fill in insn info fields for control
  57         flow instructions.
  58         (print_insn_thumb16, print_insn_thumb32): Likewise.
  59         (print_insn): Initialize the insn info.
  60         * i386-dis.c (print_insn): Initialize the insn info fields, and
  61         detect jumps.
  62
  63 2012-01-13  Claudiu Zissulescu <claziss@gmail.com>
  64
  65         * arc-opc.c (C_NE): Make it required.
  66
  67 2012-01-13  Claudiu Zissulescu <claziss@gmail.com>
  68
  69         * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
  70         reserved register name.
  71
  72 2020-01-13  Alan Modra  <amodra@gmail.com>
  73
  74         * ns32k-dis.c (Is_gen): Use strchr, add 'f'.
  75         (print_insn_ns32k): Adjust ioffset for 'f' index_offset.
  76
  77 2020-01-13  Alan Modra  <amodra@gmail.com>
  78
  79         * wasm32-dis.c (print_insn_wasm32): Localise variables.  Store
  80         result of wasm_read_leb128 in a uint64_t and check that bits
  81         are not lost when copying to other locals.  Use uint32_t for
  82         most locals.  Use PRId64 when printing int64_t.
  83
  84 2020-01-13  Alan Modra  <amodra@gmail.com>
  85
  86         * score-dis.c: Formatting.
  87         * score7-dis.c: Formatting.
  88
  89 2020-01-13  Alan Modra  <amodra@gmail.com>
  90
  91         * score-dis.c (print_insn_score48): Use unsigned variables for
  92         unsigned values.  Don't left shift negative values.
  93         (print_insn_score32): Likewise.
  94         * score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
  95
  96 2020-01-13  Alan Modra  <amodra@gmail.com>
  97
  98         * tic4x-dis.c (tic4x_print_register): Remove dead code.
  99
 100 2020-01-13  Alan Modra  <amodra@gmail.com>
 101
 102         * fr30-ibld.c: Regenerate.
 103
 104 2020-01-13  Alan Modra  <amodra@gmail.com>
 105
 106         * xgate-dis.c (print_insn): Don't left shift signed value.
 107         (ripBits): Formatting, use 1u.
 108
 109 2020-01-10  Alan Modra  <amodra@gmail.com>
 110
 111         * tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
 112         * tilegx-opc.c (parse_insn_tilegx): Likewise.  Delete raw_opval.
 113
 114 2020-01-10  Alan Modra  <amodra@gmail.com>
 115
 116         * m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
 117         and XRREG value earlier to avoid a shift with negative exponent.
 118         * m10200-dis.c (disassemble): Similarly.
 119
 120 2020-01-09  Nick Clifton  <nickc@redhat.com>
 121
 122         PR 25224
 123         * z80-dis.c (ld_ii_ii): Use correct cast.
 124
 125 2020-01-03  Sergey Belyashov  <sergey.belyashov@gmail.com>
 126
 127         PR 25224
 128         * z80-dis.c (ld_ii_ii): Use character constant when checking
 129         opcode byte value.
 130
 131 2020-01-09  Jan Beulich  <jbeulich@suse.com>
 132
 133         * i386-dis.c (SEP_Fixup): New.
 134         (SEP): Define.
 135         (dis386_twobyte): Use it for sysenter/sysexit.
 136         (enum x86_64_isa): Change amd64 enumerator to value 1.
 137         (OP_J): Compare isa64 against intel64 instead of amd64.
 138         * i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
 139         forms.
 140         * i386-tbl.h: Re-generate.
 141
 142 2020-01-08  Alan Modra  <amodra@gmail.com>
 143
 144         * z8k-dis.c: Include libiberty.h
 145         (instr_data_s): Make max_fetched unsigned.
 146         (z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
 147         Don't exceed byte_info bounds.
 148         (output_instr): Make num_bytes unsigned.
 149         (unpack_instr): Likewise for nibl_count and loop.
 150         * z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
 151         idx unsigned.
 152         * z8k-opc.h: Regenerate.
 153
 154 2020-01-07  Shahab Vahedi  <shahab@synopsys.com>
 155
 156         * arc-tbl.h (llock): Use 'LLOCK' as class.
 157         (llockd): Likewise.
 158         (scond): Use 'SCOND' as class.
 159         (scondd): Likewise.
 160         (llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
 161         (scondd): Likewise.
 162
 163 2020-01-06  Alan Modra  <amodra@gmail.com>
 164
 165         * m32c-ibld.c: Regenerate.
 166
 167 2020-01-06  Alan Modra  <amodra@gmail.com>
 168
 169         PR 25344
 170         * z80-dis.c (suffix): Don't use a local struct buffer copy.
 171         Peek at next byte to prevent recursion on repeated prefix bytes.
 172         Ensure uninitialised "mybuf" is not accessed.
 173         (print_insn_z80): Don't zero n_fetch and n_used here,..
 174         (print_insn_z80_buf): ..do it here instead.
 175
 176 2020-01-04  Alan Modra  <amodra@gmail.com>
 177
 178         * m32r-ibld.c: Regenerate.
 179
 180 2020-01-04  Alan Modra  <amodra@gmail.com>
 181
 182         * cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
 183
 184 2020-01-04  Alan Modra  <amodra@gmail.com>
 185
 186         * crx-dis.c (match_opcode): Avoid shift left of signed value.
 187
 188 2020-01-04  Alan Modra  <amodra@gmail.com>
 189
 190         * d30v-dis.c (print_insn): Avoid signed overflow in left shift.
 191
 192 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 193
 194         * aarch64-tbl.h (aarch64_opcode_table): Use
 195         SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
 196
 197 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 198
 199         * aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
 200         forms of SUDOT and USDOT.
 201
 202 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 203
 204         * aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
 205         uzip{1,2}.
 206         * opcodes/aarch64-dis-2.c: Re-generate.
 207
 208 2020-01-03  Jan Beulich  <jbeulich@suse.com>
 209
 210         * aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
 211         FMMLA encoding.
 212         * opcodes/aarch64-dis-2.c: Re-generate.
 213
 214 2020-01-02  Sergey Belyashov  <sergey.belyashov@gmail.com>
 215
 216         * z80-dis.c: Add support for eZ80 and Z80 instructions.
 217
 218 2020-01-01  Alan Modra  <amodra@gmail.com>
 219
 220         Update year range in copyright notice of all files.
 221
 222 For older changes see ChangeLog-2019
 223 \f
 224 Copyright (C) 2020 Free Software Foundation, Inc.
 225
 226 Copying and distribution of this file, with or without modification,
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