opcodes/ChangeLog

   1 2014-06-02  Eric Botcazou  <ebotcazou@adacore.com>
   2
   3         * sparc-opc.c (cas): Disable for LEON.
   4         (casl): Likewise.
   5
   6 2014-05-20  Alan Modra  <amodra@gmail.com>
   7
   8         * m68k-dis.c: Don't include setjmp.h.
   9
  10 2014-05-09  H.J. Lu  <hongjiu.lu@intel.com>
  11
  12         * i386-dis.c (ADDR16_PREFIX): Removed.
  13         (ADDR32_PREFIX): Likewise.
  14         (DATA16_PREFIX): Likewise.
  15         (DATA32_PREFIX): Likewise.
  16         (prefix_name): Updated.
  17         (print_insn): Simplify data and address size prefixes processing.
  18
  19 2014-05-08  Stefan Kristiansson  <stefan.kristiansson@saunalahti.fi>
  20
  21         * or1k-desc.c: Regenerated.
  22         * or1k-desc.h: Likewise.
  23         * or1k-opc.c: Likewise.
  24         * or1k-opc.h: Likewise.
  25         * or1k-opinst.c: Likewise.
  26
  27 2014-05-07  Andrew Bennett  <andrew.bennett@imgtec.com>
  28
  29         * mips-opc.c (mips_builtin_opcodes): Add MIPS32r5 eretnc instruction.
  30         (I34): New define.
  31         (I36): New define.
  32         (I66): New define.
  33         (I68): New define.
  34         * mips-dis.c (mips_arch_choices): Add mips32r3, mips32r5, mips64r3 and
  35         mips64r5.
  36         (parse_mips_dis_option): Update MSA and virtualization support to
  37         allow mips64r3 and mips64r5.
  38
  39 2014-05-07  Andrew Bennett  <andrew.bennett@imgtec.com>
  40
  41         * mips-opc.c (G3): Remove I4.
  42
  43 2014-05-05  H.J. Lu  <hongjiu.lu@intel.com>
  44
  45         PR binutils/16893
  46         * i386-dis.c (twobyte_has_mandatory_prefix): New variable.
  47         (end_codep): Likewise.
  48         (mandatory_prefix): Likewise.
  49         (active_seg_prefix): Likewise.
  50         (ckprefix): Set active_seg_prefix to the active segment register
  51         prefix.
  52         (seg_prefix): Removed.
  53         (get_valid_dis386): Use the last of PREFIX_REPNZ and PREFIX_REPZ
  54         for prefix index.  Ignore the index if it is invalid and the
  55         mandatory prefix isn't required.
  56         (print_insn): Set mandatory_prefix if the PREFIX_XXX prefix is
  57         mandatory.  Don't set PREFIX_REPZ/PREFIX_REPNZ/PREFIX_LOCK bits
  58         in used_prefixes here.  Don't print unused prefixes.  Check
  59         active_seg_prefix for the active segment register prefix.
  60         Restore the DFLAG bit in sizeflag if the data size prefix is
  61         unused.  Check the unused mandatory PREFIX_XXX prefixes
  62         (append_seg): Only print the segment register which gets used.
  63         (OP_E_memory): Check active_seg_prefix for the segment register
  64         prefix.
  65         (OP_OFF): Likewise.
  66         (OP_OFF64): Likewise.
  67         (OP_DSreg): Set active_seg_prefix to PREFIX_DS if it is unset.
  68
  69 2014-05-02  H.J. Lu  <hongjiu.lu@intel.com>
  70
  71         PR binutils/16886
  72         * config.in: Regenerated.
  73         * configure: Likewise.
  74         * configure.in: Check if sigsetjmp is available.
  75         * h8500-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
  76         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
  77         (print_insn_h8500): Replace setjmp with OPCODES_SIGSETJMP.
  78         * i386-dis.c (dis_private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
  79         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
  80         (print_insn): Replace setjmp with OPCODES_SIGSETJMP.
  81         * ns32k-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
  82         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
  83         (print_insn_ns32k): Replace setjmp with OPCODES_SIGSETJMP.
  84         * sysdep.h (OPCODES_SIGJMP_BUF): New macro.
  85         (OPCODES_SIGSETJMP): Likewise.
  86         (OPCODES_SIGLONGJMP): Likewise.
  87         * vax-dis.c (private): Replace jmp_buf with OPCODES_SIGJMP_BUF.
  88         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
  89         (print_insn_vax): Replace setjmp with OPCODES_SIGSETJMP.
  90         * xtensa-dis.c (dis_private): Replace jmp_buf with
  91         OPCODES_SIGJMP_BUF.
  92         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
  93         (print_insn_xtensa): Replace setjmp with OPCODES_SIGSETJMP.
  94         * z8k-dis.c(instr_data_s): Replace jmp_buf with OPCODES_SIGJMP_BUF.
  95         (fetch_data): Replace longjmp with OPCODES_SIGLONGJMP.
  96         (print_insn_z8k): Replace setjmp with OPCODES_SIGSETJMP.
  97
  98 2014-05-01  H.J. Lu  <hongjiu.lu@intel.com>
  99
 100         PR binutils/16891
 101         * i386-dis.c (print_insn): Handle prefixes before fwait.
 102
 103 2014-04-26  Alan Modra  <amodra@gmail.com>
 104
 105         * po/POTFILES.in: Regenerate.
 106
 107 2014-04-23  Andrew Bennett  <andrew.bennett@imgtec.com>
 108
 109         * mips-dis.c (mips_arch_choices): Update mips32r2 and mips64r2
 110         to allow the MIPS XPA ASE.
 111         (parse_mips_dis_option): Process the -Mxpa option.
 112         * mips-opc.c (XPA): New define.
 113         (mips_builtin_opcodes): Add MIPS XPA instructions and move the
 114         locations of the ctc0 and cfc0 instructions.
 115
 116 2014-04-22  Christian Svensson  <blue@cmd.nu>
 117
 118         * Makefile.am: Remove openrisc and or32 support.  Add support for or1k.
 119         * configure.in: Likewise.
 120         * disassemble.c: Likewise.
 121         * or1k-asm.c: New file.
 122         * or1k-desc.c: New file.
 123         * or1k-desc.h: New file.
 124         * or1k-dis.c: New file.
 125         * or1k-ibld.c: New file.
 126         * or1k-opc.c: New file.
 127         * or1k-opc.h: New file.
 128         * or1k-opinst.c: New file.
 129         * Makefile.in: Regenerate.
 130         * configure: Regenerate.
 131         * openrisc-asm.c: Delete.
 132         * openrisc-desc.c: Delete.
 133         * openrisc-desc.h: Delete.
 134         * openrisc-dis.c: Delete.
 135         * openrisc-ibld.c: Delete.
 136         * openrisc-opc.c: Delete.
 137         * openrisc-opc.h: Delete.
 138         * or32-dis.c: Delete.
 139         * or32-opc.c: Delete.
 140
 141 2014-04-04  Ilya Tocar  <ilya.tocar@intel.com>
 142
 143         * i386-dis.c (rm_table): Add encls, enclu.
 144         * i386-gen.c (cpu_flag_init): Add CPU_SE1_FLAGS,
 145         (cpu_flags): Add CpuSE1.
 146         * i386-opc.h (enum): Add CpuSE1.
 147         (i386_cpu_flags): Add cpuse1.
 148         * i386-opc.tbl: Add encls, enclu.
 149         * i386-init.h: Regenerated.
 150         * i386-tbl.h: Likewise.
 151
 152 2014-04-02  Anthony Green  <green@moxielogic.com>
 153
 154         * moxie-opc.c (moxie_form1_opc_info): Add sign-extension
 155         instructions, sex.b and sex.s.
 156
 157 2014-03-26  Jiong Wang  <jiong.wang@arm.com>
 158
 159         * aarch64-dis.c (aarch64_ext_ldst_elemlist): Check H/S undefined
 160         instructions.
 161
 162 2014-03-20  Ilya Tocar  <ilya.tocar@intel.com>
 163
 164         * i386-opc.tbl: Change memory size for vgatherpf0qps, vgatherpf1qps,
 165         vscatterpf0qps, vscatterpf1qps, vgatherqps, vpgatherqd, vpscatterqd,
 166         vscatterqps.
 167         * i386-tbl.h: Regenerate.
 168
 169 2014-03-19  Jose E. Marchesi  <jose.marchesi@oracle.com>
 170
 171         * sparc-dis.c (v9_hpriv_reg_names): Names for %hstick_offset and
 172         %hstick_enable added.
 173
 174 2014-03-19  Nick Clifton  <nickc@redhat.com>
 175
 176         * rx-decode.opc (bwl): Allow for bogus instructions with a size
 177         field of 3.
 178         (sbwl, ubwl, SCALE): Likewise.
 179         * rx-decode.c: Regenerate.
 180
 181 2014-03-12  Alan Modra  <amodra@gmail.com>
 182
 183         * Makefile.in: Regenerate.
 184
 185 2014-03-05  Alan Modra  <amodra@gmail.com>
 186
 187         Update copyright years.
 188
 189 2014-03-04  Heiher  <r@hev.cc>
 190
 191         * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
 192
 193 2014-03-04  Richard Sandiford  <rdsandiford@googlemail.com>
 194
 195         * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions
 196         so that they come after the Loongson extensions.
 197
 198 2014-03-03  Alan Modra  <amodra@gmail.com>
 199
 200         * i386-gen.c (process_copyright): Emit copyright notice on one line.
 201
 202 2014-02-28  Alan Modra  <amodra@gmail.com>
 203
 204         * msp430-decode.c: Regenerate.
 205
 206 2014-02-27  Jiong Wang  <jiong.wang@arm.com>
 207
 208         * aarch64-tbl.h (aarch64_opcode_table): Replace IMM0 with
 209         FPIMM0 for fcmeq, fcmgt, fcmge, fcmlt and fcmle.
 210
 211 2014-02-27  Yufeng Zhang  <yufeng.zhang@arm.com>
 212
 213         * aarch64-opc.c (print_register_offset_address): Call
 214         get_int_reg_name to prepare the register name.
 215
 216 2014-02-25  Ilya Tocar  <ilya.tocar@intel.com>
 217
 218         * i386-opc.tbl: Remove wrong variant of vcvtps2ph
 219         * i386-tbl.h: Regenerate.
 220
 221 2014-02-20  Ilya Tocar  <ilya.tocar@intel.com>
 222
 223         * i386-gen.c (cpu_flag_init): Add CPU_PREFETCHWT1_FLAGS/
 224         (cpu_flags): Add CpuPREFETCHWT1.
 225         * i386-init.h: Regenerate.
 226         * i386-opc.h (CpuPREFETCHWT1): New.
 227         (i386_cpu_flags): Add cpuprefetchwt1.
 228         * i386-opc.tbl: Cahnge CPU of prefetchwt1 from CpuAVX512PF to CpuPREFETCHWT1.
 229         * i386-tbl.h: Regenerate.
 230
 231 2014-02-20  Ilya Tocar  <ilya.tocar@intel.com>
 232
 233         * i386-opc.tbl: Change CPU of vptestnmq, vptestnmd from CpuAVX512CD,
 234         to CpuAVX512F.
 235         * i386-tbl.h: Regenerate.
 236
 237 2014-02-19  H.J. Lu  <hongjiu.lu@intel.com>
 238
 239         * i386-gen.c (output_cpu_flags): Don't output trailing space.
 240         (output_opcode_modifier): Likewise.
 241         (output_operand_type): Likewise.
 242         * i386-init.h: Regenerated.
 243         * i386-tbl.h: Likewise.
 244
 245 2014-02-12  Ilya Tocar  <ilya.tocar@intel.com>
 246
 247         * i386-dis.c (MOD enum): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4,
 248         MOD_0FC7_REG_5.
 249         (PREFIX enum): Add PREFIX_0FAE_REG_7.
 250         (reg_table): Add MOD_0FC7_REG_3, MOD_0FC7_REG_4 MOD_0FC7_REG_5.
 251         (prefix_table): Add clflusopt.
 252         (mod_table): Add xrstors, xsavec, xsaves.
 253         * i386-gen.c (cpu_flag_init): Add CPU_CLFLUSHOPT_FLAGS,
 254         CPU_XSAVES_FLAGS, CPU_XSAVEC_FLAGS.
 255         (cpu_flags): Add CpuClflushOpt, CpuXSAVES, CpuXSAVEC.
 256         * i386-init.h: Regenerate.
 257         * i386-opc.tbl: Add clflushopt, xrstors, xrstors64, xsaves,
 258         xsaves64, xsavec, xsavec64.
 259         * i386-tbl.h: Regenerate.
 260
 261 2014-02-10  Alan Modra  <amodra@gmail.com>
 262
 263         * po/POTFILES.in: Regenerate.
 264         * po/opcodes.pot: Regenerate.
 265
 266 2014-01-30  Michael Zolotukhin  <michael.v.zolotukhin@gmail.com>
 267             Jan Beulich  <jbeulich@suse.com>
 268
 269         PR binutils/16490
 270         * i386-dis.c (OP_E_memory): Fix shift computation for
 271         vex_vsib_q_w_dq_mode.
 272
 273 2014-01-09  Bradley Nelson  <bradnelson@google.com>
 274             Roland McGrath  <mcgrathr@google.com>
 275
 276         * i386-dis.c (print_insn): Do not touch all_prefixes[-1] when
 277         last_rex_prefix is -1.
 278
 279 2014-01-08  H.J. Lu  <hongjiu.lu@intel.com>
 280
 281         * i386-gen.c (process_copyright): Update copyright year to 2014.
 282
 283 2014-01-03  Maciej W. Rozycki  <macro@codesourcery.com>
 284
 285         * nds32-asm.c (parse_operand): Fix out-of-range integer constant.
 286
 287 For older changes see ChangeLog-2013
 288 \f
 289 Copyright (C) 2014 Free Software Foundation, Inc.
 290
 291 Copying and distribution of this file, with or without modification,
 292 are permitted in any medium without royalty provided the copyright
 293 notice and this notice are preserved.
 294
 295 Local Variables:
 296 mode: change-log
 297 left-margin: 8
 298 fill-column: 74
 299 version-control: never
 300 End: