1 2016-05-27 H.J. Lu <hongjiu.lu@intel.com>
4 * i386-gen.c (main): Fail if CpuMax is incorrect.
5 * i386-opc.h (CpuMax): Set to CpuIntel64.
6 * i386-tbl.h: Regenerated.
8 2016-05-27 Nick Clifton <nickc@redhat.com>
11 * msp430-dis.c (msp430dis_read_two_bytes): New function.
12 (msp430dis_opcode_unsigned): New function.
13 (msp430dis_opcode_signed): New function.
14 (msp430_singleoperand): Use the new opcode reading functions.
15 Only disassenmble bytes if they were successfully read.
16 (msp430_doubleoperand): Likewise.
17 (msp430_branchinstr): Likewise.
18 (msp430x_callx_instr): Likewise.
19 (print_insn_msp430): Check that it is safe to read bytes before
20 attempting disassembly. Use the new opcode reading functions.
22 2016-05-26 Peter Bergner <bergner@vnet.ibm.com>
24 * ppc-opc.c (CY): New define. Document it.
25 (powerpc_opcodes) <addex[.], lwzmx, vmsumudm>: New mnemonics.
27 2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
29 * i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512DQ_FLAGS,
30 CPU_AVX512BW_FLAGS, CPU_AVX512VL_FLAGS, CPU_AVX512IFMA_FLAGS
31 and CPU_AVX512VBMI_FLAGS. Add CpuAVX512DQ, CpuAVX512BW,
32 CpuAVX512VL, CpuAVX512IFMA and CpuAVX512VBMI to
34 * i386-init.h: Regenerated.
36 2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
39 * i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512F_FLAGS,
40 CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS and CPU_AVX512PF_FLAGS.
41 * i386-init.h: Regenerated.
43 2016-05-25 H.J. Lu <hongjiu.lu@intel.com>
45 * i386-gen.c (cpu_flag_init): Rename CPU_ANY87_FLAGS to
46 CPU_ANY_X87_FLAGS. Add CPU_ANY_MMX_FLAGS.
47 * i386-init.h: Regenerated.
49 2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
51 * arc-dis.c (print_flags): Set branch_delay_insns, and insn_type
53 (print_insn_arc): Set insn_type information.
54 * arc-opc.c (C_CC): Add F_CLASS_COND.
55 * arc-tbl.h (bbit0, bbit1): Update subclass to COND.
56 (beq_s, bge_s, bgt_s, bhi_s, bhs_s): Likewise.
57 (ble_s, blo_s, bls_s, blt_s, bne_s): Likewise.
58 (breq, breq_s, brge, brhs, brlo, brlt): Likewise.
59 (brne, brne_s, jeq_s, jne_s): Likewise.
61 2016-05-23 Claudiu Zissulescu <claziss@synopsys.com>
63 * arc-tbl.h (neg): New instruction variant.
65 2016-05-23 Cupertino Miranda <cmiranda@synopsys.com>
67 * arc-dis.c (find_format, find_format, get_auxreg)
68 (print_insn_arc): Changed.
69 * arc-ext.h (INSERT_XOP): Likewise.
71 2016-05-23 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
73 * tic54x-dis.c (sprint_mmr): Adjust.
74 * tic54x-opc.c: Likewise.
76 2016-05-19 Alan Modra <amodra@gmail.com>
78 * ppc-opc.c (NSISIGNOPT): Use insert_nsi and extract_nsi.
80 2016-05-19 Alan Modra <amodra@gmail.com>
82 * ppc-opc.c: Formatting.
84 (powerpc_opcodes <subis>): Use NSISIGNOPT.
86 2016-05-18 Maciej W. Rozycki <macro@imgtec.com>
88 * mips-dis.c (is_compressed_mode_p): Add `micromips_p' operand,
89 replacing references to `micromips_ase' throughout.
90 (_print_insn_mips): Don't use file-level microMIPS annotation to
91 determine the disassembly mode with the symbol table.
93 2016-05-13 Peter Bergner <bergner@vnet.ibm.com>
95 * ppc-opc.c (IMM8): Use PPC_OPERAND_SIGNOPT.
97 2016-05-11 Andrew Bennett <andrew.bennett@imgtec.com>
99 * mips-dis.c (mips_arch_choices): Add ASE_DSPR3 to mips32r6 and
101 * mips-opc.c (D34): New macro.
102 (mips_builtin_opcodes): Define bposge32c for DSPr3.
104 2016-05-10 Alexander Fomin <alexander.fomin@intel.com>
106 * i386-dis.c (prefix_table): Add RDPID instruction.
107 * i386-gen.c (cpu_flag_init): Add RDPID flag.
108 (cpu_flags): Add RDPID bitfield.
109 * i386-opc.h (enum): Add RDPID element.
110 (i386_cpu_flags): Add RDPID field.
111 * i386-opc.tbl: Add RDPID instruction.
112 * i386-init.h: Regenerate.
113 * i386-tbl.h: Regenerate.
115 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
117 * arm-dis.c (get_sym_code_type): Use ARM_GET_SYM_BRANCH_TYPE to get
118 branch type of a symbol.
119 (print_insn): Likewise.
121 2016-05-10 Thomas Preud'homme <thomas.preudhomme@arm.com>
123 * arm-dis.c (coprocessor_opcodes): Add entries for VFP ARMv8-M
124 Mainline Security Extensions instructions.
125 (thumb_opcodes): Add entries for narrow ARMv8-M Security
126 Extensions instructions.
127 (thumb32_opcodes): Add entries for wide ARMv8-M Security Extensions
129 (psr_name): Add new MSP_NS and PSP_NS ARMv8-M Security Extensions
132 2016-05-09 Jose E. Marchesi <jose.marchesi@oracle.com>
134 * sparc-opc.c (sparc_opcodes): Fix mnemonic of faligndatai.
136 2016-05-03 Claudiu Zissulescu <claziss@synopsys.com>
138 * arc-ext.c (dump_ARC_extmap): Handle SYNATX_NOP and SYNTAX_1OP.
139 (arcExtMap_genOpcode): Likewise.
140 * arc-opc.c (arg_32bit_rc): Define new variable.
141 (arg_32bit_u6): Likewise.
142 (arg_32bit_limm): Likewise.
144 2016-05-03 Szabolcs Nagy <szabolcs.nagy@arm.com>
146 * aarch64-gen.c (VERIFIER): Define.
147 * aarch64-opc.c (VERIFIER): Define.
148 (verify_ldpsw): Use static linkage.
149 * aarch64-opc.h (verify_ldpsw): Remove.
150 * aarch64-tbl.h: Use VERIFIER for verifiers.
152 2016-04-28 Nick Clifton <nickc@redhat.com>
155 * aarch64-dis.c (aarch64_opcode_decode): Run verifier if present.
156 * aarch64-opc.c (verify_ldpsw): New function.
157 * aarch64-opc.h (verify_ldpsw): New prototype.
158 * aarch64-tbl.h: Add initialiser for verifier field.
159 (LDPSW): Set verifier to verify_ldpsw.
161 2016-04-23 H.J. Lu <hongjiu.lu@intel.com>
165 * i386-dis.c (print_insn): Return -1 if size of bfd_vma is
166 smaller than address size.
168 2016-04-20 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
170 * alpha-dis.c: Regenerate.
171 * crx-dis.c: Likewise.
172 * disassemble.c: Likewise.
173 * epiphany-opc.c: Likewise.
174 * fr30-opc.c: Likewise.
175 * frv-opc.c: Likewise.
176 * ip2k-opc.c: Likewise.
177 * iq2000-opc.c: Likewise.
178 * lm32-opc.c: Likewise.
179 * lm32-opinst.c: Likewise.
180 * m32c-opc.c: Likewise.
181 * m32r-opc.c: Likewise.
182 * m32r-opinst.c: Likewise.
183 * mep-opc.c: Likewise.
184 * mt-opc.c: Likewise.
185 * or1k-opc.c: Likewise.
186 * or1k-opinst.c: Likewise.
187 * tic80-opc.c: Likewise.
188 * xc16x-opc.c: Likewise.
189 * xstormy16-opc.c: Likewise.
191 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
193 * arc-nps400-tbl.h: Add addb, subb, adcb, sbcb, andb, xorb, orb,
194 fxorb, wxorb, shlb, shrb, notb, cntbb, div, mod, divm, qcmp,
195 calcsd, and calcxd instructions.
196 * arc-opc.c (insert_nps_bitop_size): Delete.
197 (extract_nps_bitop_size): Delete.
198 (MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Define, and use.
199 (extract_nps_qcmp_m3): Define.
200 (extract_nps_qcmp_m2): Define.
201 (extract_nps_qcmp_m1): Define.
202 (arc_flag_operands): Add F_NPS_SX, F_NPS_AR, F_NPS_AL.
203 (arc_flag_classes): Add C_NPS_SX, C_NPS_AR_AL
204 (arc_operands): Add NPS_SRC2_POS, NPS_SRC1_POS, NPS_ADDB_SIZE,
205 NPS_ANDB_SIZE, NPS_FXORB_SIZ, NPS_WXORB_SIZ, NPS_R_XLDST,
206 NPS_DIV_UIMM4, NPS_QCMP_SIZE, NPS_QCMP_M1, NPS_QCMP_M2, and
209 2016-04-19 Andrew Burgess <andrew.burgess@embecosm.com>
211 * arc-nps400-tbl.h: Add dctcp, dcip, dcet, and dcacl instructions.
213 2016-04-15 H.J. Lu <hongjiu.lu@intel.com>
215 * Makefile.in: Regenerated with automake 1.11.6.
216 * aclocal.m4: Likewise.
218 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
220 * arc-nps400-tbl.h: Add xldb, xldw, xld, xstb, xstw, and xst
222 * arc-opc.c (insert_nps_cmem_uimm16): New function.
223 (extract_nps_cmem_uimm16): New function.
224 (arc_operands): Add NPS_XLDST_UIMM16 operand.
226 2016-04-14 Andrew Burgess <andrew.burgess@embecosm.com>
228 * arc-dis.c (arc_insn_length): New function.
229 (print_insn_arc): Use arc_insn_length, change insnLen to unsigned.
230 (find_format): Change insnLen parameter to unsigned.
232 2016-04-13 Nick Clifton <nickc@redhat.com>
235 * v850-opc.c (v850_opcodes): Correct masks for long versions of
236 the LD.B and LD.BU instructions.
238 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
240 * arc-dis.c (find_format): Check for extension flags.
241 (print_flags): New function.
242 (print_insn_arc): Update for .extCondCode, .extCoreRegister and
244 * arc-ext.c (arcExtMap_coreRegName): Use
245 LAST_EXTENSION_CORE_REGISTER.
246 (arcExtMap_coreReadWrite): Likewise.
247 (dump_ARC_extmap): Update printing.
248 * arc-opc.c (arc_flag_classes): Add F_CLASS_EXTEND flag.
249 (arc_aux_regs): Add cpu field.
250 * arc-regs.h: Add cpu field, lower case name aux registers.
252 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
254 * arc-tbl.h: Add rtsc, sleep with no arguments.
256 2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
258 * arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
260 (arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
261 (arg_32bit_rarbu6, arg_32bit_zarbu6, arg_32bit_rbrbu6)
262 (arg_32bit_rbrbs12, arg_32bit_ralimmrc, arg_32bit_rarblimm)
263 (arg_32bit_zalimmrc, arg_32bit_zarblimm, arg_32bit_rbrblimm)
264 (arg_32bit_ralimmu6, arg_32bit_zalimmu6, arg_32bit_zalimms12)
265 (arg_32bit_ralimmlimm, arg_32bit_zalimmlimm, arg_32bit_rbrc)
266 (arg_32bit_zarc, arg_32bit_rbu6, arg_32bit_zau6, arg_32bit_rblimm)
267 (arg_32bit_zalimm, arg_32bit_limmrc, arg_32bit_limmu6)
268 (arg_32bit_limms12, arg_32bit_limmlimm): Likewise.
269 (arc_opcode arc_opcodes): Null terminate the array.
270 (arc_num_opcodes): Remove.
271 * arc-ext.h (INSERT_XOP): Define.
272 (extInstruction_t): Likewise.
273 (arcExtMap_instName): Delete.
274 (arcExtMap_insn): New function.
275 (arcExtMap_genOpcode): Likewise.
276 * arc-ext.c (ExtInstruction): Remove.
277 (create_map): Zero initialize instruction fields.
278 (arcExtMap_instName): Remove.
279 (arcExtMap_insn): New function.
280 (dump_ARC_extmap): More info while debuging.
281 (arcExtMap_genOpcode): New function.
282 * arc-dis.c (find_format): New function.
283 (print_insn_arc): Use find_format.
284 (arc_get_disassembler): Enable dump_ARC_extmap only when
287 2016-04-11 Maciej W. Rozycki <macro@imgtec.com>
289 * mips-dis.c (print_mips16_insn_arg): Mask unused extended
290 instruction bits out.
292 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
294 * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
295 * arc-opc.c (arc_flag_operands): Add new flags.
296 (arc_flag_classes): Add new classes.
298 2016-04-07 Andrew Burgess <andrew.burgess@embecosm.com>
300 * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
302 2016-04-05 Andrew Burgess <andrew.burgess@embecosm.com>
304 * arc-nps400-tbl.h: Add movbi, decode1, fbset, fbclear, encode0,
305 encode1, rflt, crc16, and crc32 instructions.
306 * arc-opc.c (arc_flag_operands): Add F_NPS_R.
307 (arc_flag_classes): Add C_NPS_R.
308 (insert_nps_bitop_size_2b): New function.
309 (extract_nps_bitop_size_2b): Likewise.
310 (insert_nps_bitop_uimm8): Likewise.
311 (extract_nps_bitop_uimm8): Likewise.
312 (arc_operands): Add new operand entries.
314 2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
316 * arc-regs.h: Add a new subclass field. Add double assist
317 accumulator register values.
318 * arc-tbl.h: Use DPA subclass to mark the double assist
319 instructions. Use DPX/SPX subclas to mark the FPX instructions.
320 * arc-opc.c (RSP): Define instead of SP.
321 (arc_aux_regs): Add the subclass field.
323 2016-04-05 Jiong Wang <jiong.wang@arm.com>
325 * arm-dis.c: Support FP16 vmul, vmla, vmls (by scalar).
327 2016-03-31 Andrew Burgess <andrew.burgess@embecosm.com>
329 * arc-opc.c (arc_operands): Fix operand flags for NPS_R_DST, and
332 2016-03-30 Andrew Burgess <andrew.burgess@embecosm.com>
334 * arc-nps400-tbl.h: Add a header comment, and fix some whitespace
335 issues. No functional changes.
337 2016-03-30 Claudiu Zissulescu <claziss@synopsys.com>
339 * arc-regs.h (IC_RAM_ADDRESS, IC_TAG, IC_WP, IC_DATA, CONTROL0)
340 (AX2, AY2, MX2, MY2, AY0, AY1, DC_RAM_ADDR, DC_TAG, CONTROL1)
341 (RTT): Remove duplicate.
342 (LCDINSTR, LCDDATA, LCDSTAT, CC_*, PCT_COUNT*, PCT_SNAP*)
343 (PCT_CONFIG*): Remove.
344 (D1L, D1H, D2H, D2L): Define.
346 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
348 * arc-ext-tbl.h (dsp_fp_i2flt): Fix typo.
350 2016-03-29 Claudiu Zissulescu <claziss@synopsys.com>
352 * arc-tbl.h (invld07): Remove.
353 * arc-ext-tbl.h: New file.
354 * arc-dis.c (FIELDA, FIELDB, FIELDC): Remove.
355 * arc-opc.c (arc_opcodes): Add ext-tbl include.
357 2016-03-24 Jan Kratochvil <jan.kratochvil@redhat.com>
359 Fix -Wstack-usage warnings.
360 * aarch64-dis.c (print_operands): Substitute size.
361 * aarch64-opc.c (print_register_offset_address): Substitute tblen.
363 2016-03-22 Jose E. Marchesi <jose.marchesi@oracle.com>
365 * sparc-opc.c (sparc_opcodes): Reorder entries for `rd' in order
366 to get a proper diagnostic when an invalid ASR register is used.
368 2016-03-22 Nick Clifton <nickc@redhat.com>
370 * configure: Regenerate.
372 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
374 * arc-nps400-tbl.h: New file.
375 * arc-opc.c: Add top level comment.
376 (insert_nps_3bit_dst): New function.
377 (extract_nps_3bit_dst): New function.
378 (insert_nps_3bit_src2): New function.
379 (extract_nps_3bit_src2): New function.
380 (insert_nps_bitop_size): New function.
381 (extract_nps_bitop_size): New function.
382 (arc_flag_operands): Add nps400 entries.
383 (arc_flag_classes): Add nps400 entries.
384 (arc_operands): Add nps400 entries.
385 (arc_opcodes): Add nps400 include.
387 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
389 * arc-opc.c (arc_flag_classes): Convert all flag classes to use
390 the new class enum values.
392 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
394 * arc-dis.c (print_insn_arc): Handle nps400.
396 2016-03-21 Andrew Burgess <andrew.burgess@embecosm.com>
398 * arc-opc.c (BASE): Delete.
400 2016-03-18 Nick Clifton <nickc@redhat.com>
403 * aarch64-tbl.h (aarch64_opcode_table): Fix type of second operand
404 of MOV insn that aliases an ORR insn.
406 2016-03-16 Jiong Wang <jiong.wang@arm.com>
408 * arm-dis.c (neon_opcodes): Support new FP16 instructions.
410 2016-03-07 Trevor Saunders <tbsaunde+binutils@tbsaunde.org>
412 * mcore-opc.h: Add const qualifiers.
413 * microblaze-opc.h (struct op_code_struct): Likewise.
414 * sh-opc.h: Likewise.
415 * tic4x-dis.c (tic4x_print_indirect): Likewise.
416 (tic4x_print_op): Likewise.
418 2016-03-02 Alan Modra <amodra@gmail.com>
420 * or1k-desc.h: Regenerate.
421 * fr30-ibld.c: Regenerate.
422 * rl78-decode.c: Regenerate.
424 2016-03-01 Nick Clifton <nickc@redhat.com>
427 * rl78-dis.c (print_insn_rl78_common): Fix typo.
429 2016-02-24 Renlin Li <renlin.li@arm.com>
431 * arm-dis.c (coprocessor_opcodes): Add fp16 instruction entries.
432 (print_insn_coprocessor): Support fp16 instructions.
434 2016-02-24 Renlin Li <renlin.li@arm.com>
436 * arm-dis.c (print_insn_coprocessor): Fix mask for vsel, vmaxnm,
439 2016-02-24 Renlin Li <renlin.li@arm.com>
441 * arm-dis.c (print_insn_coprocessor): Check co-processor number for
442 cpd/cpd2, mcr/mcr2, mrc/mrc2, ldc/ldc2, stc/stc2.
444 2016-02-15 H.J. Lu <hongjiu.lu@intel.com>
446 * i386-dis.c (print_insn): Parenthesize expression to prevent
450 2016-02-10 Claudiu Zissulescu <claziss@synopsys.com>
451 Janek van Oirschot <jvanoirs@synopsys.com>
453 * arc-opc.c (arc_relax_opcodes, arc_num_relax_opcodes): New
456 2016-02-04 Nick Clifton <nickc@redhat.com>
459 * msp430-dis.c (print_insn_msp430): Add a special case for
460 decoding an RRC instruction with the ZC bit set in the extension
463 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
465 * cgen-ibld.in (insert_normal): Rework calculation of shift.
466 * epiphany-ibld.c: Regenerate.
467 * fr30-ibld.c: Regenerate.
468 * frv-ibld.c: Regenerate.
469 * ip2k-ibld.c: Regenerate.
470 * iq2000-ibld.c: Regenerate.
471 * lm32-ibld.c: Regenerate.
472 * m32c-ibld.c: Regenerate.
473 * m32r-ibld.c: Regenerate.
474 * mep-ibld.c: Regenerate.
475 * mt-ibld.c: Regenerate.
476 * or1k-ibld.c: Regenerate.
477 * xc16x-ibld.c: Regenerate.
478 * xstormy16-ibld.c: Regenerate.
480 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
482 * epiphany-dis.c: Regenerated from latest cpu files.
484 2016-02-01 Michael McConville <mmcco@mykolab.com>
486 * cgen-dis.c (count_decodable_bits): Use unsigned value for mask
489 2016-01-25 Renlin Li <renlin.li@arm.com>
491 * arm-dis.c (mapping_symbol_for_insn): New function.
492 (find_ifthen_state): Call mapping_symbol_for_insn().
494 2016-01-20 Matthew Wahab <matthew.wahab@arm.com>
496 * aarch64-opc.c (operand_general_constraint_met_p): Check validity
497 of MSR UAO immediate operand.
499 2016-01-18 Maciej W. Rozycki <macro@imgtec.com>
501 * mips-dis.c (print_insn_micromips): Remove 48-bit microMIPS
504 2016-01-17 Alan Modra <amodra@gmail.com>
506 * configure: Regenerate.
508 2016-01-14 Nick Clifton <nickc@redhat.com>
510 * rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw
511 instructions that can support stack pointer operations.
512 * rl78-decode.c: Regenerate.
513 * rl78-dis.c: Fix display of stack pointer in MOVW based
516 2016-01-14 Matthew Wahab <matthew.wahab@arm.com>
518 * aarch64-opc.c (aarch64_sys_reg_supported_p): Merge conditionals
519 testing for RAS support. Add checks for erxfr_el1, erxctlr_el1,
520 erxtatus_el1 and erxaddr_el1.
522 2016-01-12 Matthew Wahab <matthew.wahab@arm.com>
524 * arm-dis.c (arm_opcodes): Add "esb".
525 (thumb_opcodes): Likewise.
527 2016-01-11 Peter Bergner <bergner@vnet.ibm.com>
529 * ppc-opc.c <xscmpnedp>: Delete.
530 <xvcmpnedp>: Likewise.
531 <xvcmpnedp.>: Likewise.
532 <xvcmpnesp>: Likewise.
533 <xvcmpnesp.>: Likewise.
535 2016-01-08 Andreas Schwab <schwab@linux-m68k.org>
538 * m68k-opc.c (moveb, movew): For ISA_B/C only allow #,d(An) in
541 2016-01-01 Alan Modra <amodra@gmail.com>
543 Update year range in copyright notice of all files.
545 For older changes see ChangeLog-2015
547 Copyright (C) 2016 Free Software Foundation, Inc.
549 Copying and distribution of this file, with or without modification,
550 are permitted in any medium without royalty provided the copyright
551 notice and this notice are preserved.
557 version-control: never