opcodes/ChangeLog

   1 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * bfin-dis.c (decode_PushPopMultiple_0): Return 0 when pr > 5.
   4
   5 2010-09-22  Robin Getz  <robin.getz@analog.com>
   6
   7         * bfin-dis.c (decode_dsp32shiftimm_0): Add missing "S" flag.
   8
   9 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  10
  11         * bfin-dis.c (decode_CC2stat_0): Decode all ASTAT bits.
  12
  13 2010-09-22  Robin Getz  <robin.getz@analog.com>
  14
  15         * bfin-dis.c (IS_DREG, IS_PREG, IS_GENREG, IS_DAGREG): Reject
  16         register values greater than 8.
  17         (IS_RESERVEDREG, allreg, mostreg): New helpers.
  18         (decode_ProgCtrl_0): Call IS_DREG/IS_PREG as appropriate.
  19         (decode_PushPopReg_0): Call mostreg/allreg as appropriate.
  20         (decode_CC2dreg_0): Check valid CC register number.
  21
  22 2010-09-22  Robin Getz  <robin.getz@analog.com>
  23
  24         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after DBG.
  25
  26 2010-09-22  Robin Getz  <robin.getz@analog.com>
  27
  28         * bfin-dis.c (machine_registers): Add AC0_COPY, V_COPY, and RND_MOD.
  29         (reg_names): Likewise.
  30         (decode_statbits): Likewise; while reformatting to make manageable.
  31
  32 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  33
  34         * bfin-dis.c (decode_pseudoDEBUG_0): Add space after OUTC.
  35         (decode_pseudoOChar_0): New function.
  36         (_print_insn_bfin): Remove #if 0 and call new decode_pseudoOChar_0.
  37
  38 2010-09-22  Robin Getz  <robin.getz@analog.com>
  39
  40         * bfin-dis.c (decode_dsp32shift_0): Decode sub opcodes 2/2 as
  41         LSHIFT instead of SHIFT.
  42
  43 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
  44
  45         * bfin-dis.c (constant_formats): Constify the whole structure.
  46         (fmtconst): Add const to return value.
  47         (reg_names): Mark const.
  48         (decode_multfunc): Mark s0/s1 as const.
  49         (decode_macfunc): Mark a/sop as const.
  50
  51 2010-09-17  Tejas Belagod  <tejas.belagod@arm.com>
  52
  53         * arm_dis.c (coprocessor_opcodes): Add MRC entry for APSR_nzcv.
  54
  55 2010-09-14  Maciej W. Rozycki  <macro@codesourcery.com>
  56
  57         * mips-opc.c (mips_builtin_opcodes): Add "sync_acquire",
  58         "sync_mb", "sync_release", "sync_rmb" and "sync_wmb".
  59
  60 2010-09-10  Pierre Muller  <muller@ics.u-strasbg.fr>
  61
  62         * src/opcodes/dlx-dis.c (print_insn_dlx): Use dlx_insn type for
  63         dlx_insn_type array.
  64
  65 2010-08-31  H.J. Lu  <hongjiu.lu@intel.com>
  66
  67         PR binutils/11960
  68         * i386-dis.c (sIv): New.
  69         (dis386): Replace Iq with sIv on "pushT".
  70         (reg_table): Replace T with {T|} on callT, JcallT, jmpT and JjmpT.
  71         (x86_64_table): Replace {T|}/{P|} with P.
  72         (putop): Add 'w' to 'T'/'P' if needed for Intel syntax.
  73         (OP_sI): Update v_mode.  Remove w_mode.
  74
  75 2010-08-27  Nathan Froyd  <froydnj@codesourcery.com>
  76
  77         * ppc-opc.c (powerpc_opcodes) [lswx,lswi,stswx,stswi]: Deprecate
  78         on E500 and E500MC.
  79
  80 2010-08-17  H.J. Lu  <hongjiu.lu@intel.com>
  81
  82         * i386-dis.c (reg_table): Replace Eb with Mb on prefetch and
  83         prefetchw.
  84
  85 2010-08-06  Quentin Neill <quentin.neill@amd.com>
  86
  87         * i386-gen.c (cpu_flag_init): Define CpuNop extension flag, add
  88         to processor flags for PENTIUMPRO processors and later.
  89         * i386-opc.h (enum): Add CpuNop.
  90         (i386_cpu_flags): Add cpunop bit.
  91         * i386-opc.tbl: Change nop cpu_flags.
  92         * i386-init.h: Regenerated.
  93         * i386-tbl.h: Likewise.
  94
  95 2010-08-06  Quentin Neill <quentin.neill@amd.com>
  96
  97         * i386-opc.h (enum): Fix typos in comments.
  98
  99 2010-08-06  Alan Modra  <amodra@gmail.com>
 100
 101         * disassemble.c: Formatting.
 102         (disassemble_init_for_target <ARCH_m32c>): Comment on endian.
 103
 104 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
 105
 106         * i386-opc.tbl: Add Cpu186 to ud1/ud2/ud2a/ud2b.
 107         * i386-tbl.h: Regenerated.
 108
 109 2010-08-05  H.J. Lu  <hongjiu.lu@intel.com>
 110
 111         * i386-dis.c (dis386_twobyte): Replace ud2a/ud2b with ud2/ud1.
 112
 113         * i386-opc.tbl: Add ud1.  Remove Cpu686 from ud2/ud2a/ud2b.
 114         * i386-tbl.h: Regenerated.
 115
 116 2010-07-29  DJ Delorie  <dj@redhat.com>
 117
 118         * rx-decode.opc (SRR): New.
 119         (rx_decode_opcode): Use it for movbi and movbir.  Decode NOP2 (mov
 120         r0,r0) and NOP3 (max r0,r0) special cases.
 121         * rx-decode.c: Regenerate.
 122
 123 2010-07-28  H.J. Lu  <hongjiu.lu@intel.com>
 124
 125         * i386-dis.c: Add 0F to VEX opcode enums.
 126
 127 2010-07-27  DJ Delorie  <dj@redhat.com>
 128
 129         * rx-decode.opc (store_flags): Remove, replace with F_* macros.
 130         (rx_decode_opcode): Likewise.
 131         * rx-decode.c: Regenerate.
 132
 133 2010-07-23  Naveen.H.S  <naveen.S@kpitcummins.com>
 134             Ina Pandit  <ina.pandit@kpitcummins.com>
 135
 136         * v850-dis.c (v850_sreg_names): Updated structure for system
 137         registers.
 138         (float_cc_names): new structure for condition codes.
 139         (print_value): Update the function that prints value.
 140         (get_operand_value): New function to get the operand value.
 141         (disassemble): Updated to handle the disassembly of instructions.
 142         (print_insn_v850): Updated function to print instruction for different
 143         families.
 144         * opcodes/v850-opc.c (v850_msg_is_out_of_range, insert_i5div1,
 145         extract_i5div1, insert_i5div2, extract_i5div2, insert_i5div3,
 146         extract_i5div3, insert_d5_4, extract_d5_4, extract_d8_6,
 147         insert_d8_7, extract_d8_7, insert_v8, extract_v8, insert_u16_loop,
 148         extract_u16_loop, insert_d16_15, extract_d16_15, insert_d16_16,
 149         extract_d16_16, nsert_d17_16, extract_d17_16, insert_d22,
 150         extract_d22, insert_d23, extract_d23, insert_i9, extract_i9,
 151         insert_u9, extract_u9, extract_spe, insert_r4, extract_r4): New.
 152         (insert_d8_7, insert_d5_4, insert_i5div): Remove.
 153         (v850_operands): Update with the relocation name. Also update
 154         the instructions with specific set of processors.
 155
 156 2010-07-08 Tejas Belagod <tejas.belagod@arm.com>
 157
 158         * arm-dis.c (print_insn_arm): Add cases for printing more
 159         symbolic operands.
 160         (print_insn_thumb32): Likewise.
 161
 162 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 163
 164         * mips-dis.c (print_insn_mips): Correct branch instruction type
 165         determination.
 166
 167 2010-07-06  Maciej W. Rozycki  <macro@codesourcery.com>
 168
 169         * mips-dis.c (print_mips16_insn_arg): Remove branch instruction
 170         type and delay slot determination.
 171         (print_insn_mips16): Extend branch instruction type and delay
 172         slot determination to cover all instructions.
 173         * mips16-opc.c (BR): Remove macro.
 174         (UBR, CBR): New macros.
 175         (mips16_opcodes): Update branch annotation for "b", "beqz",
 176         "bnez", "bteqz" and "btnez".  Add branch annotation for "jalrc"
 177         and "jrc".
 178
 179 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 180
 181         AVX Programming Reference (June, 2010)
 182         * i386-dis.c (mod_table): Replace rdrnd with rdrand.
 183         * i386-opc.tbl: Likewise.
 184         * i386-tbl.h: Regenerated.
 185
 186 2010-07-05  H.J. Lu  <hongjiu.lu@intel.com>
 187
 188         * i386-opc.h (CpuFSGSBase): Fix a typo in comments.
 189
 190 2010-07-03  Andreas Schwab  <schwab@linux-m68k.org>
 191
 192         * ppc-dis.c (powerpc_init_dialect): Cast PPC_OPCODE_xxx to
 193         ppc_cpu_t before inverting.
 194         (ppc_parse_cpu): Likewise.
 195         (print_insn_powerpc): Likewise.
 196
 197 2010-07-03  Alan Modra  <amodra@gmail.com>
 198
 199         * ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
 200         * ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
 201         (PPC64, MFDEC2): Update.
 202         (NON32, NO371): Define.
 203         (powerpc_opcode): Update to not use old opcode flags, and avoid
 204         -m601 duplicates.
 205
 206 2010-07-03  DJ Delorie  <dj@delorie.com>
 207
 208         * m32c-ibld.c: Regenerate.
 209
 210 2010-07-03  Alan Modra  <amodra@gmail.com>
 211
 212         * ppc-opc.c (PWR2COM): Define.
 213         (PPCPWR2): Add PPC_OPCODE_COMMON.
 214         (powerpc_opcodes): Add "subc", "subco", "subco.", "fcir", "fcir.",
 215         "fcirz", "fcirz." to -mcom opcodes.  Remove "mfsri", "dclst",
 216         "rac" from -mcom.
 217
 218 2010-07-01  H.J. Lu  <hongjiu.lu@intel.com>
 219
 220         AVX Programming Reference (June, 2010)
 221         * i386-dis.c (PREFIX_0FAE_REG_0): New.
 222         (PREFIX_0FAE_REG_1): Likewise.
 223         (PREFIX_0FAE_REG_2): Likewise.
 224         (PREFIX_0FAE_REG_3): Likewise.
 225         (PREFIX_VEX_3813): Likewise.
 226         (PREFIX_VEX_3A1D): Likewise.
 227         (prefix_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 228         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3, PREFIX_VEX_3813 and
 229         PREFIX_VEX_3A1D.
 230         (vex_table): Add PREFIX_VEX_3813 and PREFIX_VEX_3A1D.
 231         (mod_table): Add PREFIX_0FAE_REG_0, PREFIX_0FAE_REG_1,
 232         PREFIX_0FAE_REG_2, PREFIX_0FAE_REG_3 xsaveopt and rdrnd.
 233
 234         * i386-gen.c (cpu_flag_init): Add CPU_XSAVEOPT_FLAGS,
 235         CPU_FSGSBASE_FLAGS, CPU_RDRND_FLAGS and CPU_F16C_FLAGS.
 236         (cpu_flags): Add CpuXsaveopt, CpuFSGSBase, CpuRdRnd and CpuF16C.
 237
 238         * i386-opc.h (CpuXsaveopt): New.
 239         (CpuFSGSBase): Likewise.
 240         (CpuRdRnd): Likewise.
 241         (CpuF16C): Likewise.
 242         (i386_cpu_flags): Add cpuxsaveopt, cpufsgsbase, cpurdrnd and
 243         cpuf16c.
 244
 245         * i386-opc.tbl: Add xsaveopt, rdfsbase, rdgsbase, rdrnd,
 246         wrfsbase, wrgsbase, vcvtph2ps and vcvtps2ph.
 247         * i386-init.h: Regenerated.
 248         * i386-tbl.h: Likewise.
 249
 250 2010-07-01  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 251
 252         * ppc-opc.c (powerpc_opcodes): Revert deprecation of mfocrf, mtcrf
 253         and mtocrf on EFS.
 254
 255 2010-06-29  Alan Modra  <amodra@gmail.com>
 256
 257         * maxq-dis.c: Delete file.
 258         * Makefile.am: Remove references to maxq.
 259         * configure.in: Likewise.
 260         * disassemble.c: Likewise.
 261         * Makefile.in: Regenerate.
 262         * configure: Regenerate.
 263         * po/POTFILES.in: Regenerate.
 264
 265 2010-06-29  Alan Modra  <amodra@gmail.com>
 266
 267         * mep-dis.c: Regenerate.
 268
 269 2010-06-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 270
 271         * arm-disc.c (parse_insn_neon):  Fix Neon alignment syntax.
 272
 273 2010-06-27  Alan Modra  <amodra@gmail.com>
 274
 275         * arc-dis.c (arc_sprintf): Delete set but unused variables.
 276         (decodeInstr): Likewise.
 277         * dlx-dis.c (print_insn_dlx): Likewise.
 278         * h8300-dis.c (bfd_h8_disassemble_init): Likewise.
 279         * maxq-dis.c (check_move, print_insn): Likewise.
 280         * mep-dis.c (mep_examine_ivc2_insns): Likewise.
 281         * msp430-dis.c (msp430_branchinstr): Likewise.
 282         * bfin-dis.c (_print_insn_bfin): Avoid set but unused warning.
 283         * cgen-asm.in (parse_insn_normal, _cgen_assemble_insn): Likewise.
 284         * sparc-dis.c (print_insn_sparc): Likewise.
 285         * fr30-asm.c: Regenerate.
 286         * frv-asm.c: Regenerate.
 287         * ip2k-asm.c: Regenerate.
 288         * iq2000-asm.c: Regenerate.
 289         * lm32-asm.c: Regenerate.
 290         * m32c-asm.c: Regenerate.
 291         * m32r-asm.c: Regenerate.
 292         * mep-asm.c: Regenerate.
 293         * mt-asm.c: Regenerate.
 294         * openrisc-asm.c: Regenerate.
 295         * xc16x-asm.c: Regenerate.
 296         * xstormy16-asm.c: Regenerate.
 297
 298 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 299
 300         PR gas/11673
 301         * m68k-opc.c (m68k_opcodes): Remove move.l for isab and later.
 302
 303 2010-06-16  Vincent Rivière  <vincent.riviere@freesbee.fr>
 304
 305         PR binutils/11676
 306         * m68k-dis.c (print_insn_arg): Prefix float constants with #0e.
 307
 308 2010-06-14  Sebastian Andrzej Siewior  <bigeasy@linutronix.de>
 309
 310         * ppc-dis.c (ppc_opts):  Remove PPC_OPCODE_E500MC from e500 and
 311         e500x2.  Add PPC_OPCODE_E500 to e500 and e500x2
 312         * ppc-opc.c (powerpc_opcodes): Deprecate all opcodes on EFS which
 313         touch floating point regs and are enabled by COM, PPC or PPCCOM.
 314         Treat sync as msync on e500.  Treat eieio as mbar 1 on e500.
 315         Treat lwsync as msync on e500.
 316
 317 2010-06-07  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 318
 319         * arm-dis.c (thumb-opcodes): Add disassembly for movs.
 320
 321 2010-05-28  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 322
 323         * arm-dis.c (print_insn_neon):  Ensure disassembly of Neon
 324         constants is the same on 32-bit and 64-bit hosts.
 325
 326 2010-05-27  Jason Duerstock  <jason.duerstock+binutils@gmail.com>
 327
 328         * m68k-dis.c (print_insn_m68k): Emit undefined instructions as
 329         .short directives so that they can be reassembled.
 330
 331 2010-05-26  Catherine Moore <clm@codesourcery.com>
 332             David Ung  <davidu@mips.com>
 333
 334         * mips-opc.c: Change membership to I1 for instructions ssnop and
 335         ehb.
 336
 337 2010-05-26  H.J. Lu  <hongjiu.lu@intel.com>
 338
 339         * i386-dis.c (sib): New.
 340         (get_sib): Likewise.
 341         (print_insn): Call get_sib.
 342         OP_E_memory): Use sib.
 343
 344 2010-05-26  Catherine Moore  <clm@codesoourcery.com>
 345
 346         * mips-dis.c (mips_arch): Remove INSN_MIPS16.
 347         * mips-opc.c (I16): Remove.
 348         (mips_builtin_op): Reclassify jalx.
 349
 350 2010-05-19  Alan Modra  <amodra@gmail.com>
 351
 352         * ppc-opc.c (powerpc_opcodes): Enable divdeu, devweu, divde,
 353         divwe, divdeuo, divweuo, divdeo, divweo for A2.  Add icswepx.
 354
 355 2010-05-13  Alan Modra  <amodra@gmail.com>
 356
 357         * ppc-opc.c (powerpc_opcodes): Correct wclr encoding.
 358
 359 2010-05-11  Matthew Gretton-Dann  <matthew.gretton-dann@arm.com>
 360
 361         * arm-dis.c (thumb_opcodes): Update ldmia entry to use new %W
 362         format.
 363         (print_insn_thumb16): Add support for new %W format.
 364
 365 2010-05-07  Tristan Gingold  <gingold@adacore.com>
 366
 367         * Makefile.in: Regenerate with automake 1.11.1.
 368         * aclocal.m4: Ditto.
 369
 370 2010-05-05  Nick Clifton  <nickc@redhat.com>
 371
 372         * po/es.po: Updated Spanish translation.
 373
 374 2010-04-22  Nick Clifton  <nickc@redhat.com>
 375
 376         * po/opcodes.pot: Updated by the Translation project.
 377         * po/vi.po: Updated Vietnamese translation.
 378
 379 2010-04-16  H.J. Lu  <hongjiu.lu@intel.com>
 380
 381         * i386-dis.c (get_valid_dis386): Return bad_opcode on unknown
 382         bits in opcode.
 383
 384 2010-04-09  Nick Clifton  <nickc@redhat.com>
 385
 386         * i386-dis.c (print_insn): Remove unused variable op.
 387         (OP_sI): Remove unused variable mask.
 388
 389 2010-04-07  Alan Modra  <amodra@gmail.com>
 390
 391         * configure: Regenerate.
 392
 393 2010-04-06  Peter Bergner  <bergner@vnet.ibm.com>
 394
 395         * ppc-opc.c (RBOPT): New define.
 396         ("dccci"): Enable for PPCA2.  Make operands optional.
 397         ("iccci"): Likewise.  Do not deprecate for PPC476.
 398
 399 2010-04-02  Masaki Muranaka  <monaka@monami-software.com>
 400
 401         * cr16-opc.c (cr16_instruction): Fix typo in comment.
 402
 403 2010-03-25  Joseph Myers  <joseph@codesourcery.com>
 404
 405         * Makefile.am (TARGET_LIBOPCODES_CFILES): Add tic6x-dis.c.
 406         * Makefile.in: Regenerate.
 407         * configure.in (bfd_tic6x_arch): New.
 408         * configure: Regenerate.
 409         * disassemble.c (ARCH_tic6x): Define if ARCH_all.
 410         (disassembler): Handle TI C6X.
 411         * tic6x-dis.c: New.
 412
 413 2010-03-24  Mike Frysinger  <vapier@gentoo.org>
 414
 415         * bfin-dis.c (decode_regs_hi): Change REG_LH2 typo to REG_MH2.
 416
 417 2010-03-23  Joseph Myers  <joseph@codesourcery.com>
 418
 419         * dis-buf.c (buffer_read_memory): Give error for reading just
 420         before the start of memory.
 421
 422 2010-03-22  Sebastian Pop  <sebastian.pop@amd.com>
 423             Quentin Neill <quentin.neill@amd.com>
 424
 425         * i386-dis.c (OP_LWP_I): Removed.
 426         (reg_table): Do not use OP_LWP_I, use Iq.
 427         (OP_LWPCB_E): Remove use of names16.
 428         (OP_LWP_E): Same.
 429         * i386-opc.tbl: Removed 16bit LWP insns.  32bit LWP insns
 430         should not set the Vex.length bit.
 431         * i386-tbl.h: Regenerated.
 432
 433 2010-02-25  Edmar Wienskoski  <edmar@freescale.com>
 434
 435         * ppc-dis.c (ppc_opts): Add PPC_OPCODE_E500MC for "e500mc64".
 436
 437 2010-02-24  Nick Clifton  <nickc@redhat.com>
 438
 439         PR binutils/6773
 440         * arm-dis.c (arm_opcodes): Replace <prefix>addsubx with
 441         <prefix>asx.  Replace <prefix>subaddx with <prefix>sax.
 442         (thumb32_opcodes): Likewise.
 443
 444 2010-02-15  Nick Clifton  <nickc@redhat.com>
 445
 446         * po/vi.po: Updated Vietnamese translation.
 447
 448 2010-02-12  Doug Evans  <dje@sebabeach.org>
 449
 450         * lm32-opinst.c: Regenerate.
 451
 452 2010-02-11  Doug Evans  <dje@sebabeach.org>
 453
 454         * cgen-dis.in (print_normal): Delete CGEN_PRINT_NORMAL.
 455         (print_address): Delete CGEN_PRINT_ADDRESS.
 456         * fr30-dis.c, * frv-dis.c, * ip2k-dis.c, * iq2000-dis.c,
 457         * lm32-dis.c, * m32c-dis.c, * m32r-desc.c, * m32r-desc.h,
 458         * m32r-dis.c, * mep-dis.c, * mt-dis.c, * openrisc-dis.c,
 459         * xc16x-dis.c, * xstormy16-dis.c: Regenerate.
 460
 461         * fr30-desc.c, * fr30-desc.h, * fr30-opc.c,
 462         * frv-desc.c, * frv-desc.h, * frv-opc.c,
 463         * ip2k-desc.c, * ip2k-desc.h, * ip2k-opc.c,
 464         * iq2000-desc.c, * iq2000-desc.h, * iq2000-opc.c,
 465         * lm32-desc.c, * lm32-desc.h, * lm32-opc.c, * lm32-opinst.c,
 466         * m32c-desc.c, * m32c-desc.h, * m32c-opc.c,
 467         * m32r-desc.c, * m32r-desc.h, * m32r-opc.c, * m32r-opinst.c,
 468         * mep-desc.c, * mep-desc.h, * mep-opc.c,
 469         * mt-desc.c, * mt-desc.h, * mt-opc.c,
 470         * openrisc-desc.c, * openrisc-desc.h, * openrisc-opc.c,
 471         * xc16x-desc.c, * xc16x-desc.h, * xc16x-opc.c,
 472         * xstormy16-desc.c, * xstormy16-desc.h, * xstormy16-opc.c: Regenerate.
 473
 474 2010-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 475
 476         * i386-dis.c: Update copyright.
 477         * i386-gen.c: Likewise.
 478         * i386-opc.h: Likewise.
 479         * i386-opc.tbl: Likewise.
 480
 481 2010-02-10  Quentin Neill  <quentin.neill@amd.com>
 482             Sebastian Pop  <sebastian.pop@amd.com>
 483
 484         * i386-dis.c (OP_EX_VexImmW): Reintroduced
 485         function to handle 5th imm8 operand.
 486         (PREFIX_VEX_3A48): Added.
 487         (PREFIX_VEX_3A49): Added.
 488         (VEX_W_3A48_P_2): Added.
 489         (VEX_W_3A49_P_2): Added.
 490         (prefix table): Added entries for PREFIX_VEX_3A48
 491         and PREFIX_VEX_3A49.
 492         (vex table): Added entries for VEX_W_3A48_P_2 and
 493         and VEX_W_3A49_P_2.
 494         * i386-gen.c (operand_type_init): Added OPERAND_TYPE_VEC_IMM4
 495         for Vec_Imm4 operands.
 496         * i386-opc.h (enum): Added Vec_Imm4.
 497         (i386_operand_type): Added vec_imm4.
 498         * i386-opc.tbl: Add entries for vpermilp[ds].
 499         * i386-init.h: Regenerated.
 500         * i386-tbl.h: Regenerated.
 501
 502 2010-02-10  Richard Sandiford  <r.sandiford@uk.ibm.com>
 503
 504         * ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
 505         and "pwr7".  Move "a2" into alphabetical order.
 506
 507 2010-02-08  Philipp Tomsich  <philipp.tomsich@theobroma-systems.com>
 508
 509         * ppc-dis.c (ppc_opts): Add titan entry.
 510         * ppc-opc.c (TITAN, MULHW): Define.
 511         (powerpc_opcodes): Support AppliedMicro Titan core (APM83xxx).
 512
 513 2010-02-03  Quentin Neill  <quentin.neill@amd.com>
 514
 515         * i386-gen.c (cpu_flag_init): Rename CPU_AMDFAM15_FLAGS
 516         to CPU_BDVER1_FLAGS
 517         * i386-init.h: Regenerated.
 518
 519 2010-02-03  Anthony Green  <green@moxielogic.com>
 520
 521         * moxie-opc.c (moxie_form1_opc_info): Move "nop" from 0x00 to
 522         0x0f, and make 0x00 an illegal instruction.
 523
 524 2010-01-29  Daniel Jacobowitz  <dan@codesourcery.com>
 525
 526         * opcodes/arm-dis.c (struct arm_private_data): New.
 527         (print_insn_coprocessor, print_insn_arm): Update to use struct
 528         arm_private_data.
 529         (is_mapping_symbol, get_map_sym_type): New functions.
 530         (get_sym_code_type): Check the symbol's section.  Do not check
 531         mapping symbols.
 532         (print_insn): Default to disassembling ARM mode code.  Check
 533         for mapping symbols separately from other symbols.  Use
 534         struct arm_private_data.
 535
 536 2010-01-28  H.J. Lu  <hongjiu.lu@intel.com>
 537
 538         * i386-dis.c (EXVexWdqScalar): New.
 539         (vex_scalar_w_dq_mode): Likewise.
 540         (prefix_table): Update entries for PREFIX_VEX_3899,
 541         PREFIX_VEX_389B, PREFIX_VEX_389D, PREFIX_VEX_389F,
 542         PREFIX_VEX_38A9, PREFIX_VEX_38AB, PREFIX_VEX_38AD,
 543         PREFIX_VEX_38AF, PREFIX_VEX_38B9, PREFIX_VEX_38BB,
 544         PREFIX_VEX_38BD and PREFIX_VEX_38BF.
 545         (intel_operand_size): Handle vex_scalar_w_dq_mode.
 546         (OP_EX): Likewise.
 547
 548 2010-01-27  H.J. Lu  <hongjiu.lu@intel.com>
 549
 550         * i386-dis.c (XMScalar): New.
 551         (EXdScalar): Likewise.
 552         (EXqScalar): Likewise.
 553         (EXqScalarS): Likewise.
 554         (VexScalar): Likewise.
 555         (EXdVexScalarS): Likewise.
 556         (EXqVexScalarS): Likewise.
 557         (XMVexScalar): Likewise.
 558         (scalar_mode): Likewise.
 559         (d_scalar_mode): Likewise.
 560         (d_scalar_swap_mode): Likewise.
 561         (q_scalar_mode): Likewise.
 562         (q_scalar_swap_mode): Likewise.
 563         (vex_scalar_mode): Likewise.
 564         (vex_len_table): Duplcate entries for VEX_LEN_10_P_1,
 565         VEX_LEN_10_P_3, VEX_LEN_11_P_1, VEX_LEN_11_P_3, VEX_LEN_2A_P_1,
 566         VEX_LEN_2A_P_3, VEX_LEN_2C_P_3, VEX_LEN_2D_P_1, VEX_LEN_2E_P_0,
 567         VEX_LEN_2E_P_2, VEX_LEN_2F_P_2, VEX_LEN_51_P_1, VEX_LEN_51_P_3,
 568         VEX_LEN_52_P_1, VEX_LEN_53_P_1, VEX_LEN_58_P_1, VEX_LEN_58_P_3,
 569         VEX_LEN_59_P_1, VEX_LEN_5A_P_1, VEX_LEN_5A_P_3, VEX_LEN_5C_P_1,
 570         VEX_LEN_5C_P_3, VEX_LEN_5D_P_1, VEX_LEN_5D_P_3, VEX_LEN_5E_P_1,
 571         VEX_LEN_5E_P_3, VEX_LEN_5F_P_1, VEX_LEN_5F_P_3, VEX_LEN_6E_P_2,
 572         VEX_LEN_7E_P_1, VEX_LEN_7E_P_2, VEX_LEN_D6_P_2, VEX_LEN_C2_P_1,
 573         VEX_LEN_C2_P_3, VEX_LEN_3A0A_P_2 and VEX_LEN_3A0B_P_2.
 574         (vex_w_table): Update entries for VEX_W_10_P_1, VEX_W_10_P_3,
 575         VEX_W_11_P_1, VEX_W_11_P_3, VEX_W_2E_P_0, VEX_W_2E_P_2,
 576         VEX_W_2F_P_0, VEX_W_2F_P_2, VEX_W_51_P_1, VEX_W_51_P_3,
 577         VEX_W_52_P_1, VEX_W_53_P_1, VEX_W_58_P_1, VEX_W_58_P_3,
 578         VEX_W_59_P_1, VEX_W_59_P_3, VEX_W_5A_P_1, VEX_W_5A_P_3,
 579         VEX_W_5C_P_1, VEX_W_5C_P_3, VEX_W_5D_P_1, VEX_W_5D_P_3,
 580         VEX_W_5E_P_1, VEX_W_5E_P_3, VEX_W_5F_P_1, VEX_W_5F_P_3,
 581         VEX_W_7E_P_1, VEX_W_D6_P_2  VEX_W_C2_P_1, VEX_W_C2_P_3,
 582         VEX_W_3A0A_P_2 and VEX_W_3A0B_P_2.
 583         (intel_operand_size): Handle d_scalar_mode, d_scalar_swap_mode,
 584         q_scalar_mode, q_scalar_swap_mode.
 585         (OP_XMM): Handle scalar_mode.
 586         (OP_EX): Handle d_scalar_mode, d_scalar_swap_mode, q_scalar_mode
 587         and q_scalar_swap_mode.
 588         (OP_VEX): Handle vex_scalar_mode.
 589
 590 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 591
 592         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 593
 594 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 595
 596         * i386-dis.c (vex_len_table): Remove trailing { Bad_Opcode }.
 597
 598 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 599
 600         * i386-dis.c (prefix_table): Remove trailing { Bad_Opcode }.
 601
 602 2010-01-24  H.J. Lu  <hongjiu.lu@intel.com>
 603
 604         * i386-dis.c (Bad_Opcode): New.
 605         (bad_opcode): Likewise.
 606         (dis386): Replace { "(bad)", { XX } } with { Bad_Opcode }.
 607         (dis386_twobyte): Likewise.
 608         (reg_table): Likewise.
 609         (prefix_table): Likewise.
 610         (x86_64_table): Likewise.
 611         (vex_len_table): Likewise.
 612         (vex_w_table): Likewise.
 613         (mod_table): Likewise.
 614         (rm_table): Likewise.
 615         (float_reg): Likewise.
 616         (reg_table): Remove trailing "(bad)" entries.
 617         (prefix_table): Likewise.
 618         (x86_64_table): Likewise.
 619         (vex_len_table): Likewise.
 620         (vex_w_table): Likewise.
 621         (mod_table): Likewise.
 622         (rm_table): Likewise.
 623         (get_valid_dis386): Handle bytemode 0.
 624
 625 2010-01-23  H.J. Lu  <hongjiu.lu@intel.com>
 626
 627         * i386-opc.h (VEXScalar): New.
 628
 629         * i386-opc.tbl: Replace "Vex" with "Vex=3" on AVX scalar
 630         instructions.
 631         * i386-tbl.h: Regenerated.
 632
 633 2010-01-21  H.J. Lu  <hongjiu.lu@intel.com>
 634
 635         * i386-dis.c (mod_table): Use FXSAVE on xsave and xrstor.
 636
 637         * i386-opc.tbl: Add xsave64 and xrstor64.
 638         * i386-tbl.h: Regenerated.
 639
 640 2010-01-20  Nick Clifton  <nickc@redhat.com>
 641
 642         PR 11170
 643         * arm-dis.c (print_arm_address): Do not ignore negative bit in PC
 644         based post-indexed addressing.
 645
 646 2010-01-15  Sebastian Pop  <sebastian.pop@amd.com>
 647
 648         * i386-opc.tbl: Support all the possible aliases for VPCOM* insns.
 649         * i386-tbl.h: Regenerated.
 650
 651 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 652
 653         * i386-opc.h (VexVVVV): Replace VEX.DNS with VEX.NDS in
 654         comments.
 655
 656 2010-01-14  H.J. Lu  <hongjiu.lu@intel.com>
 657
 658         * i386-dis.c (names_mm): New.
 659         (intel_names_mm): Likewise.
 660         (att_names_mm): Likewise.
 661         (names_xmm): Likewise.
 662         (intel_names_xmm): Likewise.
 663         (att_names_xmm): Likewise.
 664         (names_ymm): Likewise.
 665         (intel_names_ymm): Likewise.
 666         (att_names_ymm): Likewise.
 667         (print_insn): Set names_mm, names_xmm and names_ymm.
 668         (OP_MMX): Use names_mm, names_xmm and names_ymm.
 669         (OP_XMM): Likewise.
 670         (OP_EM): Likewise.
 671         (OP_EMC): Likewise.
 672         (OP_MXC): Likewise.
 673         (OP_EX): Likewise.
 674         (XMM_Fixup): Likewise.
 675         (OP_VEX): Likewise.
 676         (OP_EX_VexReg): Likewise.
 677         (OP_Vex_2src): Likewise.
 678         (OP_Vex_2src_1): Likewise.
 679         (OP_Vex_2src_2): Likewise.
 680         (OP_REG_VexI4): Likewise.
 681
 682 2010-01-13  H.J. Lu  <hongjiu.lu@intel.com>
 683
 684         * i386-dis.c (print_insn): Update comments.
 685
 686 2010-01-12  H.J. Lu  <hongjiu.lu@intel.com>
 687
 688         * i386-dis.c (rex_original): Removed.
 689         (ckprefix): Remove rex_original.
 690         (print_insn): Update comments.
 691
 692 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 693
 694         * Makefile.in: Regenerate.
 695         * configure: Regenerate.
 696
 697 2010-01-07  Doug Evans  <dje@sebabeach.org>
 698
 699         * cgen-ibld.in (insert_normal, extract_normal): Minor cleanup.
 700         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 701         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 702         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 703         * xstormy16-ibld.c: Regenerate.
 704
 705 2010-01-06  Quentin Neill  <quentin.neill@amd.com>
 706
 707         * i386-gen.c (cpu_flag_init): Add new CPU_AMDFAM15_FLAGS.
 708         * i386-init.h: Regenerated.
 709
 710 2010-01-06  Daniel Gutson  <dgutson@codesourcery.com>
 711
 712         * arm-dis.c (print_insn): Fixed search for next symbol and data
 713         dumping condition, and the initial mapping symbol state.
 714
 715 2010-01-05  Doug Evans  <dje@sebabeach.org>
 716
 717         * cgen-ibld.in: #include "cgen/basic-modes.h".
 718         * fr30-ibld.c, * frv-ibld.c, * ip2k-ibld.c, * iq2000-ibld.c,
 719         * lm32-ibld.c, * m32c-ibld.c, * m32r-ibld.c, * mep-ibld.c,
 720         * mt-ibld.c, * openrisc-ibld.c, * xc16x-ibld.c,
 721         * xstormy16-ibld.c: Regenerate.
 722
 723 2010-01-04  Nick Clifton  <nickc@redhat.com>
 724
 725         PR 11123
 726         * arm-dis.c (print_insn_coprocessor): Initialise value.
 727
 728 2010-01-04  Edmar Wienskoski  <edmar@freescale.com>
 729
 730         * ppc-dis.c (ppc_opts): Add entry for "e500mc64".
 731
 732 2010-01-02  Doug Evans  <dje@sebabeach.org>
 733
 734         * cgen-asm.in: Update copyright year.
 735         * cgen-dis.in: Update copyright year.
 736         * cgen-ibld.in: Update copyright year.
 737         * fr30-asm.c, * fr30-desc.c, * fr30-desc.h, * fr30-dis.c,
 738         * fr30-ibld.c, * fr30-opc.c, * fr30-opc.h, * frv-asm.c, * frv-desc.c,
 739         * frv-desc.h, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * frv-opc.h,
 740         * ip2k-asm.c, * ip2k-desc.c, * ip2k-desc.h, * ip2k-dis.c,
 741         * ip2k-ibld.c, * ip2k-opc.c, * ip2k-opc.h, * iq2000-asm.c,
 742         * iq2000-desc.c, * iq2000-desc.h, * iq2000-dis.c, * iq2000-ibld.c,
 743         * iq2000-opc.c, * iq2000-opc.h, * lm32-asm.c, * lm32-desc.c,
 744         * lm32-desc.h, * lm32-dis.c, * lm32-ibld.c, * lm32-opc.c, * lm32-opc.h,
 745         * lm32-opinst.c, * m32c-asm.c, * m32c-desc.c, * m32c-desc.h,
 746         * m32c-dis.c, * m32c-ibld.c, * m32c-opc.c, * m32c-opc.h, * m32r-asm.c,
 747         * m32r-desc.c, * m32r-desc.h, * m32r-dis.c, * m32r-ibld.c,
 748         * m32r-opc.c, * m32r-opc.h, * m32r-opinst.c, * mep-asm.c, * mep-desc.c,
 749         * mep-desc.h, * mep-dis.c, * mep-ibld.c, * mep-opc.c, * mep-opc.h,
 750         * mt-asm.c, * mt-desc.c, * mt-desc.h, * mt-dis.c, * mt-ibld.c,
 751         * mt-opc.c, * mt-opc.h, * openrisc-asm.c, * openrisc-desc.c,
 752         * openrisc-desc.h, * openrisc-dis.c, * openrisc-ibld.c,
 753         * openrisc-opc.c, * openrisc-opc.h, * xc16x-asm.c, * xc16x-desc.c,
 754         * xc16x-desc.h, * xc16x-dis.c, * xc16x-ibld.c, * xc16x-opc.c,
 755         * xc16x-opc.h, * xstormy16-asm.c, * xstormy16-desc.c,
 756         * xstormy16-desc.h, * xstormy16-dis.c, * xstormy16-ibld.c,
 757         * xstormy16-opc.c, * xstormy16-opc.h: Regenerate.
 758
 759 For older changes see ChangeLog-2009
 760 \f
 761 Local Variables:
 762 mode: change-log
 763 left-margin: 8
 764 fill-column: 74
 765 version-control: never
 766 End: