opcodes/ChangeLog

   1 2006-11-29  Paul Brook  <paul@codesourcery.com>
   2
   3         * arm-dis.c (coprocessor_opcodes): Fix bitfields for fconstd/fconstd.
   4
   5 2006-11-22  Daniel Jacobowitz  <dan@codesourcery.com>
   6
   7         * arm-dis.c (last_is_thumb): Delete.
   8         (enum map_type, last_type): New.
   9         (print_insn_data): New.
  10         (get_sym_code_type): Take MAP_TYPE argument.  Check the type of
  11         the right symbol.  Handle $d.
  12         (print_insn): Check for mapping symbols even without a normal
  13         symbol.  Adjust searching.  If $d is found see how much data
  14         to print.  Handle data.
  15
  16 2006-11-16  Nathan Sidwell  <nathan@codesourcery.com>
  17
  18         * m68k-opc.c (m68k_opcodes): Place trap instructions before set
  19         conditionals.  Add tpf coldfire instruction as alias for trapf.
  20
  21 2006-11-09  H.J. Lu  <hongjiu.lu@intel.com>
  22
  23         * i386-dis.c (print_insn): Check PREFIX_REPNZ before
  24         PREFIX_DATA when prefix user table is used.
  25
  26 2006-11-09  H.J. Lu  <hongjiu.lu@intel.com>
  27
  28         * i386-dis.c (twobyte_uses_SSE_prefix): Renamed to ...
  29         (twobyte_uses_DATA_prefix): This.
  30         (twobyte_uses_REPNZ_prefix): New.
  31         (twobyte_uses_REPZ_prefix): Likewise.
  32         (threebyte_0x38_uses_DATA_prefix): Likewise.
  33         (threebyte_0x38_uses_REPNZ_prefix): Likewise.
  34         (threebyte_0x38_uses_REPZ_prefix): Likewise.
  35         (threebyte_0x3a_uses_DATA_prefix): Likewise.
  36         (threebyte_0x3a_uses_REPNZ_prefix): Likewise.
  37         (threebyte_0x3a_uses_REPZ_prefix): Likewise.
  38         (print_insn): Updated checking usages of DATA/REPNZ/REPZ
  39         prefixes.
  40
  41 2006-11-06  Troy Rollo  <troy@corvu.com.au>
  42
  43         * ppc-opc.c: Restore COM to mfcr wrongly removed 2003-07-04.
  44
  45 2006-11-01  Mei Ligang  <ligang@sunnorth.com.cn>
  46
  47         * score-opc.h (score_opcodes): Delete modifier '0x'.
  48
  49 2006-10-30  Paul Brook  <paul@codesourcery.com>
  50
  51         * arm-dis.c (last_is_thumb, last_mapping_sym, last_mapping_addr): New.
  52         (get_sym_code_type): New function.
  53         (print_insn): Search for mapping symbols.
  54
  55 2006-10-31  Mei Ligang  <ligang@sunnorth.com.cn>
  56
  57         * score-dis.c (print_insn): Correct the error code to print
  58         correct PCE instruction disassembly.
  59
  60 2006-10-26  Ben Elliston  <bje@au.ibm.com>
  61             Anton Blanchard  <anton@samba.org>
  62             Peter Bergner  <bergner@vnet.ibm.com>
  63
  64         * ppc-opc.c (A_L, DCM, DGM, TE, RMC, R, SP, S, SH16, XRT_L, EH,
  65         AFRALFRC_MASK, Z, ZRC, Z_MASK, XLRT_MASK, XEH_MASK): Define.
  66         (POWER6): Define.
  67         (powerpc_opcodes): Extend "lwarx", "ldarx", "dcbf", "fres", "fres.",
  68         "frsqrtes", "frsqrtes." "fre", "fre.", "frsqrte" and "frsqrte.".
  69         Add "doze", "nap", "sleep", "rvwinkle", "dcbfl", "prtyw", "prtyd",
  70         "mfcfar", "cmpb", "lfdpx", "stfdpx", "mtcfar", "mffgpr", "mftgpr",
  71         "lwzcix", "lhzcix", "lbzcix", "ldcix", "lfiwax", "stwcix", "sthcix",
  72         "stbcix", "stdcix", "lfdp", "dadd", "dadd.", "dqua", "dqua.", "dmul",
  73         "dmul.", "drrnd", "drrnd.", "dscli", "dscli.", "dquai", "dquai.",
  74         "dscri", "dscri.", "drintx", "drintx.", "dcmpo", "dtstex", "dtstdc",
  75         "dtstdg", "dtstsf", "drintn", "drintn.", "dctdp", "dctdp.", "dctfix",
  76         "dctfix.", "ddedpd", "ddedpd.", "dxex", "dxex.", "dsub", "dsub.",
  77         "ddiv", "ddiv.", "dcmpu", "drsp", "drsp.", "dcffix", "dcffix.",
  78         "denbcd", "denbcd.", "diex", "diex.", "stfdp", "daddq", "daddq.",
  79         "dquaq", "dquaq.", "fcpsgn", "fcpsgn.", "dmulq", "dmulq.",
  80         "drrndq", "drrndq.", "dscliq", "dscliq.", "dquaiq", "dquaiq.",
  81         "dscriq", "dscriq.", "drintxq", "drintxq.", "dcmpoq", "dtstexq",
  82         "dtstdcq", "dtstdgq", "dtstsfq", "drintnq", "drintnq.",
  83         "dctqpq", "dctqpq.", "dctfixq", "dctfixq.", "ddedpdq", "ddedpdq.",
  84         "dxexq", "dxexq.", "dsubq", "dsubq.", "ddivq", "ddivq.", "dcmpuq",
  85         "drdpq", "drdpq.", "dcffixq", "dcffixq.", "denbcdq", "denbcdq.",
  86         "diexq" and "diexq." opcodes.
  87
  88 2006-10-26  Daniel Jacobowitz  <dan@codesourcery.com>
  89
  90         * h8300-dis.c (bfd_h8_disassemble): Add missing consts.
  91
  92 2006-10-25  Trevor Smigiel  <Trevor_Smigiel@playstation.sony.com>
  93             Yukishige Shibata  <shibata@rd.scei.sony.co.jp>
  94             Nobuhisa Fujinami  <fnami@rd.scei.sony.co.jp>
  95             Takeaki Fukuoka  <fukuoka@rd.scei.sony.co.jp>
  96             Alan Modra  <amodra@bigpond.net.au>
  97
  98         * spu-dis.c: New file.
  99         * spu-opc.c: New file.
 100         * configure.in: Add SPU support.
 101         * disassemble.c: Likewise.
 102         * Makefile.am: Likewise.  Run "make dep-am".
 103         * Makefile.in: Regenerate.
 104         * configure: Regenerate.
 105         * po/POTFILES.in: Regenerate.
 106
 107 2006-10-24  Andrew Pinski  <andrew_pinski@playstation.sony.com>
 108
 109         * ppc-opc.c (CELL): New define.
 110         (powerpc_opcodes): Enable hrfid for Cell.  Add ldbrx and stdbrx,
 111         cell specific instructions.  Add {st,l}x{r,l}{,l} cell specific
 112         VMX instructions.
 113         * ppc-dis.c (powerpc_dialect): Handle cell.
 114
 115 2006-10-23  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 116
 117         * i386-dis.c (dis386): Add support for the change in POPCNT opcode in
 118         amdfam10 architecture.
 119         (PREGRP37): NEW.
 120         (print_insn): Disallow REP prefix for POPCNT.
 121
 122 2006-10-20  Andrew Stubbs  <andrew.stubbs@st.com>
 123
 124         * sh-dis.c (print_insn_sh): Remove 0x from output to prevent GDB
 125         duplicating it.
 126
 127 2006-10-18  Dave Brolley  <brolley@redhat.com>
 128
 129         * configure.in (BFD_MACHINES): Add cgen-bitset.lo for bfd_sh_arch.
 130         * configure: Regenerated.
 131
 132 2006-09-29  Alan Modra  <amodra@bigpond.net.au>
 133
 134         * po/POTFILES.in: Regenerate.
 135
 136 2006-09-26  Mark Shinwell  <shinwell@codesourcery.com>
 137             Joseph Myers  <joseph@codesourcery.com>
 138             Ian Lance Taylor  <ian@wasabisystems.com>
 139             Ben Elliston  <bje@wasabisystems.com>
 140
 141         * arm-dis.c (coprocessor_opcodes): The X-qualifier to WMADD may
 142         only be used with the default multiply-add operation, so if N is
 143         set, don't bother printing X.  Add new iwmmxt instructions.
 144         (IWMMXT_INSN_COUNT): Update.
 145         (iwmmxt_wwssnames): Qualify "wwss" names at index 2, 6, 10 and 14
 146         with a 'c' suffix.
 147         (print_insn_coprocessor): Check for iWMMXt2.  Handle format
 148         specifiers 'r', 'i'.
 149
 150 2006-09-24  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 151
 152         PR binutils/3100
 153         * i386-dis.c (prefix_user_table): Fix the second operand of
 154         maskmovdqu instruction to allow only %xmm register instead of
 155         both %xmm register and memory.
 156
 157 2006-09-23  H.J. Lu  <hongjiu.lu@intel.com>
 158
 159         PR binutils/3235
 160         * i386-dis.c (OP_OFF64): Get 32bit offset if there is an
 161         address size prefix.
 162
 163 2006-09-17  Mei Ligang  <ligang@sunnorth.com.cn>
 164
 165         * score-dis.c: New file.
 166         * score-opc.h: New file.
 167         * Makefile.am: Add Score files.
 168         * Makefile.in: Regenerate.
 169         * configure.in: Add support for Score target.
 170         * configure: Regenerate.
 171         * disassemble.c: Add support for Score target.
 172
 173 2006-09-16  Nick Clifton  <nickc@redhat.com>
 174             Pedro Alves  <pedro_alves@portugalmail.pt>
 175
 176         * arm-dis.c: Make use of new STRING_COMMA_LEN and CONST_STRNEQ
 177         macros defined in bfd.h.
 178         * cris-dis.c: Likewise.
 179         * h8300-dis.c: Likewise.
 180         * i386-dis.c: Likewise.
 181         * ia64-gen.c: Likewise.
 182         * mips-dis: Likewise.
 183
 184 2006-09-04  Paul Brook  <paul@codesourcery.com>
 185
 186         * arm-dis.c (neon_opcode): Fix suffix on VMOVN.
 187
 188 2006-08-23  H.J. Lu  <hongjiu.lu@intel.com>
 189
 190         * i386-dis.c (three_byte_table): Expand to 256 elements.
 191
 192 2006-08-04  Dwarakanath Rajagopal  <dwarak.rajagopal@amd.com>
 193
 194         PR binutils/3000
 195         * i386-dis.c (MXC,EMC): Define.
 196         (OP_MXC): New function to handle cvt* (convert instructions) between
 197         %xmm and %mm register correctly.
 198         (OP_EMC): ditto.
 199         (prefix_user_table): Modified cvtpi2pd,cvtpd2pi and cvttpd2pi
 200         instruction operands in PREGRP2,PREGRP3,PREGRP4 appropriately
 201         with EMC/MXC.
 202
 203 2006-07-29  Richard Sandiford  <richard@codesourcery.com>
 204
 205         * m68k-opc.c (m68k_opcodes): Fix operand specificer in the Coldfire
 206         "fdaddl" entry.
 207
 208 2006-07-19  Paul Brook  <paul@codesourcery.com>
 209
 210         * armd-dis.c (arm_opcodes): Fix rbit opcode.
 211
 212 2006-07-18  H.J. Lu  <hongjiu.lu@intel.com>
 213
 214         * i386-dis.c (grps): Change "sldtQ", "strQ" and "smswQ" to
 215         "sldt", "str" and "smsw".
 216
 217 2006-07-15  H.J. Lu  <hongjiu.lu@intel.com>
 218
 219         PR binutils/2829
 220         * i386-dis.c (GRP11_C6): NEW.
 221         (GRP11_C7): Likewise.
 222         (GRP12): Updated.
 223         (GRP13): Likewise.
 224         (GRP14): Likewise.
 225         (GRP15): Likewise.
 226         (GRP16): Likewise.
 227         (GRPAMD): Likewise.
 228         (GRPPADLCK1): Likewise.
 229         (GRPPADLCK2): Likewise.
 230         (dis386): Use GRP11_C6 and GRP11_C7 for entres 0xc6 and 0xc7,
 231         respectively.
 232         (grps): Add entries for GRP11_C6 and GRP11_C7.
 233
 234 2006-07-10 Dwarakanath Rajagopal        <dwarak.rajagopal@amd.com>
 235            Michael Meissner             <michael.meissner@amd.com>
 236
 237         * i386-dis.c (dis386): Add support for 4 operand instructions. Add
 238         support for amdfam10 SSE4a/ABM instructions. Modify all
 239         initializer macros to have additional arguments. Disallow REP
 240         prefix for non-string instructions.
 241         (print_insn): Ditto.
 242
 243 2006-07-05  Julian Brown  <julian@codesourcery.com>
 244
 245         * arm-dis.c (coprocessor): Alter fmsrr disassembly syntax.
 246
 247 2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>
 248
 249         * i386-dis.c (dis386_twobyte): Use "nopQ" for 0x1f.
 250         (twobyte_has_modrm): Set 1 for 0x1f.
 251
 252 2006-06-12  H.J. Lu  <hongjiu.lu@intel.com>
 253
 254         * i386-dis.c (NOP_Fixup): Removed.
 255         (NOP_Fixup1): New.
 256         (NOP_Fixup2): Likewise.
 257         (dis386): Use NOP_Fixup1 and NOP_Fixup2 on 0x90.
 258
 259 2006-06-12  Julian Brown  <julian@codesourcery.com>
 260
 261         * arm-dis.c (print_insn_neon): Disassemble 32-bit immediates as signed
 262         on 64-bit hosts.
 263
 264 2006-06-10  H.J. Lu  <hongjiu.lu@intel.com>
 265
 266         * i386.c (GRP10): Renamed to ...
 267         (GRP12): This.
 268         (GRP11): Renamed to ...
 269         (GRP13): This.
 270         (GRP12): Renamed to ...
 271         (GRP14): This.
 272         (GRP13): Renamed to ...
 273         (GRP15): This.
 274         (GRP14): Renamed to ...
 275         (GRP16): This.
 276         (dis386_twobyte): Updated.
 277         (grps): Likewise.
 278
 279 2006-06-09  Nick Clifton  <nickc@redhat.com>
 280
 281         * po/fi.po: Updated Finnish translation.
 282
 283 2006-06-07  Joseph S. Myers  <joseph@codesourcery.com>
 284
 285         * po/Make-in (pdf, ps): New dummy targets.
 286
 287 2006-06-06  Paul Brook  <paul@codesourcery.com>
 288
 289         * arm-dis.c (coprocessor_opcodes): Add %c to unconditional arm
 290         instructions.
 291         (neon_opcodes): Add conditional execution specifiers.
 292         (thumb_opcodes): Ditto.
 293         (thumb32_opcodes): Ditto.
 294         (arm_conditional): Change 0xe to "al" and add "" to end.
 295         (ifthen_state, ifthen_next_state, ifthen_address): New.
 296         (IFTHEN_COND): Define.
 297         (print_insn_coprocessor, print_insn_neon): Print thumb conditions.
 298         (print_insn_arm): Change %c to use new values of arm_conditional.
 299         (print_insn_thumb16): Print thumb conditions.  Add %I.
 300         (print_insn_thumb32): Print thumb conditions.
 301         (find_ifthen_state): New function.
 302         (print_insn): Track IT block state.
 303
 304 2006-06-06  Ben Elliston  <bje@au.ibm.com>
 305             Anton Blanchard  <anton@samba.org>
 306             Peter Bergner  <bergner@vnet.ibm.com>
 307
 308         * ppc-dis.c (powerpc_dialect): Handle power6 option.
 309         (print_ppc_disassembler_options): Mention power6.
 310
 311 2006-06-06  Thiemo Seufer  <ths@mips.com>
 312             Chao-ying Fu  <fu@mips.com>
 313
 314         * mips-dis.c: Disassemble DSP64 instructions for MIPS64R2.
 315         * mips-opc.c: Add DSP64 instructions.
 316
 317 2006-06-06  Alan Modra  <amodra@bigpond.net.au>
 318
 319         * m68hc11-dis.c (print_insn): Warning fix.
 320
 321 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 322
 323         * po/Make-in (top_builddir): Define.
 324
 325 2006-06-05  Alan Modra  <amodra@bigpond.net.au>
 326
 327         * Makefile.am: Run "make dep-am".
 328         * Makefile.in: Regenerate.
 329         * config.in: Regenerate.
 330
 331 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 332
 333         * Makefile.am (INCLUDES): Use @INCINTL@.
 334         * acinclude.m4: Include new gettext macros.
 335         * configure.in: Use ZW_GNU_GETTEXT_SISTER_DIR and AM_PO_SUBDIRS.
 336         Remove local code for po/Makefile.
 337         * Makefile.in, aclocal.m4, configure: Regenerated.
 338
 339 2006-05-30  Nick Clifton  <nickc@redhat.com>
 340
 341         * po/es.po: Updated Spanish translation.
 342
 343 2006-05-25  Richard Sandiford  <richard@codesourcery.com>
 344
 345         * m68k-opc.c (m68k_opcodes): Fix the masks of the Coldfire fmovemd
 346         and fmovem entries.  Put register list entries before immediate
 347         mask entries.  Use "l" rather than "L" in the fmovem entries.
 348         * m68k-dis.c (match_insn_m68k): Remove the PRIV argument and work it
 349         out from INFO.
 350         (m68k_scan_mask): New function, split out from...
 351         (print_insn_m68k): ...here.  If no architecture has been set,
 352         first try printing an m680x0 instruction, then try a Coldfire one.
 353
 354 2006-05-24  Nick Clifton  <nickc@redhat.com>
 355
 356         * po/ga.po: Updated Irish translation.
 357
 358 2006-05-22  Nick Clifton  <nickc@redhat.com>
 359
 360         * crx-dis.c (EXTRACT): Make macro work on 64-bit hosts.
 361
 362 2006-05-22  Nick Clifton  <nickc@redhat.com>
 363
 364         * po/nl.po: Updated translation.
 365
 366 2006-05-18  Alan Modra  <amodra@bigpond.net.au>
 367
 368         * avr-dis.c: Formatting fix.
 369
 370 2006-05-14  Thiemo Seufer  <ths@mips.com>
 371
 372         * mips16-opc.c (I1, I32, I64): New shortcut defines.
 373         (mips16_opcodes): Change membership of instructions to their
 374         lowest baseline ISA.
 375
 376 2006-05-09  H.J. Lu  <hongjiu.lu@intel.com>
 377
 378         * i386-dis.c (grps): Update sgdt/sidt for 64bit.
 379
 380 2006-05-05  Julian Brown  <julian@codesourcery.com>
 381
 382         * arm-dis.c (coprocessor_opcodes): Don't interpret fldmx/fstmx as
 383         vldm/vstm.
 384
 385 2006-05-05  Thiemo Seufer  <ths@mips.com>
 386             David Ung  <davidu@mips.com>
 387
 388         * mips-opc.c: Add macro for cache instruction.
 389
 390 2006-05-04  Thiemo Seufer  <ths@mips.com>
 391             Nigel Stephens  <nigel@mips.com>
 392             David Ung  <davidu@mips.com>
 393
 394         * mips-dis.c (mips_arch_choices): Add smartmips instruction
 395         decoding to MIPS32 and MIPS32R2.  Limit DSP decoding to release
 396         2 ISAs.  Add MIPS3D decoding to MIPS32R2.  Add MT decoding to
 397         MIPS64R2.
 398         * mips-opc.c: fix random typos in comments.
 399         (INSN_SMARTMIPS): New defines.
 400         (mips_builtin_opcodes): Add paired single support for MIPS32R2.
 401         Move bc3f, bc3fl, bc3t, bc3tl downwards.  Move flushi, flushd,
 402         flushid, wb upwards.  Move cfc3, ctc3 downwards.  Rework the
 403         FP_S and FP_D flags to denote single and double register
 404         accesses separately.  Move dmfc3, dmtc3, mfc3, mtc3 downwards.
 405         Allow jr.hb and jalr.hb for release 1 ISAs.  Allow luxc1, suxc1
 406         for MIPS32R2.  Add SmartMIPS instructions.  Add two-argument
 407         variants of bc2f, bc2fl, bc2t, bc2tl.  Add mfhc2, mthc2 to
 408         release 2 ISAs.
 409         * mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
 410
 411 2006-05-03  Thiemo Seufer  <ths@mips.com>
 412
 413         * mips-opc.c (mips_builtin_opcodes): Fix mftr argument order.
 414
 415 2006-05-02  Thiemo Seufer  <ths@mips.com>
 416             Nigel Stephens  <nigel@mips.com>
 417             David Ung  <davidu@mips.com>
 418
 419         * mips-dis.c (print_insn_args): Force mips16 to odd addresses.
 420         (print_mips16_insn_arg): Force mips16 to odd addresses.
 421
 422 2006-04-30  Thiemo Seufer  <ths@mips.com>
 423             David Ung  <davidu@mips.com>
 424
 425         * mips-opc.c (mips_builtin_opcodes): Add udi instructions
 426         "udi0" to "udi15".
 427         * mips-dis.c (print_insn_args): Adds udi argument handling.
 428
 429 2006-04-28  James E Wilson  <wilson@specifix.com>
 430
 431         * m68k-dis.c (match_insn_m68k): Restore fprintf_func before printing
 432         error message.
 433
 434 2006-04-28  Thiemo Seufer  <ths@mips.com>
 435             David Ung  <davidu@mips.com>
 436             Nigel Stephens  <nigel@mips.com>
 437
 438         * mips-dis.c (mips_cp0sel_names_mips3264r2): Add MT register
 439         names.
 440
 441 2006-04-28  Thiemo Seufer  <ths@mips.com>
 442             Nigel Stephens  <nigel@mips.com>
 443             David Ung  <davidu@mips.com>
 444
 445         * mips-dis.c (print_insn_args): Add mips_opcode argument.
 446         (print_insn_mips):  Adjust print_insn_args call.
 447
 448 2006-04-28  Thiemo Seufer  <ths@mips.com>
 449             Nigel Stephens  <nigel@mips.com>
 450
 451         * mips-dis.c (print_insn_args): Print $fcc only for FP
 452         instructions, use $cc elsewise.
 453
 454 2006-04-28  Thiemo Seufer  <ths@mips.com>
 455             Nigel Stephens  <nigel@mips.com>
 456
 457         * opcodes/mips-dis.c (mips16_to_32_reg_map, mips16_reg_names):
 458         Map MIPS16 registers to O32 names.
 459         (print_mips16_insn_arg): Use mips16_reg_names.
 460
 461 2006-04-26  Julian Brown  <julian@codesourcery.com>
 462
 463         * arm-dis.c (print_insn_neon): Disassemble floating-point constant
 464         VMOV.
 465
 466 2006-04-26  Nathan Sidwell  <nathan@codesourcery.com>
 467             Julian Brown  <julian@codesourcery.com>
 468
 469         * opcodes/arm-dis.c (coprocessor_opcodes): Add %A, %B, %k, convert
 470         %<code>[zy] into %[zy]<code>.  Expand meaning of %<bitfield>['`?].
 471         Add unified load/store instruction names.
 472         (neon_opcode_table): New.
 473         (arm_opcodes): Expand meaning of %<bitfield>['`?].
 474         (arm_decode_bitfield): New.
 475         (print_insn_coprocessor): Add pc argument. Add %A & %B specifiers.
 476         Use arm_decode_bitfield and adjust numeric specifiers. Adjust %z & %y.
 477         (print_insn_neon): New.
 478         (print_insn_arm): Adjust print_insn_coprocessor call. Call
 479         print_insn_neon. Use arm_decode_bitfield and adjust numeric specifiers.
 480         (print_insn_thumb32): Likewise.
 481
 482 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 483
 484         * Makefile.am: Run "make dep-am".
 485         * Makefile.in: Regenerate.
 486
 487 2006-04-19  Alan Modra  <amodra@bigpond.net.au>
 488
 489         * avr-dis.c (avr_operand): Warning fix.
 490
 491         * configure: Regenerate.
 492
 493 2006-04-16  Daniel Jacobowitz  <dan@codesourcery.com>
 494
 495         * po/POTFILES.in: Regenerated.
 496
 497 2006-04-12   Hochstein  <hochstein@algo.informatik.tu-darmstadt.de>
 498
 499         PR binutils/2454
 500         * avr-dis.c (avr_operand): Arrange for a comment to appear before
 501         the symolic form of an address, so that the output of objdump -d
 502         can be reassembled.
 503
 504 2006-04-10  DJ Delorie  <dj@redhat.com>
 505
 506         * m32c-asm.c: Regenerate.
 507
 508 2006-04-06  Carlos O'Donell  <carlos@codesourcery.com>
 509
 510         * Makefile.am: Add install-html target.
 511         * Makefile.in: Regenerate.
 512
 513 2006-04-06  Nick Clifton  <nickc@redhat.com>
 514
 515         * po/vi/po: Updated Vietnamese translation.
 516
 517 2006-03-31  Paul Koning  <ni1d@arrl.net>
 518
 519         * pdp11-opc.c (pdp11_opcodes): Fix opcode for SEC instruction.
 520
 521 2006-03-16  Bernd Schmidt  <bernd.schmidt@analog.com>
 522
 523         * bfin-dis.c (decode_dsp32shiftimm_0): Simplify and correct the
 524         logic to identify halfword shifts.
 525
 526 2006-03-16  Paul Brook  <paul@codesourcery.com>
 527
 528         * arm-dis.c (arm_opcodes): Rename swi to svc.
 529         (thumb_opcodes): Ditto.
 530
 531 2006-03-13  DJ Delorie  <dj@redhat.com>
 532
 533         * m32c-asm.c: Regenerate.
 534         * m32c-desc.c: Likewise.
 535         * m32c-desc.h: Likewise.
 536         * m32c-dis.c: Likewise.
 537         * m32c-ibld.c: Likewise.
 538         * m32c-opc.c: Likewise.
 539         * m32c-opc.h: Likewise.
 540
 541 2006-03-10  DJ Delorie  <dj@redhat.com>
 542
 543         * m32c-desc.c: Regenerate with mul.l, mulu.l.
 544         * m32c-opc.c: Likewise.
 545         * m32c-opc.h: Likewise.
 546
 547
 548 2006-03-09  Nick Clifton  <nickc@redhat.com>
 549
 550         * po/sv.po: Updated Swedish translation.
 551
 552 2006-03-07  H.J. Lu  <hongjiu.lu@intel.com>
 553
 554         PR binutils/2428
 555         * i386-dis.c (REP_Fixup): New function.
 556         (AL): Remove duplicate.
 557         (Xbr): New.
 558         (Xvr): Likewise.
 559         (Ybr): Likewise.
 560         (Yvr): Likewise.
 561         (indirDXr): Likewise.
 562         (ALr): Likewise.
 563         (eAXr): Likewise.
 564         (dis386): Updated entries of ins, outs, movs, lods and stos.
 565
 566 2006-03-05  Nick Clifton  <nickc@redhat.com>
 567
 568         * cgen-ibld.in (insert_normal): Cope with attempts to insert a
 569         signed 32-bit value into an unsigned 32-bit field when the host is
 570         a 64-bit machine.
 571         * fr30-ibld.c: Regenerate.
 572         * frv-ibld.c: Regenerate.
 573         * ip2k-ibld.c: Regenerate.
 574         * iq2000-asm.c: Regenerate.
 575         * iq2000-ibld.c: Regenerate.
 576         * m32c-ibld.c: Regenerate.
 577         * m32r-ibld.c: Regenerate.
 578         * openrisc-ibld.c: Regenerate.
 579         * xc16x-ibld.c: Regenerate.
 580         * xstormy16-ibld.c: Regenerate.
 581
 582 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
 583
 584         * xc16x-asm.c: Regenerate.
 585         * xc16x-dis.c: Regenerate.
 586
 587 2006-02-27  Carlos O'Donell  <carlos@codesourcery.com>
 588
 589         * po/Make-in: Add html target.
 590
 591 2006-02-27  H.J. Lu <hongjiu.lu@intel.com>
 592
 593         * i386-dis.c (IS_3BYTE_OPCODE): New for 3-byte opcodes used by
 594         Intel Merom New Instructions.
 595         (THREE_BYTE_0): Likewise.
 596         (THREE_BYTE_1): Likewise.
 597         (three_byte_table): Likewise.
 598         (dis386_twobyte): Use THREE_BYTE_0 for entry 0x38. Use
 599         THREE_BYTE_1 for entry 0x3a.
 600         (twobyte_has_modrm): Updated.
 601         (twobyte_uses_SSE_prefix): Likewise.
 602         (print_insn): Handle 3-byte opcodes used by Intel Merom New
 603         Instructions.
 604
 605 2006-02-24  David S. Miller  <davem@sunset.davemloft.net>
 606
 607         * sparc-dis.c (v9_priv_reg_names): Add "gl" entry.
 608         (v9_hpriv_reg_names): New table.
 609         (print_insn_sparc): Allow values up to 16 for '?' and '!'.
 610         New cases '$' and '%' for read/write hyperprivileged register.
 611         * sparc-opc.c (sparc_opcodes): Add new entries for UA2005
 612         window handling and rdhpr/wrhpr instructions.
 613
 614 2006-02-24  DJ Delorie  <dj@redhat.com>
 615
 616         * m32c-desc.c: Regenerate with linker relaxation attributes.
 617         * m32c-desc.h: Likewise.
 618         * m32c-dis.c: Likewise.
 619         * m32c-opc.c: Likewise.
 620
 621 2006-02-24  Paul Brook  <paul@codesourcery.com>
 622
 623         * arm-dis.c (arm_opcodes): Add V7 instructions.
 624         (thumb32_opcodes): Ditto.  Handle V7M MSR/MRS variants.
 625         (print_arm_address): New function.
 626         (print_insn_arm): Use it.  Add 'P' and 'U' cases.
 627         (psr_name): New function.
 628         (print_insn_thumb32): Add 'U', 'C' and 'D' cases.
 629
 630 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 631
 632         * ia64-opc-i.c (bXc): New.
 633         (mXc): Likewise.
 634         (OpX2TaTbYaXcC): Likewise.
 635         (TF). Likewise.
 636         (TFCM). Likewise.
 637         (ia64_opcodes_i): Add instructions for tf.
 638
 639         * ia64-opc.h (IMMU5b): New.
 640
 641         * ia64-asmtab.c: Regenerated.
 642
 643 2006-02-23  H.J. Lu  <hongjiu.lu@intel.com>
 644
 645         * ia64-gen.c: Update copyright years.
 646         * ia64-opc-b.c: Likewise.
 647
 648 2006-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 649
 650         * ia64-gen.c (lookup_regindex): Handle ".vm".
 651         (print_dependency_table): Handle '\"'.
 652
 653         * ia64-ic.tbl: Updated from SDM 2.2.
 654         * ia64-raw.tbl: Likewise.
 655         * ia64-waw.tbl: Likewise.
 656         * ia64-asmtab.c: Regenerated.
 657
 658         * ia64-opc-b.c (ia64_opcodes_b): Add vmsw.0 and vmsw.1.
 659
 660 2006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
 661             Anil Paranjape   <anilp1@kpitcummins.com>
 662             Shilin Shakti    <shilins@kpitcummins.com>
 663
 664         * xc16x-desc.h: New file
 665         * xc16x-desc.c: New file
 666         * xc16x-opc.h: New file
 667         * xc16x-opc.c: New file
 668         * xc16x-ibld.c: New file
 669         * xc16x-asm.c: New file
 670         * xc16x-dis.c: New file
 671         * Makefile.am: Entries for xc16x
 672         * Makefile.in: Regenerate
 673         * cofigure.in: Add xc16x target information.
 674         * configure: Regenerate.
 675         * disassemble.c: Add xc16x target information.
 676
 677 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 678
 679         * i386-dis.c (dis386_twobyte): Use "movZ" for debug register
 680         moves.
 681
 682 2006-02-11  H.J. Lu  <hongjiu.lu@intel.com>
 683
 684         * i386-dis.c ('Z'): Add a new macro.
 685         (dis386_twobyte): Use "movZ" for control register moves.
 686
 687 2006-02-10  Nick Clifton  <nickc@redhat.com>
 688
 689         * iq2000-asm.c: Regenerate.
 690
 691 2006-02-07  Nathan Sidwell  <nathan@codesourcery.com>
 692
 693         * m68k-dis.c (print_insn_m68k): Use bfd_m68k_mach_to_features.
 694
 695 2006-01-26  David Ung  <davidu@mips.com>
 696
 697         * mips-opc.c: Add I33 masks to these MIPS32R2 instructions: prefx,
 698         ceil.l.d, ceil.l.s, cvt.d.l, cvt.l.d, cvt.l.s, cvt.s.l, floor.l.d,
 699         floor.l.s, ldxc1, lwxc1, madd.d, madd.s, msub.d, msub.s, nmadd.d,
 700         nmadd.s, nmsub.d, nmsub.s, recip.d, recip.s, round.l.d, rsqrt.d,
 701         rsqrt.s, sdxc1, swxc1, trunc.l.d, trunc.l.s.
 702
 703 2006-01-18  Arnold Metselaar  <arnoldm@sourceware.org>
 704
 705         * z80-dis.c (struct buffer, prt_d, prt_d_n, arit_d, ld_r_d,
 706         ld_d_r, pref_xd_cb): Use signed char to hold data to be
 707         disassembled.
 708         * z80-dis.c (TXTSIZ): Increase buffer size to 24, this fixes
 709         buffer overflows when disassembling instructions like
 710         ld (ix+123),0x23
 711         * z80-dis.c (opc_ind, pref_xd_cb): Suppress '+' in an indexed
 712         operand, if the offset is negative.
 713
 714 2006-01-17  Arnold Metselaar  <arnoldm@sourceware.org>
 715
 716         * z80-dis.c (struct buffer, prt_d, prt_d_n, pref_xd_cb): Use
 717         unsigned char to hold data to be disassembled.
 718
 719 2006-01-17  Andreas Schwab  <schwab@suse.de>
 720
 721         PR binutils/1486
 722         * disassemble.c (disassemble_init_for_target): Set
 723         disassembler_needs_relocs for bfd_arch_arm.
 724
 725 2006-01-16  Paul Brook  <paul@codesourcery.com>
 726
 727         * m68k-opc.c (m68k_opcodes): Fix opcodes for ColdFire f?abss,
 728         f?add?, and f?sub? instructions.
 729
 730 2006-01-16  Nick Clifton  <nickc@redhat.com>
 731
 732         * po/zh_CN.po: New Chinese (simplified) translation.
 733         * configure.in (ALL_LINGUAS): Add "zh_CH".
 734         * configure: Regenerate.
 735
 736 2006-01-05  Paul Brook  <paul@codesourcery.com>
 737
 738         * m68k-opc.c (m68k_opcodes): Add missing ColdFire fdsqrtd entry.
 739
 740 2006-01-06  DJ Delorie  <dj@redhat.com>
 741
 742         * m32c-desc.c: Regenerate.
 743         * m32c-opc.c: Regenerate.
 744         * m32c-opc.h: Regenerate.
 745
 746 2006-01-03  DJ Delorie  <dj@redhat.com>
 747
 748         * cgen-ibld.in (extract_normal): Avoid memory range errors.
 749         * m32c-ibld.c: Regenerated.
 750
 751 For older changes see ChangeLog-2005
 752 \f
 753 Local Variables:
 754 mode: change-log
 755 left-margin: 8
 756 fill-column: 74
 757 version-control: never
 758 End: